API Reference | |
| Control Register Enums | |
| This set of enumerations aids in configuring the SAR CTRL register. | |
| Sample Control Register Enums | |
| This set of enumerations are used in configuring the SAR SAMPLE_CTRL register. | |
| Sample Time Register Enums | |
| This set of enumerations aids in configuring the SAR SAMPLE_TIME* registers. | |
| Range Interrupt Register Enums | |
| This set of enumerations aids in configuring the SAR RANGE* registers. | |
| Channel Configuration Register Enums | |
| This set of enumerations aids in configuring the SAR CHAN_CONFIG register. | |
| SARMUX Switch Control Register Enums | |
| This set of enumerations aids in configuring the uint32_t muxSwitch and uint32_t muxSwitchSqCtrl registers. | |
| enum cy_en_sar_status_t |
Definitions for starting a conversion used in Cy_SAR_StartConvert.
Definitions for the return mode used in Cy_SAR_IsEndConversion.
Switch register selection for Cy_SAR_SetAnalogSwitch and Cy_SAR_GetAnalogSwitch.
| Enumerator | |
|---|---|
| CY_SAR_MUX_SWITCH0 | SARMUX switch control register. |
For PASS_V2 the SAR clock can come from:
| Enumerator | |
|---|---|
| CY_SAR_CLK_PERI | SAR clock source is one of PERI dividers (SAR is only operational in chip ACTIVE mode) |
| CY_SAR_CLK_DEEPSLEEP | SAR clock source is CLK_DPSLP (SAR can be operational in both chip ACTIVE and DEEPSLEEP modes) |