| commit | 3034e51996664d14b43e00a180f4f4cf307e4671 | [log] [tgz] |
|---|---|---|
| author | Michel Jaouen <michel.jaouen@st.com> | Thu Feb 24 18:11:25 2022 +0100 |
| committer | David Hu <david.hu@arm.com> | Mon Feb 28 02:46:44 2022 +0100 |
| tree | 1bc77f5c9c288ee9fbcd8e7d886f7daafe2670e1 | |
| parent | a2948dc8329380e22a1cbe186e6b42539827f861 [diff] |
platform: stm: stm3u5xx: set AIRCR with PRIS=1 in early bootstage Since SYSCFG_CSLOCKR locks vector and AICR in early boot, AICR conf needs to be set in early stage. Change-Id: I2c614b26b8a94f15231f31a381b1f5d5dcc90935 Signed-off-by: Michel Jaouen <michel.jaouen@st.com>