Core: Fix for enable SPE preemption by NSPE
Add tfm_spm_hal_set_secure_irq_priority(...) function to the SPM HAL
Change-Id: Iafb70b516175f91abce0324ce271704004bf46b3
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>
diff --git a/platform/ext/target/mps2/an519/spm_hal.c b/platform/ext/target/mps2/an519/spm_hal.c
index a8c4ec5..e486e52 100644
--- a/platform/ext/target/mps2/an519/spm_hal.c
+++ b/platform/ext/target/mps2/an519/spm_hal.c
@@ -392,3 +392,9 @@
{
return *((uint32_t *)(memory_regions.non_secure_code_start+ 4));
}
+
+void tfm_spm_hal_set_secure_irq_priority(int32_t irq_line, uint32_t priority)
+{
+ uint32_t quantized_priority = priority >> (8U - __NVIC_PRIO_BITS);
+ NVIC_SetPriority(irq_line, quantized_priority);
+}
diff --git a/platform/ext/target/mps2/an521/spm_hal.c b/platform/ext/target/mps2/an521/spm_hal.c
index 6a8d7be..193b2a3 100644
--- a/platform/ext/target/mps2/an521/spm_hal.c
+++ b/platform/ext/target/mps2/an521/spm_hal.c
@@ -392,3 +392,9 @@
{
return *((uint32_t *)(memory_regions.non_secure_code_start+ 4));
}
+
+void tfm_spm_hal_set_secure_irq_priority(int32_t irq_line, uint32_t priority)
+{
+ uint32_t quantized_priority = priority >> (8U - __NVIC_PRIO_BITS);
+ NVIC_SetPriority(irq_line, quantized_priority);
+}
diff --git a/platform/ext/target/mps3/an524/spm_hal.c b/platform/ext/target/mps3/an524/spm_hal.c
index 05753d2..0d1316d 100644
--- a/platform/ext/target/mps3/an524/spm_hal.c
+++ b/platform/ext/target/mps3/an524/spm_hal.c
@@ -421,3 +421,9 @@
*/
#endif
}
+
+void tfm_spm_hal_set_secure_irq_priority(int32_t irq_line, uint32_t priority)
+{
+ uint32_t quantized_priority = priority >> (8U - __NVIC_PRIO_BITS);
+ NVIC_SetPriority(irq_line, quantized_priority);
+}
diff --git a/platform/ext/target/musca_a/spm_hal.c b/platform/ext/target/musca_a/spm_hal.c
index 11f618d..e658fc8 100644
--- a/platform/ext/target/musca_a/spm_hal.c
+++ b/platform/ext/target/musca_a/spm_hal.c
@@ -392,3 +392,9 @@
{
return *((uint32_t *)(memory_regions.non_secure_code_start+ 4));
}
+
+void tfm_spm_hal_set_secure_irq_priority(int32_t irq_line, uint32_t priority)
+{
+ uint32_t quantized_priority = priority >> (8U - __NVIC_PRIO_BITS);
+ NVIC_SetPriority(irq_line, quantized_priority);
+}
diff --git a/platform/ext/target/musca_b1/spm_hal.c b/platform/ext/target/musca_b1/spm_hal.c
index 858c4d1..1e350ca 100644
--- a/platform/ext/target/musca_b1/spm_hal.c
+++ b/platform/ext/target/musca_b1/spm_hal.c
@@ -392,3 +392,9 @@
{
return *((uint32_t *)(memory_regions.non_secure_code_start+ 4));
}
+
+void tfm_spm_hal_set_secure_irq_priority(int32_t irq_line, uint32_t priority)
+{
+ uint32_t quantized_priority = priority >> (8U - __NVIC_PRIO_BITS);
+ NVIC_SetPriority(irq_line, quantized_priority);
+}
diff --git a/platform/include/tfm_spm_hal.h b/platform/include/tfm_spm_hal.h
index b8e654b..3458b17 100644
--- a/platform/include/tfm_spm_hal.h
+++ b/platform/include/tfm_spm_hal.h
@@ -148,6 +148,17 @@
*/
uint32_t tfm_spm_hal_get_ns_entry_point(void);
+/**
+ * \brief Set the priority of a secure IRQ
+ *
+ * \param[in] irq_line The IRQ to set the priority for. Might be less than 0
+ * \param[in] priority The priority to set. [0..255]
+ *
+ * \details This function sets the priority for the IRQ passed in the parameter.
+ * The precision of the priority value might be adjusted to match the
+ * available priority bits in the underlying target platform.
+ */
+void tfm_spm_hal_set_secure_irq_priority(int32_t irq_line, uint32_t priority);
#if (TFM_LVL != 1) && !defined(TFM_PSA_API)
/**