Platform M2351: Add config.cmake

Use new style RTX link.
Add config.cmake and force MCUBOOT_IMAGE_NUMBER=1
Update README.rst to fix typo and remove MCUBOOT_IMAGE_NUMBER=1 in
command line.

Signed-off-by: WSChang <wschang0@nuvoton.com>

Change-Id: I9b3e646dd222938ac614475456b33970cef863d9
diff --git a/platform/ext/target/nuvoton/m2351/CMakeLists.txt b/platform/ext/target/nuvoton/m2351/CMakeLists.txt
index 5a28f6b..d8a25b1 100644
--- a/platform/ext/target/nuvoton/m2351/CMakeLists.txt
+++ b/platform/ext/target/nuvoton/m2351/CMakeLists.txt
@@ -42,14 +42,9 @@
         $<$<C_COMPILER_ID:GNU>:${CMAKE_CURRENT_SOURCE_DIR}/device/source/gcc/m2351_ns.ld>
         $<$<C_COMPILER_ID:IAR>:${CMAKE_CURRENT_SOURCE_DIR}/device/source/iar/m2351_ns.icf>
     )
-    target_link_libraries(tfm_ns
-        PRIVATE
-            $<$<C_COMPILER_ID:ARMClang>:${CMSIS_5_PATH}/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib>
-            $<$<C_COMPILER_ID:GNU>:${CMSIS_5_PATH}/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a>
-            $<$<C_COMPILER_ID:IAR>:${CMSIS_5_PATH}/RTOS2/RTX/Library/IAR/RTX_V8MBN.a>
-            # These libraries require linking to the veneers, so the veneers are
-            # marked again here as a link dependency to get the ordering right
-            tfm_s_veneers
+    target_link_libraries(CMSIS_5_tfm_ns
+        INTERFACE
+            CMSIS_5_RTX_V8MBN
     )
 endif()
 
diff --git a/platform/ext/target/nuvoton/m2351/README.rst b/platform/ext/target/nuvoton/m2351/README.rst
index 7b952c4..a2a653d 100644
--- a/platform/ext/target/nuvoton/m2351/README.rst
+++ b/platform/ext/target/nuvoton/m2351/README.rst
@@ -16,20 +16,20 @@
             -DCMAKE_TOOLCHAIN_FILE=../toolchain_GNUARM.cmake \
             -DTEST_NS=ON \
             -DCMAKE_BUILD_TYPE=RelWithDebInfo \
-            -DMCUBOOT_IMAGE_NUMBER=1
     $ make install
 
 Define TEST_NS=ON or TEST_S=ON for non-secure or secure regression test.
 CMAKE_BUILD_TYPE could be "Release", "RelWithDebInfo" or "Minsizerel"
-TFM_PSA_API=ON and TFM_ISOLATION_LEVEL=2 can also be set but them cannot be defined with
-TEST_S=ON or TEST_NS=ON at the same time due to limited RAM size of M2351.
-Other cmake parameters should not be changed.
+TFM_PSA_API=ON and TFM_ISOLATION_LEVEL=2 can also be set but them cannot be
+defined with TEST_S=ON or TEST_NS=ON at the same time due to limited RAM size
+of M2351. Other cmake parameters should not be changed.
 
 Flashing Image with Nuvoton NuLink Tool
 ---------------------------------------
 
 NuMaker-PFM-M2351 board supports on board ICE called NuLink.
-Connect NuLink to PC with USB cable and using `NuLink Command Tool <https://github.com/OpenNuvoton/Nuvoton_Tools>`__
+Connect NuLink to PC with USB cable and using
+`NuLink Command Tool <https://github.com/OpenNuvoton/Nuvoton_Tools>`__
 to flashing the image.
 
 The commands are as follows:
@@ -40,7 +40,7 @@
     > NuLink_M2351_M261 -E ALL
     > NuLink_M2351_M261 -W APROM ./build/bin/bl2.bin 0
     > NuLink_M2351_M261 -W APROM ./build/bin/tfm_s_ns_signed.bin 0 0x10000
-    > NuLink_M2351_M261 -W NSCBA 0x40000
+    > NuLink_M2351_M261 -W NSCBA 0x50000
 
 --------------
 
diff --git a/platform/ext/target/nuvoton/m2351/config.cmake b/platform/ext/target/nuvoton/m2351/config.cmake
index 68cfbf1..dbd87a5 100644
--- a/platform/ext/target/nuvoton/m2351/config.cmake
+++ b/platform/ext/target/nuvoton/m2351/config.cmake
@@ -5,6 +5,7 @@
 #
 #-------------------------------------------------------------------------------
 
-set(PS_MAX_ASSET_SIZE                   "512"       CACHE STRING    "The maximum asset size to be stored in the Protected Storage area" FORCE)
-set(PS_NUM_ASSETS                       "12"        CACHE STRING    "The maximum number of assets to be stored in the Protected Storage area" FORCE)
-set(ITS_NUM_ASSETS                      "12"        CACHE STRING    "The maximum number of assets to be stored in the Internal Trusted Storage area" FORCE)
+set(MCUBOOT_IMAGE_NUMBER    1      CACHE STRING    "Whether to combine S and NS into either 1 image, or sign each separately" FORCE)
+set(PS_MAX_ASSET_SIZE       512    CACHE STRING    "The maximum asset size to be stored in the Protected Storage area" FORCE)
+set(PS_NUM_ASSETS           12     CACHE STRING    "The maximum number of assets to be stored in the Protected Storage area" FORCE)
+set(ITS_NUM_ASSETS          12     CACHE STRING    "The maximum number of assets to be stored in the Internal Trusted Storage area" FORCE)
diff --git a/platform/ext/target/nuvoton/m2351/preload.cmake b/platform/ext/target/nuvoton/m2351/preload.cmake
index 020a8ea..4802adf 100644
--- a/platform/ext/target/nuvoton/m2351/preload.cmake
+++ b/platform/ext/target/nuvoton/m2351/preload.cmake
@@ -14,7 +14,6 @@
 set(TFM_SYSTEM_PROCESSOR cortex-m23)
 set(TFM_SYSTEM_ARCHITECTURE armv8-m.base)
 
-set(MCUBOOT_IMAGE_NUMBER 1)
 
 # Reload compiler to generate options from the CPU and architecture
 _compiler_reload()