fix(st-ddr): bad refresh update level toggle sequence
wait_refresh_update_done_ack() must toggle RFSHCTL3_REFRESH_UPDATE_LEVEL
bit at each call to follow the recommended procedure.
Fix action and loop condition.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
Change-Id: Iacf1e92a1ddaf2ab10e4f3a873be6ad1d3576e5f
diff --git a/drivers/st/ddr/stm32mp_ddr.c b/drivers/st/ddr/stm32mp_ddr.c
index 98968d5..df2cd83 100644
--- a/drivers/st/ddr/stm32mp_ddr.c
+++ b/drivers/st/ddr/stm32mp_ddr.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2022-2024, STMicroelectronics - All Rights Reserved
+ * Copyright (C) 2022-2025, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -277,9 +277,9 @@
/* Toggle rfshctl3.refresh_update_level */
rfshctl3 = mmio_read_32((uintptr_t)&ctl->rfshctl3);
if ((rfshctl3 & refresh_update_level) == refresh_update_level) {
- mmio_setbits_32((uintptr_t)&ctl->rfshctl3, refresh_update_level);
- } else {
mmio_clrbits_32((uintptr_t)&ctl->rfshctl3, refresh_update_level);
+ } else {
+ mmio_setbits_32((uintptr_t)&ctl->rfshctl3, refresh_update_level);
refresh_update_level = 0U;
}
@@ -293,7 +293,7 @@
if (timeout_elapsed(timeout)) {
panic();
}
- } while ((rfshctl3 & DDRCTRL_RFSHCTL3_REFRESH_UPDATE_LEVEL) != refresh_update_level);
+ } while ((rfshctl3 & DDRCTRL_RFSHCTL3_REFRESH_UPDATE_LEVEL) == refresh_update_level);
VERBOSE("[0x%lx] rfshctl3 = 0x%x\n", (uintptr_t)&ctl->rfshctl3, rfshctl3);
}