Merge pull request #154 from athoelke/at/inline-mmio
Inline the mmio accessor functions
diff --git a/Makefile b/Makefile
index 9131f1c..b505d62 100644
--- a/Makefile
+++ b/Makefile
@@ -148,9 +148,7 @@
.PHONY: all msg_start clean realclean distclean cscope locate-checkpatch checkcodebase checkpatch fiptool fip
.SUFFIXES:
-INCLUDES += -Iinclude/bl1 \
- -Iinclude/bl2 \
- -Iinclude/bl31 \
+INCLUDES += -Iinclude/bl31 \
-Iinclude/bl31/services \
-Iinclude/bl32 \
-Iinclude/bl32/payloads \
@@ -184,10 +182,12 @@
$(eval $(call add_define,RESET_TO_BL31))
ASFLAGS += -nostdinc -ffreestanding -Wa,--fatal-warnings \
+ -Werror -Wmissing-include-dirs \
-mgeneral-regs-only -D__ASSEMBLY__ \
${DEFINES} ${INCLUDES}
CFLAGS += -nostdinc -pedantic -ffreestanding -Wall \
- -Werror -mgeneral-regs-only -std=c99 -c -Os \
+ -Werror -Wmissing-include-dirs \
+ -mgeneral-regs-only -std=c99 -c -Os \
${DEFINES} ${INCLUDES}
CFLAGS += -ffunction-sections -fdata-sections
@@ -234,9 +234,9 @@
checkcodebase: locate-checkpatch
@echo " CHECKING STYLE"
@if test -d .git ; then \
- git ls-files | while read GIT_FILE ; do ${CHECKPATCH} ${CHECKCODE_ARGS} -f $$GIT_FILE ; done ; \
+ git ls-files | grep -v stdlib | while read GIT_FILE ; do ${CHECKPATCH} ${CHECKCODE_ARGS} -f $$GIT_FILE ; done ; \
else \
- find . -type f -not -iwholename "*.git*" -not -iwholename "*build*" -exec ${CHECKPATCH} ${CHECKCODE_ARGS} -f {} \; ; \
+ find . -type f -not -iwholename "*.git*" -not -iwholename "*build*" -not -iwholename "*stdlib*" -exec ${CHECKPATCH} ${CHECKCODE_ARGS} -f {} \; ; \
fi
checkpatch: locate-checkpatch
diff --git a/bl1/aarch64/bl1_arch_setup.c b/bl1/aarch64/bl1_arch_setup.c
index 8ed45d9..cf69ac7 100644
--- a/bl1/aarch64/bl1_arch_setup.c
+++ b/bl1/aarch64/bl1_arch_setup.c
@@ -62,7 +62,8 @@
/*******************************************************************************
* Set the Secure EL1 required architectural state
******************************************************************************/
-void bl1_arch_next_el_setup(void) {
+void bl1_arch_next_el_setup(void)
+{
unsigned long next_sctlr;
/* Use the same endianness than the current BL */
diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c
index 8cc7e0d..d949a08 100644
--- a/bl31/bl31_main.c
+++ b/bl31/bl31_main.c
@@ -56,7 +56,7 @@
/*******************************************************************************
* Simple function to initialise all BL31 helper libraries.
******************************************************************************/
-void bl31_lib_init()
+void bl31_lib_init(void)
{
cm_init();
}
@@ -137,7 +137,7 @@
* This function programs EL3 registers and performs other setup to enable entry
* into the next image after BL31 at the next ERET.
******************************************************************************/
-void bl31_prepare_next_image_entry()
+void bl31_prepare_next_image_entry(void)
{
entry_point_info_t *next_image_info;
uint32_t image_type;
diff --git a/bl31/context_mgmt.c b/bl31/context_mgmt.c
index 81c7c56..65f1213 100644
--- a/bl31/context_mgmt.c
+++ b/bl31/context_mgmt.c
@@ -56,7 +56,7 @@
* which will used for programming an entry into a lower EL. The same context
* will used to save state upon exception entry from that EL.
******************************************************************************/
-void cm_init()
+void cm_init(void)
{
/*
* The context management library has only global data to intialize, but
diff --git a/bl31/runtime_svc.c b/bl31/runtime_svc.c
index 08cd2d8..c33748f 100644
--- a/bl31/runtime_svc.c
+++ b/bl31/runtime_svc.c
@@ -78,7 +78,7 @@
* The unique oen is used as an index into the 'rt_svc_descs_indices' array.
* The index of the runtime service descriptor is stored at this index.
******************************************************************************/
-void runtime_svc_init()
+void runtime_svc_init(void)
{
int32_t rc = 0;
uint32_t index, start_idx, end_idx;
diff --git a/bl32/tsp/tsp_interrupt.c b/bl32/tsp/tsp_interrupt.c
index 4a4b877..ff6bdc5 100644
--- a/bl32/tsp/tsp_interrupt.c
+++ b/bl32/tsp/tsp_interrupt.c
@@ -72,7 +72,7 @@
* architecture version in v2.0 and the secure physical timer interrupt is the
* only S-EL1 interrupt that it needs to handle.
******************************************************************************/
-int32_t tsp_fiq_handler()
+int32_t tsp_fiq_handler(void)
{
uint64_t mpidr = read_mpidr();
uint32_t linear_id = platform_get_core_pos(mpidr), id;
@@ -109,7 +109,7 @@
return 0;
}
-int32_t tsp_irq_received()
+int32_t tsp_irq_received(void)
{
uint64_t mpidr = read_mpidr();
uint32_t linear_id = platform_get_core_pos(mpidr);
diff --git a/bl32/tsp/tsp_timer.c b/bl32/tsp/tsp_timer.c
index 366640f..a7fdfda 100644
--- a/bl32/tsp/tsp_timer.c
+++ b/bl32/tsp/tsp_timer.c
@@ -46,7 +46,7 @@
/*******************************************************************************
* This function initializes the generic timer to fire every 0.5 second
******************************************************************************/
-void tsp_generic_timer_start()
+void tsp_generic_timer_start(void)
{
uint64_t cval;
uint32_t ctl = 0;
@@ -63,7 +63,7 @@
/*******************************************************************************
* This function deasserts the timer interrupt and sets it up again
******************************************************************************/
-void tsp_generic_timer_handler()
+void tsp_generic_timer_handler(void)
{
/* Ensure that the timer did assert the interrupt */
assert(get_cntp_ctl_istatus(read_cntps_ctl_el1()));
@@ -76,7 +76,7 @@
/*******************************************************************************
* This function deasserts the timer interrupt prior to cpu power down
******************************************************************************/
-void tsp_generic_timer_stop()
+void tsp_generic_timer_stop(void)
{
/* Disable the timer */
write_cntps_ctl_el1(0);
@@ -85,7 +85,7 @@
/*******************************************************************************
* This function saves the timer context prior to cpu suspension
******************************************************************************/
-void tsp_generic_timer_save()
+void tsp_generic_timer_save(void)
{
uint32_t linear_id = platform_get_core_pos(read_mpidr());
@@ -98,7 +98,7 @@
/*******************************************************************************
* This function restores the timer context post cpu resummption
******************************************************************************/
-void tsp_generic_timer_restore()
+void tsp_generic_timer_restore(void)
{
uint32_t linear_id = platform_get_core_pos(read_mpidr());
diff --git a/include/bl31/bl31.h b/include/bl31/bl31.h
index 33e4ece..96867b0 100644
--- a/include/bl31/bl31.h
+++ b/include/bl31/bl31.h
@@ -40,7 +40,7 @@
void bl31_next_el_arch_setup(uint32_t security_state);
void bl31_set_next_image_type(uint32_t type);
uint32_t bl31_get_next_image_type(void);
-void bl31_prepare_next_image_entry();
+void bl31_prepare_next_image_entry(void);
void bl31_register_bl32_init(int32_t (*)(void));
#endif /* __BL31_H__ */
diff --git a/include/bl31/runtime_svc.h b/include/bl31/runtime_svc.h
index f3543d4..2d84986 100644
--- a/include/bl31/runtime_svc.h
+++ b/include/bl31/runtime_svc.h
@@ -264,7 +264,7 @@
/*******************************************************************************
* Function & variable prototypes
******************************************************************************/
-void runtime_svc_init();
+void runtime_svc_init(void);
extern uint64_t __RT_SVC_DESCS_START__;
extern uint64_t __RT_SVC_DESCS_END__;
void init_crash_reporting(void);
diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h
index 673e897..6ba37c2 100644
--- a/include/lib/aarch64/arch_helpers.h
+++ b/include/lib/aarch64/arch_helpers.h
@@ -85,14 +85,14 @@
/* Define function for simple system instruction */
#define DEFINE_SYSOP_FUNC(_op) \
-static inline void _op() \
+static inline void _op(void) \
{ \
__asm__ (#_op); \
}
/* Define function for system instruction with type specifier */
#define DEFINE_SYSOP_TYPE_FUNC(_op, _type) \
-static inline void _op ## _type() \
+static inline void _op ## _type(void) \
{ \
__asm__ (#_op " " #_type); \
}
diff --git a/include/lib/bakery_lock.h b/include/lib/bakery_lock.h
index 037fa7d..95634cf 100644
--- a/include/lib/bakery_lock.h
+++ b/include/lib/bakery_lock.h
@@ -44,8 +44,8 @@
#define NO_OWNER (-1)
void bakery_lock_init(bakery_lock_t *bakery);
-void bakery_lock_get(unsigned long mpidr, bakery_lock_t *bakery);
-void bakery_lock_release(unsigned long mpidr, bakery_lock_t *bakery);
-int bakery_lock_try(unsigned long mpidr, bakery_lock_t *bakery);
+void bakery_lock_get(bakery_lock_t *bakery);
+void bakery_lock_release(bakery_lock_t *bakery);
+int bakery_lock_try(bakery_lock_t *bakery);
#endif /* __BAKERY_LOCK_H__ */
diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h
index 714f6e0..c087dc6 100644
--- a/include/plat/common/platform.h
+++ b/include/plat/common/platform.h
@@ -165,7 +165,7 @@
/*******************************************************************************
* Optional BL3-1 functions (may be overridden)
******************************************************************************/
-void bl31_plat_enable_mmu();
+void bl31_plat_enable_mmu(void);
/*******************************************************************************
* Mandatory BL3-2 functions (only if platform contains a BL3-2)
@@ -175,6 +175,6 @@
/*******************************************************************************
* Optional BL3-2 functions (may be overridden)
******************************************************************************/
-void bl32_plat_enable_mmu();
+void bl32_plat_enable_mmu(void);
#endif /* __PLATFORM_H__ */
diff --git a/lib/locks/bakery/bakery_lock.c b/lib/locks/bakery/bakery_lock.c
index 4e148b5..877f526 100644
--- a/lib/locks/bakery/bakery_lock.c
+++ b/lib/locks/bakery/bakery_lock.c
@@ -124,12 +124,12 @@
* of others'. The CPU with the highest priority (lowest numerical value)
* acquires the lock
*/
-void bakery_lock_get(unsigned long mpidr, bakery_lock_t *bakery)
+void bakery_lock_get(bakery_lock_t *bakery)
{
unsigned int they, me;
unsigned int my_ticket, my_prio, their_ticket;
- me = platform_get_core_pos(mpidr);
+ me = platform_get_core_pos(read_mpidr_el1());
assert_bakery_entry_valid(me, bakery);
@@ -176,9 +176,9 @@
/* Release the lock and signal contenders */
-void bakery_lock_release(unsigned long mpidr, bakery_lock_t *bakery)
+void bakery_lock_release(bakery_lock_t *bakery)
{
- unsigned int me = platform_get_core_pos(mpidr);
+ unsigned int me = platform_get_core_pos(read_mpidr_el1());
assert_bakery_entry_valid(me, bakery);
assert(bakery->owner == me);
diff --git a/plat/common/aarch64/plat_common.c b/plat/common/aarch64/plat_common.c
index 2abf29d..94b9dfd 100644
--- a/plat/common/aarch64/plat_common.c
+++ b/plat/common/aarch64/plat_common.c
@@ -38,12 +38,12 @@
#pragma weak bl31_plat_enable_mmu
#pragma weak bl32_plat_enable_mmu
-void bl31_plat_enable_mmu()
+void bl31_plat_enable_mmu(void)
{
enable_mmu_el3();
}
-void bl32_plat_enable_mmu()
+void bl32_plat_enable_mmu(void)
{
enable_mmu_el1();
}
diff --git a/plat/fvp/bl2_fvp_setup.c b/plat/fvp/bl2_fvp_setup.c
index de9c6a4..a030bd5 100644
--- a/plat/fvp/bl2_fvp_setup.c
+++ b/plat/fvp/bl2_fvp_setup.c
@@ -212,7 +212,7 @@
* Perform the very early platform specific architectural setup here. At the
* moment this is only intializes the mmu in a quick and dirty way.
******************************************************************************/
-void bl2_plat_arch_setup()
+void bl2_plat_arch_setup(void)
{
fvp_configure_mmu_el1(bl2_tzram_layout.total_base,
bl2_tzram_layout.total_size,
diff --git a/plat/fvp/bl31_fvp_setup.c b/plat/fvp/bl31_fvp_setup.c
index 6554ec3..50ed0b0 100644
--- a/plat/fvp/bl31_fvp_setup.c
+++ b/plat/fvp/bl31_fvp_setup.c
@@ -167,7 +167,7 @@
* Initialize the gic, configure the CLCD and zero out variables needed by the
* secondaries to boot up correctly.
******************************************************************************/
-void bl31_platform_setup()
+void bl31_platform_setup(void)
{
unsigned int reg_val;
@@ -207,7 +207,7 @@
* Perform the very early platform specific architectural setup here. At the
* moment this is only intializes the mmu in a quick and dirty way.
******************************************************************************/
-void bl31_plat_arch_setup()
+void bl31_plat_arch_setup(void)
{
#if RESET_TO_BL31
fvp_cci_setup();
diff --git a/plat/fvp/bl32_fvp_setup.c b/plat/fvp/bl32_fvp_setup.c
index f8dc3c7..3c09ca2 100644
--- a/plat/fvp/bl32_fvp_setup.c
+++ b/plat/fvp/bl32_fvp_setup.c
@@ -81,7 +81,7 @@
/*******************************************************************************
* Perform platform specific setup placeholder
******************************************************************************/
-void bl32_platform_setup()
+void bl32_platform_setup(void)
{
}
@@ -90,7 +90,7 @@
* Perform the very early platform specific architectural setup here. At the
* moment this is only intializes the MMU
******************************************************************************/
-void bl32_plat_arch_setup()
+void bl32_plat_arch_setup(void)
{
fvp_configure_mmu_el1(BL32_RO_BASE,
(BL32_COHERENT_RAM_LIMIT - BL32_RO_BASE),
diff --git a/plat/fvp/drivers/pwrc/fvp_pwrc.c b/plat/fvp/drivers/pwrc/fvp_pwrc.c
index d1feece..c32c322 100644
--- a/plat/fvp/drivers/pwrc/fvp_pwrc.c
+++ b/plat/fvp/drivers/pwrc/fvp_pwrc.c
@@ -41,59 +41,54 @@
unsigned int fvp_pwrc_get_cpu_wkr(unsigned long mpidr)
{
- unsigned int rc = 0;
- bakery_lock_get(mpidr, &pwrc_lock);
- mmio_write_32(PWRC_BASE + PSYSR_OFF, (unsigned int) mpidr);
- rc = PSYSR_WK(mmio_read_32(PWRC_BASE + PSYSR_OFF));
- bakery_lock_release(mpidr, &pwrc_lock);
- return rc;
+ return PSYSR_WK(fvp_pwrc_read_psysr(mpidr));
}
unsigned int fvp_pwrc_read_psysr(unsigned long mpidr)
{
- unsigned int rc = 0;
- bakery_lock_get(mpidr, &pwrc_lock);
+ unsigned int rc;
+ bakery_lock_get(&pwrc_lock);
mmio_write_32(PWRC_BASE + PSYSR_OFF, (unsigned int) mpidr);
rc = mmio_read_32(PWRC_BASE + PSYSR_OFF);
- bakery_lock_release(mpidr, &pwrc_lock);
+ bakery_lock_release(&pwrc_lock);
return rc;
}
void fvp_pwrc_write_pponr(unsigned long mpidr)
{
- bakery_lock_get(mpidr, &pwrc_lock);
+ bakery_lock_get(&pwrc_lock);
mmio_write_32(PWRC_BASE + PPONR_OFF, (unsigned int) mpidr);
- bakery_lock_release(mpidr, &pwrc_lock);
+ bakery_lock_release(&pwrc_lock);
}
void fvp_pwrc_write_ppoffr(unsigned long mpidr)
{
- bakery_lock_get(mpidr, &pwrc_lock);
+ bakery_lock_get(&pwrc_lock);
mmio_write_32(PWRC_BASE + PPOFFR_OFF, (unsigned int) mpidr);
- bakery_lock_release(mpidr, &pwrc_lock);
+ bakery_lock_release(&pwrc_lock);
}
void fvp_pwrc_set_wen(unsigned long mpidr)
{
- bakery_lock_get(mpidr, &pwrc_lock);
+ bakery_lock_get(&pwrc_lock);
mmio_write_32(PWRC_BASE + PWKUPR_OFF,
(unsigned int) (PWKUPR_WEN | mpidr));
- bakery_lock_release(mpidr, &pwrc_lock);
+ bakery_lock_release(&pwrc_lock);
}
void fvp_pwrc_clr_wen(unsigned long mpidr)
{
- bakery_lock_get(mpidr, &pwrc_lock);
+ bakery_lock_get(&pwrc_lock);
mmio_write_32(PWRC_BASE + PWKUPR_OFF,
(unsigned int) mpidr);
- bakery_lock_release(mpidr, &pwrc_lock);
+ bakery_lock_release(&pwrc_lock);
}
void fvp_pwrc_write_pcoffr(unsigned long mpidr)
{
- bakery_lock_get(mpidr, &pwrc_lock);
+ bakery_lock_get(&pwrc_lock);
mmio_write_32(PWRC_BASE + PCOFFR_OFF, (unsigned int) mpidr);
- bakery_lock_release(mpidr, &pwrc_lock);
+ bakery_lock_release(&pwrc_lock);
}
/* Nothing else to do here apart from initializing the lock */
diff --git a/plat/fvp/fvp_gic.c b/plat/fvp/fvp_gic.c
index 3156da9..a48b29b 100644
--- a/plat/fvp/fvp_gic.c
+++ b/plat/fvp/fvp_gic.c
@@ -324,7 +324,7 @@
* the GIC cpu interface. INTR_TYPE_INVAL is returned when there is no
* interrupt pending.
******************************************************************************/
-uint32_t plat_ic_get_pending_interrupt_type()
+uint32_t plat_ic_get_pending_interrupt_type(void)
{
uint32_t id, gicc_base;
@@ -346,7 +346,7 @@
* the GIC cpu interface. INTR_ID_UNAVAILABLE is returned when there is no
* interrupt pending.
******************************************************************************/
-uint32_t plat_ic_get_pending_interrupt_id()
+uint32_t plat_ic_get_pending_interrupt_id(void)
{
uint32_t id, gicc_base;
@@ -370,7 +370,7 @@
* This functions reads the GIC cpu interface Interrupt Acknowledge register
* to start handling the pending interrupt. It returns the contents of the IAR.
******************************************************************************/
-uint32_t plat_ic_acknowledge_interrupt()
+uint32_t plat_ic_acknowledge_interrupt(void)
{
return gicc_read_IAR(fvp_get_cfgvar(CONFIG_GICC_ADDR));
}
diff --git a/plat/fvp/fvp_topology.c b/plat/fvp/fvp_topology.c
index cf21503..49f7daf 100644
--- a/plat/fvp/fvp_topology.c
+++ b/plat/fvp/fvp_topology.c
@@ -180,7 +180,7 @@
* Handy optimization to prevent the psci implementation from traversing through
* affinity levels which are not present while detecting the platform topology.
******************************************************************************/
-int plat_get_max_afflvl()
+int plat_get_max_afflvl(void)
{
return MPIDR_AFFLVL1;
}
@@ -190,7 +190,7 @@
* the FVP flavour its running on. We construct all the mpidrs we can handle
* and rely on the PWRC.PSYSR to flag absent cpus when their status is queried.
******************************************************************************/
-int fvp_setup_topology()
+int fvp_setup_topology(void)
{
unsigned char aff0, aff1, aff_state, aff0_offset = 0;
unsigned long mpidr;
diff --git a/plat/fvp/include/plat_macros.S b/plat/fvp/include/plat_macros.S
index bdd402d..d2e7cbc 100644
--- a/plat/fvp/include/plat_macros.S
+++ b/plat/fvp/include/plat_macros.S
@@ -47,7 +47,7 @@
bl fvp_get_cfgvar
/* gic base address is now in x0 */
ldr w1, [x0, #GICC_IAR]
- ldr w2, [x0, #GICD_CTLR]
+ ldr w2, [x0, #GICC_CTLR]
sub sp, sp, #GIC_REG_SIZE
stp x1, x2, [sp] /* we store the gic registers as 64 bit */
adr x0, gic_regs
diff --git a/services/std_svc/psci/psci_afflvl_off.c b/services/std_svc/psci/psci_afflvl_off.c
index 30f2bd1..a8904e98 100644
--- a/services/std_svc/psci/psci_afflvl_off.c
+++ b/services/std_svc/psci/psci_afflvl_off.c
@@ -34,13 +34,13 @@
#include <string.h>
#include "psci_private.h"
-typedef int (*afflvl_off_handler_t)(unsigned long, aff_map_node_t *);
+typedef int (*afflvl_off_handler_t)(aff_map_node_t *);
/*******************************************************************************
* The next three functions implement a handler for each supported affinity
* level which is called when that affinity level is turned off.
******************************************************************************/
-static int psci_afflvl0_off(unsigned long mpidr, aff_map_node_t *cpu_node)
+static int psci_afflvl0_off(aff_map_node_t *cpu_node)
{
unsigned int plat_state;
int rc;
@@ -98,7 +98,7 @@
/* Get the current physical state of this cpu */
plat_state = psci_get_phys_state(cpu_node);
- rc = psci_plat_pm_ops->affinst_off(mpidr,
+ rc = psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
cpu_node->level,
plat_state);
}
@@ -106,7 +106,7 @@
return rc;
}
-static int psci_afflvl1_off(unsigned long mpidr, aff_map_node_t *cluster_node)
+static int psci_afflvl1_off(aff_map_node_t *cluster_node)
{
int rc = PSCI_E_SUCCESS;
unsigned int plat_state;
@@ -136,14 +136,14 @@
* program the power controller etc.
*/
if (psci_plat_pm_ops->affinst_off)
- rc = psci_plat_pm_ops->affinst_off(mpidr,
+ rc = psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
cluster_node->level,
plat_state);
return rc;
}
-static int psci_afflvl2_off(unsigned long mpidr, aff_map_node_t *system_node)
+static int psci_afflvl2_off(aff_map_node_t *system_node)
{
int rc = PSCI_E_SUCCESS;
unsigned int plat_state;
@@ -167,7 +167,7 @@
* at this affinity level
*/
if (psci_plat_pm_ops->affinst_off)
- rc = psci_plat_pm_ops->affinst_off(mpidr,
+ rc = psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
system_node->level,
plat_state);
return rc;
@@ -186,8 +186,7 @@
******************************************************************************/
static int psci_call_off_handlers(mpidr_aff_map_nodes_t mpidr_nodes,
int start_afflvl,
- int end_afflvl,
- unsigned long mpidr)
+ int end_afflvl)
{
int rc = PSCI_E_INVALID_PARAMS, level;
aff_map_node_t *node;
@@ -202,7 +201,7 @@
* of restoring what we might have torn down at
* lower affinity levels.
*/
- rc = psci_afflvl_off_handlers[level](mpidr, node);
+ rc = psci_afflvl_off_handlers[level](node);
if (rc != PSCI_E_SUCCESS)
break;
}
@@ -232,14 +231,12 @@
* CAUTION: This function is called with coherent stacks so that coherency can
* be turned off and caches can be flushed safely.
******************************************************************************/
-int psci_afflvl_off(unsigned long mpidr,
- int start_afflvl,
+int psci_afflvl_off(int start_afflvl,
int end_afflvl)
{
int rc = PSCI_E_SUCCESS;
mpidr_aff_map_nodes_t mpidr_nodes;
- mpidr &= MPIDR_AFFINITY_MASK;;
/*
* Collect the pointers to the nodes in the topology tree for
@@ -248,7 +245,7 @@
* levels are incorrect. In either case, we cannot return back
* to the caller as it would not know what to do.
*/
- rc = psci_get_aff_map_nodes(mpidr,
+ rc = psci_get_aff_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
start_afflvl,
end_afflvl,
mpidr_nodes);
@@ -259,23 +256,20 @@
* level so that by the time all locks are taken, the system topology
* is snapshot and state management can be done safely.
*/
- psci_acquire_afflvl_locks(mpidr,
- start_afflvl,
+ psci_acquire_afflvl_locks(start_afflvl,
end_afflvl,
mpidr_nodes);
/* Perform generic, architecture and platform specific handling */
rc = psci_call_off_handlers(mpidr_nodes,
start_afflvl,
- end_afflvl,
- mpidr);
+ end_afflvl);
/*
* Release the locks corresponding to each affinity level in the
* reverse order to which they were acquired.
*/
- psci_release_afflvl_locks(mpidr,
- start_afflvl,
+ psci_release_afflvl_locks(start_afflvl,
end_afflvl,
mpidr_nodes);
diff --git a/services/std_svc/psci/psci_afflvl_on.c b/services/std_svc/psci/psci_afflvl_on.c
index d91db96..d620172 100644
--- a/services/std_svc/psci/psci_afflvl_on.c
+++ b/services/std_svc/psci/psci_afflvl_on.c
@@ -285,7 +285,6 @@
{
int rc = PSCI_E_SUCCESS;
mpidr_aff_map_nodes_t target_cpu_nodes;
- unsigned long mpidr = read_mpidr() & MPIDR_AFFINITY_MASK;
/*
* Collect the pointers to the nodes in the topology tree for
@@ -306,8 +305,7 @@
* level so that by the time all locks are taken, the system topology
* is snapshot and state management can be done safely.
*/
- psci_acquire_afflvl_locks(mpidr,
- start_afflvl,
+ psci_acquire_afflvl_locks(start_afflvl,
end_afflvl,
target_cpu_nodes);
@@ -323,8 +321,7 @@
* This loop releases the lock corresponding to each affinity level
* in the reverse order to which they were acquired.
*/
- psci_release_afflvl_locks(mpidr,
- start_afflvl,
+ psci_release_afflvl_locks(start_afflvl,
end_afflvl,
target_cpu_nodes);
@@ -335,8 +332,7 @@
* The following functions finish an earlier affinity power on request. They
* are called by the common finisher routine in psci_common.c.
******************************************************************************/
-static unsigned int psci_afflvl0_on_finish(unsigned long mpidr,
- aff_map_node_t *cpu_node)
+static unsigned int psci_afflvl0_on_finish(aff_map_node_t *cpu_node)
{
unsigned int plat_state, state, rc;
@@ -356,7 +352,7 @@
/* Get the physical state of this cpu */
plat_state = get_phys_state(state);
- rc = psci_plat_pm_ops->affinst_on_finish(mpidr,
+ rc = psci_plat_pm_ops->affinst_on_finish(read_mpidr_el1(),
cpu_node->level,
plat_state);
assert(rc == PSCI_E_SUCCESS);
@@ -399,8 +395,7 @@
return rc;
}
-static unsigned int psci_afflvl1_on_finish(unsigned long mpidr,
- aff_map_node_t *cluster_node)
+static unsigned int psci_afflvl1_on_finish(aff_map_node_t *cluster_node)
{
unsigned int plat_state, rc = PSCI_E_SUCCESS;
@@ -418,7 +413,7 @@
/* Get the physical state of this cluster */
plat_state = psci_get_phys_state(cluster_node);
- rc = psci_plat_pm_ops->affinst_on_finish(mpidr,
+ rc = psci_plat_pm_ops->affinst_on_finish(read_mpidr_el1(),
cluster_node->level,
plat_state);
assert(rc == PSCI_E_SUCCESS);
@@ -431,8 +426,7 @@
}
-static unsigned int psci_afflvl2_on_finish(unsigned long mpidr,
- aff_map_node_t *system_node)
+static unsigned int psci_afflvl2_on_finish(aff_map_node_t *system_node)
{
unsigned int plat_state, rc = PSCI_E_SUCCESS;
@@ -456,7 +450,7 @@
/* Get the physical state of the system */
plat_state = psci_get_phys_state(system_node);
- rc = psci_plat_pm_ops->affinst_on_finish(mpidr,
+ rc = psci_plat_pm_ops->affinst_on_finish(read_mpidr_el1(),
system_node->level,
plat_state);
assert(rc == PSCI_E_SUCCESS);
diff --git a/services/std_svc/psci/psci_afflvl_suspend.c b/services/std_svc/psci/psci_afflvl_suspend.c
index ea90389..0977198 100644
--- a/services/std_svc/psci/psci_afflvl_suspend.c
+++ b/services/std_svc/psci/psci_afflvl_suspend.c
@@ -38,8 +38,7 @@
#include <stddef.h>
#include "psci_private.h"
-typedef int (*afflvl_suspend_handler_t)(unsigned long,
- aff_map_node_t *,
+typedef int (*afflvl_suspend_handler_t)(aff_map_node_t *,
unsigned long,
unsigned long,
unsigned int);
@@ -121,8 +120,7 @@
* The next three functions implement a handler for each supported affinity
* level which is called when that affinity level is about to be suspended.
******************************************************************************/
-static int psci_afflvl0_suspend(unsigned long mpidr,
- aff_map_node_t *cpu_node,
+static int psci_afflvl0_suspend(aff_map_node_t *cpu_node,
unsigned long ns_entrypoint,
unsigned long context_id,
unsigned int power_state)
@@ -214,7 +212,7 @@
if (psci_plat_pm_ops->affinst_suspend) {
plat_state = psci_get_phys_state(cpu_node);
- rc = psci_plat_pm_ops->affinst_suspend(mpidr,
+ rc = psci_plat_pm_ops->affinst_suspend(read_mpidr_el1(),
psci_entrypoint,
ns_entrypoint,
cpu_node->level,
@@ -224,8 +222,7 @@
return rc;
}
-static int psci_afflvl1_suspend(unsigned long mpidr,
- aff_map_node_t *cluster_node,
+static int psci_afflvl1_suspend(aff_map_node_t *cluster_node,
unsigned long ns_entrypoint,
unsigned long context_id,
unsigned int power_state)
@@ -267,7 +264,7 @@
* platform handler prototype the same.
*/
psci_entrypoint = (unsigned long) psci_aff_suspend_finish_entry;
- rc = psci_plat_pm_ops->affinst_suspend(mpidr,
+ rc = psci_plat_pm_ops->affinst_suspend(read_mpidr_el1(),
psci_entrypoint,
ns_entrypoint,
cluster_node->level,
@@ -278,8 +275,7 @@
}
-static int psci_afflvl2_suspend(unsigned long mpidr,
- aff_map_node_t *system_node,
+static int psci_afflvl2_suspend(aff_map_node_t *system_node,
unsigned long ns_entrypoint,
unsigned long context_id,
unsigned int power_state)
@@ -313,7 +309,7 @@
* platform handler prototype the same.
*/
psci_entrypoint = (unsigned long) psci_aff_suspend_finish_entry;
- rc = psci_plat_pm_ops->affinst_suspend(mpidr,
+ rc = psci_plat_pm_ops->affinst_suspend(read_mpidr_el1(),
psci_entrypoint,
ns_entrypoint,
system_node->level,
@@ -337,7 +333,6 @@
static int psci_call_suspend_handlers(mpidr_aff_map_nodes_t mpidr_nodes,
int start_afflvl,
int end_afflvl,
- unsigned long mpidr,
unsigned long entrypoint,
unsigned long context_id,
unsigned int power_state)
@@ -355,8 +350,7 @@
* of restoring what we might have torn down at
* lower affinity levels.
*/
- rc = psci_afflvl_suspend_handlers[level](mpidr,
- node,
+ rc = psci_afflvl_suspend_handlers[level](node,
entrypoint,
context_id,
power_state);
@@ -389,8 +383,7 @@
* CAUTION: This function is called with coherent stacks so that coherency can
* be turned off and caches can be flushed safely.
******************************************************************************/
-int psci_afflvl_suspend(unsigned long mpidr,
- unsigned long entrypoint,
+int psci_afflvl_suspend(unsigned long entrypoint,
unsigned long context_id,
unsigned int power_state,
int start_afflvl,
@@ -399,15 +392,13 @@
int rc = PSCI_E_SUCCESS;
mpidr_aff_map_nodes_t mpidr_nodes;
- mpidr &= MPIDR_AFFINITY_MASK;
-
/*
* Collect the pointers to the nodes in the topology tree for
* each affinity instance in the mpidr. If this function does
* not return successfully then either the mpidr or the affinity
* levels are incorrect.
*/
- rc = psci_get_aff_map_nodes(mpidr,
+ rc = psci_get_aff_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
start_afflvl,
end_afflvl,
mpidr_nodes);
@@ -419,8 +410,7 @@
* level so that by the time all locks are taken, the system topology
* is snapshot and state management can be done safely.
*/
- psci_acquire_afflvl_locks(mpidr,
- start_afflvl,
+ psci_acquire_afflvl_locks(start_afflvl,
end_afflvl,
mpidr_nodes);
@@ -428,7 +418,6 @@
rc = psci_call_suspend_handlers(mpidr_nodes,
start_afflvl,
end_afflvl,
- mpidr,
entrypoint,
context_id,
power_state);
@@ -437,8 +426,7 @@
* Release the locks corresponding to each affinity level in the
* reverse order to which they were acquired.
*/
- psci_release_afflvl_locks(mpidr,
- start_afflvl,
+ psci_release_afflvl_locks(start_afflvl,
end_afflvl,
mpidr_nodes);
@@ -449,8 +437,7 @@
* The following functions finish an earlier affinity suspend request. They
* are called by the common finisher routine in psci_common.c.
******************************************************************************/
-static unsigned int psci_afflvl0_suspend_finish(unsigned long mpidr,
- aff_map_node_t *cpu_node)
+static unsigned int psci_afflvl0_suspend_finish(aff_map_node_t *cpu_node)
{
unsigned int plat_state, state, rc;
int32_t suspend_level;
@@ -472,7 +459,7 @@
/* Get the physical state of this cpu */
plat_state = get_phys_state(state);
- rc = psci_plat_pm_ops->affinst_suspend_finish(mpidr,
+ rc = psci_plat_pm_ops->affinst_suspend_finish(read_mpidr_el1(),
cpu_node->level,
plat_state);
assert(rc == PSCI_E_SUCCESS);
@@ -516,8 +503,7 @@
return rc;
}
-static unsigned int psci_afflvl1_suspend_finish(unsigned long mpidr,
- aff_map_node_t *cluster_node)
+static unsigned int psci_afflvl1_suspend_finish(aff_map_node_t *cluster_node)
{
unsigned int plat_state, rc = PSCI_E_SUCCESS;
@@ -535,7 +521,7 @@
/* Get the physical state of this cpu */
plat_state = psci_get_phys_state(cluster_node);
- rc = psci_plat_pm_ops->affinst_suspend_finish(mpidr,
+ rc = psci_plat_pm_ops->affinst_suspend_finish(read_mpidr_el1(),
cluster_node->level,
plat_state);
assert(rc == PSCI_E_SUCCESS);
@@ -548,8 +534,7 @@
}
-static unsigned int psci_afflvl2_suspend_finish(unsigned long mpidr,
- aff_map_node_t *system_node)
+static unsigned int psci_afflvl2_suspend_finish(aff_map_node_t *system_node)
{
unsigned int plat_state, rc = PSCI_E_SUCCESS;;
@@ -573,7 +558,7 @@
/* Get the physical state of the system */
plat_state = psci_get_phys_state(system_node);
- rc = psci_plat_pm_ops->affinst_suspend_finish(mpidr,
+ rc = psci_plat_pm_ops->affinst_suspend_finish(read_mpidr_el1(),
system_node->level,
plat_state);
assert(rc == PSCI_E_SUCCESS);
diff --git a/services/std_svc/psci/psci_common.c b/services/std_svc/psci/psci_common.c
index 87be843..3c79a5e 100644
--- a/services/std_svc/psci/psci_common.c
+++ b/services/std_svc/psci/psci_common.c
@@ -98,7 +98,7 @@
* Simple routine to retrieve the maximum affinity level supported by the
* platform and check that it makes sense.
******************************************************************************/
-int get_max_afflvl()
+int get_max_afflvl(void)
{
int aff_lvl;
@@ -156,8 +156,7 @@
* topology tree for an mpidr. It picks up locks for each affinity level bottom
* up in the range specified.
******************************************************************************/
-void psci_acquire_afflvl_locks(unsigned long mpidr,
- int start_afflvl,
+void psci_acquire_afflvl_locks(int start_afflvl,
int end_afflvl,
mpidr_aff_map_nodes_t mpidr_nodes)
{
@@ -166,7 +165,7 @@
for (level = start_afflvl; level <= end_afflvl; level++) {
if (mpidr_nodes[level] == NULL)
continue;
- bakery_lock_get(mpidr, &mpidr_nodes[level]->lock);
+ bakery_lock_get(&mpidr_nodes[level]->lock);
}
}
@@ -175,8 +174,7 @@
* topology tree for an mpidr. It releases the lock for each affinity level top
* down in the range specified.
******************************************************************************/
-void psci_release_afflvl_locks(unsigned long mpidr,
- int start_afflvl,
+void psci_release_afflvl_locks(int start_afflvl,
int end_afflvl,
mpidr_aff_map_nodes_t mpidr_nodes)
{
@@ -185,7 +183,7 @@
for (level = end_afflvl; level >= start_afflvl; level--) {
if (mpidr_nodes[level] == NULL)
continue;
- bakery_lock_release(mpidr, &mpidr_nodes[level]->lock);
+ bakery_lock_release(&mpidr_nodes[level]->lock);
}
}
@@ -353,8 +351,7 @@
static int psci_call_power_on_handlers(mpidr_aff_map_nodes_t mpidr_nodes,
int start_afflvl,
int end_afflvl,
- afflvl_power_on_finisher_t *pon_handlers,
- unsigned long mpidr)
+ afflvl_power_on_finisher_t *pon_handlers)
{
int rc = PSCI_E_INVALID_PARAMS, level;
aff_map_node_t *node;
@@ -370,7 +367,7 @@
* so simply return an error and let the caller take
* care of the situation.
*/
- rc = pon_handlers[level](mpidr, node);
+ rc = pon_handlers[level](node);
if (rc != PSCI_E_SUCCESS)
break;
}
@@ -397,23 +394,20 @@
* CAUTION: This function is called with coherent stacks so that coherency and
* the mmu can be turned on safely.
******************************************************************************/
-void psci_afflvl_power_on_finish(unsigned long mpidr,
- int start_afflvl,
+void psci_afflvl_power_on_finish(int start_afflvl,
int end_afflvl,
afflvl_power_on_finisher_t *pon_handlers)
{
mpidr_aff_map_nodes_t mpidr_nodes;
int rc;
- mpidr &= MPIDR_AFFINITY_MASK;
-
/*
* Collect the pointers to the nodes in the topology tree for
* each affinity instance in the mpidr. If this function does
* not return successfully then either the mpidr or the affinity
* levels are incorrect. Either case is an irrecoverable error.
*/
- rc = psci_get_aff_map_nodes(mpidr,
+ rc = psci_get_aff_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
start_afflvl,
end_afflvl,
mpidr_nodes);
@@ -425,8 +419,7 @@
* level so that by the time all locks are taken, the system topology
* is snapshot and state management can be done safely.
*/
- psci_acquire_afflvl_locks(mpidr,
- start_afflvl,
+ psci_acquire_afflvl_locks(start_afflvl,
end_afflvl,
mpidr_nodes);
@@ -434,8 +427,7 @@
rc = psci_call_power_on_handlers(mpidr_nodes,
start_afflvl,
end_afflvl,
- pon_handlers,
- mpidr);
+ pon_handlers);
if (rc != PSCI_E_SUCCESS)
panic();
@@ -443,8 +435,7 @@
* This loop releases the lock corresponding to each affinity level
* in the reverse order to which they were acquired.
*/
- psci_release_afflvl_locks(mpidr,
- start_afflvl,
+ psci_release_afflvl_locks(start_afflvl,
end_afflvl,
mpidr_nodes);
}
diff --git a/services/std_svc/psci/psci_entry.S b/services/std_svc/psci/psci_entry.S
index 5628d79..1ffde06 100644
--- a/services/std_svc/psci/psci_entry.S
+++ b/services/std_svc/psci/psci_entry.S
@@ -58,8 +58,6 @@
adr x23, psci_afflvl_suspend_finishers
psci_aff_common_finish_entry:
- adr x22, psci_afflvl_power_on_finish
-
/* ---------------------------------------------
* Initialise the pcpu cache pointer for the CPU
* ---------------------------------------------
@@ -92,11 +90,10 @@
bl get_power_on_target_afflvl
cmp x0, xzr
b.lt _panic
- mov x3, x23
- mov x2, x0
- mov x1, #MPIDR_AFFLVL0
- mrs x0, mpidr_el1
- blr x22
+ mov x2, x23
+ mov x1, x0
+ mov x0, #MPIDR_AFFLVL0
+ bl psci_afflvl_power_on_finish
/* --------------------------------------------
* Give ourselves a stack allocated in Normal
diff --git a/services/std_svc/psci/psci_main.c b/services/std_svc/psci/psci_main.c
index 2d7b018..d68f3d0 100644
--- a/services/std_svc/psci/psci_main.c
+++ b/services/std_svc/psci/psci_main.c
@@ -78,7 +78,6 @@
unsigned long context_id)
{
int rc;
- unsigned long mpidr;
unsigned int target_afflvl, pstate_type;
/* Check SBZ bits in power state are zero */
@@ -111,9 +110,7 @@
* enter the final wfi which will power down this cpu else return
* an error.
*/
- mpidr = read_mpidr();
- rc = psci_afflvl_suspend(mpidr,
- entrypoint,
+ rc = psci_afflvl_suspend(entrypoint,
context_id,
power_state,
MPIDR_AFFLVL0,
@@ -127,18 +124,15 @@
int psci_cpu_off(void)
{
int rc;
- unsigned long mpidr;
int target_afflvl = get_max_afflvl();
- mpidr = read_mpidr();
-
/*
* Traverse from the highest to the lowest affinity level. When the
* lowest affinity level is hit, all the locks are acquired. State
* management is done immediately followed by cpu, cluster ...
* ..target_afflvl specific actions as this function unwinds back.
*/
- rc = psci_afflvl_off(mpidr, MPIDR_AFFLVL0, target_afflvl);
+ rc = psci_afflvl_off(MPIDR_AFFLVL0, target_afflvl);
/*
* Check if all actions needed to safely power down this cpu have
diff --git a/services/std_svc/psci/psci_private.h b/services/std_svc/psci/psci_private.h
index f534087..06db63f 100644
--- a/services/std_svc/psci/psci_private.h
+++ b/services/std_svc/psci/psci_private.h
@@ -62,8 +62,7 @@
} aff_limits_node_t;
typedef aff_map_node_t (*mpidr_aff_map_nodes_t[MPIDR_MAX_AFFLVL]);
-typedef unsigned int (*afflvl_power_on_finisher_t)(unsigned long,
- aff_map_node_t *);
+typedef unsigned int (*afflvl_power_on_finisher_t)(aff_map_node_t *);
/*******************************************************************************
* Data prototypes
@@ -87,20 +86,17 @@
unsigned long mpidr_set_aff_inst(unsigned long, unsigned char, int);
int psci_validate_mpidr(unsigned long, int);
int get_power_on_target_afflvl(unsigned long mpidr);
-void psci_afflvl_power_on_finish(unsigned long,
- int,
+void psci_afflvl_power_on_finish(int,
int,
afflvl_power_on_finisher_t *);
int psci_save_ns_entry(uint64_t mpidr,
uint64_t entrypoint, uint64_t context_id,
uint32_t caller_scr_el3, uint32_t caller_sctlr_el1);
int psci_check_afflvl_range(int start_afflvl, int end_afflvl);
-void psci_acquire_afflvl_locks(unsigned long mpidr,
- int start_afflvl,
+void psci_acquire_afflvl_locks(int start_afflvl,
int end_afflvl,
mpidr_aff_map_nodes_t mpidr_nodes);
-void psci_release_afflvl_locks(unsigned long mpidr,
- int start_afflvl,
+void psci_release_afflvl_locks(int start_afflvl,
int end_afflvl,
mpidr_aff_map_nodes_t mpidr_nodes);
@@ -119,7 +115,7 @@
int);
/* Private exported functions from psci_affinity_off.c */
-int psci_afflvl_off(unsigned long, int, int);
+int psci_afflvl_off(int, int);
/* Private exported functions from psci_affinity_suspend.c */
void psci_set_suspend_power_state(aff_map_node_t *node,
@@ -127,11 +123,10 @@
int psci_get_aff_map_node_suspend_afflvl(aff_map_node_t *node);
int psci_afflvl_suspend(unsigned long,
unsigned long,
- unsigned long,
unsigned int,
int,
int);
-unsigned int psci_afflvl_suspend_finish(unsigned long, int, int);
+unsigned int psci_afflvl_suspend_finish(int, int);
#endif /* __PSCI_PRIVATE_H__ */