commit 26bb39dc3e755865dda54c571284866ecba2fe70
author Bipin Ravi <bipin.ravi@arm.com> Tue Oct 17 05:56:01 2023 -0500
committer laurenw-arm <lauren.wehrmeister@arm.com> Tue Nov 07 11:02:10 2023 -0600
tree 33f57d86f51cbcdb300474a062527d1aa52be7ed
parent 78de36b5239b700351ec542a3106ad121df4b1a3

fix(cpus): workaround for Neoverse N2 erratum 2346952

Neoverse N2 erratum 2346952 is a Cat B erratum that applies to all
revisions <= r0p2 and is fixed in r0p3.
The workaround is to set L2 TQ size statically to it's full size.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-1982442/latest

Change-Id: I03c3cf1f951fbc906fdebcb99a523c5ac8ba055d
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
(cherry picked from commit 6cb8be17a53f4e11880ba13b78fca15895281cfe)

docs/design/cpu-specific-build-macros.rst

diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 146026b..0b01840 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -655,6 +655,10 @@
    CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
    r0p1.
 
+-  ``ERRATA_N2_2346952``: This applies errata 2346952 workaround to Neoverse-N2
+   CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU,
+   it is fixed in r0p3.
+
 -  ``ERRATA_N2_2376738``: This applies errata 2376738 workaround to Neoverse-N2
    CPU. This needs to be enabled for revision r0p0, r0p1, r0p2, r0p3 and is still open.