| Arunachalam Ganapathy | a5b1776 | 2020-04-27 14:33:00 +0100 | [diff] [blame] | 1 | # |
| 2 | # Copyright (c) 2020, Arm Limited. All rights reserved. |
| 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
| 7 | # Default number of threads per CPU on FVP |
| 8 | TC0_MAX_PE_PER_CPU := 1 |
| 9 | |
| 10 | # Check the PE per core count |
| 11 | ifneq ($(TC0_MAX_PE_PER_CPU),$(filter $(TC0_MAX_PE_PER_CPU),1 2)) |
| 12 | $(error "Incorrect TC0_MAX_PE_PER_CPU specified for TC0 port") |
| 13 | endif |
| 14 | |
| 15 | # Pass FVP_MAX_PE_PER_CPU to the build system |
| 16 | $(eval $(call add_define,TFTF_DEFINES,TC0_MAX_PE_PER_CPU)) |
| 17 | $(eval $(call add_define,NS_BL1U_DEFINES,TC0_MAX_PE_PER_CPU)) |
| 18 | $(eval $(call add_define,NS_BL2U_DEFINES,TC0_MAX_PE_PER_CPU)) |
| 19 | |
| Arunachalam Ganapathy | 1e51c2f | 2020-09-22 13:28:29 +0100 | [diff] [blame] | 20 | PLAT_INCLUDES += -Iplat/arm/tc0/include/ |
| Arunachalam Ganapathy | a5b1776 | 2020-04-27 14:33:00 +0100 | [diff] [blame] | 21 | |
| 22 | PLAT_SOURCES := drivers/arm/gic/arm_gic_v2v3.c \ |
| 23 | drivers/arm/gic/gic_v2.c \ |
| 24 | drivers/arm/gic/gic_v3.c \ |
| 25 | drivers/arm/sp805/sp805.c \ |
| 26 | drivers/arm/timer/private_timer.c \ |
| 27 | drivers/arm/timer/system_timer.c \ |
| 28 | plat/arm/tc0/${ARCH}/plat_helpers.S \ |
| 29 | plat/arm/tc0/plat_setup.c \ |
| 30 | plat/arm/tc0/tc0_mem_prot.c \ |
| 31 | plat/arm/tc0/tc0_pwr_state.c \ |
| 32 | plat/arm/tc0/tc0_topology.c |
| 33 | |
| 34 | CACTUS_SOURCES += plat/arm/tc0/${ARCH}/plat_helpers.S |
| Ruari Phipps | 9f1952c | 2020-08-24 11:32:32 +0100 | [diff] [blame] | 35 | IVY_SOURCES += plat/arm/tc0/${ARCH}/plat_helpers.S |
| Arunachalam Ganapathy | a5b1776 | 2020-04-27 14:33:00 +0100 | [diff] [blame] | 36 | |
| 37 | PLAT_TESTS_SKIP_LIST := plat/arm/tc0/tests_to_skip.txt |
| 38 | |
| 39 | ifeq (${USE_NVM},1) |
| 40 | $(error "USE_NVM is not supported on TC0 platforms") |
| 41 | endif |
| 42 | |
| 43 | include plat/arm/common/arm_common.mk |