feat(trbe): add trace buffer control registers access test
Added a test to read trace buffer control registers to ensure that
EL3 is giving permission to non-secure EL2 to access these registers.
Change-Id: I70faa5bb7e0bc648fbc3d14cb9c1b8da3470a201
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
diff --git a/include/lib/aarch64/arch_features.h b/include/lib/aarch64/arch_features.h
index 15eb784..d2665b4 100644
--- a/include/lib/aarch64/arch_features.h
+++ b/include/lib/aarch64/arch_features.h
@@ -92,4 +92,11 @@
ID_AA64DFR0_DEBUG_SHIFT);
}
+static inline bool get_armv9_0_trbe_support(void)
+{
+ return ((read_id_aa64dfr0_el1() >> ID_AA64DFR0_TRACEBUFFER_SHIFT) &
+ ID_AA64DFR0_TRACEBUFFER_MASK) ==
+ ID_AA64DFR0_TRACEBUFFER_SUPPORTED;
+}
+
#endif /* ARCH_FEATURES_H */