commit | a29e811d596794b5e135904be9033e9a1662507e | [log] [tgz] |
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author | Soby Mathew <soby.mathew@arm.com> | Wed Oct 25 19:08:49 2023 +0200 |
committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | Wed Oct 25 19:08:49 2023 +0200 |
tree | ff959de9f2e05c711dae73bedf2e5b8a34d56f2b | |
parent | cbfec24f12c205a8c827604864e2c51f7d419b33 [diff] | |
parent | f369717f93ee8d7e2c12460e71d335bc702e37b4 [diff] |
Merge changes I3fc755f7,I861892f2,I3fa064c7,I10ae5487,I42955f80, ... * changes: test(rme): check various SIMD state preserved across NS/RL switch fix(rme): enhance fpu state verification test feat(sve): add helper routines to read, write, compare SVE registers feat(fpu): add helper routines to read, write, compare FPU registers fix(sve): represent sve Z0-31 registers as array of bytes test(rme): check if non SVE realm gets undefined abort