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review.trustedfirmware.org / mirror / psa-arch-tests / refs/heads/1.2 / . / secure-debug / val / include / val.h
blob: 8ac9a988d527202e56045c714ecfa9e7f847ed8f [file] [log] [blame]
jk-arm957cfea2021-06-18 15:52:12 +0530[diff] [blame]1/** @file
2 * Copyright (c) 2021 Arm Limited or its affiliates. All rights reserved.
3 * SPDX-License-Identifier : Apache-2.0
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16**/
17
18#ifndef _VAL_COMMON_H_
19#define _VAL_COMMON_H_
20
21#include <string.h>
22#include <stdint.h>
23#include <stdlib.h>
24#include <limits.h>
25#include <stdarg.h>
26
27typedef uint8_t bool_t;
28typedef uintptr_t addr_t;
29typedef uint32_t test_id_t;
30typedef uint32_t block_id_t;
31typedef char char8_t;
32typedef uint32_t cfg_id_t;
33
34/* Print verbosity = TEST */
35#ifndef VERBOSE
36#define VERBOSE 9
37#endif
38
39#ifndef VAL_NSPE_BUILD
40#define STATIC_DECLARE static
41#else
42#define STATIC_DECLARE
43#endif
44
45#ifndef __WEAK
46#define __WEAK __attribute__((weak))
47#endif
48
49#ifndef __UNUSED
50#define __UNUSED __attribute__((unused))
51#endif
52
53#ifndef TRUE
54#define TRUE 0
55#endif
56#ifndef FALSE
57#define FALSE 1
58#endif
59
60#define _CONCAT(A, B) A##B
61#define CONCAT(A, B) _CONCAT(A, B)
62
63/* test status defines */
64#define TEST_START 0x01
65#define TEST_END 0x02
66#define TEST_PASS 0x04
67#define TEST_FAIL 0x08
68#define TEST_SKIP 0x10
69#define TEST_PENDING 0x20
70
71#define TEST_NUM_BIT 32
72#define TEST_STATE_BIT 8
73#define TEST_STATUS_BIT 0
74
75#define TEST_NUM_MASK 0xFFFFFFFF
76#define TEST_STATE_MASK 0xFF
77#define TEST_STATUS_MASK 0xFF
78
79#define RESULT_START(status) (((TEST_START) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT))
80#define RESULT_END(status) (((TEST_END) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT))
81#define RESULT_PASS(status) (((TEST_PASS) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT))
82#define RESULT_FAIL(status) (((TEST_FAIL) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT))
83#define RESULT_SKIP(status) (((TEST_SKIP) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT))
84#define RESULT_PENDING(status) (((TEST_PENDING) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT))
85
86#define IS_TEST_FAIL(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_FAIL)
87#define IS_TEST_PASS(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_PASS)
88#define IS_TEST_SKIP(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_SKIP)
89#define IS_TEST_PENDING(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_PENDING)
90#define IS_TEST_START(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_START)
91#define IS_TEST_END(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_END)
92#define VAL_ERROR(status) ((status & TEST_STATUS_MASK) ? 1 : 0)
93
94
95
96/* Test Defines */
97#define TEST_PUBLISH(test_id, entry) \
98 const val_test_info_t __attribute__((section(".acs_test_info"))) \
99 CONCAT(acs_test_info, entry) = {test_id, entry}
100
101#define VAL_MAX_TEST_PER_COMP 200
102#define VAL_SECURE_DEBUG_BASE 4
103
104
105#define VAL_GET_COMP_NUM(test_id) \
106 ((test_id - (test_id % VAL_MAX_TEST_PER_COMP)) / VAL_MAX_TEST_PER_COMP)
107#define VAL_GET_TEST_NUM(test_id) (test_id % VAL_MAX_TEST_PER_COMP)
108#define VAL_CREATE_TEST_ID(comp, num) ((comp*VAL_MAX_TEST_PER_COMP) + num)
109
110#define TEST_FIELD(num1, num2) (num2 << 8 | num1)
111#define GET_TEST_ISOLATION_LEVEL(num) (num & 0x3)
112#define GET_WD_TIMOUT_TYPE(num) ((num >> 8) & 0x7)
113
114#define TEST_CHECKPOINT_NUM(n) n
115#define TEST(n) n
116#define BLOCK(n) n
117
118#define BLOCK_NUM_POS 8
119#define ACTION_POS 16
120#define GET_TEST_NUM(n) (0xff & n)
121#define GET_BLOCK_NUM(n) ((n >> BLOCK_NUM_POS) & 0xff)
122
123#define GET_ACTION_NUM(n) ((n >> ACTION_POS) & 0xff)
124#define TEST_EXECUTE_FUNC 1
125#define TEST_RETURN_RESULT 2
126#define INVALID_HANDLE 0x1234DEAD
127
128#define VAL_NVMEM_BLOCK_SIZE 4
129#define VAL_NVMEM_OFFSET(nvmem_idx) (nvmem_idx * VAL_NVMEM_BLOCK_SIZE)
130
131#define UART_INIT_SIGN 0xff
132#define UART_PRINT_SIGN 0xfe
133
134#define TEST_PANIC() \
135 do { \
136 } while (1)
137
138#define TEST_ASSERT_EQUAL(arg1, arg2, checkpoint) \
139 do { \
140 if ((arg1) != arg2) \
141 { \
142 val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \
143 val->print(PRINT_ERROR, "\tActual: %d\n", arg1); \
144 val->print(PRINT_ERROR, "\tExpected: %d\n", arg2); \
145 return 1; \
146 } \
147 } while (0)
148
149#define TEST_ASSERT_DUAL(arg1, status1, status2, checkpoint) \
150 do { \
151 if ((arg1) != status1 && (arg1) != status2) \
152 { \
153 val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \
154 val->print(PRINT_ERROR, "\tActual: %d\n", arg1); \
155 val->print(PRINT_ERROR, "\tExpected: %d", status1); \
156 val->print(PRINT_ERROR, "or %d\n", status2); \
157 return 1; \
158 } \
159 } while (0)
160
161#define TEST_ASSERT_NOT_EQUAL(arg1, arg2, checkpoint) \
162 do { \
163 if ((arg1) == arg2) \
164 { \
165 val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \
166 val->print(PRINT_ERROR, "\tValue: %d\n", arg1); \
167 return 1; \
168 } \
169 } while (0)
170
171#define TEST_ASSERT_MEMCMP(buf1, buf2, size, checkpoint) \
172 do { \
173 if (memcmp(buf1, buf2, size)) \
174 { \
175 val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d : ", checkpoint); \
176 val->print(PRINT_ERROR, "Unequal data in compared buffers\n", 0); \
177 return 1; \
178 } \
179 } while (0)
180
181#define TEST_ASSERT_RANGE(arg1, range1, range2, checkpoint) \
182 do { \
183 if ((arg1) < range1 || (arg1) > range2) \
184 { \
185 val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \
186 val->print(PRINT_ERROR, "\tActual: %d\n", arg1); \
187 val->print(PRINT_ERROR, "\tExpected range: %d to ", range1); \
188 val->print(PRINT_ERROR, "%d", range2); \
189 return 1; \
190 } \
191 } while (0)
192
193/* enums */
194typedef enum {
195 CALLER_NONSECURE = 0x0,
196 CALLER_SECURE = 0x1,
197} caller_security_t;
198
199typedef enum {
200 TEST_ISOLATION_L1 = 0x1,
201 TEST_ISOLATION_L2 = 0x2,
202 TEST_ISOLATION_L3 = 0x3,
203} test_isolation_level_t;
204
205typedef enum {
206 LEVEL1 = 0x1,
207 LEVEL2,
208 LEVEL3,
209} isolation_level_t;
210
211typedef enum {
212 /* VAL uses this boot flag to mark first time boot of the system */
213 BOOT_UNKNOWN = 0x1,
214 /* VAL/Test uses this boot flag to catch any unwanted system reboot - SIM ERROR Cases*/
215 BOOT_NOT_EXPECTED = 0x2,
216 /* Test performs panic check for non-secure test run and expect reboot */
217 BOOT_EXPECTED_NS = 0x3,
218 /* Test performs panic check for secure test run and expect reboot */
219 BOOT_EXPECTED_S = 0x4,
220 /* Test expects reboot but it didn't happen */
221 BOOT_EXPECTED_BUT_FAILED = 0x5,
222 /* Test expects reboot for secure/non-secure test run. If reboot happens,
223 * re-enter the same test and execute the next check function
224 */
225 BOOT_EXPECTED_REENTER_TEST = 0x6,
226 /* Test expect reboot for the test run. If reboot happens,
227 * re-enter the same test and continue executing the same check function
228 */
229 BOOT_EXPECTED_CONT_TEST_EXEC = 0x7,
230} boot_state_t;
231
232typedef enum {
233 NV_BOOT = 0x0,
234 NV_TEST_ID_PREVIOUS = 0x1,
235 NV_TEST_ID_CURRENT = 0x2,
236 NV_TEST_CNT = 0x3,
237 NV_TEST_DATA1 = 0x4,
238 NV_TEST_DATA2 = 0x5,
239 NV_TEST_DATA3 = 0x6,
240} nvmem_index_t;
241
242/* enums to report test sub-state */
243typedef enum {
244 VAL_STATUS_SUCCESS = 0x0,
245 VAL_STATUS_INVALID = 0x10,
246 VAL_STATUS_ERROR = 0x11,
247 VAL_STATUS_NOT_FOUND = 0x12,
248 VAL_STATUS_LOAD_ERROR = 0x13,
249 VAL_STATUS_INSUFFICIENT_SIZE = 0x14,
250 VAL_STATUS_CONNECTION_FAILED = 0x15,
251 VAL_STATUS_CALL_FAILED = 0x16,
252 VAL_STATUS_READ_FAILED = 0x17,
253 VAL_STATUS_WRITE_FAILED = 0x18,
254 VAL_STATUS_ISOLATION_LEVEL_NOT_SUPP = 0x19,
255 VAL_STATUS_INIT_FAILED = 0x1A,
256 VAL_STATUS_SPM_FAILED = 0x1B,
257 VAL_STATUS_SPM_UNEXPECTED_BEH = 0x1C,
258 VAL_STATUS_FRAMEWORK_VERSION_FAILED = 0x1D,
259 VAL_STATUS_VERSION_API_FAILED = 0x1E,
260 VAL_STATUS_INVALID_HANDLE = 0x1F,
261 VAL_STATUS_INVALID_MSG_TYPE = 0x20,
262 VAL_STATUS_WRONG_IDENTITY = 0x21,
263 VAL_STATUS_MSG_INSIZE_FAILED = 0x22,
264 VAL_STATUS_MSG_OUTSIZE_FAILED = 0x23,
265 VAL_STATUS_SKIP_FAILED = 0x24,
266 VAL_STATUS_CRYPTO_FAILURE = 0x25,
267 VAL_STATUS_INVALID_SIZE = 0x26,
268 VAL_STATUS_DATA_MISMATCH = 0x27,
269 VAL_STATUS_BOOT_EXPECTED_BUT_FAILED = 0x28,
270 VAL_STATUS_INIT_ALREADY_DONE = 0x29,
271 VAL_STATUS_HEAP_NOT_AVAILABLE = 0x2A,
272 VAL_STATUS_UNSUPPORTED = 0x2B,
273 VAL_STATUS_DRIVER_FN_FAILED = 0x2C,
274 VAL_STATUS_NO_TESTS = 0X2D,
275 VAL_STATUS_TEST_FAILED = 0x2E,
276 VAL_STATUS_ERROR_MAX = INT_MAX,
277} val_status_t;
278
279/* verbosity enums */
280typedef enum {
281 PRINT_INFO = 1,
282 PRINT_DEBUG = 2,
283 PRINT_TEST = 3,
284 PRINT_WARN = 4,
285 PRINT_ERROR = 5,
286 PRINT_ALWAYS = 9
287} print_verbosity_t;
288
289/* Driver test function id enums */
290typedef enum {
291 TEST_PSA_EOI_WITH_NON_INTR_SIGNAL = 1,
292 TEST_PSA_EOI_WITH_MULTIPLE_SIGNALS = 2,
293 TEST_PSA_EOI_WITH_UNASSERTED_SIGNAL = 3,
294 TEST_INTR_SERVICE = 4,
295 TEST_ISOLATION_PSA_ROT_DATA_RD = 5,
296 TEST_ISOLATION_PSA_ROT_DATA_WR = 6,
297 TEST_ISOLATION_PSA_ROT_STACK_RD = 7,
298 TEST_ISOLATION_PSA_ROT_STACK_WR = 8,
299 TEST_ISOLATION_PSA_ROT_HEAP_RD = 9,
300 TEST_ISOLATION_PSA_ROT_HEAP_WR = 10,
301 TEST_ISOLATION_PSA_ROT_MMIO_RD = 11,
302 TEST_ISOLATION_PSA_ROT_MMIO_WR = 12,
303} driver_test_fn_id_t;
304
305/* typedef's */
306typedef struct {
307 boot_state_t state;
308} boot_t;
309
310typedef struct {
311 uint32_t pass_cnt:8;
312 uint32_t skip_cnt:8;
313 uint32_t fail_cnt:8;
314 uint32_t sim_error_cnt:8;
315} test_count_t;
316
317typedef struct {
318 uint16_t test_num;
319 uint8_t block_num;
320} test_info_t;
321
322
323/* struture to capture test state */
324typedef struct {
325 uint16_t reserved;
326 uint8_t state;
327 uint8_t status;
328} test_status_buffer_t;
329
330typedef int32_t (*client_test_t)(caller_security_t caller);
331typedef int32_t (*server_test_t)(void);
332#endif /* VAL_COMMON_H */