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jaypit02ea3cd062018-10-05 12:22:38 +05301/** @file
Gowtham Siddarth47223082019-01-17 09:59:50 +05302 * Copyright (c) 2018-2019, Arm Limited or its affiliates. All rights reserved.
jaypit02ea3cd062018-10-05 12:22:38 +05303 * SPDX-License-Identifier : Apache-2.0
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16**/
17
18#ifndef _VAL_COMMON_H_
19#define _VAL_COMMON_H_
20
Gowtham Siddarth47223082019-01-17 09:59:50 +053021#include "pal_common.h"
jaypit02ea3cd062018-10-05 12:22:38 +053022
23#ifndef VAL_NSPE_BUILD
24#define STATIC_DECLARE static
25#else
26#define STATIC_DECLARE
27#endif
28
29#ifndef __WEAK
30#define __WEAK __attribute__((weak))
31#endif
32
33#ifndef __UNUSED
34#define __UNUSED __attribute__((unused))
35#endif
36
37#ifndef TRUE
38#define TRUE 0
39#endif
40#ifndef FALSE
41#define FALSE 1
42#endif
43
Murat Cakmak26652972019-01-02 22:18:32 +000044#define _CONCAT(A,B) A##B
45#define CONCAT(A,B) _CONCAT(A,B)
46
jaypit02ea3cd062018-10-05 12:22:38 +053047/* test status defines */
48#define TEST_START 0x01
49#define TEST_END 0x02
50#define TEST_PASS 0x04
51#define TEST_FAIL 0x08
52#define TEST_SKIP 0x10
53#define TEST_PENDING 0x20
54
55#define TEST_NUM_BIT 32
56#define TEST_STATE_BIT 8
57#define TEST_STATUS_BIT 0
58
59#define TEST_NUM_MASK 0xFFFFFFFF
60#define TEST_STATE_MASK 0xFF
61#define TEST_STATUS_MASK 0xFF
62
63#define RESULT_START(status) (((TEST_START) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT))
64#define RESULT_END(status) (((TEST_END) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT))
65#define RESULT_PASS(status) (((TEST_PASS) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT))
66#define RESULT_FAIL(status) (((TEST_FAIL) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT))
67#define RESULT_SKIP(status) (((TEST_SKIP) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT))
68#define RESULT_PENDING(status) (((TEST_PENDING) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT))
69
70#define IS_TEST_FAIL(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_FAIL)
71#define IS_TEST_PASS(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_PASS)
72#define IS_TEST_SKIP(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_SKIP)
73#define IS_TEST_PENDING(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_PENDING)
74#define IS_TEST_START(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_START)
75#define IS_TEST_END(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_END)
Gowtham Siddarth47223082019-01-17 09:59:50 +053076#define VAL_ERROR(status) ((status & TEST_STATUS_MASK) ? 1 : 0)
jaypit02ea3cd062018-10-05 12:22:38 +053077
78
79
80/* Test Defines */
81#define TEST_PUBLISH(test_id, entry) \
Gowtham Siddarth47223082019-01-17 09:59:50 +053082 const val_test_info_t __attribute__((section(".acs_test_info"))) \
83 CONCAT(acs_test_info, entry) = {test_id, entry}
jaypit02ea3cd062018-10-05 12:22:38 +053084
Gowtham Siddarth47223082019-01-17 09:59:50 +053085#define VAL_MAX_TEST_PER_COMP 200
86#define VAL_FF_BASE 0
87#define VAL_CRYPTO_BASE 1
88#define VAL_PROTECTED_STORAGE_BASE 2
89#define VAL_INTERNAL_TRUSTED_STORAGE_BASE 3
90#define VAL_INITIAL_ATTESTATION_BASE 4
91
jaypit02ea3cd062018-10-05 12:22:38 +053092#define VAL_GET_COMP_NUM(test_id) \
93 ((test_id - (test_id % VAL_MAX_TEST_PER_COMP)) / VAL_MAX_TEST_PER_COMP)
94#define VAL_GET_TEST_NUM(test_id) (test_id % VAL_MAX_TEST_PER_COMP)
95#define VAL_CREATE_TEST_ID(comp,num) ((comp*VAL_MAX_TEST_PER_COMP) + num)
96
97#define TEST_FIELD(num1,num2) (num2 << 8 | num1)
98#define GET_TEST_ISOLATION_LEVEL(num) (num & 0x3)
Gowtham Siddarth47223082019-01-17 09:59:50 +053099#define GET_WD_TIMOUT_TYPE(num) ((num >> 8) & 0x7)
jaypit02ea3cd062018-10-05 12:22:38 +0530100
101#define TEST_CHECKPOINT_NUM(n) n
102#define TEST(n) n
103#define BLOCK(n) n
104
105#define BLOCK_NUM_POS 8
106#define ACTION_POS 16
107#define GET_TEST_NUM(n) (0xff & n)
108#define GET_BLOCK_NUM(n) ((n >> BLOCK_NUM_POS) & 0xff)
109
110#define GET_ACTION_NUM(n) ((n >> ACTION_POS) & 0xff)
111#define TEST_EXECUTE_FUNC 1
112#define TEST_RETURN_RESULT 2
113#define INVALID_HANDLE 0x1234DEAD
114
115#define VAL_NVMEM_BLOCK_SIZE 4
116#define VAL_NVMEM_OFFSET(nvmem_idx) (nvmem_idx * VAL_NVMEM_BLOCK_SIZE)
117
Gowtham Siddarth47223082019-01-17 09:59:50 +0530118#define UART_INIT_SIGN 0xff
jaypit02ac23b5b2018-11-02 13:10:19 +0530119#define UART_PRINT_SIGN 0xfe
jaypit02ea3cd062018-10-05 12:22:38 +0530120
Gowtham Siddarth47223082019-01-17 09:59:50 +0530121#define TEST_PANIC() \
122 do { \
123 } while(1)
124
125#define TEST_ASSERT_EQUAL(arg1, arg2, checkpoint) \
126 do { \
127 if ((arg1) != arg2) \
128 { \
129 val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \
130 val->print(PRINT_ERROR, "\tActual: %d\n", arg1); \
131 val->print(PRINT_ERROR, "\tExpected: %d\n", arg2); \
132 return 1; \
133 } \
134 } while (0)
135
136#define TEST_ASSERT_DUAL(arg1, status1, status2, checkpoint) \
137 do { \
138 if ((arg1) != status1 && (arg1) != status2) \
139 { \
140 val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \
141 val->print(PRINT_ERROR, "\tActual: %d\n", arg1); \
142 val->print(PRINT_ERROR, "\tExpected: %d", status1); \
143 val->print(PRINT_ERROR, "or %d\n", status2); \
144 return 1; \
145 } \
146 } while (0)
147
148#define TEST_ASSERT_NOT_EQUAL(arg1, arg2, checkpoint) \
149 do { \
150 if ((arg1) == arg2) \
151 { \
152 val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \
153 val->print(PRINT_ERROR, "\tValue: %d\n", arg1); \
154 return 1; \
155 } \
156 } while (0)
157
158#define TEST_ASSERT_MEMCMP(buf1, buf2, size, checkpoint) \
159 do { \
160 if (memcmp(buf1, buf2, size)) \
161 { \
162 val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d : ", checkpoint); \
163 val->print(PRINT_ERROR, "Unequal data in compared buffers\n", 0); \
164 return 1; \
165 } \
166 } while (0)
167
jaypit02ea3cd062018-10-05 12:22:38 +0530168/* enums */
169typedef enum {
Gowtham Siddarthb1cd50f2019-08-21 11:50:26 +0530170 CALLER_NONSECURE = 0x0,
171 CALLER_SECURE = 0x1,
172} caller_security_t;
jaypit02ea3cd062018-10-05 12:22:38 +0530173
174typedef enum {
175 TEST_ISOLATION_L1 = 0x1,
176 TEST_ISOLATION_L2 = 0x2,
177 TEST_ISOLATION_L3 = 0x3,
178} test_isolation_level_t;
179
180typedef enum {
Jaykumar Pitambarbhai Patelf97bc882019-06-03 11:57:48 +0530181 /* VAL uses this boot flag to mark first time boot of the system */
182 BOOT_UNKNOWN = 0x1,
183 /* VAL/Test uses this boot flag to catch any unwanted system reboot - SIM ERROR Cases*/
184 BOOT_NOT_EXPECTED = 0x2,
185 /* Test performs panic check for non-secure test run and expect reboot */
186 BOOT_EXPECTED_NS = 0x3,
187 /* Test performs panic check for secure test run and expect reboot */
188 BOOT_EXPECTED_S = 0x4,
Gowtham Siddarthb8926262019-08-05 12:59:35 +0530189 /* Test expects reboot but it didn't happen */
Jaykumar Pitambarbhai Patelf97bc882019-06-03 11:57:48 +0530190 BOOT_EXPECTED_BUT_FAILED = 0x5,
Gowtham Siddarthb8926262019-08-05 12:59:35 +0530191 /* Test expects reboot for secure/non-secure test run. If reboot happens,
192 * re-enter the same test and execute the next check function
193 */
Jaykumar Pitambarbhai Patelf97bc882019-06-03 11:57:48 +0530194 BOOT_EXPECTED_REENTER_TEST = 0x6,
Gowtham Siddarthb8926262019-08-05 12:59:35 +0530195 /* Test expect reboot for the test run. If reboot happens,
196 * re-enter the same test and continue executing the same check function
197 */
198 BOOT_EXPECTED_CONT_TEST_EXEC = 0x7,
jaypit02ea3cd062018-10-05 12:22:38 +0530199} boot_state_t;
200
201typedef enum {
202 NV_BOOT = 0x0,
203 NV_TEST_ID_PREVIOUS = 0x1,
204 NV_TEST_ID_CURRENT = 0x2,
205 NV_TEST_CNT = 0x3,
Gowtham Siddarthb8926262019-08-05 12:59:35 +0530206 NV_TEST_DATA1 = 0x4,
207 NV_TEST_DATA2 = 0x5,
208 NV_TEST_DATA3 = 0x6,
jaypit02ea3cd062018-10-05 12:22:38 +0530209} nvmem_index_t;
210
jaypit02ea3cd062018-10-05 12:22:38 +0530211/* enums to report test sub-state */
212typedef enum {
213 VAL_STATUS_SUCCESS = 0x0,
214 VAL_STATUS_INVALID = 0x10,
215 VAL_STATUS_ERROR = 0x11,
216 VAL_STATUS_NOT_FOUND = 0x12,
217 VAL_STATUS_LOAD_ERROR = 0x13,
218 VAL_STATUS_INSUFFICIENT_SIZE = 0x14,
219 VAL_STATUS_CONNECTION_FAILED = 0x15,
220 VAL_STATUS_CALL_FAILED = 0x16,
221 VAL_STATUS_READ_FAILED = 0x17,
222 VAL_STATUS_WRITE_FAILED = 0x18,
223 VAL_STATUS_ISOLATION_LEVEL_NOT_SUPP = 0x19,
224 VAL_STATUS_INIT_FAILED = 0x1A,
225 VAL_STATUS_SPM_FAILED = 0x1B,
226 VAL_STATUS_SPM_UNEXPECTED_BEH = 0x1C,
227 VAL_STATUS_FRAMEWORK_VERSION_FAILED = 0x1D,
228 VAL_STATUS_VERSION_API_FAILED = 0x1E,
229 VAL_STATUS_INVALID_HANDLE = 0x1F,
230 VAL_STATUS_INVALID_MSG_TYPE = 0x20,
231 VAL_STATUS_WRONG_IDENTITY = 0x21,
232 VAL_STATUS_MSG_INSIZE_FAILED = 0x22,
233 VAL_STATUS_MSG_OUTSIZE_FAILED = 0x23,
234 VAL_STATUS_SKIP_FAILED = 0x24,
235 VAL_STATUS_CRYPTO_FAILURE = 0x25,
236 VAL_STATUS_INVALID_SIZE = 0x26,
237 VAL_STATUS_DATA_MISMATCH = 0x27,
238 VAL_STATUS_BOOT_EXPECTED_BUT_FAILED = 0x28,
Gowtham Siddarth47223082019-01-17 09:59:50 +0530239 VAL_STATUS_INIT_ALREADY_DONE = 0x29,
240 VAL_STATUS_HEAP_NOT_AVAILABLE = 0x2A,
cherat01914f46a2019-01-24 13:32:09 +0530241 VAL_STATUS_UNSUPPORTED = 0x2B,
Jaykumar Pitambarbhai Patelf97bc882019-06-03 11:57:48 +0530242 VAL_STATUS_DRIVER_FN_FAILED = 0x2C,
Gowtham Siddarthb8926262019-08-05 12:59:35 +0530243 VAL_STATUS_NO_TESTS = 0X2D,
Vikas Katariyaf0175d62019-08-30 11:16:10 +0100244 VAL_STATUS_TEST_FAILED = 0x2E,
Gowtham Siddarth47223082019-01-17 09:59:50 +0530245 VAL_STATUS_ERROR_MAX = INT_MAX,
jaypit02ea3cd062018-10-05 12:22:38 +0530246} val_status_t;
247
248/* verbosity enums */
249typedef enum {
250 PRINT_INFO = 1,
251 PRINT_DEBUG = 2,
252 PRINT_TEST = 3,
253 PRINT_WARN = 4,
254 PRINT_ERROR = 5,
255 PRINT_ALWAYS = 9
256} print_verbosity_t;
257
Jaykumar Pitambarbhai Patelf97bc882019-06-03 11:57:48 +0530258/* Driver test function id enums */
Gowtham Siddarth47223082019-01-17 09:59:50 +0530259typedef enum {
260 TEST_PSA_EOI_WITH_NON_INTR_SIGNAL = 1,
261 TEST_PSA_EOI_WITH_MULTIPLE_SIGNALS = 2,
262 TEST_PSA_EOI_WITH_UNASSERTED_SIGNAL = 3,
263 TEST_INTR_SERVICE = 4,
Jaykumar Pitambarbhai Patelf97bc882019-06-03 11:57:48 +0530264 TEST_ISOLATION_PSA_ROT_DATA_RD = 5,
265 TEST_ISOLATION_PSA_ROT_DATA_WR = 6,
266 TEST_ISOLATION_PSA_ROT_STACK_RD = 7,
267 TEST_ISOLATION_PSA_ROT_STACK_WR = 8,
268 TEST_ISOLATION_PSA_ROT_HEAP_RD = 9,
269 TEST_ISOLATION_PSA_ROT_HEAP_WR = 10,
270 TEST_ISOLATION_PSA_ROT_MMIO_RD = 11,
271 TEST_ISOLATION_PSA_ROT_MMIO_WR = 12,
272} driver_test_fn_id_t;
Gowtham Siddarth47223082019-01-17 09:59:50 +0530273
jaypit02ea3cd062018-10-05 12:22:38 +0530274/* typedef's */
275typedef struct {
276 boot_state_t state;
277} boot_t;
278
279typedef struct {
280 uint32_t pass_cnt:8;
281 uint32_t skip_cnt:8;
282 uint32_t fail_cnt:8;
283 uint32_t sim_error_cnt:8;
284} test_count_t;
285
286typedef struct {
jaypit02ea3cd062018-10-05 12:22:38 +0530287 uint16_t test_num;
288 uint8_t block_num;
289} test_info_t;
290
291
292/* struture to capture test state */
293typedef struct {
294 uint16_t reserved;
295 uint8_t state;
296 uint8_t status;
297} test_status_buffer_t;
298
Gowtham Siddarthb1cd50f2019-08-21 11:50:26 +0530299typedef int32_t (*client_test_t)(caller_security_t caller);
jaypit02ea3cd062018-10-05 12:22:38 +0530300typedef int32_t (*server_test_t)(void);
301#endif /* VAL_COMMON_H */