jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 1 | /** @file |
jk-arm | 01ee3ff | 2021-10-18 22:41:47 +0530 | [diff] [blame^] | 2 | * Copyright (c) 2018-2021, Arm Limited or its affiliates. All rights reserved. |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 3 | * SPDX-License-Identifier : Apache-2.0 |
| 4 | * |
| 5 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 6 | * you may not use this file except in compliance with the License. |
| 7 | * You may obtain a copy of the License at |
| 8 | * |
| 9 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 10 | * |
| 11 | * Unless required by applicable law or agreed to in writing, software |
| 12 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 13 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 14 | * See the License for the specific language governing permissions and |
| 15 | * limitations under the License. |
| 16 | **/ |
| 17 | |
| 18 | #ifndef _VAL_COMMON_H_ |
| 19 | #define _VAL_COMMON_H_ |
| 20 | |
Gowtham Siddarth | 4722308 | 2019-01-17 09:59:50 +0530 | [diff] [blame] | 21 | #include "pal_common.h" |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 22 | |
| 23 | #ifndef VAL_NSPE_BUILD |
| 24 | #define STATIC_DECLARE static |
| 25 | #else |
| 26 | #define STATIC_DECLARE |
| 27 | #endif |
| 28 | |
| 29 | #ifndef __WEAK |
| 30 | #define __WEAK __attribute__((weak)) |
| 31 | #endif |
| 32 | |
| 33 | #ifndef __UNUSED |
| 34 | #define __UNUSED __attribute__((unused)) |
| 35 | #endif |
| 36 | |
| 37 | #ifndef TRUE |
| 38 | #define TRUE 0 |
| 39 | #endif |
| 40 | #ifndef FALSE |
| 41 | #define FALSE 1 |
| 42 | #endif |
| 43 | |
Murat Cakmak | 2665297 | 2019-01-02 22:18:32 +0000 | [diff] [blame] | 44 | #define _CONCAT(A,B) A##B |
| 45 | #define CONCAT(A,B) _CONCAT(A,B) |
| 46 | |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 47 | /* test status defines */ |
| 48 | #define TEST_START 0x01 |
| 49 | #define TEST_END 0x02 |
| 50 | #define TEST_PASS 0x04 |
| 51 | #define TEST_FAIL 0x08 |
| 52 | #define TEST_SKIP 0x10 |
| 53 | #define TEST_PENDING 0x20 |
| 54 | |
| 55 | #define TEST_NUM_BIT 32 |
| 56 | #define TEST_STATE_BIT 8 |
| 57 | #define TEST_STATUS_BIT 0 |
| 58 | |
| 59 | #define TEST_NUM_MASK 0xFFFFFFFF |
| 60 | #define TEST_STATE_MASK 0xFF |
| 61 | #define TEST_STATUS_MASK 0xFF |
| 62 | |
| 63 | #define RESULT_START(status) (((TEST_START) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT)) |
| 64 | #define RESULT_END(status) (((TEST_END) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT)) |
| 65 | #define RESULT_PASS(status) (((TEST_PASS) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT)) |
| 66 | #define RESULT_FAIL(status) (((TEST_FAIL) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT)) |
| 67 | #define RESULT_SKIP(status) (((TEST_SKIP) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT)) |
| 68 | #define RESULT_PENDING(status) (((TEST_PENDING) << TEST_STATE_BIT) | ((status) << TEST_STATUS_BIT)) |
| 69 | |
| 70 | #define IS_TEST_FAIL(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_FAIL) |
| 71 | #define IS_TEST_PASS(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_PASS) |
| 72 | #define IS_TEST_SKIP(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_SKIP) |
| 73 | #define IS_TEST_PENDING(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_PENDING) |
| 74 | #define IS_TEST_START(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_START) |
| 75 | #define IS_TEST_END(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_END) |
Gowtham Siddarth | 4722308 | 2019-01-17 09:59:50 +0530 | [diff] [blame] | 76 | #define VAL_ERROR(status) ((status & TEST_STATUS_MASK) ? 1 : 0) |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 77 | |
| 78 | |
| 79 | |
| 80 | /* Test Defines */ |
| 81 | #define TEST_PUBLISH(test_id, entry) \ |
Gowtham Siddarth | 4722308 | 2019-01-17 09:59:50 +0530 | [diff] [blame] | 82 | const val_test_info_t __attribute__((section(".acs_test_info"))) \ |
| 83 | CONCAT(acs_test_info, entry) = {test_id, entry} |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 84 | |
Gowtham Siddarth | 4722308 | 2019-01-17 09:59:50 +0530 | [diff] [blame] | 85 | #define VAL_MAX_TEST_PER_COMP 200 |
| 86 | #define VAL_FF_BASE 0 |
| 87 | #define VAL_CRYPTO_BASE 1 |
Vinay Kumar Kotegowder | 18fcd40 | 2020-04-27 17:38:41 +0530 | [diff] [blame] | 88 | #define VAL_STORAGE_BASE 2 |
| 89 | #define VAL_INITIAL_ATTESTATION_BASE 3 |
Gowtham Siddarth | 4722308 | 2019-01-17 09:59:50 +0530 | [diff] [blame] | 90 | |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 91 | #define VAL_GET_COMP_NUM(test_id) \ |
| 92 | ((test_id - (test_id % VAL_MAX_TEST_PER_COMP)) / VAL_MAX_TEST_PER_COMP) |
| 93 | #define VAL_GET_TEST_NUM(test_id) (test_id % VAL_MAX_TEST_PER_COMP) |
| 94 | #define VAL_CREATE_TEST_ID(comp,num) ((comp*VAL_MAX_TEST_PER_COMP) + num) |
| 95 | |
| 96 | #define TEST_FIELD(num1,num2) (num2 << 8 | num1) |
| 97 | #define GET_TEST_ISOLATION_LEVEL(num) (num & 0x3) |
Gowtham Siddarth | 4722308 | 2019-01-17 09:59:50 +0530 | [diff] [blame] | 98 | #define GET_WD_TIMOUT_TYPE(num) ((num >> 8) & 0x7) |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 99 | |
| 100 | #define TEST_CHECKPOINT_NUM(n) n |
| 101 | #define TEST(n) n |
| 102 | #define BLOCK(n) n |
| 103 | |
| 104 | #define BLOCK_NUM_POS 8 |
| 105 | #define ACTION_POS 16 |
| 106 | #define GET_TEST_NUM(n) (0xff & n) |
| 107 | #define GET_BLOCK_NUM(n) ((n >> BLOCK_NUM_POS) & 0xff) |
| 108 | |
| 109 | #define GET_ACTION_NUM(n) ((n >> ACTION_POS) & 0xff) |
| 110 | #define TEST_EXECUTE_FUNC 1 |
| 111 | #define TEST_RETURN_RESULT 2 |
| 112 | #define INVALID_HANDLE 0x1234DEAD |
| 113 | |
| 114 | #define VAL_NVMEM_BLOCK_SIZE 4 |
| 115 | #define VAL_NVMEM_OFFSET(nvmem_idx) (nvmem_idx * VAL_NVMEM_BLOCK_SIZE) |
| 116 | |
Gowtham Siddarth | 4722308 | 2019-01-17 09:59:50 +0530 | [diff] [blame] | 117 | #define UART_INIT_SIGN 0xff |
jaypit02 | ac23b5b | 2018-11-02 13:10:19 +0530 | [diff] [blame] | 118 | #define UART_PRINT_SIGN 0xfe |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 119 | |
Gowtham Siddarth | 4722308 | 2019-01-17 09:59:50 +0530 | [diff] [blame] | 120 | #define TEST_PANIC() \ |
| 121 | do { \ |
| 122 | } while(1) |
| 123 | |
| 124 | #define TEST_ASSERT_EQUAL(arg1, arg2, checkpoint) \ |
| 125 | do { \ |
| 126 | if ((arg1) != arg2) \ |
| 127 | { \ |
| 128 | val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \ |
| 129 | val->print(PRINT_ERROR, "\tActual: %d\n", arg1); \ |
| 130 | val->print(PRINT_ERROR, "\tExpected: %d\n", arg2); \ |
| 131 | return 1; \ |
| 132 | } \ |
| 133 | } while (0) |
| 134 | |
| 135 | #define TEST_ASSERT_DUAL(arg1, status1, status2, checkpoint) \ |
| 136 | do { \ |
| 137 | if ((arg1) != status1 && (arg1) != status2) \ |
| 138 | { \ |
| 139 | val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \ |
| 140 | val->print(PRINT_ERROR, "\tActual: %d\n", arg1); \ |
| 141 | val->print(PRINT_ERROR, "\tExpected: %d", status1); \ |
| 142 | val->print(PRINT_ERROR, "or %d\n", status2); \ |
| 143 | return 1; \ |
| 144 | } \ |
| 145 | } while (0) |
| 146 | |
| 147 | #define TEST_ASSERT_NOT_EQUAL(arg1, arg2, checkpoint) \ |
| 148 | do { \ |
| 149 | if ((arg1) == arg2) \ |
| 150 | { \ |
| 151 | val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \ |
| 152 | val->print(PRINT_ERROR, "\tValue: %d\n", arg1); \ |
| 153 | return 1; \ |
| 154 | } \ |
| 155 | } while (0) |
| 156 | |
| 157 | #define TEST_ASSERT_MEMCMP(buf1, buf2, size, checkpoint) \ |
| 158 | do { \ |
| 159 | if (memcmp(buf1, buf2, size)) \ |
| 160 | { \ |
| 161 | val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d : ", checkpoint); \ |
| 162 | val->print(PRINT_ERROR, "Unequal data in compared buffers\n", 0); \ |
| 163 | return 1; \ |
| 164 | } \ |
| 165 | } while (0) |
| 166 | |
Jaykumar Pitambarbhai Patel | 0a4740b | 2020-03-03 16:57:20 +0530 | [diff] [blame] | 167 | #define TEST_ASSERT_RANGE(arg1, range1, range2, checkpoint) \ |
| 168 | do { \ |
| 169 | if ((arg1) < range1 || (arg1) > range2) \ |
| 170 | { \ |
| 171 | val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \ |
| 172 | val->print(PRINT_ERROR, "\tActual: %d\n", arg1); \ |
| 173 | val->print(PRINT_ERROR, "\tExpected range: %d to ", range1); \ |
| 174 | val->print(PRINT_ERROR, "%d", range2); \ |
| 175 | return 1; \ |
| 176 | } \ |
| 177 | } while (0) |
| 178 | |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 179 | /* enums */ |
| 180 | typedef enum { |
Gowtham Siddarth | b1cd50f | 2019-08-21 11:50:26 +0530 | [diff] [blame] | 181 | CALLER_NONSECURE = 0x0, |
| 182 | CALLER_SECURE = 0x1, |
| 183 | } caller_security_t; |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 184 | |
| 185 | typedef enum { |
| 186 | TEST_ISOLATION_L1 = 0x1, |
| 187 | TEST_ISOLATION_L2 = 0x2, |
| 188 | TEST_ISOLATION_L3 = 0x3, |
| 189 | } test_isolation_level_t; |
| 190 | |
| 191 | typedef enum { |
Jaykumar Pitambarbhai Patel | ccf5bf2 | 2019-12-06 11:58:32 +0530 | [diff] [blame] | 192 | LEVEL1 = 0x1, |
| 193 | LEVEL2, |
| 194 | LEVEL3, |
| 195 | } isolation_level_t; |
| 196 | |
| 197 | typedef enum { |
Jaykumar Pitambarbhai Patel | f97bc88 | 2019-06-03 11:57:48 +0530 | [diff] [blame] | 198 | /* VAL uses this boot flag to mark first time boot of the system */ |
| 199 | BOOT_UNKNOWN = 0x1, |
| 200 | /* VAL/Test uses this boot flag to catch any unwanted system reboot - SIM ERROR Cases*/ |
| 201 | BOOT_NOT_EXPECTED = 0x2, |
| 202 | /* Test performs panic check for non-secure test run and expect reboot */ |
| 203 | BOOT_EXPECTED_NS = 0x3, |
| 204 | /* Test performs panic check for secure test run and expect reboot */ |
| 205 | BOOT_EXPECTED_S = 0x4, |
Gowtham Siddarth | b892626 | 2019-08-05 12:59:35 +0530 | [diff] [blame] | 206 | /* Test expects reboot but it didn't happen */ |
Jaykumar Pitambarbhai Patel | f97bc88 | 2019-06-03 11:57:48 +0530 | [diff] [blame] | 207 | BOOT_EXPECTED_BUT_FAILED = 0x5, |
Gowtham Siddarth | b892626 | 2019-08-05 12:59:35 +0530 | [diff] [blame] | 208 | /* Test expects reboot for secure/non-secure test run. If reboot happens, |
| 209 | * re-enter the same test and execute the next check function |
| 210 | */ |
Jaykumar Pitambarbhai Patel | f97bc88 | 2019-06-03 11:57:48 +0530 | [diff] [blame] | 211 | BOOT_EXPECTED_REENTER_TEST = 0x6, |
Gowtham Siddarth | b892626 | 2019-08-05 12:59:35 +0530 | [diff] [blame] | 212 | /* Test expect reboot for the test run. If reboot happens, |
| 213 | * re-enter the same test and continue executing the same check function |
| 214 | */ |
| 215 | BOOT_EXPECTED_CONT_TEST_EXEC = 0x7, |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 216 | } boot_state_t; |
| 217 | |
| 218 | typedef enum { |
| 219 | NV_BOOT = 0x0, |
| 220 | NV_TEST_ID_PREVIOUS = 0x1, |
| 221 | NV_TEST_ID_CURRENT = 0x2, |
| 222 | NV_TEST_CNT = 0x3, |
Gowtham Siddarth | b892626 | 2019-08-05 12:59:35 +0530 | [diff] [blame] | 223 | NV_TEST_DATA1 = 0x4, |
| 224 | NV_TEST_DATA2 = 0x5, |
| 225 | NV_TEST_DATA3 = 0x6, |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 226 | } nvmem_index_t; |
| 227 | |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 228 | /* enums to report test sub-state */ |
| 229 | typedef enum { |
| 230 | VAL_STATUS_SUCCESS = 0x0, |
| 231 | VAL_STATUS_INVALID = 0x10, |
| 232 | VAL_STATUS_ERROR = 0x11, |
| 233 | VAL_STATUS_NOT_FOUND = 0x12, |
| 234 | VAL_STATUS_LOAD_ERROR = 0x13, |
| 235 | VAL_STATUS_INSUFFICIENT_SIZE = 0x14, |
| 236 | VAL_STATUS_CONNECTION_FAILED = 0x15, |
| 237 | VAL_STATUS_CALL_FAILED = 0x16, |
| 238 | VAL_STATUS_READ_FAILED = 0x17, |
| 239 | VAL_STATUS_WRITE_FAILED = 0x18, |
| 240 | VAL_STATUS_ISOLATION_LEVEL_NOT_SUPP = 0x19, |
| 241 | VAL_STATUS_INIT_FAILED = 0x1A, |
| 242 | VAL_STATUS_SPM_FAILED = 0x1B, |
| 243 | VAL_STATUS_SPM_UNEXPECTED_BEH = 0x1C, |
| 244 | VAL_STATUS_FRAMEWORK_VERSION_FAILED = 0x1D, |
| 245 | VAL_STATUS_VERSION_API_FAILED = 0x1E, |
| 246 | VAL_STATUS_INVALID_HANDLE = 0x1F, |
| 247 | VAL_STATUS_INVALID_MSG_TYPE = 0x20, |
| 248 | VAL_STATUS_WRONG_IDENTITY = 0x21, |
| 249 | VAL_STATUS_MSG_INSIZE_FAILED = 0x22, |
| 250 | VAL_STATUS_MSG_OUTSIZE_FAILED = 0x23, |
| 251 | VAL_STATUS_SKIP_FAILED = 0x24, |
| 252 | VAL_STATUS_CRYPTO_FAILURE = 0x25, |
| 253 | VAL_STATUS_INVALID_SIZE = 0x26, |
| 254 | VAL_STATUS_DATA_MISMATCH = 0x27, |
| 255 | VAL_STATUS_BOOT_EXPECTED_BUT_FAILED = 0x28, |
Gowtham Siddarth | 4722308 | 2019-01-17 09:59:50 +0530 | [diff] [blame] | 256 | VAL_STATUS_INIT_ALREADY_DONE = 0x29, |
| 257 | VAL_STATUS_HEAP_NOT_AVAILABLE = 0x2A, |
cherat01 | 914f46a | 2019-01-24 13:32:09 +0530 | [diff] [blame] | 258 | VAL_STATUS_UNSUPPORTED = 0x2B, |
Jaykumar Pitambarbhai Patel | f97bc88 | 2019-06-03 11:57:48 +0530 | [diff] [blame] | 259 | VAL_STATUS_DRIVER_FN_FAILED = 0x2C, |
Gowtham Siddarth | b892626 | 2019-08-05 12:59:35 +0530 | [diff] [blame] | 260 | VAL_STATUS_NO_TESTS = 0X2D, |
Vikas Katariya | f0175d6 | 2019-08-30 11:16:10 +0100 | [diff] [blame] | 261 | VAL_STATUS_TEST_FAILED = 0x2E, |
Gowtham Siddarth | 4722308 | 2019-01-17 09:59:50 +0530 | [diff] [blame] | 262 | VAL_STATUS_ERROR_MAX = INT_MAX, |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 263 | } val_status_t; |
| 264 | |
| 265 | /* verbosity enums */ |
| 266 | typedef enum { |
| 267 | PRINT_INFO = 1, |
| 268 | PRINT_DEBUG = 2, |
| 269 | PRINT_TEST = 3, |
| 270 | PRINT_WARN = 4, |
| 271 | PRINT_ERROR = 5, |
| 272 | PRINT_ALWAYS = 9 |
| 273 | } print_verbosity_t; |
| 274 | |
Jaykumar Pitambarbhai Patel | f97bc88 | 2019-06-03 11:57:48 +0530 | [diff] [blame] | 275 | /* Driver test function id enums */ |
Gowtham Siddarth | 4722308 | 2019-01-17 09:59:50 +0530 | [diff] [blame] | 276 | typedef enum { |
| 277 | TEST_PSA_EOI_WITH_NON_INTR_SIGNAL = 1, |
| 278 | TEST_PSA_EOI_WITH_MULTIPLE_SIGNALS = 2, |
| 279 | TEST_PSA_EOI_WITH_UNASSERTED_SIGNAL = 3, |
| 280 | TEST_INTR_SERVICE = 4, |
Jaykumar Pitambarbhai Patel | f97bc88 | 2019-06-03 11:57:48 +0530 | [diff] [blame] | 281 | TEST_ISOLATION_PSA_ROT_DATA_RD = 5, |
| 282 | TEST_ISOLATION_PSA_ROT_DATA_WR = 6, |
| 283 | TEST_ISOLATION_PSA_ROT_STACK_RD = 7, |
| 284 | TEST_ISOLATION_PSA_ROT_STACK_WR = 8, |
| 285 | TEST_ISOLATION_PSA_ROT_HEAP_RD = 9, |
| 286 | TEST_ISOLATION_PSA_ROT_HEAP_WR = 10, |
| 287 | TEST_ISOLATION_PSA_ROT_MMIO_RD = 11, |
| 288 | TEST_ISOLATION_PSA_ROT_MMIO_WR = 12, |
| 289 | } driver_test_fn_id_t; |
Gowtham Siddarth | 4722308 | 2019-01-17 09:59:50 +0530 | [diff] [blame] | 290 | |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 291 | /* typedef's */ |
| 292 | typedef struct { |
| 293 | boot_state_t state; |
| 294 | } boot_t; |
| 295 | |
| 296 | typedef struct { |
| 297 | uint32_t pass_cnt:8; |
| 298 | uint32_t skip_cnt:8; |
| 299 | uint32_t fail_cnt:8; |
| 300 | uint32_t sim_error_cnt:8; |
| 301 | } test_count_t; |
| 302 | |
| 303 | typedef struct { |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 304 | uint16_t test_num; |
| 305 | uint8_t block_num; |
| 306 | } test_info_t; |
| 307 | |
| 308 | |
| 309 | /* struture to capture test state */ |
| 310 | typedef struct { |
| 311 | uint16_t reserved; |
| 312 | uint8_t state; |
| 313 | uint8_t status; |
| 314 | } test_status_buffer_t; |
| 315 | |
Gowtham Siddarth | b1cd50f | 2019-08-21 11:50:26 +0530 | [diff] [blame] | 316 | typedef int32_t (*client_test_t)(caller_security_t caller); |
jaypit02 | ea3cd06 | 2018-10-05 12:22:38 +0530 | [diff] [blame] | 317 | typedef int32_t (*server_test_t)(void); |
| 318 | #endif /* VAL_COMMON_H */ |