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Roman Okhrimenko13f79ed2021-03-11 19:05:41 +02001### External Memory Support For Secondary Slot
Bohdan Kovalchuk0324f1b2020-05-26 08:04:24 -05002
Roman Okhrimenko13f79ed2021-03-11 19:05:41 +02003#### Description
Bohdan Kovalchuk0324f1b2020-05-26 08:04:24 -05004
Roman Okhrimenko13f79ed2021-03-11 19:05:41 +02005Given document describes the use of external memory module as a secondary (upgrade) slot with Cypress' PSoC 6 devices.
Bohdan Kovalchuk0324f1b2020-05-26 08:04:24 -05006
Roman Okhrimenko13f79ed2021-03-11 19:05:41 +02007The demonstration device is `CY8CPROTO-062-4343W` board which is PSoC 6 device with 2M of Flash available, but other kits with 1M (CY8CKIT-062-WIFI-BT) or 512K (CY8CPROTO-062S3-4343W) chips can be used as well.
8The memory module present on boards is S25FL512SAGMFI010 512-Mbit external Quad SPI NOR Flash.
Bohdan Kovalchuk0324f1b2020-05-26 08:04:24 -05009
10Using external memory for secondary slot allows to nearly double the size of Boot Image.
11
Roman Okhrimenko13f79ed2021-03-11 19:05:41 +020012#### Operation Design and Flow
Bohdan Kovalchuk0324f1b2020-05-26 08:04:24 -050013
14The design is based on using SFDP command's auto-discovery functionality of memory module IC and Cypress' SMIF PDL driver.
15
16It is assumed that user's design meets following:
17* The memory-module used is SFDP-compliant;
18* There only one module is being used for secondary slot;
Bohdan Kovalchuk0324f1b2020-05-26 08:04:24 -050019* The address for secondary slot should start from 0x18000000.
Roman Okhrimenko13f79ed2021-03-11 19:05:41 +020020This corresponds to PSoC 6's SMIF (Serial Memory InterFace) IP block mapping.
21* The slot size and start address for upgrade slot meets requirements, when using swap upgrade.
Bohdan Kovalchuk0324f1b2020-05-26 08:04:24 -050022
Roman Okhrimenko13f79ed2021-03-11 19:05:41 +020023The default flash map can be foung in MCUBootApp.md.
Bohdan Kovalchuk0324f1b2020-05-26 08:04:24 -050024
25MCUBootApp's `main.c` contains the call to Init-SFDP API which performs required GPIO configurations, SMIF IP block configurations, SFDP protocol read and memory-config structure initialization.
26
27After that MCUBootApp is ready to accept upgrade image from external memory module.
28
Roman Okhrimenko13f79ed2021-03-11 19:05:41 +020029Upgrades from external memory are supported for both `overwrite only` and `swap with status partition` modes of MCUBootApp.
Bohdan Kovalchuk0324f1b2020-05-26 08:04:24 -050030
Roman Okhrimenko13f79ed2021-03-11 19:05:41 +020031##### Requirements to size and start address of upgrade slot when using swap mode.
32
33Due to mcuboot image structure some restrictions applies when using upgrades from external flash. The main requirement is the following:
34
35**Trailer portion of UPGRADE image should be possible to erase separately.**
36
37To achive this requirement image trailer should be placed separately on full flash page, which equls 0x40200 in case of S25FL512SAGMFI010. Considering default slot size for external memory case described in MCUBootApp.md, occupied external flash would look as follows:
38
39 0x18000000 [xxxxxxxxxxxxxxxx][ttfffffffffffff][fffffffffffffff]
40
41Here:
42`0x18000000` - start address of external memory
43`[xxxxxxxxxxxxxxxx]` - first flash page of minimum erase size 0x40000 occupied by firmware.
44`[tt]` - trailer portion (last 0x200 of image) of upgrade slot placed on separate flash page.
45`[fffff]` - remained portion of flash page, used to store image trailer - this area should not be used for anything else.
46
47When using slots sizes other, then default `0x40200` described above shoulb be considered.
48
49When slot size does not aligned to `0x40000`, start address of UPGRADE image in external flash should be calculated starting from image trailer location. Consider example below.
50
51Primary slot size required is 590336 bytes (576k + 512b).
52
534 flash pages are required to fit secondary slot (P1-P4):
54
55 0x1800 0000 - 0x1804 0000 - P1
56 0x1804 0000 - 0x1808 0000 - P2
57 0x1808 0000 - 0x180C 0000 - P3
58 0x1808 0000 - 0x180C 0000 - P4
59
60Primary slot consist of 512 bytes of image trailer, it goes to P4, 2 full sectors of 256k goes in P3 and P2, reminded 64k is resided in P1.
61
62Thus start address of secondary slot is: 0x1804 0000 - 0x10000 (64k) = 0x1803 0000. Size occupied is 4 * 256k = 786k
63
64##### How to enable external memory support:
Bohdan Kovalchuk0324f1b2020-05-26 08:04:24 -050065
Roman Okhrimenko579b30c2021-03-24 13:35:59 +0200661. Pass `USE_EXTERNAL_FLASH=1` flag to `make` command when building MCUBootApp.
Bohdan Kovalchuk0324f1b2020-05-26 08:04:24 -0500672. Navigate to `cy_flash_map.c` and check if secondary slot start address and size meet the application's needs.
683. Define which slave select is used for external memory on a board by setting `smif_id` value in `main.c`.
694. Build MCUBootApp as described in `Readme.md`.
70
Bohdan Kovalchuka333a452020-07-09 16:55:58 +030071**Note 3**: External memory code is developed basing on PDL and can be run on CM0p core only. It may require modifications if used on CM4.
72
Bohdan Kovalchuk0324f1b2020-05-26 08:04:24 -050073**How to build upgrade image for external memory:**
74
75 make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE HEADER_OFFSET=0x7FE8000 ERASED_VALUE=0xff
76
77`HEADER_OFFSET` defines the offset from original boot image address. This one in line above suggests secondary slot will start from `0x18000000`.
78
Roman Okhrimenko13f79ed2021-03-11 19:05:41 +020079`ERASED_VALUE` defines the memory cell contents in erased state. It is `0x00` for PSoC 6's internal Flash and `0xff` for S25FL512S.
Bohdan Kovalchuk0324f1b2020-05-26 08:04:24 -050080
81**Programming to external memory**
82
83The MCUBootApp programming can be done similarly to described in `Readme.md`:
84
85 export OPENOCD=/Applications/ModusToolbox/tools_2.1/openocd
86
87 ${OPENOCD}/bin/openocd -s ${OPENOCD}/scripts \
88 -f ${OPENOCD}/scripts/interface/kitprog3.cfg \
89 -f ${OPENOCD}/scripts/target/psoc6_2m.cfg \
90 -c "init; psoc6 sflash_restrictions 1" \
91 -c "init; reset init; program PATH_TO_APPLICATION.hex" \
92 -c "resume; reset; exit"
93
94There is a NULL-pointer placed for SMIF configuration pointer in TOC2 (Table Of Contents, `cy_serial_flash_prog.c`).
95This is done to force CY8PROTO-062-4343W DAP Link firmware to program external memory with hardcoded values.
96
971. Press SW3 Mode button on a board to switch the board into DAP Link mode.
982. Once DAP Link removable disk appeared drop (copy) the upgrade image HEX file to it.
99This will invoke firmware to program external memory.
100
101**Note 3:** the programming of external memory is limited to S25FL512S p/n only at this moment.