espressif: esp32c6 esp32h2: fix custom uart and secure boot build

Fix missing header on console_uart_custom.c
Update secure_boot.c includes removing soc ifdefs

Signed-off-by: Almir Okato <almir.okato@espressif.com>
diff --git a/boot/espressif/hal/include/esp32c6/esp32c6.cmake b/boot/espressif/hal/include/esp32c6/esp32c6.cmake
index 9160eab..23b6b00 100644
--- a/boot/espressif/hal/include/esp32c6/esp32c6.cmake
+++ b/boot/espressif/hal/include/esp32c6/esp32c6.cmake
@@ -8,6 +8,7 @@
 
 list(APPEND hal_srcs
     ${esp_hal_dir}/components/hal/cache_hal.c
+    ${esp_hal_dir}/components/hal/${MCUBOOT_TARGET}/lp_timer_hal.c
     ${esp_hal_dir}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c
     ${esp_hal_dir}/components/esp_rom/patches/esp_rom_regi2c_${MCUBOOT_TARGET}.c
 )
diff --git a/boot/espressif/hal/src/esp32c6/console_uart_custom.c b/boot/espressif/hal/src/esp32c6/console_uart_custom.c
index 214c60f..da5c1ab 100644
--- a/boot/espressif/hal/src/esp32c6/console_uart_custom.c
+++ b/boot/espressif/hal/src/esp32c6/console_uart_custom.c
@@ -7,6 +7,7 @@
 #include <esp_rom_uart.h>
 #include <hal/uart_ll.h>
 #include <soc/uart_periph.h>
+#include <esp_attr.h>
 
 #if CONFIG_ESP_CONSOLE_UART_CUSTOM
 static uart_dev_t *alt_console_uart_dev = (CONFIG_ESP_CONSOLE_UART_NUM == 0) ?
diff --git a/boot/espressif/hal/src/esp32h2/console_uart_custom.c b/boot/espressif/hal/src/esp32h2/console_uart_custom.c
index e006709..ee80d6b 100644
--- a/boot/espressif/hal/src/esp32h2/console_uart_custom.c
+++ b/boot/espressif/hal/src/esp32h2/console_uart_custom.c
@@ -7,6 +7,7 @@
 #include <esp_rom_uart.h>
 #include <hal/uart_ll.h>
 #include <soc/uart_periph.h>
+#include <esp_attr.h>
 
 #if CONFIG_ESP_CONSOLE_UART_CUSTOM
 static uart_dev_t *alt_console_uart_dev = (CONFIG_ESP_CONSOLE_UART_NUM == 0) ?
diff --git a/boot/espressif/hal/src/secure_boot.c b/boot/espressif/hal/src/secure_boot.c
index 5c6a475..f724f0e 100644
--- a/boot/espressif/hal/src/secure_boot.c
+++ b/boot/espressif/hal/src/secure_boot.c
@@ -14,22 +14,7 @@
 #include "esp_image_format.h"
 #include "esp_efuse.h"
 #include "esp_efuse_table.h"
-
-#if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/secure_boot.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/secure_boot.h"
-#elif CONFIG_IDF_TARGET_ESP32C3
-#include "esp32c3/rom/secure_boot.h"
-#elif CONFIG_IDF_TARGET_ESP32S3
-#include "esp32s3/rom/secure_boot.h"
-#elif CONFIG_IDF_TARGET_ESP32H4
-#include "esp32h4/rom/secure_boot.h"
-#elif CONFIG_IDF_TARGET_ESP32C2
-#include "esp32c2/rom/secure_boot.h"
-#elif CONFIG_IDF_TARGET_ESP32C6
-#include "esp32c6/rom/secure_boot.h"
-#endif
+#include "rom/secure_boot.h"
 
 /* The following API implementations are used only when called
  * from the bootloader code.
diff --git a/boot/espressif/port/esp32c6/serial_adapter.c b/boot/espressif/port/esp32c6/serial_adapter.c
index 09643a1..5e6bb59 100644
--- a/boot/espressif/port/esp32c6/serial_adapter.c
+++ b/boot/espressif/port/esp32c6/serial_adapter.c
@@ -24,7 +24,7 @@
 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT
 #define SERIAL_BOOT_GPIO_DETECT     CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT
 #else
-#define SERIAL_BOOT_GPIO_DETECT     GPIO_NUM_5
+#define SERIAL_BOOT_GPIO_DETECT     GPIO_NUM_3
 #endif
 
 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL
@@ -57,13 +57,13 @@
 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_RX
 #define SERIAL_BOOT_GPIO_RX     CONFIG_ESP_SERIAL_BOOT_GPIO_RX
 #else
-#define SERIAL_BOOT_GPIO_RX     GPIO_NUM_8
+#define SERIAL_BOOT_GPIO_RX     GPIO_NUM_10
 #endif
 
 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_TX
 #define SERIAL_BOOT_GPIO_TX     CONFIG_ESP_SERIAL_BOOT_GPIO_TX
 #else
-#define SERIAL_BOOT_GPIO_TX     GPIO_NUM_9
+#define SERIAL_BOOT_GPIO_TX     GPIO_NUM_11
 #endif
 
 static uart_dev_t *serial_boot_uart_dev = (SERIAL_BOOT_UART_NUM == 0) ?
@@ -167,9 +167,9 @@
                                     0, 0);
     gpio_ll_output_enable(&GPIO, SERIAL_BOOT_GPIO_TX);
 
-    uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_APB);
+    uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_DEFAULT);
     uart_ll_set_mode_normal(serial_boot_uart_dev);
-    uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_APB);
+    uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_DEFAULT);
     uart_ll_set_stop_bits(serial_boot_uart_dev, 1u);
     uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE);
     uart_ll_set_rx_tout(serial_boot_uart_dev, 16);
diff --git a/boot/espressif/port/esp32h2/serial_adapter.c b/boot/espressif/port/esp32h2/serial_adapter.c
index 09643a1..acd76b0 100644
--- a/boot/espressif/port/esp32h2/serial_adapter.c
+++ b/boot/espressif/port/esp32h2/serial_adapter.c
@@ -24,7 +24,7 @@
 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT
 #define SERIAL_BOOT_GPIO_DETECT     CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT
 #else
-#define SERIAL_BOOT_GPIO_DETECT     GPIO_NUM_5
+#define SERIAL_BOOT_GPIO_DETECT     GPIO_NUM_12
 #endif
 
 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL
@@ -57,13 +57,13 @@
 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_RX
 #define SERIAL_BOOT_GPIO_RX     CONFIG_ESP_SERIAL_BOOT_GPIO_RX
 #else
-#define SERIAL_BOOT_GPIO_RX     GPIO_NUM_8
+#define SERIAL_BOOT_GPIO_RX     GPIO_NUM_10
 #endif
 
 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_TX
 #define SERIAL_BOOT_GPIO_TX     CONFIG_ESP_SERIAL_BOOT_GPIO_TX
 #else
-#define SERIAL_BOOT_GPIO_TX     GPIO_NUM_9
+#define SERIAL_BOOT_GPIO_TX     GPIO_NUM_11
 #endif
 
 static uart_dev_t *serial_boot_uart_dev = (SERIAL_BOOT_UART_NUM == 0) ?
@@ -167,9 +167,9 @@
                                     0, 0);
     gpio_ll_output_enable(&GPIO, SERIAL_BOOT_GPIO_TX);
 
-    uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_APB);
+    uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_DEFAULT);
     uart_ll_set_mode_normal(serial_boot_uart_dev);
-    uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_APB);
+    uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_DEFAULT);
     uart_ll_set_stop_bits(serial_boot_uart_dev, 1u);
     uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE);
     uart_ll_set_rx_tout(serial_boot_uart_dev, 16);