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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / ff9fa5b0c420d7a53dd3e484d4a9301adb47f050 / . / ARM.CMSIS.pdsc
blob: 7cdf8ac7bbf111b241d66de970453643313cc10a [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
Joachim Krecha33860c2016-11-09 22:25:55 +0100[diff] [blame]7 <!-- <license>license.txt</license> -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]11 <release version="5.0.2-dev3">
12 CMSIS-Core_A:
13 - Added ARM Compiler 6 support
14 - Updated Cortex-A core functions
15 - Updated Startup and System files
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame^]16 CMSIS-RTOS2:
17 - RTX5: added support for Cortex-A
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]18 </release>
Robert Rostoharbb902b42017-04-03 14:06:24 +0200[diff] [blame]19 <release version="5.0.2-dev2">
20 CMSIS-RTOS2:
21 - RTX 5.1.1 (see revision history for details)
22 </release>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]23 <release version="5.0.2-dev1">
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]24 CMSIS-Core_A:
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]25 - Added Cortex-A core support, ARMCC specific:
26 - Core specific register definitions
27 - Generic Interrupt Controller functions
28 - Generic Timer functions
29 - L1 and L2 Cache functions
30 - MMU functions
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]31 - Added ARMCA5, ARMCA7 and ARMCA9 devices
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]32 - Added Startup, System and MMU configuration files
33 </release>
Martin Güntherc5e87e52017-02-13 16:03:07 +0100[diff] [blame]34 <release version="5.0.2-dev0">
35 CMSIS-Core: 5.0.2 (see revision history for details)
36 - Added macros __UNALIGNED_UINT16_READ, __UNALIGNED_UINT16_WRITE
37 - Added macros __UNALIGNED_UINT32_READ, __UNALIGNED_UINT32_WRITE
38 - Set macro __UNALIGNED_UINT32 to deprecated
39 </release>
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]40 <release version="5.0.1" date="2017-02-03">
41 Package Description:
42 - added taxonomy for Cclass RTOS
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]43 CMSIS-RTOS2:
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]44 - API 2.1 (see revision history for details)
45 - RTX 5.1.0 (see revision history for details)
46 CMSIS-Core: 5.0.1 (see revision history for details)
47 - Added __PACKED_STRUCT macro
48 - Added uVisior support
49 - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
50 - Updated template for secure main function (main_s.c)
51 - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
52 CMSIS-DSP: 1.5.1 (see revision history for details)
53 - added ARMv8M DSP libraries.
54 CMSIS-PACK:1.4.9 (see revision history for details)
55 - added Pack Index File specification and schema file
Martin Güntherd1060532016-11-15 09:43:43 +0100[diff] [blame]56 </release>
Joachim Krechc45bb4a2016-11-11 11:01:22 +0100[diff] [blame]57 <release version="5.0.0" date="2016-11-11">
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]58 Changed open source license to Apache 2.0
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]59 CMSIS_Core:
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]60 - Added support for Cortex-M23 and Cortex-M33.
61 - Added ARMv8-M device configurations for mainline and baseline.
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]62 - Added CMSE support and thread context management for TrustZone for ARMv8-M
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]63 - Added cmsis_compiler.h to unify compiler behaviour.
64 - Updated function SCB_EnableICache (for Cortex-M7).
65 - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
66 CMSIS-RTOS:
67 - bug fix in RTX 4.82 (see revision history for details)
68 CMSIS-RTOS2:
69 - new API including compatibility layer to CMSIS-RTOS
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]70 - reference implementation based on RTX5
71 - supports all Cortex-M variants including TrustZone for ARMv8-M
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]72 CMSIS-SVD:
73 - reworked SVD format documentation
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]74 - removed SVD file database documentation as SVD files are distributed in packs
75 - updated SVDConv for Win32 and Linux
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]76 CMSIS-DSP:
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]77 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
78 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]79 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]80 <release version="4.5.0" date="2015-10-28">
81 - CMSIS-Core 4.30.0 (see revision history for details)
82 - CMSIS-DAP 1.1.0 (unchanged)
83 - CMSIS-Driver 2.04.0 (see revision history for details)
84 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
85 - CMSIS-PACK 1.4.1 (see revision history for details)
86 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
87 - CMSIS-SVD 1.3.1 (see revision history for details)
88 </release>
89 <release version="4.4.0" date="2015-09-11">
90 - CMSIS-Core 4.20 (see revision history for details)
91 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
92 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
93 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
94 - CMSIS-RTOS
95 -- API 1.02 (unchanged)
96 -- RTX 4.79 (see revision history for details)
97 - CMSIS-SVD 1.3.0 (see revision history for details)
98 - CMSIS-DAP 1.1.0 (extended with SWO support)
99 </release>
100 <release version="4.3.0" date="2015-03-20">
101 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
102 - CMSIS-DSP 1.4.5 (see revision history for details)
103 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
104 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
105 - CMSIS-RTOS
106 -- API 1.02 (unchanged)
107 -- RTX 4.78 (see revision history for details)
108 - CMSIS-SVD 1.2 (unchanged)
109 </release>
110 <release version="4.2.0" date="2014-09-24">
111 Adding Cortex-M7 support
112 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
113 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
114 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
115 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
116 - CMSIS-RTOS RTX 4.75 (see revision history for details)
117 </release>
118 <release version="4.1.1" date="2014-06-30">
119 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
120 </release>
121 <release version="4.1.0" date="2014-06-12">
122 - CMSIS-Driver 2.02 (incompatible update)
123 - CMSIS-Pack 1.3 (see revision history for details)
124 - CMSIS-DSP 1.4.2 (unchanged)
125 - CMSIS-Core 3.30 (unchanged)
126 - CMSIS-RTOS RTX 4.74 (unchanged)
127 - CMSIS-RTOS API 1.02 (unchanged)
128 - CMSIS-SVD 1.10 (unchanged)
129 PACK:
130 - removed G++ specific files from PACK
131 - added Component Startup variant "C Startup"
132 - added Pack Checking Utility
133 - updated conditions to reflect tool-chain dependency
134 - added Taxonomy for Graphics
135 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
136 </release>
137 <release version="4.0.0">
138 - CMSIS-Driver 2.00 Preliminary (incompatible update)
139 - CMSIS-Pack 1.1 Preliminary
140 - CMSIS-DSP 1.4.2 (see revision history for details)
141 - CMSIS-Core 3.30 (see revision history for details)
142 - CMSIS-RTOS RTX 4.74 (see revision history for details)
143 - CMSIS-RTOS API 1.02 (unchanged)
144 - CMSIS-SVD 1.10 (unchanged)
145 </release>
146 <release version="3.20.4">
147 - CMSIS-RTOS 4.74 (see revision history for details)
148 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
149 </release>
150 <release version="3.20.3">
151 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
152 - CMSIS-RTOS 4.73 (see revision history for details)
153 </release>
154 <release version="3.20.2">
155 - CMSIS-Pack documentation has been added
156 - CMSIS-Drivers header and documentation have been added to PACK
157 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
158 </release>
159 <release version="3.20.1">
160 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
161 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
162 </release>
163 <release version="3.20.0">
164 The software portions that are deployed in the application program are now under a BSD license which allows usage
165 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
166 The individual components have been update as listed below:
167 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
168 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
169 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
170 - CMSIS-SVD is unchanged.
171 </release>
172 </releases>
173
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]174 <taxonomy>
175 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
176 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
177 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
178 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
179 <description Cclass="File System">File Drive Support and File System</description>
180 <description Cclass="Graphics">Graphical User Interface</description>
181 <description Cclass="Network">Network Stack using Internet Protocols</description>
182 <description Cclass="USB">Universal Serial Bus Stack</description>
Joachim Krech2384b8a2017-02-02 15:58:30 +0100[diff] [blame]183 <description Cclass="Compiler">Compiler Software Extensions</description>
Joachim Krech62838c82017-02-02 15:54:57 +0100[diff] [blame]184 <description Cclass="RTOS">Real-time Operating System</description>
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]185 </taxonomy>
186
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]187 <devices>
188 <!-- ****************************** Cortex-M0 ****************************** -->
189 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]190 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]191 <description>
192The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
193- simple, easy-to-use programmers model
194- highly efficient ultra-low power operation
195- excellent code density
196- deterministic, high-performance interrupt handling
197- upward compatibility with the rest of the Cortex-M processor family.
198 </description>
199 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
200 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
201 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
202 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
203
204 <device Dname="ARMCM0">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]205 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]206 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
207 </device>
208 </family>
209
210 <!-- ****************************** Cortex-M0P ****************************** -->
211 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]212 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]213 <description>
214The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
215- simple, easy-to-use programmers model
216- highly efficient ultra-low power operation
217- excellent code density
218- deterministic, high-performance interrupt handling
219- upward compatibility with the rest of the Cortex-M processor family.
220 </description>
221 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
222 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
223 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
224 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
225
226 <device Dname="ARMCM0P">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]227 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]228 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
229 </device>
230 </family>
231
232 <!-- ****************************** Cortex-M3 ****************************** -->
233 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]234 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]235 <description>
236The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
237- simple, easy-to-use programmers model
238- highly efficient ultra-low power operation
239- excellent code density
240- deterministic, high-performance interrupt handling
241- upward compatibility with the rest of the Cortex-M processor family.
242 </description>
243 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
244 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
245 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
246 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
247
248 <device Dname="ARMCM3">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]249 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]250 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
251 </device>
252 </family>
253
254 <!-- ****************************** Cortex-M4 ****************************** -->
255 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]256 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]257 <description>
258The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
259- simple, easy-to-use programmers model
260- highly efficient ultra-low power operation
261- excellent code density
262- deterministic, high-performance interrupt handling
263- upward compatibility with the rest of the Cortex-M processor family.
264 </description>
265 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
266 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
267 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
268 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
269
270 <device Dname="ARMCM4">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]271 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]272 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
273 </device>
274
275 <device Dname="ARMCM4_FP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]276 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]277 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
278 </device>
279 </family>
280
281 <!-- ****************************** Cortex-M7 ****************************** -->
282 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]283 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]284 <description>
Martin Güntheraa246272016-11-15 16:01:05 +0100[diff] [blame]285The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]286- simple, easy-to-use programmers model
287- highly efficient ultra-low power operation
288- excellent code density
289- deterministic, high-performance interrupt handling
290- upward compatibility with the rest of the Cortex-M processor family.
291 </description>
292 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
293 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
294 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
295 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
296
297 <device Dname="ARMCM7">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]298 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]299 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
300 </device>
301
302 <device Dname="ARMCM7_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]303 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]304 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
305 </device>
306
307 <device Dname="ARMCM7_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]308 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]309 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
310 </device>
311 </family>
312
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]313 <!-- ****************************** Cortex-M23 ********************** -->
314 <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
315 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
316 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]317The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]318It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]319Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]320 </description>
321 <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]322 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
323 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]324 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]325 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]326 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
327
328 <device Dname="ARMCM23">
329 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
330 <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
331 </device>
332
333 <device Dname="ARMCM23_TZ">
334 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
335 <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
336 </device>
337 </family>
338
339 <!-- ****************************** Cortex-M33 ****************************** -->
340 <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
341 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
342 <description>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]343The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]344class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]345 </description>
346 <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]347 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
348 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]349 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]350 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
351 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]352
353 <device Dname="ARMCM33">
354 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]355 <description>
356 no DSP Instructions, no Floating Point Unit, no TrustZone
357 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]358 <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
359 </device>
360
361 <device Dname="ARMCM33_TZ">
362 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]363 <description>
364 no DSP Instructions, no Floating Point Unit, TrustZone
365 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]366 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
367 </device>
368
369 <device Dname="ARMCM33_DSP_FP">
370 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]371 <description>
372 DSP Instructions, Single Precision Floating Point Unit, no TrustZone
373 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]374 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
375 </device>
376
377 <device Dname="ARMCM33_DSP_FP_TZ">
378 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]379 <description>
380 DSP Instructions, Single Precision Floating Point Unit, TrustZone
381 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]382 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
383 </device>
384 </family>
385
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]386 <!-- ****************************** ARMSC000 ****************************** -->
387 <family Dfamily="ARM SC000" Dvendor="ARM:82">
388 <description>
389The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
390- simple, easy-to-use programmers model
391- highly efficient ultra-low power operation
392- excellent code density
393- deterministic, high-performance interrupt handling
394 </description>
395 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
396 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
397 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
398 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
399
400 <device Dname="ARMSC000">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]401 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]402 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
403 </device>
404 </family>
405
406 <!-- ****************************** ARMSC300 ****************************** -->
407 <family Dfamily="ARM SC300" Dvendor="ARM:82">
408 <description>
409The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
410- simple, easy-to-use programmers model
411- highly efficient ultra-low power operation
412- excellent code density
413- deterministic, high-performance interrupt handling
414 </description>
415 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
416 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
417 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
418 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
419
420 <device Dname="ARMSC300">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]421 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]422 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
423 </device>
424 </family>
425
426 <!-- ****************************** ARMv8-M Baseline ********************** -->
427 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
428 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
429 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]430ARMv8-M Baseline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]431 </description>
432 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]433 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
434 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]435 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]436 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]437 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
438
439 <device Dname="ARMv8MBL">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]440 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]441 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
442 </device>
443 </family>
444
445 <!-- ****************************** ARMv8-M Mainline ****************************** -->
446 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
447 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
448 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]449ARMv8-M Mainline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]450 </description>
451 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]452 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
453 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]454 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]455 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]456 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
457
458 <device Dname="ARMv8MML">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]459 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]460 <description>
461 no DSP Instructions, no Floating Point Unit, TrustZone
462 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]463 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
464 </device>
465
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]466 <device Dname="ARMv8MML_DSP">
467 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]468 <description>
469 DSP Instructions, no Floating Point Unit, TrustZone
470 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]471 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]472 </device>
473
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]474 <device Dname="ARMv8MML_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]475 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]476 <description>
477 no DSP Instructions, Single Precision Floating Point Unit, TrustZone
478 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]479 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
480 </device>
481
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]482 <device Dname="ARMv8MML_DSP_SP">
483 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]484 <description>
485 DSP Instructions, Single Precision Floating Point Unit, TrustZone
486 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]487 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]488 </device>
489
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]490 <device Dname="ARMv8MML_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]491 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]492 <description>
493 no DSP Instructions, Double Precision Floating Point Unit, TrustZone
494 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]495 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
496 </device>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]497
498 <device Dname="ARMv8MML_DSP_DP">
499 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]500 <description>
501 DSP Instructions, Double Precision Floating Point Unit, TrustZone
502 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]503 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]504 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]505 </family>
506
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]507 <!-- ****************************** Cortex-A5 ****************************** -->
508 <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
509 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
510 <description>
511The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
512virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
513ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
514 </description>
515
516 <device Dname="ARMCA5">
517 <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
518 <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
519 </device>
520 </family>
521
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]522 <!-- ****************************** Cortex-A7 ****************************** -->
523 <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
524 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
525 <description>
526The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
527The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
528an optional integrated GIC, and an optional L2 cache controller.
529 </description>
530
531 <device Dname="ARMCA7">
532 <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
533 <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
534 </device>
535 </family>
536
537 <!-- ****************************** Cortex-A9 ****************************** -->
538 <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]539 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]540 <description>
541The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
542The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
543and 8-bit Java bytecodes in Jazelle state.
544 </description>
545
546 <device Dname="ARMCA9">
547 <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
548 <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
549 </device>
550 </family>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]551 </devices>
552
553
554 <apis>
555 <!-- CMSIS-RTOS API -->
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]556 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]557 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
558 <files>
559 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
560 </files>
561 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]562 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.0" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]563 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
564 <files>
565 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
Robert Rostohar0a364052017-01-25 12:35:54 +0100[diff] [blame]566 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]567 </files>
568 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]569 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]570 <description>USART Driver API for Cortex-M</description>
571 <files>
572 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
573 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
574 </files>
575 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]576 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]577 <description>SPI Driver API for Cortex-M</description>
578 <files>
579 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
580 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
581 </files>
582 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]583 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]584 <description>SAI Driver API for Cortex-M</description>
585 <files>
586 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
587 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
588 </files>
589 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]590 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]591 <description>I2C Driver API for Cortex-M</description>
592 <files>
593 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
594 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
595 </files>
596 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]597 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]598 <description>CAN Driver API for Cortex-M</description>
599 <files>
600 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
601 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
602 </files>
603 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]604 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]605 <description>Flash Driver API for Cortex-M</description>
606 <files>
607 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
608 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
609 </files>
610 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]611 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]612 <description>MCI Driver API for Cortex-M</description>
613 <files>
614 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
615 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
616 </files>
617 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]618 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]619 <description>NAND Flash Driver API for Cortex-M</description>
620 <files>
621 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
622 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
623 </files>
624 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]625 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]626 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
627 <files>
628 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
629 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
630 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
631 </files>
632 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]633 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]634 <description>Ethernet MAC Driver API for Cortex-M</description>
635 <files>
636 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
637 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
638 </files>
639 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]640 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]641 <description>Ethernet PHY Driver API for Cortex-M</description>
642 <files>
643 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
644 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
645 </files>
646 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]647 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]648 <description>USB Device Driver API for Cortex-M</description>
649 <files>
650 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
651 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
652 </files>
653 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]654 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]655 <description>USB Host Driver API for Cortex-M</description>
656 <files>
657 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
658 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
659 </files>
660 </api>
661 </apis>
662
663 <!-- conditions are dependency rules that can apply to a component or an individual file -->
664 <conditions>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]665 <!-- compiler -->
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]666 <condition id="ARMCC6">
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame^]667 <accept Tcompiler="ARMCC" Toptions="AC6"/>
668 <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]669 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]670 <condition id="ARMCC">
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]671 <require Tcompiler="ARMCC" Toptions="AC5"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]672 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]673 <condition id="GCC">
674 <require Tcompiler="GCC"/>
675 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]676 <condition id="IAR">
677 <require Tcompiler="IAR"/>
678 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]679 <condition id="ARMCC GCC">
680 <accept Tcompiler="ARMCC"/>
681 <accept Tcompiler="GCC"/>
682 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]683 <condition id="ARMCC GCC IAR">
684 <accept Tcompiler="ARMCC"/>
685 <accept Tcompiler="GCC"/>
686 <accept Tcompiler="IAR"/>
687 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]688
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]689 <!-- ARM architecture -->
690 <condition id="ARMv6-M Device">
691 <description>ARMv6-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]692 <accept Dcore="Cortex-M0"/>
693 <accept Dcore="Cortex-M0+"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]694 <accept Dcore="SC000"/>
695 </condition>
696 <condition id="ARMv7-M Device">
697 <description>ARMv7-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]698 <accept Dcore="Cortex-M3"/>
699 <accept Dcore="Cortex-M4"/>
700 <accept Dcore="Cortex-M7"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]701 <accept Dcore="SC300"/>
702 </condition>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]703 <condition id="ARMv8-M Device">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]704 <description>ARMv8-M architecture based device</description>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]705 <accept Dcore="ARMV8MBL"/>
706 <accept Dcore="ARMV8MML"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]707 <accept Dcore="Cortex-M23"/>
708 <accept Dcore="Cortex-M33"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]709 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]710 <condition id="ARMv8-M TZ Device">
711 <description>ARMv8-M architecture based device with TrustZone</description>
712 <require condition="ARMv8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]713 <require Dtz="TZ"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]714 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]715 <condition id="ARMv6_7-M Device">
716 <description>ARMv6_7-M architecture based device</description>
717 <accept condition="ARMv6-M Device"/>
718 <accept condition="ARMv7-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]719 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]720 <condition id="ARMv6_7_8-M Device">
721 <description>ARMv6_7_8-M architecture based device</description>
722 <accept condition="ARMv6-M Device"/>
723 <accept condition="ARMv7-M Device"/>
724 <accept condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]725 </condition>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]726 <condition id="ARMv7-A Device">
727 <description>ARMv7-A architecture based device</description>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]728 <accept Dcore="Cortex-A5"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]729 <accept Dcore="Cortex-A7"/>
730 <accept Dcore="Cortex-A9"/>
731 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]732
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]733 <!-- ARM core -->
734 <condition id="CM0">
735 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
736 <accept Dcore="Cortex-M0"/>
737 <accept Dcore="Cortex-M0+"/>
738 <accept Dcore="SC000"/>
739 </condition>
740 <condition id="CM3">
741 <description>Cortex-M3 or SC300 processor based device</description>
742 <accept Dcore="Cortex-M3"/>
743 <accept Dcore="SC300"/>
744 </condition>
745 <condition id="CM4">
746 <description>Cortex-M4 processor based device</description>
747 <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
748 </condition>
749 <condition id="CM4_FP">
750 <description>Cortex-M4 processor based device using Floating Point Unit</description>
751 <require Dcore="Cortex-M4" Dfpu="FPU"/>
752 </condition>
753 <condition id="CM7">
754 <description>Cortex-M7 processor based device</description>
755 <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
756 </condition>
757 <condition id="CM7_FP">
758 <description>Cortex-M7 processor based device using Floating Point Unit</description>
759 <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
760 <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
761 </condition>
762 <condition id="CM7_SP">
763 <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
764 <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
765 </condition>
766 <condition id="CM7_DP">
767 <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
768 <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
769 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]770 <condition id="CM23">
771 <description>Cortex-M23 processor based device</description>
772 <require Dcore="Cortex-M23"/>
773 </condition>
774 <condition id="CM33">
775 <description>Cortex-M33 processor based device</description>
776 <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
777 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]778 <condition id="CM33_FP">
779 <description>Cortex-M33 processor based device using Floating Point Unit</description>
780 <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
781 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]782 <condition id="ARMv8MBL">
783 <description>ARMv8-M Baseline processor based device</description>
784 <require Dcore="ARMV8MBL"/>
785 </condition>
786 <condition id="ARMv8MML">
787 <description>ARMv8-M Mainline processor based device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]788 <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
789 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]790 <condition id="ARMv8MML_FP">
791 <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
792 <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
793 <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]794 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]795
796 <condition id="CM33_NODSP_NOFPU">
797 <description>CM33, no DSP, no FPU</description>
798 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
799 </condition>
800 <condition id="CM33_DSP_NOFPU">
801 <description>CM33, DSP, no FPU</description>
802 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
803 </condition>
804 <condition id="CM33_NODSP_SP">
805 <description>CM33, no DSP, SP FPU</description>
806 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
807 </condition>
808 <condition id="CM33_DSP_SP">
809 <description>CM33, DSP, SP FPU</description>
810 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
811 </condition>
812
813 <condition id="ARMv8MML_NODSP_NOFPU">
814 <description>ARMv8MML, no DSP, no FPU</description>
815 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
816 </condition>
817 <condition id="ARMv8MML_DSP_NOFPU">
818 <description>ARMv8MML, DSP, no FPU</description>
819 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
820 </condition>
821 <condition id="ARMv8MML_NODSP_SP">
822 <description>ARMv8MML, no DSP, SP FPU</description>
823 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]824 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]825 <condition id="ARMv8MML_DSP_SP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]826 <description>ARMv8MML, DSP, SP FPU</description>
827 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]828 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]829
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame^]830 <!-- Cortex-A Devices -->
831 <condition id="RZ_A Device">
832 <description>Renesas RZ_A Device</description>
833 <require Dvendor="Renesas:117"/>
834 <require Dfamily="RZ_A"/>
835 </condition>
836 <condition id="Unknown Cortex-A Device">
837 <description>Unknown Cortex-A Device</description>
838 <require condition="ARMv7-A Device"/>
839 <deny condition="RZ_A Device"/>
840 </condition>
841
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]842 <!-- ARMCC compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame^]843 <condition id="CA_ARMCC">
844 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler</description>
845 <require condition="ARMv7-A Device"/>
846 <require Tcompiler="ARMCC"/>
847 </condition>
848
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]849 <condition id="CM0_ARMCC">
850 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
851 <require condition="CM0"/>
852 <require Tcompiler="ARMCC"/>
853 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]854 <condition id="CM0_LE_ARMCC">
855 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]856 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]857 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]858 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]859 <condition id="CM0_BE_ARMCC">
860 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]861 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]862 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]863 </condition>
864
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]865 <condition id="CM3_ARMCC">
866 <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
867 <require condition="CM3"/>
868 <require Tcompiler="ARMCC"/>
869 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]870 <condition id="CM3_LE_ARMCC">
871 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]872 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]873 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]874 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]875 <condition id="CM3_BE_ARMCC">
876 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]877 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]878 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]879 </condition>
880
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]881 <condition id="CM4_ARMCC">
882 <description>Cortex-M4 processor based device for the ARM Compiler</description>
883 <require condition="CM4"/>
884 <require Tcompiler="ARMCC"/>
885 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]886 <condition id="CM4_LE_ARMCC">
887 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]888 <require condition="CM4_ARMCC"/>
889 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]890 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]891 <condition id="CM4_BE_ARMCC">
892 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]893 <require condition="CM4_ARMCC"/>
894 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]895 </condition>
896
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]897 <condition id="CM4_FP_ARMCC">
898 <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
899 <require condition="CM4_FP"/>
900 <require Tcompiler="ARMCC"/>
901 </condition>
902 <condition id="CM4_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]903 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]904 <require condition="CM4_FP_ARMCC"/>
905 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]906 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]907 <condition id="CM4_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]908 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]909 <require condition="CM4_FP_ARMCC"/>
910 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]911 </condition>
912
913 <!-- XMC 4000 Series devices from Infineon require a special library -->
914 <condition id="CM4_LE_ARMCC_STD">
915 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
916 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
917 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
918 <require Tcompiler="ARMCC"/>
919 </condition>
920 <condition id="CM4_LE_ARMCC_IFX">
921 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
922 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
923 <require Tcompiler="ARMCC"/>
924 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]925 <condition id="CM4_FP_LE_ARMCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]926 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
927 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
928 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
929 <require Tcompiler="ARMCC"/>
930 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]931 <condition id="CM4_FP_LE_ARMCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]932 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
933 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
934 <require Tcompiler="ARMCC"/>
935 </condition>
936
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]937 <condition id="CM7_ARMCC">
938 <description>Cortex-M7 processor based device for the ARM Compiler</description>
939 <require condition="CM7"/>
940 <require Tcompiler="ARMCC"/>
941 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]942 <condition id="CM7_LE_ARMCC">
943 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]944 <require condition="CM7_ARMCC"/>
945 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]946 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]947 <condition id="CM7_BE_ARMCC">
948 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]949 <require condition="CM7_ARMCC"/>
950 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]951 </condition>
952
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]953 <condition id="CM7_FP_ARMCC">
954 <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
955 <require condition="CM7_FP"/>
956 <require Tcompiler="ARMCC"/>
957 </condition>
958 <condition id="CM7_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]959 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]960 <require condition="CM7_FP_ARMCC"/>
961 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]962 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]963 <condition id="CM7_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]964 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]965 <require condition="CM7_FP_ARMCC"/>
966 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]967 </condition>
968
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]969 <condition id="CM7_SP_ARMCC">
970 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
971 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]972 <require Tcompiler="ARMCC"/>
973 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]974 <condition id="CM7_SP_LE_ARMCC">
975 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
976 <require condition="CM7_SP_ARMCC"/>
977 <require Dendian="Little-endian"/>
978 </condition>
979 <condition id="CM7_SP_BE_ARMCC">
980 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
981 <require condition="CM7_SP_ARMCC"/>
982 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]983 </condition>
984
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]985 <condition id="CM7_DP_ARMCC">
986 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
987 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]988 <require Tcompiler="ARMCC"/>
989 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]990 <condition id="CM7_DP_LE_ARMCC">
991 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
992 <require condition="CM7_DP_ARMCC"/>
993 <require Dendian="Little-endian"/>
994 </condition>
995 <condition id="CM7_DP_BE_ARMCC">
996 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
997 <require condition="CM7_DP_ARMCC"/>
998 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]999 </condition>
1000
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1001 <condition id="CM23_ARMCC">
1002 <description>Cortex-M23 processor based device for the ARM Compiler</description>
1003 <require condition="CM23"/>
1004 <require Tcompiler="ARMCC"/>
1005 </condition>
1006 <condition id="CM23_LE_ARMCC">
1007 <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1008 <require condition="CM23_ARMCC"/>
1009 <require Dendian="Little-endian"/>
1010 </condition>
1011 <condition id="CM23_BE_ARMCC">
1012 <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1013 <require condition="CM23_ARMCC"/>
1014 <require Dendian="Big-endian"/>
1015 </condition>
1016
1017 <condition id="CM33_ARMCC">
1018 <description>Cortex-M33 processor based device for the ARM Compiler</description>
1019 <require condition="CM33"/>
1020 <require Tcompiler="ARMCC"/>
1021 </condition>
1022 <condition id="CM33_LE_ARMCC">
1023 <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1024 <require condition="CM33_ARMCC"/>
1025 <require Dendian="Little-endian"/>
1026 </condition>
1027 <condition id="CM33_BE_ARMCC">
1028 <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1029 <require condition="CM33_ARMCC"/>
1030 <require Dendian="Big-endian"/>
1031 </condition>
1032
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1033 <condition id="CM33_FP_ARMCC">
1034 <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1035 <require condition="CM33_FP"/>
1036 <require Tcompiler="ARMCC"/>
1037 </condition>
1038 <condition id="CM33_FP_LE_ARMCC">
1039 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1040 <require condition="CM33_FP_ARMCC"/>
1041 <require Dendian="Little-endian"/>
1042 </condition>
1043 <condition id="CM33_FP_BE_ARMCC">
1044 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1045 <require condition="CM33_FP_ARMCC"/>
1046 <require Dendian="Big-endian"/>
1047 </condition>
1048
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1049 <condition id="CM33_NODSP_NOFPU_ARMCC">
1050 <description>CM33, no DSP, no FPU, ARM Compiler</description>
1051 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1052 <require Tcompiler="ARMCC"/>
1053 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1054 <condition id="CM33_DSP_NOFPU_ARMCC">
1055 <description>CM33, DSP, no FPU, ARM Compiler</description>
1056 <require condition="CM33_DSP_NOFPU"/>
1057 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1058 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1059 <condition id="CM33_NODSP_SP_ARMCC">
1060 <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1061 <require condition="CM33_NODSP_SP"/>
1062 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1063 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1064 <condition id="CM33_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1065 <description>CM33, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1066 <require condition="CM33_DSP_SP"/>
1067 <require Tcompiler="ARMCC"/>
1068 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1069 <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1070 <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1071 <require condition="CM33_NODSP_NOFPU_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1072 <require Dendian="Little-endian"/>
1073 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1074 <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1075 <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1076 <require condition="CM33_DSP_NOFPU_ARMCC"/>
1077 <require Dendian="Little-endian"/>
1078 </condition>
1079 <condition id="CM33_NODSP_SP_LE_ARMCC">
1080 <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1081 <require condition="CM33_NODSP_SP_ARMCC"/>
1082 <require Dendian="Little-endian"/>
1083 </condition>
1084 <condition id="CM33_DSP_SP_LE_ARMCC">
1085 <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1086 <require condition="CM33_DSP_SP_ARMCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1087 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1088 </condition>
1089
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1090 <condition id="ARMv8MBL_ARMCC">
1091 <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1092 <require condition="ARMv8MBL"/>
1093 <require Tcompiler="ARMCC"/>
1094 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1095 <condition id="ARMv8MBL_LE_ARMCC">
1096 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1097 <require condition="ARMv8MBL_ARMCC"/>
1098 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1099 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1100 <condition id="ARMv8MBL_BE_ARMCC">
1101 <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1102 <require condition="ARMv8MBL_ARMCC"/>
1103 <require Dendian="Big-endian"/>
1104 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1105
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1106 <condition id="ARMv8MML_ARMCC">
1107 <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1108 <require condition="ARMv8MML"/>
1109 <require Tcompiler="ARMCC"/>
1110 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1111 <condition id="ARMv8MML_LE_ARMCC">
1112 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1113 <require condition="ARMv8MML_ARMCC"/>
1114 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1115 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1116 <condition id="ARMv8MML_BE_ARMCC">
1117 <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1118 <require condition="ARMv8MML_ARMCC"/>
1119 <require Dendian="Big-endian"/>
1120 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1121
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1122 <condition id="ARMv8MML_FP_ARMCC">
1123 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1124 <require condition="ARMv8MML_FP"/>
1125 <require Tcompiler="ARMCC"/>
1126 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1127 <condition id="ARMv8MML_FP_LE_ARMCC">
1128 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1129 <require condition="ARMv8MML_FP_ARMCC"/>
1130 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1131 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1132 <condition id="ARMv8MML_FP_BE_ARMCC">
1133 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1134 <require condition="ARMv8MML_FP_ARMCC"/>
1135 <require Dendian="Big-endian"/>
1136 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1137
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1138 <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1139 <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1140 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1141 <require Tcompiler="ARMCC"/>
1142 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1143 <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1144 <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1145 <require condition="ARMv8MML_DSP_NOFPU"/>
1146 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1147 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1148 <condition id="ARMv8MML_NODSP_SP_ARMCC">
1149 <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1150 <require condition="ARMv8MML_NODSP_SP"/>
1151 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1152 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1153 <condition id="ARMv8MML_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1154 <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1155 <require condition="ARMv8MML_DSP_SP"/>
1156 <require Tcompiler="ARMCC"/>
1157 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1158 <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1159 <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1160 <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1161 <require Dendian="Little-endian"/>
1162 </condition>
1163 <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1164 <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1165 <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1166 <require Dendian="Little-endian"/>
1167 </condition>
1168 <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1169 <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1170 <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1171 <require Dendian="Little-endian"/>
1172 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1173 <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1174 <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1175 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1176 <require Dendian="Little-endian"/>
1177 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1178
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1179 <!-- GCC compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame^]1180 <condition id="CA_GCC">
1181 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1182 <require condition="ARMv7-A Device"/>
1183 <require Tcompiler="GCC"/>
1184 </condition>
1185
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1186 <condition id="CM0_GCC">
1187 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1188 <require condition="CM0"/>
1189 <require Tcompiler="GCC"/>
1190 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1191 <condition id="CM0_LE_GCC">
1192 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1193 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1194 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1195 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1196 <condition id="CM0_BE_GCC">
1197 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1198 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1199 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1200 </condition>
1201
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1202 <condition id="CM3_GCC">
1203 <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1204 <require condition="CM3"/>
1205 <require Tcompiler="GCC"/>
1206 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1207 <condition id="CM3_LE_GCC">
1208 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1209 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1210 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1211 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1212 <condition id="CM3_BE_GCC">
1213 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1214 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1215 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1216 </condition>
1217
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1218 <condition id="CM4_GCC">
1219 <description>Cortex-M4 processor based device for the GCC Compiler</description>
1220 <require condition="CM4"/>
1221 <require Tcompiler="GCC"/>
1222 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1223 <condition id="CM4_LE_GCC">
1224 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1225 <require condition="CM4_GCC"/>
1226 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1227 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1228 <condition id="CM4_BE_GCC">
1229 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1230 <require condition="CM4_GCC"/>
1231 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1232 </condition>
1233
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1234 <condition id="CM4_FP_GCC">
1235 <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1236 <require condition="CM4_FP"/>
1237 <require Tcompiler="GCC"/>
1238 </condition>
1239 <condition id="CM4_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1240 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1241 <require condition="CM4_FP_GCC"/>
1242 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1243 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1244 <condition id="CM4_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1245 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1246 <require condition="CM4_FP_GCC"/>
1247 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1248 </condition>
1249
1250 <!-- XMC 4000 Series devices from Infineon require a special library -->
1251 <condition id="CM4_LE_GCC_STD">
1252 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1253 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1254 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1255 <require Tcompiler="GCC"/>
1256 </condition>
1257 <condition id="CM4_LE_GCC_IFX">
1258 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1259 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1260 <require Tcompiler="GCC"/>
1261 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1262 <condition id="CM4_FP_LE_GCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1263 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1264 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1265 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1266 <require Tcompiler="GCC"/>
1267 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1268 <condition id="CM4_FP_LE_GCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1269 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1270 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1271 <require Tcompiler="GCC"/>
1272 </condition>
1273
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1274 <condition id="CM7_GCC">
1275 <description>Cortex-M7 processor based device for the GCC Compiler</description>
1276 <require condition="CM7"/>
1277 <require Tcompiler="GCC"/>
1278 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1279 <condition id="CM7_LE_GCC">
1280 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1281 <require condition="CM7_GCC"/>
1282 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1283 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1284 <condition id="CM7_BE_GCC">
1285 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1286 <require condition="CM7_GCC"/>
1287 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1288 </condition>
1289
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1290 <condition id="CM7_FP_GCC">
1291 <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1292 <require condition="CM7_FP"/>
1293 <require Tcompiler="GCC"/>
1294 </condition>
1295 <condition id="CM7_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1296 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1297 <require condition="CM7_FP_GCC"/>
1298 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1299 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1300 <condition id="CM7_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1301 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1302 <require condition="CM7_FP_GCC"/>
1303 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1304 </condition>
1305
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1306 <condition id="CM7_SP_GCC">
1307 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1308 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1309 <require Tcompiler="GCC"/>
1310 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1311 <condition id="CM7_SP_LE_GCC">
1312 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1313 <require condition="CM7_SP_GCC"/>
1314 <require Dendian="Little-endian"/>
1315 </condition>
1316 <condition id="CM7_SP_BE_GCC">
1317 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1318 <require condition="CM7_SP_GCC"/>
1319 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1320 </condition>
1321
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1322 <condition id="CM7_DP_GCC">
1323 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1324 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1325 <require Tcompiler="GCC"/>
1326 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1327 <condition id="CM7_DP_LE_GCC">
1328 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1329 <require condition="CM7_DP_GCC"/>
1330 <require Dendian="Little-endian"/>
1331 </condition>
1332 <condition id="CM7_DP_BE_GCC">
1333 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1334 <require condition="CM7_DP_GCC"/>
1335 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1336 </condition>
1337
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1338 <condition id="CM23_GCC">
1339 <description>Cortex-M23 processor based device for the GCC Compiler</description>
1340 <require condition="CM23"/>
1341 <require Tcompiler="GCC"/>
1342 </condition>
1343 <condition id="CM23_LE_GCC">
1344 <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1345 <require condition="CM23_GCC"/>
1346 <require Dendian="Little-endian"/>
1347 </condition>
1348 <condition id="CM23_BE_GCC">
1349 <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1350 <require condition="CM23_GCC"/>
1351 <require Dendian="Big-endian"/>
1352 </condition>
1353
1354 <condition id="CM33_GCC">
1355 <description>Cortex-M33 processor based device for the GCC Compiler</description>
1356 <require condition="CM33"/>
1357 <require Tcompiler="GCC"/>
1358 </condition>
1359 <condition id="CM33_LE_GCC">
1360 <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1361 <require condition="CM33_GCC"/>
1362 <require Dendian="Little-endian"/>
1363 </condition>
1364 <condition id="CM33_BE_GCC">
1365 <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1366 <require condition="CM33_GCC"/>
1367 <require Dendian="Big-endian"/>
1368 </condition>
1369
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1370 <condition id="CM33_FP_GCC">
1371 <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1372 <require condition="CM33_FP"/>
1373 <require Tcompiler="GCC"/>
1374 </condition>
1375 <condition id="CM33_FP_LE_GCC">
1376 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1377 <require condition="CM33_FP_GCC"/>
1378 <require Dendian="Little-endian"/>
1379 </condition>
1380 <condition id="CM33_FP_BE_GCC">
1381 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1382 <require condition="CM33_FP_GCC"/>
1383 <require Dendian="Big-endian"/>
1384 </condition>
1385
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1386 <condition id="CM33_NODSP_NOFPU_GCC">
1387 <description>CM33, no DSP, no FPU, GCC Compiler</description>
1388 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1389 <require Tcompiler="GCC"/>
1390 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1391 <condition id="CM33_DSP_NOFPU_GCC">
1392 <description>CM33, DSP, no FPU, GCC Compiler</description>
1393 <require condition="CM33_DSP_NOFPU"/>
1394 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1395 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1396 <condition id="CM33_NODSP_SP_GCC">
1397 <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1398 <require condition="CM33_NODSP_SP"/>
1399 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1400 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1401 <condition id="CM33_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1402 <description>CM33, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1403 <require condition="CM33_DSP_SP"/>
1404 <require Tcompiler="GCC"/>
1405 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1406 <condition id="CM33_NODSP_NOFPU_LE_GCC">
1407 <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1408 <require condition="CM33_NODSP_NOFPU_GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1409 <require Dendian="Little-endian"/>
1410 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1411 <condition id="CM33_DSP_NOFPU_LE_GCC">
1412 <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1413 <require condition="CM33_DSP_NOFPU_GCC"/>
1414 <require Dendian="Little-endian"/>
1415 </condition>
1416 <condition id="CM33_NODSP_SP_LE_GCC">
1417 <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1418 <require condition="CM33_NODSP_SP_GCC"/>
1419 <require Dendian="Little-endian"/>
1420 </condition>
1421 <condition id="CM33_DSP_SP_LE_GCC">
1422 <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1423 <require condition="CM33_DSP_SP_GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1424 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1425 </condition>
1426
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1427 <condition id="ARMv8MBL_GCC">
1428 <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1429 <require condition="ARMv8MBL"/>
1430 <require Tcompiler="GCC"/>
1431 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1432 <condition id="ARMv8MBL_LE_GCC">
1433 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1434 <require condition="ARMv8MBL_GCC"/>
1435 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1436 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1437 <condition id="ARMv8MBL_BE_GCC">
1438 <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1439 <require condition="ARMv8MBL_GCC"/>
1440 <require Dendian="Big-endian"/>
1441 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1442
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1443 <condition id="ARMv8MML_GCC">
1444 <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1445 <require condition="ARMv8MML"/>
1446 <require Tcompiler="GCC"/>
1447 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1448 <condition id="ARMv8MML_LE_GCC">
1449 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1450 <require condition="ARMv8MML_GCC"/>
1451 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1452 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1453 <condition id="ARMv8MML_BE_GCC">
1454 <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1455 <require condition="ARMv8MML_GCC"/>
1456 <require Dendian="Big-endian"/>
1457 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1458
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1459 <condition id="ARMv8MML_FP_GCC">
1460 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1461 <require condition="ARMv8MML_FP"/>
1462 <require Tcompiler="GCC"/>
1463 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1464 <condition id="ARMv8MML_FP_LE_GCC">
1465 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1466 <require condition="ARMv8MML_FP_GCC"/>
1467 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1468 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1469 <condition id="ARMv8MML_FP_BE_GCC">
1470 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1471 <require condition="ARMv8MML_FP_GCC"/>
1472 <require Dendian="Big-endian"/>
1473 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1474
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1475 <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1476 <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1477 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1478 <require Tcompiler="GCC"/>
1479 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1480 <condition id="ARMv8MML_DSP_NOFPU_GCC">
1481 <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1482 <require condition="ARMv8MML_DSP_NOFPU"/>
1483 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1484 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1485 <condition id="ARMv8MML_NODSP_SP_GCC">
1486 <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1487 <require condition="ARMv8MML_NODSP_SP"/>
1488 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1489 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1490 <condition id="ARMv8MML_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1491 <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1492 <require condition="ARMv8MML_DSP_SP"/>
1493 <require Tcompiler="GCC"/>
1494 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1495 <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1496 <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1497 <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1498 <require Dendian="Little-endian"/>
1499 </condition>
1500 <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1501 <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1502 <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1503 <require Dendian="Little-endian"/>
1504 </condition>
1505 <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1506 <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1507 <require condition="ARMv8MML_NODSP_SP_GCC"/>
1508 <require Dendian="Little-endian"/>
1509 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1510 <condition id="ARMv8MML_DSP_SP_LE_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1511 <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1512 <require condition="ARMv8MML_DSP_SP_GCC"/>
1513 <require Dendian="Little-endian"/>
1514 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1515
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1516 <!-- IAR compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame^]1517 <condition id="CA_IAR">
1518 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1519 <require condition="ARMv7-A Device"/>
1520 <require Tcompiler="IAR"/>
1521 </condition>
1522
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1523 <condition id="CM0_IAR">
1524 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1525 <require condition="CM0"/>
1526 <require Tcompiler="IAR"/>
1527 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1528 <condition id="CM0_LE_IAR">
1529 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1530 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1531 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1532 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1533 <condition id="CM0_BE_IAR">
1534 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1535 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1536 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1537 </condition>
1538
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1539 <condition id="CM3_IAR">
1540 <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1541 <require condition="CM3"/>
1542 <require Tcompiler="IAR"/>
1543 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1544 <condition id="CM3_LE_IAR">
1545 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1546 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1547 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1548 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1549 <condition id="CM3_BE_IAR">
1550 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1551 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1552 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1553 </condition>
1554
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1555 <condition id="CM4_IAR">
1556 <description>Cortex-M4 processor based device for the IAR Compiler</description>
1557 <require condition="CM4"/>
1558 <require Tcompiler="IAR"/>
1559 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1560 <condition id="CM4_LE_IAR">
1561 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1562 <require condition="CM4_IAR"/>
1563 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1564 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1565 <condition id="CM4_BE_IAR">
1566 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1567 <require condition="CM4_IAR"/>
1568 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1569 </condition>
1570
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1571 <condition id="CM4_FP_IAR">
1572 <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1573 <require condition="CM4_FP"/>
1574 <require Tcompiler="IAR"/>
1575 </condition>
1576 <condition id="CM4_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1577 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1578 <require condition="CM4_FP_IAR"/>
1579 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1580 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1581 <condition id="CM4_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1582 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1583 <require condition="CM4_FP_IAR"/>
1584 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1585 </condition>
1586
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1587 <condition id="CM7_IAR">
1588 <description>Cortex-M7 processor based device for the IAR Compiler</description>
1589 <require condition="CM7"/>
1590 <require Tcompiler="IAR"/>
1591 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1592 <condition id="CM7_LE_IAR">
1593 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1594 <require condition="CM7_IAR"/>
1595 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1596 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1597 <condition id="CM7_BE_IAR">
1598 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1599 <require condition="CM7_IAR"/>
1600 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1601 </condition>
1602
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1603 <condition id="CM7_FP_IAR">
1604 <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1605 <require condition="CM7_FP"/>
1606 <require Tcompiler="IAR"/>
1607 </condition>
1608 <condition id="CM7_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1609 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1610 <require condition="CM7_FP_IAR"/>
1611 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1612 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1613 <condition id="CM7_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1614 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1615 <require condition="CM7_FP_IAR"/>
1616 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1617 </condition>
1618
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1619 <condition id="CM7_SP_IAR">
1620 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1621 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1622 <require Tcompiler="IAR"/>
1623 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1624 <condition id="CM7_SP_LE_IAR">
1625 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1626 <require condition="CM7_SP_IAR"/>
1627 <require Dendian="Little-endian"/>
1628 </condition>
1629 <condition id="CM7_SP_BE_IAR">
1630 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1631 <require condition="CM7_SP_IAR"/>
1632 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1633 </condition>
1634
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1635 <condition id="CM7_DP_IAR">
1636 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1637 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1638 <require Tcompiler="IAR"/>
1639 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1640 <condition id="CM7_DP_LE_IAR">
1641 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1642 <require condition="CM7_DP_IAR"/>
1643 <require Dendian="Little-endian"/>
1644 </condition>
1645 <condition id="CM7_DP_BE_IAR">
1646 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1647 <require condition="CM7_DP_IAR"/>
1648 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1649 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1650
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1651 <!-- conditions selecting single devices and CMSIS Core -->
1652 <!-- used for component startup, GCC version is used for C-Startup -->
1653 <condition id="ARMCM0 CMSIS">
1654 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1655 <require Dvendor="ARM:82" Dname="ARMCM0"/>
1656 <require Cclass="CMSIS" Cgroup="CORE"/>
1657 </condition>
1658 <condition id="ARMCM0 CMSIS GCC">
1659 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1660 <require condition="ARMCM0 CMSIS"/>
1661 <require condition="GCC"/>
1662 </condition>
1663
1664 <condition id="ARMCM0+ CMSIS">
1665 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1666 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1667 <require Cclass="CMSIS" Cgroup="CORE"/>
1668 </condition>
1669 <condition id="ARMCM0+ CMSIS GCC">
1670 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1671 <require condition="ARMCM0+ CMSIS"/>
1672 <require condition="GCC"/>
1673 </condition>
1674
1675 <condition id="ARMCM3 CMSIS">
1676 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1677 <require Dvendor="ARM:82" Dname="ARMCM3"/>
1678 <require Cclass="CMSIS" Cgroup="CORE"/>
1679 </condition>
1680 <condition id="ARMCM3 CMSIS GCC">
1681 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1682 <require condition="ARMCM3 CMSIS"/>
1683 <require condition="GCC"/>
1684 </condition>
1685
1686 <condition id="ARMCM4 CMSIS">
1687 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1688 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1689 <require Cclass="CMSIS" Cgroup="CORE"/>
1690 </condition>
1691 <condition id="ARMCM4 CMSIS GCC">
1692 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1693 <require condition="ARMCM4 CMSIS"/>
1694 <require condition="GCC"/>
1695 </condition>
1696
1697 <condition id="ARMCM7 CMSIS">
1698 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1699 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1700 <require Cclass="CMSIS" Cgroup="CORE"/>
1701 </condition>
1702 <condition id="ARMCM7 CMSIS GCC">
1703 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1704 <require condition="ARMCM7 CMSIS"/>
1705 <require condition="GCC"/>
1706 </condition>
1707
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1708 <condition id="ARMCM23 CMSIS">
1709 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1710 <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1711 <require Cclass="CMSIS" Cgroup="CORE"/>
1712 </condition>
1713 <condition id="ARMCM23 CMSIS GCC">
1714 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1715 <require condition="ARMCM23 CMSIS"/>
1716 <require condition="GCC"/>
1717 </condition>
1718
1719 <condition id="ARMCM33 CMSIS">
1720 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1721 <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1722 <require Cclass="CMSIS" Cgroup="CORE"/>
1723 </condition>
1724 <condition id="ARMCM33 CMSIS GCC">
1725 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1726 <require condition="ARMCM33 CMSIS"/>
1727 <require condition="GCC"/>
1728 </condition>
1729
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1730 <condition id="ARMSC000 CMSIS">
1731 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1732 <require Dvendor="ARM:82" Dname="ARMSC000"/>
1733 <require Cclass="CMSIS" Cgroup="CORE"/>
1734 </condition>
1735 <condition id="ARMSC000 CMSIS GCC">
1736 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1737 <require condition="ARMSC000 CMSIS"/>
1738 <require condition="GCC"/>
1739 </condition>
1740
1741 <condition id="ARMSC300 CMSIS">
1742 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1743 <require Dvendor="ARM:82" Dname="ARMSC300"/>
1744 <require Cclass="CMSIS" Cgroup="CORE"/>
1745 </condition>
1746 <condition id="ARMSC300 CMSIS GCC">
1747 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1748 <require condition="ARMSC300 CMSIS"/>
1749 <require condition="GCC"/>
1750 </condition>
1751
1752 <condition id="ARMv8MBL CMSIS">
1753 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1754 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1755 <require Cclass="CMSIS" Cgroup="CORE"/>
1756 </condition>
1757 <condition id="ARMv8MBL CMSIS GCC">
1758 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1759 <require condition="ARMv8MBL CMSIS"/>
1760 <require condition="GCC"/>
1761 </condition>
1762
1763 <condition id="ARMv8MML CMSIS">
1764 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1765 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1766 <require Cclass="CMSIS" Cgroup="CORE"/>
1767 </condition>
1768 <condition id="ARMv8MML CMSIS GCC">
1769 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1770 <require condition="ARMv8MML CMSIS"/>
1771 <require condition="GCC"/>
1772 </condition>
1773
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1774 <condition id="ARMCA5 CMSIS">
1775 <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1776 <require Dvendor="ARM:82" Dname="ARMCA5"/>
1777 <require Cclass="CMSIS" Cgroup="CORE"/>
1778 </condition>
1779
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1780 <condition id="ARMCA7 CMSIS">
1781 <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1782 <require Dvendor="ARM:82" Dname="ARMCA7"/>
1783 <require Cclass="CMSIS" Cgroup="CORE"/>
1784 </condition>
1785
1786 <condition id="ARMCA9 CMSIS">
1787 <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1788 <require Dvendor="ARM:82" Dname="ARMCA9"/>
1789 <require Cclass="CMSIS" Cgroup="CORE"/>
1790 </condition>
1791
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1792 <!-- CMSIS DSP -->
1793 <condition id="CMSIS DSP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1794 <description>Components required for DSP</description>
1795 <require condition="ARMv6_7_8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1796 <require condition="ARMCC GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1797 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1798 </condition>
1799
1800 <!-- RTOS RTX -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1801 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1802 <description>Components required for RTOS RTX</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1803 <require condition="ARMv6_7-M Device"/>
1804 <require condition="ARMCC GCC IAR"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1805 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1806 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1807 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1808 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1809 <description>Components required for RTOS RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1810 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]1811 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1812 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1813 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1814 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1815 <description>Components required for RTOS2 RTX5</description>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame^]1816 <accept condition="ARMv6_7_8-M Device"/>
1817 <accept condition="ARMv7-A Device"/>
1818 <require condition="ARMCC GCC IAR"/>
1819 <require Cclass="CMSIS" Cgroup="CORE"/>
1820 <require Cclass="Device" Cgroup="Startup"/>
1821 </condition>
1822 <condition id="RTOS2 RTX5 Lib">
1823 <description>Components required for RTOS2 RTX5 Library</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1824 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]1825 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1826 <require Cclass="CMSIS" Cgroup="CORE"/>
1827 <require Cclass="Device" Cgroup="Startup"/>
1828 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1829 <condition id="RTOS2 RTX5 NS">
1830 <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1831 <require condition="ARMv8-M TZ Device"/>
1832 <require condition="ARMCC GCC"/>
1833 <require Cclass="CMSIS" Cgroup="CORE"/>
1834 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1835 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1836
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1837 </conditions>
1838
1839 <components>
1840 <!-- CMSIS-Core component -->
Joachim Krech8cd76b42017-02-03 15:18:56 +0100[diff] [blame]1841 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.1" condition="ARMv6_7_8-M Device" >
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1842 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1843 <files>
1844 <!-- CPU independent -->
1845 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1846 <file category="include" name="CMSIS/Include/"/>
Robert Rostoharb2e07162016-11-04 10:43:56 +0100[diff] [blame]1847 <file category="header" name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]1848 <!-- Code template -->
Robert Rostohar0e71e882016-11-16 19:03:44 +0100[diff] [blame]1849 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c" version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
Robert Rostohar71f4dcf2016-11-16 19:06:01 +0100[diff] [blame]1850 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1851 </files>
1852 </component>
1853
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1854 <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0" condition="ARMv7-A Device" >
1855 <description>CMSIS-CORE for Cortex-A</description>
1856 <files>
1857 <!-- CPU independent -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1858 <file category="doc" name="CMSIS/Documentation/Core_A/html/index.html"/>
brondanib6bdb2c2017-03-02 16:15:52 +0100[diff] [blame]1859 <file category="include" name="CMSIS/Core_A/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1860 </files>
1861 </component>
1862
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1863 <!-- CMSIS-Startup components -->
1864 <!-- Cortex-M0 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1865 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1866 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1867 <files>
1868 <!-- include folder / device header file -->
1869 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1870 <!-- startup / system file -->
1871 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1872 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1873 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1874 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1875 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1876 </files>
1877 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1878 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1879 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1880 <files>
1881 <!-- include folder / device header file -->
1882 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1883 <!-- startup / system file -->
1884 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1885 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1886 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1887 </files>
1888 </component>
1889
1890 <!-- Cortex-M0+ -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1891 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1892 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1893 <files>
1894 <!-- include folder / device header file -->
1895 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1896 <!-- startup / system file -->
1897 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1898 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1899 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1900 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1901 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1902 </files>
1903 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1904 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1905 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1906 <files>
1907 <!-- include folder / device header file -->
1908 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1909 <!-- startup / system file -->
1910 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1911 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1912 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1913 </files>
1914 </component>
1915
1916 <!-- Cortex-M3 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1917 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1918 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1919 <files>
1920 <!-- include folder / device header file -->
1921 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1922 <!-- startup / system file -->
1923 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1924 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1925 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1926 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1927 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1928 </files>
1929 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1930 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1931 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1932 <files>
1933 <!-- include folder / device header file -->
1934 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1935 <!-- startup / system file -->
1936 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1937 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1938 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1939 </files>
1940 </component>
1941
1942 <!-- Cortex-M4 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1943 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1944 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1945 <files>
1946 <!-- include folder / device header file -->
1947 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1948 <!-- startup / system file -->
1949 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1950 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1951 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1952 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1953 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1954 </files>
1955 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1956 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1957 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1958 <files>
1959 <!-- include folder / device header file -->
1960 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1961 <!-- startup / system file -->
1962 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1963 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1964 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1965 </files>
1966 </component>
1967
1968 <!-- Cortex-M7 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1969 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1970 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1971 <files>
1972 <!-- include folder / device header file -->
1973 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1974 <!-- startup / system file -->
1975 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1976 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1977 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1978 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1979 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1980 </files>
1981 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1982 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1983 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1984 <files>
1985 <!-- include folder / device header file -->
1986 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1987 <!-- startup / system file -->
1988 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1989 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1990 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1991 </files>
1992 </component>
1993
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1994 <!-- Cortex-M23 -->
1995 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS">
1996 <description>System and Startup for Generic ARM Cortex-M23 device</description>
1997 <files>
1998 <!-- include folder / device header file -->
1999 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2000 <!-- startup / system file -->
2001 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2002 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2003 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2004 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2005 <!-- SAU configuration -->
2006 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2007 </files>
2008 </component>
2009 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2010 <description>System and Startup for Generic ARM Cortex-M23 device</description>
2011 <files>
2012 <!-- include folder / device header file -->
2013 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2014 <!-- startup / system file -->
2015 <file category="sourceC" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2016 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2017 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
2018 <!-- SAU configuration -->
2019 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2020 </files>
2021 </component>
2022
2023 <!-- Cortex-M33 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2024 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2025 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2026 <files>
2027 <!-- include folder / device header file -->
2028 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2029 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2030 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
2031 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
2032 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2033 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2034 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2035 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2036 </files>
2037 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2038 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2039 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2040 <files>
2041 <!-- include folder / device header file -->
2042 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2043 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2044 <file category="sourceC" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
2045 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2046 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2047 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2048 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2049 </files>
2050 </component>
2051
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2052 <!-- Cortex-SC000 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2053 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2054 <description>System and Startup for Generic ARM SC000 device</description>
2055 <files>
2056 <!-- include folder / device header file -->
2057 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2058 <!-- startup / system file -->
2059 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2060 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2061 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2062 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2063 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2064 </files>
2065 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2066 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2067 <description>System and Startup for Generic ARM SC000 device</description>
2068 <files>
2069 <!-- include folder / device header file -->
2070 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2071 <!-- startup / system file -->
2072 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2073 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2074 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2075 </files>
2076 </component>
2077
2078 <!-- Cortex-SC300 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2079 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2080 <description>System and Startup for Generic ARM SC300 device</description>
2081 <files>
2082 <!-- include folder / device header file -->
2083 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2084 <!-- startup / system file -->
2085 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2086 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2087 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2088 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2089 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2090 </files>
2091 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2092 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2093 <description>System and Startup for Generic ARM SC300 device</description>
2094 <files>
2095 <!-- include folder / device header file -->
2096 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2097 <!-- startup / system file -->
2098 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2099 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2100 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2101 </files>
2102 </component>
2103
2104 <!-- ARMv8MBL -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2105 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2106 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2107 <files>
2108 <!-- include folder / device header file -->
2109 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2110 <!-- startup / system file -->
2111 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2112 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2113 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2114 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2115 <!-- SAU configuration -->
2116 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2117 </files>
2118 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2119 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2120 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2121 <files>
2122 <!-- include folder / device header file -->
2123 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2124 <!-- startup / system file -->
2125 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2126 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2127 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2128 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2129 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2130 </files>
2131 </component>
2132
2133 <!-- ARMv8MML -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2134 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2135 <description>System and Startup for Generic ARM ARMv8MML device</description>
2136 <files>
2137 <!-- include folder / device header file -->
2138 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2139 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2140 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2141 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2142 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2143 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2144 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2145 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2146 </files>
2147 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2148 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2149 <description>System and Startup for Generic ARM ARMv8MML device</description>
2150 <files>
2151 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2152 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2153 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2154 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2155 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2156 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2157 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2158 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2159 </files>
2160 </component>
2161
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2162 <!-- Cortex-A5 -->
2163 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA5 CMSIS">
2164 <description>System and Startup for Generic ARM Cortex-A5 device</description>
2165 <files>
2166 <!-- include folder / device header file -->
2167 <file category="include" name="Device/ARM/ARMCA5/Include/"/>
2168 <!-- startup / system / mmu files -->
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2169 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC"/>
2170 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC"/>
2171 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2172 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2173 <file category="sourceC" name="Device/ARM/ARMCA5/Source/system_ARMCA5.c" version="1.0.0" attr="config"/>
2174 <file category="sourceC" name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c" version="1.0.0" attr="config"/>
2175 <file category="header" name="Device/ARM/ARMCA5/Include/system_ARMCA5.h" version="1.0.0" attr="config"/>
2176 <file category="header" name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h" version="1.0.0" attr="config"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2177
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2178 </files>
2179 </component>
2180
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2181 <!-- Cortex-A7 -->
2182 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA7 CMSIS">
2183 <description>System and Startup for Generic ARM Cortex-A7 device</description>
2184 <files>
2185 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2186 <file category="include" name="Device/ARM/ARMCA7/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2187 <!-- startup / system / mmu files -->
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2188 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC"/>
2189 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC"/>
2190 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2191 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2192 <file category="sourceC" name="Device/ARM/ARMCA7/Source/system_ARMCA7.c" version="1.0.0" attr="config"/>
2193 <file category="sourceC" name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2194 <file category="header" name="Device/ARM/ARMCA7/Include/system_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2195 <file category="header" name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2196 </files>
2197 </component>
2198
2199 <!-- Cortex-A9 -->
2200 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA9 CMSIS">
2201 <description>System and Startup for Generic ARM Cortex-A9 device</description>
2202 <files>
2203 <!-- include folder / device header file -->
2204 <file category="include" name="Device/ARM/ARMCA9/Include/"/>
2205 <!-- startup / system / mmu files -->
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2206 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC"/>
2207 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC"/>
2208 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2209 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2210 <file category="sourceC" name="Device/ARM/ARMCA9/Source/system_ARMCA9.c" version="1.0.0" attr="config"/>
2211 <file category="sourceC" name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2212 <file category="header" name="Device/ARM/ARMCA9/Include/system_ARMCA9.h" version="1.0.0" attr="config"/>
2213 <file category="header" name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2214 </files>
2215 </component>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2216
2217 <!-- CMSIS-DSP component -->
Martin Günther1b4ba8f2017-02-02 14:38:48 +0100[diff] [blame]2218 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.1" condition="CMSIS DSP">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2219 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2220 <files>
2221 <!-- CPU independent -->
2222 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2223 <file category="header" name="CMSIS/Include/arm_math.h"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2224
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2225 <!-- CPU and Compiler dependent -->
2226 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2227 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2228 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2229 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2230 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2231 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2232 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2233 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2234 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2235 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2236 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2237 <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2238 <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2239 <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2240 <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2241
2242 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2243 <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2244 <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2245 <file category="library" condition="CM33_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2246 <file category="library" condition="CM33_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2247 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2248 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2249 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2250 <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2251 <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2252 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2253 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2254
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2255 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2256 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2257 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2258 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2259 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2260 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2261 <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2262 <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2263
2264 <file category="library" condition="CM23_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2265 <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2266 <file category="library" condition="CM33_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2267 <file category="library" condition="CM33_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2268 <file category="library" condition="CM33_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2269 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2270 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2271 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2272 <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2273 <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2274 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2275 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2276
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2277 </files>
2278 </component>
2279
2280 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]2281 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0.0" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2282 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2283 <RTE_Components_h>
2284 <!-- the following content goes into file 'RTE_Components.h' -->
2285 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2286 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2287 </RTE_Components_h>
2288 <files>
2289 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]2290 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2291 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2292 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2293
2294 <!-- RTX templates -->
2295 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2296 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2297 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2298 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2299 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2300 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2301 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2302 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2303 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2304 <!-- tool-chain specific template file -->
2305 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2306 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2307 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2308
2309 <!-- CPU and Compiler dependent -->
2310 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2311 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2312 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2313 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2314 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2315 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2316 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2317 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2318 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2319 <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2320 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2321 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2322 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2323 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2324 <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2325 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2326 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2327 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2328 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2329 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2330 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2331 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2332 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2333 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2334 <file category="library" condition="CM4_FP_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2335 <file category="library" condition="CM4_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2336 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2337 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2338 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2339 <file category="library" condition="CM7_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2340 <!-- IAR -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2341 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2342 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2343 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2344 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2345 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2346 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2347 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2348 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2349 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2350 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2351 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2352 <file category="library" condition="CM7_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2353 </files>
2354 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2355
2356 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostoharbb902b42017-04-03 14:06:24 +0200[diff] [blame]2357 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.1.1" Capiversion="1.0.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2358 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2359 <RTE_Components_h>
2360 <!-- the following content goes into file 'RTE_Components.h' -->
2361 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2362 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
2363 </RTE_Components_h>
2364 <files>
2365 <!-- RTX header file -->
2366 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2367 <!-- RTX compatibility module for API V1 -->
2368 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2369 </files>
2370 </component>
2371
2372 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame^]2373 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.1.1" Capiversion="2.1.0" condition="RTOS2 RTX5 Lib">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2374 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2375 <RTE_Components_h>
2376 <!-- the following content goes into file 'RTE_Components.h' -->
2377 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2378 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2379 </RTE_Components_h>
2380 <files>
2381 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2382 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2383
2384 <!-- RTX header files -->
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2385 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2386
2387 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2388 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2389 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2390
2391 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2392 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2393 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2394 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2395 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2396 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2397 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2398 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2399 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Jonatan Antoni1f9190f2017-03-13 10:46:34 +0100[diff] [blame]2400 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="2.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2401 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2402
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2403 <!-- RTX library configuration -->
2404 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2405
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2406 <!-- RTX libraries (CPU and Compiler dependent) -->
2407 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2408 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
2409 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2410 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2411 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
2412 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2413 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2414 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2415 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2416 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2417 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2418 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2419 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
2420 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2421 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2422 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2423 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2424 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2425 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2426 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2427 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2428 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2429 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2430 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2431 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2432 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2433 <!-- IAR -->
2434 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2435 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2436 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2437 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2438 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2439 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2440 </files>
2441 </component>
Robert Rostoharbb902b42017-04-03 14:06:24 +0200[diff] [blame]2442 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.1.1" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2443 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2444 <RTE_Components_h>
2445 <!-- the following content goes into file 'RTE_Components.h' -->
2446 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2447 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2448 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2449 </RTE_Components_h>
2450 <files>
2451 <!-- RTX documentation -->
2452 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2453
2454 <!-- RTX header files -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2455 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2456
2457 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2458 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2459 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2460
2461 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2462 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2463 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2464 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2465 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2466 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2467 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2468 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2469 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2470 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2471
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2472 <!-- RTX library configuration -->
2473 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2474
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2475 <!-- RTX libraries (CPU and Compiler dependent) -->
2476 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2477 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2478 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2479 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2480 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2481 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2482 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2483 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2484 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2485 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2486 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2487 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2488 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2489 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2490 </files>
2491 </component>
Robert Rostoharbb902b42017-04-03 14:06:24 +0200[diff] [blame]2492 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.1.1" Capiversion="2.1.0" condition="RTOS2 RTX5">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2493 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2494 <RTE_Components_h>
2495 <!-- the following content goes into file 'RTE_Components.h' -->
2496 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2497 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2498 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2499 </RTE_Components_h>
2500 <files>
2501 <!-- RTX documentation -->
2502 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2503
2504 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2505 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2506
2507 <!-- RTX configuration -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame^]2508 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2509 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0" condition="ARMv6_7_8-M Device" />
2510 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/Cortex_A/RTX_Config.c" version="5.1.0" condition="Unknown Cortex-A Device"/>
2511 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/Renesas/RZ_A/RTX_Config.c" version="5.1.0" condition="RZ_A Device"/>
2512
2513 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/handlers.c" version="5.1.0" condition="ARMv7-A Device"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2514
2515 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2516 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2517 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2518 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2519 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2520 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2521 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2522 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2523 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2524 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2525
2526 <!-- RTX sources (core) -->
2527 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2528 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2529 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2530 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2531 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2532 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2533 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2534 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2535 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2536 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2537 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2538 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame^]2539 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_gic.c" condition="ARMv7-A Device"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2540 <!-- RTX sources (library configuration) -->
2541 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2542 <!-- RTX sources (handlers ARMCC) -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame^]2543 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s" condition="CA_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2544 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
2545 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
2546 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
2547 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
2548 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
2549 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2550 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
2551 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
2552 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2553 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
2554 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
2555 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
2556 <!-- RTX sources (handlers GCC) -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame^]2557 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_GCC"/>
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2558 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S" condition="CM0_GCC"/>
2559 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM3_GCC"/>
2560 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM4_GCC"/>
2561 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM4_FP_GCC"/>
2562 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM7_GCC"/>
2563 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM7_FP_GCC"/>
2564 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
2565 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
2566 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2567 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
2568 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
2569 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2570 <!-- RTX sources (handlers IAR) -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame^]2571 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s" condition="CA_IAR"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2572 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s" condition="CM0_IAR"/>
2573 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM3_IAR"/>
2574 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM4_IAR"/>
2575 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM4_FP_IAR"/>
2576 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM7_IAR"/>
2577 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM7_FP_IAR"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2578 </files>
2579 </component>
Robert Rostoharbb902b42017-04-03 14:06:24 +0200[diff] [blame]2580 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.1.1" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2581 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2582 <RTE_Components_h>
2583 <!-- the following content goes into file 'RTE_Components.h' -->
2584 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2585 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2586 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2587 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2588 </RTE_Components_h>
2589 <files>
2590 <!-- RTX documentation -->
2591 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2592
2593 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2594 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2595
2596 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2597 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2598 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2599
2600 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2601 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2602 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2603 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2604 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2605 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2606 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2607 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2608 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2609 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2610
2611 <!-- RTX sources (core) -->
2612 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2613 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2614 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2615 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2616 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2617 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2618 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2619 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2620 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2621 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2622 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2623 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2624 <!-- RTX sources (library configuration) -->
2625 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2626 <!-- RTX sources (ARMCC handlers) -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2627 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
2628 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
2629 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2630 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
2631 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
2632 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
2633 <!-- RTX sources (GCC handlers) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2634 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="CM23_GCC"/>
2635 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="CM33_GCC"/>
2636 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2637 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="ARMv8MBL_GCC"/>
2638 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="ARMv8MML_GCC"/>
2639 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2640 </files>
2641 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2642
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2643 </components>
2644
2645 <boards>
2646 <board name="uVision Simulator" vendor="Keil">
2647 <description>uVision Simulator</description>
2648 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2649 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2650 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2651 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2652 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2653 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2654 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2655 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2656 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2657 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2658 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2659 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2660 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
Joachim Krech4a03e6d2017-02-06 13:17:39 +0100[diff] [blame]2661 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2662 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2663 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2664 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2665 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2666 </board>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2667 </boards>
2668
2669 <examples>
2670 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2671 <description>DSP_Lib Class Marks example</description>
2672 <board name="uVision Simulator" vendor="Keil"/>
2673 <project>
2674 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2675 </project>
2676 <attributes>
2677 <component Cclass="CMSIS" Cgroup="CORE"/>
2678 <component Cclass="CMSIS" Cgroup="DSP"/>
2679 <component Cclass="Device" Cgroup="Startup"/>
2680 <category>Getting Started</category>
2681 </attributes>
2682 </example>
2683
2684 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2685 <description>DSP_Lib Convolution example</description>
2686 <board name="uVision Simulator" vendor="Keil"/>
2687 <project>
2688 <environment name="uv" load="arm_convolution_example.uvprojx"/>
2689 </project>
2690 <attributes>
2691 <component Cclass="CMSIS" Cgroup="CORE"/>
2692 <component Cclass="CMSIS" Cgroup="DSP"/>
2693 <component Cclass="Device" Cgroup="Startup"/>
2694 <category>Getting Started</category>
2695 </attributes>
2696 </example>
2697
2698 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2699 <description>DSP_Lib Dotproduct example</description>
2700 <board name="uVision Simulator" vendor="Keil"/>
2701 <project>
2702 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2703 </project>
2704 <attributes>
2705 <component Cclass="CMSIS" Cgroup="CORE"/>
2706 <component Cclass="CMSIS" Cgroup="DSP"/>
2707 <component Cclass="Device" Cgroup="Startup"/>
2708 <category>Getting Started</category>
2709 </attributes>
2710 </example>
2711
2712 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2713 <description>DSP_Lib FFT Bin example</description>
2714 <board name="uVision Simulator" vendor="Keil"/>
2715 <project>
2716 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2717 </project>
2718 <attributes>
2719 <component Cclass="CMSIS" Cgroup="CORE"/>
2720 <component Cclass="CMSIS" Cgroup="DSP"/>
2721 <component Cclass="Device" Cgroup="Startup"/>
2722 <category>Getting Started</category>
2723 </attributes>
2724 </example>
2725
2726 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2727 <description>DSP_Lib FIR example</description>
2728 <board name="uVision Simulator" vendor="Keil"/>
2729 <project>
2730 <environment name="uv" load="arm_fir_example.uvprojx"/>
2731 </project>
2732 <attributes>
2733 <component Cclass="CMSIS" Cgroup="CORE"/>
2734 <component Cclass="CMSIS" Cgroup="DSP"/>
2735 <component Cclass="Device" Cgroup="Startup"/>
2736 <category>Getting Started</category>
2737 </attributes>
2738 </example>
2739
2740 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2741 <description>DSP_Lib Graphic Equalizer example</description>
2742 <board name="uVision Simulator" vendor="Keil"/>
2743 <project>
2744 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2745 </project>
2746 <attributes>
2747 <component Cclass="CMSIS" Cgroup="CORE"/>
2748 <component Cclass="CMSIS" Cgroup="DSP"/>
2749 <component Cclass="Device" Cgroup="Startup"/>
2750 <category>Getting Started</category>
2751 </attributes>
2752 </example>
2753
2754 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2755 <description>DSP_Lib Linear Interpolation example</description>
2756 <board name="uVision Simulator" vendor="Keil"/>
2757 <project>
2758 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2759 </project>
2760 <attributes>
2761 <component Cclass="CMSIS" Cgroup="CORE"/>
2762 <component Cclass="CMSIS" Cgroup="DSP"/>
2763 <component Cclass="Device" Cgroup="Startup"/>
2764 <category>Getting Started</category>
2765 </attributes>
2766 </example>
2767
2768 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2769 <description>DSP_Lib Matrix example</description>
2770 <board name="uVision Simulator" vendor="Keil"/>
2771 <project>
2772 <environment name="uv" load="arm_matrix_example.uvprojx"/>
2773 </project>
2774 <attributes>
2775 <component Cclass="CMSIS" Cgroup="CORE"/>
2776 <component Cclass="CMSIS" Cgroup="DSP"/>
2777 <component Cclass="Device" Cgroup="Startup"/>
2778 <category>Getting Started</category>
2779 </attributes>
2780 </example>
2781
2782 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2783 <description>DSP_Lib Signal Convergence example</description>
2784 <board name="uVision Simulator" vendor="Keil"/>
2785 <project>
2786 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2787 </project>
2788 <attributes>
2789 <component Cclass="CMSIS" Cgroup="CORE"/>
2790 <component Cclass="CMSIS" Cgroup="DSP"/>
2791 <component Cclass="Device" Cgroup="Startup"/>
2792 <category>Getting Started</category>
2793 </attributes>
2794 </example>
2795
2796 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2797 <description>DSP_Lib Sinus/Cosinus example</description>
2798 <board name="uVision Simulator" vendor="Keil"/>
2799 <project>
2800 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2801 </project>
2802 <attributes>
2803 <component Cclass="CMSIS" Cgroup="CORE"/>
2804 <component Cclass="CMSIS" Cgroup="DSP"/>
2805 <component Cclass="Device" Cgroup="Startup"/>
2806 <category>Getting Started</category>
2807 </attributes>
2808 </example>
2809
2810 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2811 <description>DSP_Lib Variance example</description>
2812 <board name="uVision Simulator" vendor="Keil"/>
2813 <project>
2814 <environment name="uv" load="arm_variance_example.uvprojx"/>
2815 </project>
2816 <attributes>
2817 <component Cclass="CMSIS" Cgroup="CORE"/>
2818 <component Cclass="CMSIS" Cgroup="DSP"/>
2819 <component Cclass="Device" Cgroup="Startup"/>
2820 <category>Getting Started</category>
2821 </attributes>
2822 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2823
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2824 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2825 <description>CMSIS-RTOS2 Blinky example</description>
2826 <board name="uVision Simulator" vendor="Keil"/>
2827 <project>
2828 <environment name="uv" load="Blinky.uvprojx"/>
2829 </project>
2830 <attributes>
2831 <component Cclass="CMSIS" Cgroup="CORE"/>
2832 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2833 <component Cclass="Device" Cgroup="Startup"/>
2834 <category>Getting Started</category>
2835 </attributes>
2836 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2837
Robert Rostohare13e4702016-11-07 15:23:44 +0100[diff] [blame]2838 <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
Matthias Hertel4b70ae42016-11-07 14:14:59 +0100[diff] [blame]2839 <description>CMSIS-RTOS2 mixed API v1 and v2</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2840 <board name="uVision Simulator" vendor="Keil"/>
2841 <project>
2842 <environment name="uv" load="Blinky.uvprojx"/>
2843 </project>
2844 <attributes>
2845 <component Cclass="CMSIS" Cgroup="CORE"/>
2846 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2847 <component Cclass="Device" Cgroup="Startup"/>
2848 <category>Getting Started</category>
2849 </attributes>
2850 </example>
2851
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]2852 <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]2853 <description>Bare-metal secure/non-secure example without RTOS</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2854 <board name="uVision Simulator" vendor="Keil"/>
2855 <project>
2856 <environment name="uv" load="NoRTOS.uvmpw"/>
2857 </project>
2858 <attributes>
2859 <component Cclass="CMSIS" Cgroup="CORE"/>
2860 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2861 <component Cclass="Device" Cgroup="Startup"/>
2862 <category>Getting Started</category>
2863 </attributes>
2864 </example>
2865
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]2866 <example name="TrustZone for ARMv8-M RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]2867 <description>Secure/non-secure RTOS example with thread context management</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2868 <board name="uVision Simulator" vendor="Keil"/>
2869 <project>
2870 <environment name="uv" load="RTOS.uvmpw"/>
2871 </project>
2872 <attributes>
2873 <component Cclass="CMSIS" Cgroup="CORE"/>
2874 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2875 <component Cclass="Device" Cgroup="Startup"/>
2876 <category>Getting Started</category>
2877 </attributes>
2878 </example>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2879
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]2880 <example name="TrustZone for ARMv8-M RTOS Security Tests" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2881 <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2882 <board name="uVision Simulator" vendor="Keil"/>
2883 <project>
2884 <environment name="uv" load="RTOS_Faults.uvmpw"/>
2885 </project>
2886 <attributes>
2887 <component Cclass="CMSIS" Cgroup="CORE"/>
2888 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2889 <component Cclass="Device" Cgroup="Startup"/>
2890 <category>Getting Started</category>
2891 </attributes>
2892 </example>
2893
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2894 </examples>
2895
2896</package>