Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 1 | option(SEMIHOSTING "Test trace using printf" ON) |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 2 | |
| 3 | if (PLATFORM STREQUAL "FVP") |
Christophe Favergeon | ec57420 | 2019-08-09 06:54:05 +0100 | [diff] [blame] | 4 | SET(PLATFORMFOLDER ${ROOT}/CMSIS/DSP/Platforms/FVP) |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 5 | SET(PLATFORMID "FVP") |
| 6 | list(APPEND CMAKE_MODULE_PATH ${ROOT}/CMSIS/DSP/Platforms/FVP) |
| 7 | endif() |
| 8 | |
GorgonMeducer | f8d8ec8 | 2019-11-05 14:09:36 +0000 | [diff] [blame^] | 9 | if (PLATFORM STREQUAL "MPS3") |
| 10 | SET(PLATFORMFOLDER ${ROOT}/CMSIS/DSP/Platforms/MPS3) |
| 11 | SET(PLATFORMID "MPS3") |
| 12 | list(APPEND CMAKE_MODULE_PATH ${ROOT}/CMSIS/DSP/Platforms/MPS3) |
| 13 | endif() |
| 14 | |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 15 | if (PLATFORM STREQUAL "SDSIM") |
Christophe Favergeon | ec57420 | 2019-08-09 06:54:05 +0100 | [diff] [blame] | 16 | SET(PLATFORMFOLDER ${SDSIMROOT}) |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 17 | SET(PLATFORMID "SDSIM") |
Christophe Favergeon | ec57420 | 2019-08-09 06:54:05 +0100 | [diff] [blame] | 18 | list(APPEND CMAKE_MODULE_PATH ${SDSIMROOT}) |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 19 | endif() |
| 20 | |
| 21 | SET(CORE ARMCM7) |
| 22 | |
| 23 | include(platform) |
| 24 | |
| 25 | function(set_platform_core) |
Christophe Favergeon | 26c2f68 | 2019-09-06 14:43:32 +0100 | [diff] [blame] | 26 | |
| 27 | if(EXPERIMENTAL) |
| 28 | experimental_set_platform_core() |
| 29 | SET(CORE ${CORE} PARENT_SCOPE) |
| 30 | endif() |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 31 | ################### |
| 32 | # |
| 33 | # Cortex cortex-m7 |
| 34 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 35 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]7([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 36 | SET(CORE ARMCM7 PARENT_SCOPE) |
| 37 | endif() |
| 38 | |
| 39 | ################### |
| 40 | # |
| 41 | # Cortex cortex-m4 |
| 42 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 43 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]4([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 44 | SET(CORE ARMCM4 PARENT_SCOPE) |
| 45 | endif() |
| 46 | |
| 47 | ################### |
| 48 | # |
| 49 | # Cortex cortex-m35p |
| 50 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 51 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]35([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 52 | SET(CORE ARMCM35P PARENT_SCOPE) |
| 53 | |
| 54 | endif() |
| 55 | |
| 56 | ################### |
| 57 | # |
| 58 | # Cortex cortex-m33 |
| 59 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 60 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]33([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 61 | SET(CORE ARMCM33 PARENT_SCOPE) |
| 62 | |
| 63 | endif() |
| 64 | |
| 65 | ################### |
| 66 | # |
| 67 | # Cortex cortex-m23 |
| 68 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 69 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]23([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 70 | SET(CORE ARMCM23 PARENT_SCOPE) |
| 71 | |
| 72 | endif() |
| 73 | |
| 74 | ################### |
| 75 | # |
| 76 | # Cortex cortex-m0+ |
| 77 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 78 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]0p([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 79 | SET(CORE ARMCM0plus PARENT_SCOPE) |
| 80 | |
| 81 | endif() |
| 82 | |
| 83 | ################### |
| 84 | # |
| 85 | # Cortex cortex-m0 |
| 86 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 87 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]0([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 88 | SET(CORE ARMCM0 PARENT_SCOPE) |
| 89 | |
| 90 | endif() |
| 91 | |
| 92 | ################### |
| 93 | # |
| 94 | # Cortex cortex-a5 |
| 95 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 96 | if (ARM_CPU MATCHES "^[cC]ortex-[aA]5([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 97 | SET(CORE ARMCA5 PARENT_SCOPE) |
| 98 | |
| 99 | endif() |
| 100 | |
| 101 | ################### |
| 102 | # |
| 103 | # Cortex cortex-a7 |
| 104 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 105 | if (ARM_CPU MATCHES "^[cC]ortex-[aA]7([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 106 | SET(CORE ARMCA7 PARENT_SCOPE) |
| 107 | |
| 108 | endif() |
| 109 | |
| 110 | ################### |
| 111 | # |
| 112 | # Cortex cortex-a9 |
| 113 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 114 | if (ARM_CPU MATCHES "^[cC]ortex-[aA]9([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 115 | SET(CORE ARMCA9 PARENT_SCOPE) |
| 116 | |
| 117 | endif() |
| 118 | |
| 119 | ################### |
| 120 | # |
| 121 | # Cortex cortex-a15 |
| 122 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 123 | if (ARM_CPU MATCHES "^[cC]ortex-[aA]15([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 124 | SET(CORE ARMCA15 PARENT_SCOPE) |
| 125 | endif() |
| 126 | endfunction() |
| 127 | |
| 128 | function(core_includes PROJECTNAME) |
Christophe Favergeon | ec57420 | 2019-08-09 06:54:05 +0100 | [diff] [blame] | 129 | target_include_directories(${PROJECTNAME} PRIVATE ${PLATFORMFOLDER}/${CORE}/Include) |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 130 | endfunction() |
| 131 | |
| 132 | function (configplatformForLib PROJECTNAME ROOT) |
| 133 | if (SEMIHOSTING) |
| 134 | target_compile_definitions(${PROJECTNAME} PRIVATE SEMIHOSTING) |
| 135 | endif() |
| 136 | if (CORTEXM) |
| 137 | compilerSpecificPlatformConfigLibForM(${PROJECTNAME} ${ROOT} ) |
| 138 | else() |
| 139 | compilerSpecificPlatformConfigLibForA(${PROJECTNAME} ${ROOT} ) |
| 140 | endif() |
| 141 | |
| 142 | endfunction() |
| 143 | |
| 144 | function (configplatformForApp PROJECTNAME ROOT CORE PLATFORMFOLDER) |
| 145 | if (SEMIHOSTING) |
| 146 | target_compile_definitions(${PROJECTNAME} PRIVATE SEMIHOSTING) |
| 147 | endif() |
| 148 | |
| 149 | configure_platform(${PROJECTNAME} ${ROOT} ${CORE} ${PLATFORMFOLDER}) |
| 150 | SET(PLATFORMID ${PLATFORMID} PARENT_SCOPE) |
| 151 | |
| 152 | if (CORTEXM) |
| 153 | compilerSpecificPlatformConfigAppForM(${PROJECTNAME} ${ROOT} ) |
| 154 | else() |
| 155 | compilerSpecificPlatformConfigAppForA(${PROJECTNAME} ${ROOT} ) |
| 156 | endif() |
| 157 | |
| 158 | endfunction() |