Christophe Favergeon | feb7393 | 2020-05-20 14:48:06 +0200 | [diff] [blame] | 1 | option(SEMIHOSTING "Test trace using printf" OFF) |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 2 | |
| 3 | if (PLATFORM STREQUAL "FVP") |
Christophe Favergeon | ec57420 | 2019-08-09 06:54:05 +0100 | [diff] [blame] | 4 | SET(PLATFORMFOLDER ${ROOT}/CMSIS/DSP/Platforms/FVP) |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 5 | SET(PLATFORMID "FVP") |
Christophe Favergeon | 3f7bbfb | 2020-05-06 07:10:29 +0200 | [diff] [blame] | 6 | SET(PLATFORMOPT "-DFVP") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 7 | list(APPEND CMAKE_MODULE_PATH ${ROOT}/CMSIS/DSP/Platforms/FVP) |
| 8 | endif() |
| 9 | |
GorgonMeducer | f8d8ec8 | 2019-11-05 14:09:36 +0000 | [diff] [blame] | 10 | if (PLATFORM STREQUAL "MPS3") |
| 11 | SET(PLATFORMFOLDER ${ROOT}/CMSIS/DSP/Platforms/MPS3) |
| 12 | SET(PLATFORMID "MPS3") |
| 13 | list(APPEND CMAKE_MODULE_PATH ${ROOT}/CMSIS/DSP/Platforms/MPS3) |
| 14 | endif() |
| 15 | |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 16 | if (PLATFORM STREQUAL "SDSIM") |
Christophe Favergeon | ec57420 | 2019-08-09 06:54:05 +0100 | [diff] [blame] | 17 | SET(PLATFORMFOLDER ${SDSIMROOT}) |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 18 | SET(PLATFORMID "SDSIM") |
Christophe Favergeon | ec57420 | 2019-08-09 06:54:05 +0100 | [diff] [blame] | 19 | list(APPEND CMAKE_MODULE_PATH ${SDSIMROOT}) |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 20 | endif() |
| 21 | |
Christophe Favergeon | 21bb620 | 2020-04-30 09:07:33 +0200 | [diff] [blame] | 22 | if (PLATFORM STREQUAL "IPSS") |
| 23 | SET(PLATFORMFOLDER ${ROOT}/CMSIS/DSP/Platforms/IPSS) |
| 24 | SET(PLATFORMID "IPSS") |
| 25 | list(APPEND CMAKE_MODULE_PATH ${ROOT}/CMSIS/DSP/Platforms/IPSS) |
| 26 | endif() |
| 27 | |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 28 | SET(CORE ARMCM7) |
| 29 | |
Christophe Favergeon | 512b148 | 2020-02-07 11:25:11 +0100 | [diff] [blame] | 30 | |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 31 | include(platform) |
| 32 | |
| 33 | function(set_platform_core) |
Christophe Favergeon | 26c2f68 | 2019-09-06 14:43:32 +0100 | [diff] [blame] | 34 | |
| 35 | if(EXPERIMENTAL) |
| 36 | experimental_set_platform_core() |
| 37 | SET(CORE ${CORE} PARENT_SCOPE) |
| 38 | endif() |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 39 | ################### |
| 40 | # |
| 41 | # Cortex cortex-m7 |
| 42 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 43 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]7([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 44 | SET(CORE ARMCM7 PARENT_SCOPE) |
| 45 | endif() |
| 46 | |
| 47 | ################### |
| 48 | # |
| 49 | # Cortex cortex-m4 |
| 50 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 51 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]4([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 52 | SET(CORE ARMCM4 PARENT_SCOPE) |
| 53 | endif() |
| 54 | |
| 55 | ################### |
| 56 | # |
| 57 | # Cortex cortex-m35p |
| 58 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 59 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]35([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 60 | SET(CORE ARMCM35P PARENT_SCOPE) |
| 61 | |
| 62 | endif() |
| 63 | |
| 64 | ################### |
| 65 | # |
| 66 | # Cortex cortex-m33 |
| 67 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 68 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]33([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 69 | SET(CORE ARMCM33 PARENT_SCOPE) |
| 70 | |
| 71 | endif() |
Christophe Favergeon | 512b148 | 2020-02-07 11:25:11 +0100 | [diff] [blame] | 72 | |
| 73 | ################### |
| 74 | # |
| 75 | # Cortex cortex-m55 |
| 76 | # |
| 77 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]55([^0-9].*)?$") |
| 78 | SET(CORE ARMv81MML PARENT_SCOPE) |
| 79 | endif() |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 80 | |
| 81 | ################### |
| 82 | # |
| 83 | # Cortex cortex-m23 |
| 84 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 85 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]23([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 86 | SET(CORE ARMCM23 PARENT_SCOPE) |
| 87 | |
| 88 | endif() |
| 89 | |
| 90 | ################### |
| 91 | # |
| 92 | # Cortex cortex-m0+ |
| 93 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 94 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]0p([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 95 | SET(CORE ARMCM0plus PARENT_SCOPE) |
| 96 | |
| 97 | endif() |
| 98 | |
| 99 | ################### |
| 100 | # |
| 101 | # Cortex cortex-m0 |
| 102 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 103 | if (ARM_CPU MATCHES "^[cC]ortex-[mM]0([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 104 | SET(CORE ARMCM0 PARENT_SCOPE) |
| 105 | |
| 106 | endif() |
Christophe Favergeon | c67252c | 2020-06-18 11:11:51 +0200 | [diff] [blame^] | 107 | |
| 108 | ################### |
| 109 | # |
| 110 | # Cortex cortex-a32 |
| 111 | # |
| 112 | if (ARM_CPU MATCHES "^[cC]ortex-[aA]32([^0-9].*)?$") |
| 113 | SET(CORE ARMCA32 PARENT_SCOPE) |
| 114 | |
| 115 | endif() |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 116 | |
| 117 | ################### |
| 118 | # |
| 119 | # Cortex cortex-a5 |
| 120 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 121 | if (ARM_CPU MATCHES "^[cC]ortex-[aA]5([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 122 | SET(CORE ARMCA5 PARENT_SCOPE) |
| 123 | |
| 124 | endif() |
| 125 | |
| 126 | ################### |
| 127 | # |
| 128 | # Cortex cortex-a7 |
| 129 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 130 | if (ARM_CPU MATCHES "^[cC]ortex-[aA]7([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 131 | SET(CORE ARMCA7 PARENT_SCOPE) |
| 132 | |
| 133 | endif() |
| 134 | |
| 135 | ################### |
| 136 | # |
| 137 | # Cortex cortex-a9 |
| 138 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 139 | if (ARM_CPU MATCHES "^[cC]ortex-[aA]9([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 140 | SET(CORE ARMCA9 PARENT_SCOPE) |
| 141 | |
| 142 | endif() |
| 143 | |
| 144 | ################### |
| 145 | # |
| 146 | # Cortex cortex-a15 |
| 147 | # |
Christophe Favergeon | c4c3480 | 2019-09-24 14:05:01 +0200 | [diff] [blame] | 148 | if (ARM_CPU MATCHES "^[cC]ortex-[aA]15([^0-9].*)?$") |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 149 | SET(CORE ARMCA15 PARENT_SCOPE) |
| 150 | endif() |
| 151 | endfunction() |
| 152 | |
| 153 | function(core_includes PROJECTNAME) |
Christophe Favergeon | ec57420 | 2019-08-09 06:54:05 +0100 | [diff] [blame] | 154 | target_include_directories(${PROJECTNAME} PRIVATE ${PLATFORMFOLDER}/${CORE}/Include) |
Christophe Favergeon | 3f7bbfb | 2020-05-06 07:10:29 +0200 | [diff] [blame] | 155 | target_compile_options(${PROJECTNAME} PRIVATE ${PLATFORMOPT}) |
Christophe Favergeon | 3b2a0ee | 2019-06-12 13:29:14 +0200 | [diff] [blame] | 156 | endfunction() |
| 157 | |
| 158 | function (configplatformForLib PROJECTNAME ROOT) |
| 159 | if (SEMIHOSTING) |
| 160 | target_compile_definitions(${PROJECTNAME} PRIVATE SEMIHOSTING) |
| 161 | endif() |
| 162 | if (CORTEXM) |
| 163 | compilerSpecificPlatformConfigLibForM(${PROJECTNAME} ${ROOT} ) |
| 164 | else() |
| 165 | compilerSpecificPlatformConfigLibForA(${PROJECTNAME} ${ROOT} ) |
| 166 | endif() |
| 167 | |
| 168 | endfunction() |
| 169 | |
| 170 | function (configplatformForApp PROJECTNAME ROOT CORE PLATFORMFOLDER) |
| 171 | if (SEMIHOSTING) |
| 172 | target_compile_definitions(${PROJECTNAME} PRIVATE SEMIHOSTING) |
| 173 | endif() |
| 174 | |
| 175 | configure_platform(${PROJECTNAME} ${ROOT} ${CORE} ${PLATFORMFOLDER}) |
| 176 | SET(PLATFORMID ${PLATFORMID} PARENT_SCOPE) |
| 177 | |
| 178 | if (CORTEXM) |
| 179 | compilerSpecificPlatformConfigAppForM(${PROJECTNAME} ${ROOT} ) |
| 180 | else() |
| 181 | compilerSpecificPlatformConfigAppForA(${PROJECTNAME} ${ROOT} ) |
| 182 | endif() |
| 183 | |
| 184 | endfunction() |