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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / c4e9f46c31e021eb1f622a56fc9ba99c60aa9202 / . / ARM.CMSIS.pdsc
blob: e03b326eb15d31500968b8bb8984821498ce245a [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
Joachim Krecha33860c2016-11-09 22:25:55 +0100[diff] [blame]7 <!-- <license>license.txt</license> -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Jonatan Antoni44c39182017-10-12 16:40:01 +0200[diff] [blame]11 <release version="5.1.2-dev3">
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]12 Active development...
Jonatan Antoni44c39182017-10-12 16:40:01 +0200[diff] [blame]13 CMSIS-Core(A): 1.0.1 (see revision history for details)
14 - Added compiler_iccarm.h.
15 - Added additional access functions for physical timer.
Jonatan Antonic4e9f462017-10-19 16:51:44 +0200[diff] [blame^]16 Devices:
17 - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
Jonatan Antoni44c39182017-10-12 16:40:01 +0200[diff] [blame]18 </release>
19 <release version="5.1.2-dev2">
Jonatan Antonif49445f2017-09-14 14:17:57 +0200[diff] [blame]20 CMSIS-Core(M): 5.0.3 (see revision history for details)
21 - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
Vladimir Umek5e4b3922017-09-20 11:54:19 +0200[diff] [blame]22 CMSIS-RTOS2:
23 - RTX 5.2.2 (see revision history for details)
Jonatan Antonif49445f2017-09-14 14:17:57 +0200[diff] [blame]24 </release>
Jonatan Antoni5bfb1e62017-09-19 15:46:40 +0200[diff] [blame]25 <release version="5.1.2-dev1">
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]26 Devices:
27 - added GCC startup and linker script for Cortex-A9
Jonatan Antonif40ab952017-08-09 14:57:14 +0200[diff] [blame]28 CMSIS-Core(M): 5.0.3 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]29 - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
Jonatan Antonif49445f2017-09-14 14:17:57 +0200[diff] [blame]30 - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
Jonatan Antoni9568ea52017-09-07 13:50:59 +0200[diff] [blame]31 CMSIS-Core(A): 1.0.1 (see revision history for details)
Robert Rostohar3bb9b772017-09-13 15:24:14 +0200[diff] [blame]32 CMSIS-Driver:
33 - CAN Driver API V1.2.0
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]34 CMSIS-RTOS:
35 - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata
36 CMSIS-RTOS2:
37 - RTX 5.2.1 (see revision history for details)
38 - Message Queue Example
39 - Memory Pool Example
Jonatan Antoni3694b162017-09-20 13:21:51 +0200[diff] [blame]40 </release>
Jonatan Antoni5bfb1e62017-09-19 15:46:40 +0200[diff] [blame]41 <release version="5.1.1" date="2017-09-19">
42 CMSIS-RTOS2:
43 - RTX 5.2.1 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]44 </release>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]45 <release version="5.1.0" date="2017-08-04">
46 CMSIS-Core(M): 5.0.2 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]47 - Changed Version Control macros to be core agnostic.
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]48 - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
49 CMSIS-Core(A): 1.0.0 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]50 - Initial release
51 - IRQ Controller API 1.0.0
52 CMSIS-Driver: 2.05 (see revision history for details)
53 - All typedefs related to status have been made volatile.
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]54 CMSIS-RTOS2:
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]55 - API 2.1.1 (see revision history for details)
56 - RTX 5.2.0 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]57 - OS Tick API 1.0.0
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]58 CMSIS-DSP: 1.5.2 (see revision history for details)
59 - Fixed GNU Compiler specific diagnostics.
Jonatan Antoni31e48e62017-08-04 11:26:18 +0200[diff] [blame]60 CMSIS-PACK: 1.5.0 (see revision history for details)
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]61 - added System Description File (*.SDF) Format
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]62 CMSIS-Zone: 0.0.1 (Preview)
63 - Initial specification draft
64 </release>
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]65 <release version="5.0.1" date="2017-02-03">
66 Package Description:
67 - added taxonomy for Cclass RTOS
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]68 CMSIS-RTOS2:
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]69 - API 2.1 (see revision history for details)
70 - RTX 5.1.0 (see revision history for details)
71 CMSIS-Core: 5.0.1 (see revision history for details)
72 - Added __PACKED_STRUCT macro
73 - Added uVisior support
74 - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
75 - Updated template for secure main function (main_s.c)
76 - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
77 CMSIS-DSP: 1.5.1 (see revision history for details)
78 - added ARMv8M DSP libraries.
79 CMSIS-PACK:1.4.9 (see revision history for details)
80 - added Pack Index File specification and schema file
Martin Güntherd1060532016-11-15 09:43:43 +0100[diff] [blame]81 </release>
Joachim Krechc45bb4a2016-11-11 11:01:22 +0100[diff] [blame]82 <release version="5.0.0" date="2016-11-11">
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]83 Changed open source license to Apache 2.0
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]84 CMSIS_Core:
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]85 - Added support for Cortex-M23 and Cortex-M33.
86 - Added ARMv8-M device configurations for mainline and baseline.
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]87 - Added CMSE support and thread context management for TrustZone for ARMv8-M
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]88 - Added cmsis_compiler.h to unify compiler behaviour.
89 - Updated function SCB_EnableICache (for Cortex-M7).
90 - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
91 CMSIS-RTOS:
92 - bug fix in RTX 4.82 (see revision history for details)
93 CMSIS-RTOS2:
94 - new API including compatibility layer to CMSIS-RTOS
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]95 - reference implementation based on RTX5
96 - supports all Cortex-M variants including TrustZone for ARMv8-M
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]97 CMSIS-SVD:
98 - reworked SVD format documentation
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]99 - removed SVD file database documentation as SVD files are distributed in packs
100 - updated SVDConv for Win32 and Linux
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]101 CMSIS-DSP:
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]102 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
103 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]104 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]105 <release version="4.5.0" date="2015-10-28">
106 - CMSIS-Core 4.30.0 (see revision history for details)
107 - CMSIS-DAP 1.1.0 (unchanged)
108 - CMSIS-Driver 2.04.0 (see revision history for details)
109 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
110 - CMSIS-PACK 1.4.1 (see revision history for details)
111 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
112 - CMSIS-SVD 1.3.1 (see revision history for details)
113 </release>
114 <release version="4.4.0" date="2015-09-11">
115 - CMSIS-Core 4.20 (see revision history for details)
116 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
117 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
118 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
119 - CMSIS-RTOS
120 -- API 1.02 (unchanged)
121 -- RTX 4.79 (see revision history for details)
122 - CMSIS-SVD 1.3.0 (see revision history for details)
123 - CMSIS-DAP 1.1.0 (extended with SWO support)
124 </release>
125 <release version="4.3.0" date="2015-03-20">
126 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
127 - CMSIS-DSP 1.4.5 (see revision history for details)
128 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
129 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
130 - CMSIS-RTOS
131 -- API 1.02 (unchanged)
132 -- RTX 4.78 (see revision history for details)
133 - CMSIS-SVD 1.2 (unchanged)
134 </release>
135 <release version="4.2.0" date="2014-09-24">
136 Adding Cortex-M7 support
137 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
138 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
139 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
140 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
141 - CMSIS-RTOS RTX 4.75 (see revision history for details)
142 </release>
143 <release version="4.1.1" date="2014-06-30">
144 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
145 </release>
146 <release version="4.1.0" date="2014-06-12">
147 - CMSIS-Driver 2.02 (incompatible update)
148 - CMSIS-Pack 1.3 (see revision history for details)
149 - CMSIS-DSP 1.4.2 (unchanged)
150 - CMSIS-Core 3.30 (unchanged)
151 - CMSIS-RTOS RTX 4.74 (unchanged)
152 - CMSIS-RTOS API 1.02 (unchanged)
153 - CMSIS-SVD 1.10 (unchanged)
154 PACK:
155 - removed G++ specific files from PACK
156 - added Component Startup variant "C Startup"
157 - added Pack Checking Utility
158 - updated conditions to reflect tool-chain dependency
159 - added Taxonomy for Graphics
160 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
161 </release>
162 <release version="4.0.0">
163 - CMSIS-Driver 2.00 Preliminary (incompatible update)
164 - CMSIS-Pack 1.1 Preliminary
165 - CMSIS-DSP 1.4.2 (see revision history for details)
166 - CMSIS-Core 3.30 (see revision history for details)
167 - CMSIS-RTOS RTX 4.74 (see revision history for details)
168 - CMSIS-RTOS API 1.02 (unchanged)
169 - CMSIS-SVD 1.10 (unchanged)
170 </release>
171 <release version="3.20.4">
172 - CMSIS-RTOS 4.74 (see revision history for details)
173 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
174 </release>
175 <release version="3.20.3">
176 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
177 - CMSIS-RTOS 4.73 (see revision history for details)
178 </release>
179 <release version="3.20.2">
180 - CMSIS-Pack documentation has been added
181 - CMSIS-Drivers header and documentation have been added to PACK
182 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
183 </release>
184 <release version="3.20.1">
185 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
186 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
187 </release>
188 <release version="3.20.0">
189 The software portions that are deployed in the application program are now under a BSD license which allows usage
190 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
191 The individual components have been update as listed below:
192 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
193 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
194 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
195 - CMSIS-SVD is unchanged.
196 </release>
197 </releases>
198
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]199 <taxonomy>
200 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
201 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
202 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
203 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
204 <description Cclass="File System">File Drive Support and File System</description>
205 <description Cclass="Graphics">Graphical User Interface</description>
206 <description Cclass="Network">Network Stack using Internet Protocols</description>
207 <description Cclass="USB">Universal Serial Bus Stack</description>
Joachim Krech2384b8a2017-02-02 15:58:30 +0100[diff] [blame]208 <description Cclass="Compiler">Compiler Software Extensions</description>
Joachim Krech62838c82017-02-02 15:54:57 +0100[diff] [blame]209 <description Cclass="RTOS">Real-time Operating System</description>
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]210 </taxonomy>
211
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]212 <devices>
213 <!-- ****************************** Cortex-M0 ****************************** -->
214 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]215 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]216 <description>
217The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
218- simple, easy-to-use programmers model
219- highly efficient ultra-low power operation
220- excellent code density
221- deterministic, high-performance interrupt handling
222- upward compatibility with the rest of the Cortex-M processor family.
223 </description>
224 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
225 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
226 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
227 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
228
229 <device Dname="ARMCM0">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]230 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]231 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
232 </device>
233 </family>
234
235 <!-- ****************************** Cortex-M0P ****************************** -->
236 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]237 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]238 <description>
239The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
240- simple, easy-to-use programmers model
241- highly efficient ultra-low power operation
242- excellent code density
243- deterministic, high-performance interrupt handling
244- upward compatibility with the rest of the Cortex-M processor family.
245 </description>
246 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
247 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
248 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
249 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
250
251 <device Dname="ARMCM0P">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]252 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]253 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
254 </device>
Jonatan Antonic4e9f462017-10-19 16:51:44 +0200[diff] [blame^]255
256 <device Dname="ARMCM0P_MPU">
257 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
258 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
259 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]260 </family>
261
262 <!-- ****************************** Cortex-M3 ****************************** -->
263 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]264 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]265 <description>
266The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
267- simple, easy-to-use programmers model
268- highly efficient ultra-low power operation
269- excellent code density
270- deterministic, high-performance interrupt handling
271- upward compatibility with the rest of the Cortex-M processor family.
272 </description>
273 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
274 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
275 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
276 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
277
278 <device Dname="ARMCM3">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]279 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]280 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
281 </device>
282 </family>
283
284 <!-- ****************************** Cortex-M4 ****************************** -->
285 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]286 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]287 <description>
288The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
289- simple, easy-to-use programmers model
290- highly efficient ultra-low power operation
291- excellent code density
292- deterministic, high-performance interrupt handling
293- upward compatibility with the rest of the Cortex-M processor family.
294 </description>
295 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
296 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
297 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
298 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
299
300 <device Dname="ARMCM4">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]301 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]302 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
303 </device>
304
305 <device Dname="ARMCM4_FP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]306 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]307 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
308 </device>
309 </family>
310
311 <!-- ****************************** Cortex-M7 ****************************** -->
312 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]313 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]314 <description>
Martin Güntheraa246272016-11-15 16:01:05 +0100[diff] [blame]315The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]316- simple, easy-to-use programmers model
317- highly efficient ultra-low power operation
318- excellent code density
319- deterministic, high-performance interrupt handling
320- upward compatibility with the rest of the Cortex-M processor family.
321 </description>
322 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
323 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
324 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
325 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
326
327 <device Dname="ARMCM7">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]328 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]329 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
330 </device>
331
332 <device Dname="ARMCM7_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]333 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]334 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
335 </device>
336
337 <device Dname="ARMCM7_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]338 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]339 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
340 </device>
341 </family>
342
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]343 <!-- ****************************** Cortex-M23 ********************** -->
344 <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
345 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
346 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]347The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]348It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]349Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]350 </description>
351 <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]352 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
353 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]354 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]355 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]356 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
357
358 <device Dname="ARMCM23">
359 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
360 <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
361 </device>
362
363 <device Dname="ARMCM23_TZ">
364 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
365 <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
366 </device>
367 </family>
368
369 <!-- ****************************** Cortex-M33 ****************************** -->
370 <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
371 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
372 <description>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]373The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]374class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]375 </description>
376 <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]377 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
378 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]379 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]380 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
381 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]382
383 <device Dname="ARMCM33">
384 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]385 <description>
386 no DSP Instructions, no Floating Point Unit, no TrustZone
387 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]388 <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
389 </device>
390
391 <device Dname="ARMCM33_TZ">
392 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]393 <description>
394 no DSP Instructions, no Floating Point Unit, TrustZone
395 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]396 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
397 </device>
398
399 <device Dname="ARMCM33_DSP_FP">
400 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]401 <description>
402 DSP Instructions, Single Precision Floating Point Unit, no TrustZone
403 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]404 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
405 </device>
406
407 <device Dname="ARMCM33_DSP_FP_TZ">
408 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]409 <description>
410 DSP Instructions, Single Precision Floating Point Unit, TrustZone
411 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]412 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
413 </device>
414 </family>
415
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]416 <!-- ****************************** ARMSC000 ****************************** -->
417 <family Dfamily="ARM SC000" Dvendor="ARM:82">
418 <description>
419The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
420- simple, easy-to-use programmers model
421- highly efficient ultra-low power operation
422- excellent code density
423- deterministic, high-performance interrupt handling
424 </description>
425 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
426 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
427 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
428 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
429
430 <device Dname="ARMSC000">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]431 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]432 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
433 </device>
434 </family>
435
436 <!-- ****************************** ARMSC300 ****************************** -->
437 <family Dfamily="ARM SC300" Dvendor="ARM:82">
438 <description>
439The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
440- simple, easy-to-use programmers model
441- highly efficient ultra-low power operation
442- excellent code density
443- deterministic, high-performance interrupt handling
444 </description>
445 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
446 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
447 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
448 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
449
450 <device Dname="ARMSC300">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]451 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]452 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
453 </device>
454 </family>
455
456 <!-- ****************************** ARMv8-M Baseline ********************** -->
457 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
458 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
459 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]460ARMv8-M Baseline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]461 </description>
462 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]463 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
464 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]465 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]466 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]467 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
468
469 <device Dname="ARMv8MBL">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]470 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]471 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
472 </device>
473 </family>
474
475 <!-- ****************************** ARMv8-M Mainline ****************************** -->
476 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
477 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
478 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]479ARMv8-M Mainline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]480 </description>
481 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]482 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
483 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]484 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]485 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]486 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
487
488 <device Dname="ARMv8MML">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]489 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]490 <description>
491 no DSP Instructions, no Floating Point Unit, TrustZone
492 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]493 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
494 </device>
495
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]496 <device Dname="ARMv8MML_DSP">
497 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]498 <description>
499 DSP Instructions, no Floating Point Unit, TrustZone
500 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]501 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]502 </device>
503
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]504 <device Dname="ARMv8MML_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]505 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]506 <description>
507 no DSP Instructions, Single Precision Floating Point Unit, TrustZone
508 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]509 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
510 </device>
511
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]512 <device Dname="ARMv8MML_DSP_SP">
513 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]514 <description>
515 DSP Instructions, Single Precision Floating Point Unit, TrustZone
516 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]517 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]518 </device>
519
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]520 <device Dname="ARMv8MML_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]521 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]522 <description>
523 no DSP Instructions, Double Precision Floating Point Unit, TrustZone
524 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]525 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
526 </device>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]527
528 <device Dname="ARMv8MML_DSP_DP">
529 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]530 <description>
531 DSP Instructions, Double Precision Floating Point Unit, TrustZone
532 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]533 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]534 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]535 </family>
536
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]537 <!-- ****************************** Cortex-A5 ****************************** -->
538 <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
539 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
540 <description>
541The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
542virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
543ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
544 </description>
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]545
546 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
547 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
548
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]549 <device Dname="ARMCA5">
550 <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
551 <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
552 </device>
553 </family>
554
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]555 <!-- ****************************** Cortex-A7 ****************************** -->
556 <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
557 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
558 <description>
559The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
560The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
561an optional integrated GIC, and an optional L2 cache controller.
562 </description>
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]563
564 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
565 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
566
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]567 <device Dname="ARMCA7">
568 <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
569 <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
570 </device>
571 </family>
572
573 <!-- ****************************** Cortex-A9 ****************************** -->
574 <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]575 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]576 <description>
577The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
578The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
579and 8-bit Java bytecodes in Jazelle state.
580 </description>
581
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]582 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
583 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
584
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]585 <device Dname="ARMCA9">
586 <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
587 <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
588 </device>
589 </family>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]590 </devices>
591
592
593 <apis>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]594 <!-- CMSIS Device API -->
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]595 <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
596 <description>Device interrupt controller interface</description>
597 <files>
598 <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
599 </files>
600 </api>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]601 <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
Robert Rostoharaeb6dd52017-06-09 14:17:43 +0200[diff] [blame]602 <description>RTOS Kernel system tick timer interface</description>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]603 <files>
604 <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
605 </files>
606 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]607 <!-- CMSIS-RTOS API -->
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]608 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]609 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
610 <files>
611 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
612 </files>
613 </api>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]614 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.1" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]615 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
616 <files>
617 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
Robert Rostohar0a364052017-01-25 12:35:54 +0100[diff] [blame]618 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]619 </files>
620 </api>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]621 <!-- CMSIS Driver API -->
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]622 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]623 <description>USART Driver API for Cortex-M</description>
624 <files>
625 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
626 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
627 </files>
628 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]629 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]630 <description>SPI Driver API for Cortex-M</description>
631 <files>
632 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
633 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
634 </files>
635 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]636 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]637 <description>SAI Driver API for Cortex-M</description>
638 <files>
639 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
640 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
641 </files>
642 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]643 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]644 <description>I2C Driver API for Cortex-M</description>
645 <files>
646 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
647 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
648 </files>
649 </api>
Robert Rostohar3bb9b772017-09-13 15:24:14 +0200[diff] [blame]650 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]651 <description>CAN Driver API for Cortex-M</description>
652 <files>
653 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
654 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
655 </files>
656 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]657 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]658 <description>Flash Driver API for Cortex-M</description>
659 <files>
660 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
661 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
662 </files>
663 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]664 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]665 <description>MCI Driver API for Cortex-M</description>
666 <files>
667 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
668 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
669 </files>
670 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]671 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]672 <description>NAND Flash Driver API for Cortex-M</description>
673 <files>
674 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
675 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
676 </files>
677 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]678 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]679 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
680 <files>
681 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
682 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
683 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
684 </files>
685 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]686 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]687 <description>Ethernet MAC Driver API for Cortex-M</description>
688 <files>
689 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
690 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
691 </files>
692 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]693 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]694 <description>Ethernet PHY Driver API for Cortex-M</description>
695 <files>
696 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
697 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
698 </files>
699 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]700 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]701 <description>USB Device Driver API for Cortex-M</description>
702 <files>
703 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
704 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
705 </files>
706 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]707 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]708 <description>USB Host Driver API for Cortex-M</description>
709 <files>
710 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
711 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
712 </files>
713 </api>
714 </apis>
715
716 <!-- conditions are dependency rules that can apply to a component or an individual file -->
717 <conditions>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]718 <!-- compiler -->
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]719 <condition id="ARMCC6">
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]720 <accept Tcompiler="ARMCC" Toptions="AC6"/>
721 <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]722 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]723 <condition id="ARMCC5">
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]724 <require Tcompiler="ARMCC" Toptions="AC5"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]725 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]726 <condition id="ARMCC">
727 <require Tcompiler="ARMCC"/>
728 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]729 <condition id="GCC">
730 <require Tcompiler="GCC"/>
731 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]732 <condition id="IAR">
733 <require Tcompiler="IAR"/>
734 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]735 <condition id="ARMCC GCC">
736 <accept Tcompiler="ARMCC"/>
737 <accept Tcompiler="GCC"/>
738 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]739 <condition id="ARMCC GCC IAR">
740 <accept Tcompiler="ARMCC"/>
741 <accept Tcompiler="GCC"/>
742 <accept Tcompiler="IAR"/>
743 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]744
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]745 <!-- ARM architecture -->
746 <condition id="ARMv6-M Device">
747 <description>ARMv6-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]748 <accept Dcore="Cortex-M0"/>
749 <accept Dcore="Cortex-M0+"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]750 <accept Dcore="SC000"/>
751 </condition>
752 <condition id="ARMv7-M Device">
753 <description>ARMv7-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]754 <accept Dcore="Cortex-M3"/>
755 <accept Dcore="Cortex-M4"/>
756 <accept Dcore="Cortex-M7"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]757 <accept Dcore="SC300"/>
758 </condition>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]759 <condition id="ARMv8-M Device">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]760 <description>ARMv8-M architecture based device</description>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]761 <accept Dcore="ARMV8MBL"/>
762 <accept Dcore="ARMV8MML"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]763 <accept Dcore="Cortex-M23"/>
764 <accept Dcore="Cortex-M33"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]765 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]766 <condition id="ARMv8-M TZ Device">
767 <description>ARMv8-M architecture based device with TrustZone</description>
768 <require condition="ARMv8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]769 <require Dtz="TZ"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]770 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]771 <condition id="ARMv6_7-M Device">
772 <description>ARMv6_7-M architecture based device</description>
773 <accept condition="ARMv6-M Device"/>
774 <accept condition="ARMv7-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]775 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]776 <condition id="ARMv6_7_8-M Device">
777 <description>ARMv6_7_8-M architecture based device</description>
778 <accept condition="ARMv6-M Device"/>
779 <accept condition="ARMv7-M Device"/>
780 <accept condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]781 </condition>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]782 <condition id="ARMv7-A Device">
783 <description>ARMv7-A architecture based device</description>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]784 <accept Dcore="Cortex-A5"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]785 <accept Dcore="Cortex-A7"/>
786 <accept Dcore="Cortex-A9"/>
787 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]788
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]789 <!-- ARM core -->
790 <condition id="CM0">
791 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
792 <accept Dcore="Cortex-M0"/>
793 <accept Dcore="Cortex-M0+"/>
794 <accept Dcore="SC000"/>
795 </condition>
796 <condition id="CM3">
797 <description>Cortex-M3 or SC300 processor based device</description>
798 <accept Dcore="Cortex-M3"/>
799 <accept Dcore="SC300"/>
800 </condition>
801 <condition id="CM4">
802 <description>Cortex-M4 processor based device</description>
803 <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
804 </condition>
805 <condition id="CM4_FP">
806 <description>Cortex-M4 processor based device using Floating Point Unit</description>
807 <require Dcore="Cortex-M4" Dfpu="FPU"/>
808 </condition>
809 <condition id="CM7">
810 <description>Cortex-M7 processor based device</description>
811 <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
812 </condition>
813 <condition id="CM7_FP">
814 <description>Cortex-M7 processor based device using Floating Point Unit</description>
815 <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
816 <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
817 </condition>
818 <condition id="CM7_SP">
819 <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
820 <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
821 </condition>
822 <condition id="CM7_DP">
823 <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
824 <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
825 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]826 <condition id="CM23">
827 <description>Cortex-M23 processor based device</description>
828 <require Dcore="Cortex-M23"/>
829 </condition>
830 <condition id="CM33">
831 <description>Cortex-M33 processor based device</description>
832 <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
833 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]834 <condition id="CM33_FP">
835 <description>Cortex-M33 processor based device using Floating Point Unit</description>
836 <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
837 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]838 <condition id="ARMv8MBL">
839 <description>ARMv8-M Baseline processor based device</description>
840 <require Dcore="ARMV8MBL"/>
841 </condition>
842 <condition id="ARMv8MML">
843 <description>ARMv8-M Mainline processor based device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]844 <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
845 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]846 <condition id="ARMv8MML_FP">
847 <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
848 <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
849 <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]850 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]851
852 <condition id="CM33_NODSP_NOFPU">
853 <description>CM33, no DSP, no FPU</description>
854 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
855 </condition>
856 <condition id="CM33_DSP_NOFPU">
857 <description>CM33, DSP, no FPU</description>
858 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
859 </condition>
860 <condition id="CM33_NODSP_SP">
861 <description>CM33, no DSP, SP FPU</description>
862 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
863 </condition>
864 <condition id="CM33_DSP_SP">
865 <description>CM33, DSP, SP FPU</description>
866 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
867 </condition>
868
869 <condition id="ARMv8MML_NODSP_NOFPU">
870 <description>ARMv8MML, no DSP, no FPU</description>
871 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
872 </condition>
873 <condition id="ARMv8MML_DSP_NOFPU">
874 <description>ARMv8MML, DSP, no FPU</description>
875 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
876 </condition>
877 <condition id="ARMv8MML_NODSP_SP">
878 <description>ARMv8MML, no DSP, SP FPU</description>
879 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]880 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]881 <condition id="ARMv8MML_DSP_SP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]882 <description>ARMv8MML, DSP, SP FPU</description>
883 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]884 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]885
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]886 <condition id="CA5_CA9">
887 <description>Cortex-A5 or Cortex-A9 processor based device</description>
888 <accept Dcore="Cortex-A5"/>
889 <accept Dcore="Cortex-A9"/>
890 </condition>
891
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]892 <condition id="CA7">
893 <description>Cortex-A7 processor based device</description>
894 <accept Dcore="Cortex-A7"/>
895 </condition>
896
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]897 <!-- ARMCC compiler -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]898 <condition id="CA_ARMCC5">
899 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]900 <require condition="ARMv7-A Device"/>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]901 <require condition="ARMCC5"/>
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]902 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]903 <condition id="CA_ARMCC6">
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]904 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
905 <require condition="ARMv7-A Device"/>
906 <require condition="ARMCC6"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]907 </condition>
908
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]909 <condition id="CM0_ARMCC">
910 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
911 <require condition="CM0"/>
912 <require Tcompiler="ARMCC"/>
913 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]914 <condition id="CM0_LE_ARMCC">
915 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]916 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]917 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]918 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]919 <condition id="CM0_BE_ARMCC">
920 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]921 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]922 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]923 </condition>
924
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]925 <condition id="CM3_ARMCC">
926 <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
927 <require condition="CM3"/>
928 <require Tcompiler="ARMCC"/>
929 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]930 <condition id="CM3_LE_ARMCC">
931 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]932 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]933 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]934 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]935 <condition id="CM3_BE_ARMCC">
936 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]937 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]938 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]939 </condition>
940
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]941 <condition id="CM4_ARMCC">
942 <description>Cortex-M4 processor based device for the ARM Compiler</description>
943 <require condition="CM4"/>
944 <require Tcompiler="ARMCC"/>
945 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]946 <condition id="CM4_LE_ARMCC">
947 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]948 <require condition="CM4_ARMCC"/>
949 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]950 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]951 <condition id="CM4_BE_ARMCC">
952 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]953 <require condition="CM4_ARMCC"/>
954 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]955 </condition>
956
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]957 <condition id="CM4_FP_ARMCC">
958 <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
959 <require condition="CM4_FP"/>
960 <require Tcompiler="ARMCC"/>
961 </condition>
962 <condition id="CM4_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]963 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]964 <require condition="CM4_FP_ARMCC"/>
965 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]966 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]967 <condition id="CM4_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]968 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]969 <require condition="CM4_FP_ARMCC"/>
970 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]971 </condition>
972
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]973 <condition id="CM7_ARMCC">
974 <description>Cortex-M7 processor based device for the ARM Compiler</description>
975 <require condition="CM7"/>
976 <require Tcompiler="ARMCC"/>
977 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]978 <condition id="CM7_LE_ARMCC">
979 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]980 <require condition="CM7_ARMCC"/>
981 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]982 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]983 <condition id="CM7_BE_ARMCC">
984 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]985 <require condition="CM7_ARMCC"/>
986 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]987 </condition>
988
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]989 <condition id="CM7_FP_ARMCC">
990 <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
991 <require condition="CM7_FP"/>
992 <require Tcompiler="ARMCC"/>
993 </condition>
994 <condition id="CM7_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]995 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]996 <require condition="CM7_FP_ARMCC"/>
997 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]998 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]999 <condition id="CM7_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1000 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1001 <require condition="CM7_FP_ARMCC"/>
1002 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1003 </condition>
1004
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1005 <condition id="CM7_SP_ARMCC">
1006 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1007 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1008 <require Tcompiler="ARMCC"/>
1009 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1010 <condition id="CM7_SP_LE_ARMCC">
1011 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1012 <require condition="CM7_SP_ARMCC"/>
1013 <require Dendian="Little-endian"/>
1014 </condition>
1015 <condition id="CM7_SP_BE_ARMCC">
1016 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1017 <require condition="CM7_SP_ARMCC"/>
1018 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1019 </condition>
1020
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1021 <condition id="CM7_DP_ARMCC">
1022 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1023 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1024 <require Tcompiler="ARMCC"/>
1025 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1026 <condition id="CM7_DP_LE_ARMCC">
1027 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1028 <require condition="CM7_DP_ARMCC"/>
1029 <require Dendian="Little-endian"/>
1030 </condition>
1031 <condition id="CM7_DP_BE_ARMCC">
1032 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1033 <require condition="CM7_DP_ARMCC"/>
1034 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1035 </condition>
1036
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1037 <condition id="CM23_ARMCC">
1038 <description>Cortex-M23 processor based device for the ARM Compiler</description>
1039 <require condition="CM23"/>
1040 <require Tcompiler="ARMCC"/>
1041 </condition>
1042 <condition id="CM23_LE_ARMCC">
1043 <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1044 <require condition="CM23_ARMCC"/>
1045 <require Dendian="Little-endian"/>
1046 </condition>
1047 <condition id="CM23_BE_ARMCC">
1048 <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1049 <require condition="CM23_ARMCC"/>
1050 <require Dendian="Big-endian"/>
1051 </condition>
1052
1053 <condition id="CM33_ARMCC">
1054 <description>Cortex-M33 processor based device for the ARM Compiler</description>
1055 <require condition="CM33"/>
1056 <require Tcompiler="ARMCC"/>
1057 </condition>
1058 <condition id="CM33_LE_ARMCC">
1059 <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1060 <require condition="CM33_ARMCC"/>
1061 <require Dendian="Little-endian"/>
1062 </condition>
1063 <condition id="CM33_BE_ARMCC">
1064 <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1065 <require condition="CM33_ARMCC"/>
1066 <require Dendian="Big-endian"/>
1067 </condition>
1068
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1069 <condition id="CM33_FP_ARMCC">
1070 <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1071 <require condition="CM33_FP"/>
1072 <require Tcompiler="ARMCC"/>
1073 </condition>
1074 <condition id="CM33_FP_LE_ARMCC">
1075 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1076 <require condition="CM33_FP_ARMCC"/>
1077 <require Dendian="Little-endian"/>
1078 </condition>
1079 <condition id="CM33_FP_BE_ARMCC">
1080 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1081 <require condition="CM33_FP_ARMCC"/>
1082 <require Dendian="Big-endian"/>
1083 </condition>
1084
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1085 <condition id="CM33_NODSP_NOFPU_ARMCC">
1086 <description>CM33, no DSP, no FPU, ARM Compiler</description>
1087 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1088 <require Tcompiler="ARMCC"/>
1089 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1090 <condition id="CM33_DSP_NOFPU_ARMCC">
1091 <description>CM33, DSP, no FPU, ARM Compiler</description>
1092 <require condition="CM33_DSP_NOFPU"/>
1093 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1094 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1095 <condition id="CM33_NODSP_SP_ARMCC">
1096 <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1097 <require condition="CM33_NODSP_SP"/>
1098 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1099 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1100 <condition id="CM33_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1101 <description>CM33, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1102 <require condition="CM33_DSP_SP"/>
1103 <require Tcompiler="ARMCC"/>
1104 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1105 <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1106 <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1107 <require condition="CM33_NODSP_NOFPU_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1108 <require Dendian="Little-endian"/>
1109 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1110 <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1111 <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1112 <require condition="CM33_DSP_NOFPU_ARMCC"/>
1113 <require Dendian="Little-endian"/>
1114 </condition>
1115 <condition id="CM33_NODSP_SP_LE_ARMCC">
1116 <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1117 <require condition="CM33_NODSP_SP_ARMCC"/>
1118 <require Dendian="Little-endian"/>
1119 </condition>
1120 <condition id="CM33_DSP_SP_LE_ARMCC">
1121 <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1122 <require condition="CM33_DSP_SP_ARMCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1123 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1124 </condition>
1125
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1126 <condition id="ARMv8MBL_ARMCC">
1127 <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1128 <require condition="ARMv8MBL"/>
1129 <require Tcompiler="ARMCC"/>
1130 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1131 <condition id="ARMv8MBL_LE_ARMCC">
1132 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1133 <require condition="ARMv8MBL_ARMCC"/>
1134 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1135 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1136 <condition id="ARMv8MBL_BE_ARMCC">
1137 <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1138 <require condition="ARMv8MBL_ARMCC"/>
1139 <require Dendian="Big-endian"/>
1140 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1141
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1142 <condition id="ARMv8MML_ARMCC">
1143 <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1144 <require condition="ARMv8MML"/>
1145 <require Tcompiler="ARMCC"/>
1146 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1147 <condition id="ARMv8MML_LE_ARMCC">
1148 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1149 <require condition="ARMv8MML_ARMCC"/>
1150 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1151 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1152 <condition id="ARMv8MML_BE_ARMCC">
1153 <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1154 <require condition="ARMv8MML_ARMCC"/>
1155 <require Dendian="Big-endian"/>
1156 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1157
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1158 <condition id="ARMv8MML_FP_ARMCC">
1159 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1160 <require condition="ARMv8MML_FP"/>
1161 <require Tcompiler="ARMCC"/>
1162 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1163 <condition id="ARMv8MML_FP_LE_ARMCC">
1164 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1165 <require condition="ARMv8MML_FP_ARMCC"/>
1166 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1167 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1168 <condition id="ARMv8MML_FP_BE_ARMCC">
1169 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1170 <require condition="ARMv8MML_FP_ARMCC"/>
1171 <require Dendian="Big-endian"/>
1172 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1173
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1174 <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1175 <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1176 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1177 <require Tcompiler="ARMCC"/>
1178 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1179 <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1180 <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1181 <require condition="ARMv8MML_DSP_NOFPU"/>
1182 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1183 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1184 <condition id="ARMv8MML_NODSP_SP_ARMCC">
1185 <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1186 <require condition="ARMv8MML_NODSP_SP"/>
1187 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1188 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1189 <condition id="ARMv8MML_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1190 <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1191 <require condition="ARMv8MML_DSP_SP"/>
1192 <require Tcompiler="ARMCC"/>
1193 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1194 <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1195 <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1196 <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1197 <require Dendian="Little-endian"/>
1198 </condition>
1199 <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1200 <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1201 <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1202 <require Dendian="Little-endian"/>
1203 </condition>
1204 <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1205 <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1206 <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1207 <require Dendian="Little-endian"/>
1208 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1209 <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1210 <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1211 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1212 <require Dendian="Little-endian"/>
1213 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1214
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1215 <!-- GCC compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1216 <condition id="CA_GCC">
1217 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1218 <require condition="ARMv7-A Device"/>
1219 <require Tcompiler="GCC"/>
1220 </condition>
1221
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1222 <condition id="CM0_GCC">
1223 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1224 <require condition="CM0"/>
1225 <require Tcompiler="GCC"/>
1226 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1227 <condition id="CM0_LE_GCC">
1228 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1229 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1230 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1231 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1232 <condition id="CM0_BE_GCC">
1233 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1234 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1235 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1236 </condition>
1237
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1238 <condition id="CM3_GCC">
1239 <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1240 <require condition="CM3"/>
1241 <require Tcompiler="GCC"/>
1242 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1243 <condition id="CM3_LE_GCC">
1244 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1245 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1246 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1247 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1248 <condition id="CM3_BE_GCC">
1249 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1250 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1251 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1252 </condition>
1253
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1254 <condition id="CM4_GCC">
1255 <description>Cortex-M4 processor based device for the GCC Compiler</description>
1256 <require condition="CM4"/>
1257 <require Tcompiler="GCC"/>
1258 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1259 <condition id="CM4_LE_GCC">
1260 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1261 <require condition="CM4_GCC"/>
1262 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1263 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1264 <condition id="CM4_BE_GCC">
1265 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1266 <require condition="CM4_GCC"/>
1267 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1268 </condition>
1269
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1270 <condition id="CM4_FP_GCC">
1271 <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1272 <require condition="CM4_FP"/>
1273 <require Tcompiler="GCC"/>
1274 </condition>
1275 <condition id="CM4_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1276 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1277 <require condition="CM4_FP_GCC"/>
1278 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1279 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1280 <condition id="CM4_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1281 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1282 <require condition="CM4_FP_GCC"/>
1283 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1284 </condition>
1285
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1286 <condition id="CM7_GCC">
1287 <description>Cortex-M7 processor based device for the GCC Compiler</description>
1288 <require condition="CM7"/>
1289 <require Tcompiler="GCC"/>
1290 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1291 <condition id="CM7_LE_GCC">
1292 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1293 <require condition="CM7_GCC"/>
1294 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1295 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1296 <condition id="CM7_BE_GCC">
1297 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1298 <require condition="CM7_GCC"/>
1299 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1300 </condition>
1301
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1302 <condition id="CM7_FP_GCC">
1303 <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1304 <require condition="CM7_FP"/>
1305 <require Tcompiler="GCC"/>
1306 </condition>
1307 <condition id="CM7_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1308 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1309 <require condition="CM7_FP_GCC"/>
1310 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1311 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1312 <condition id="CM7_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1313 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1314 <require condition="CM7_FP_GCC"/>
1315 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1316 </condition>
1317
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1318 <condition id="CM7_SP_GCC">
1319 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1320 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1321 <require Tcompiler="GCC"/>
1322 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1323 <condition id="CM7_SP_LE_GCC">
1324 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1325 <require condition="CM7_SP_GCC"/>
1326 <require Dendian="Little-endian"/>
1327 </condition>
1328 <condition id="CM7_SP_BE_GCC">
1329 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1330 <require condition="CM7_SP_GCC"/>
1331 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1332 </condition>
1333
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1334 <condition id="CM7_DP_GCC">
1335 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1336 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1337 <require Tcompiler="GCC"/>
1338 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1339 <condition id="CM7_DP_LE_GCC">
1340 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1341 <require condition="CM7_DP_GCC"/>
1342 <require Dendian="Little-endian"/>
1343 </condition>
1344 <condition id="CM7_DP_BE_GCC">
1345 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1346 <require condition="CM7_DP_GCC"/>
1347 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1348 </condition>
1349
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1350 <condition id="CM23_GCC">
1351 <description>Cortex-M23 processor based device for the GCC Compiler</description>
1352 <require condition="CM23"/>
1353 <require Tcompiler="GCC"/>
1354 </condition>
1355 <condition id="CM23_LE_GCC">
1356 <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1357 <require condition="CM23_GCC"/>
1358 <require Dendian="Little-endian"/>
1359 </condition>
1360 <condition id="CM23_BE_GCC">
1361 <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1362 <require condition="CM23_GCC"/>
1363 <require Dendian="Big-endian"/>
1364 </condition>
1365
1366 <condition id="CM33_GCC">
1367 <description>Cortex-M33 processor based device for the GCC Compiler</description>
1368 <require condition="CM33"/>
1369 <require Tcompiler="GCC"/>
1370 </condition>
1371 <condition id="CM33_LE_GCC">
1372 <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1373 <require condition="CM33_GCC"/>
1374 <require Dendian="Little-endian"/>
1375 </condition>
1376 <condition id="CM33_BE_GCC">
1377 <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1378 <require condition="CM33_GCC"/>
1379 <require Dendian="Big-endian"/>
1380 </condition>
1381
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1382 <condition id="CM33_FP_GCC">
1383 <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1384 <require condition="CM33_FP"/>
1385 <require Tcompiler="GCC"/>
1386 </condition>
1387 <condition id="CM33_FP_LE_GCC">
1388 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1389 <require condition="CM33_FP_GCC"/>
1390 <require Dendian="Little-endian"/>
1391 </condition>
1392 <condition id="CM33_FP_BE_GCC">
1393 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1394 <require condition="CM33_FP_GCC"/>
1395 <require Dendian="Big-endian"/>
1396 </condition>
1397
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1398 <condition id="CM33_NODSP_NOFPU_GCC">
1399 <description>CM33, no DSP, no FPU, GCC Compiler</description>
1400 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1401 <require Tcompiler="GCC"/>
1402 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1403 <condition id="CM33_DSP_NOFPU_GCC">
1404 <description>CM33, DSP, no FPU, GCC Compiler</description>
1405 <require condition="CM33_DSP_NOFPU"/>
1406 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1407 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1408 <condition id="CM33_NODSP_SP_GCC">
1409 <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1410 <require condition="CM33_NODSP_SP"/>
1411 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1412 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1413 <condition id="CM33_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1414 <description>CM33, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1415 <require condition="CM33_DSP_SP"/>
1416 <require Tcompiler="GCC"/>
1417 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1418 <condition id="CM33_NODSP_NOFPU_LE_GCC">
1419 <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1420 <require condition="CM33_NODSP_NOFPU_GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1421 <require Dendian="Little-endian"/>
1422 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1423 <condition id="CM33_DSP_NOFPU_LE_GCC">
1424 <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1425 <require condition="CM33_DSP_NOFPU_GCC"/>
1426 <require Dendian="Little-endian"/>
1427 </condition>
1428 <condition id="CM33_NODSP_SP_LE_GCC">
1429 <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1430 <require condition="CM33_NODSP_SP_GCC"/>
1431 <require Dendian="Little-endian"/>
1432 </condition>
1433 <condition id="CM33_DSP_SP_LE_GCC">
1434 <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1435 <require condition="CM33_DSP_SP_GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1436 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1437 </condition>
1438
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1439 <condition id="ARMv8MBL_GCC">
1440 <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1441 <require condition="ARMv8MBL"/>
1442 <require Tcompiler="GCC"/>
1443 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1444 <condition id="ARMv8MBL_LE_GCC">
1445 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1446 <require condition="ARMv8MBL_GCC"/>
1447 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1448 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1449 <condition id="ARMv8MBL_BE_GCC">
1450 <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1451 <require condition="ARMv8MBL_GCC"/>
1452 <require Dendian="Big-endian"/>
1453 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1454
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1455 <condition id="ARMv8MML_GCC">
1456 <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1457 <require condition="ARMv8MML"/>
1458 <require Tcompiler="GCC"/>
1459 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1460 <condition id="ARMv8MML_LE_GCC">
1461 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1462 <require condition="ARMv8MML_GCC"/>
1463 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1464 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1465 <condition id="ARMv8MML_BE_GCC">
1466 <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1467 <require condition="ARMv8MML_GCC"/>
1468 <require Dendian="Big-endian"/>
1469 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1470
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1471 <condition id="ARMv8MML_FP_GCC">
1472 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1473 <require condition="ARMv8MML_FP"/>
1474 <require Tcompiler="GCC"/>
1475 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1476 <condition id="ARMv8MML_FP_LE_GCC">
1477 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1478 <require condition="ARMv8MML_FP_GCC"/>
1479 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1480 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1481 <condition id="ARMv8MML_FP_BE_GCC">
1482 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1483 <require condition="ARMv8MML_FP_GCC"/>
1484 <require Dendian="Big-endian"/>
1485 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1486
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1487 <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1488 <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1489 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1490 <require Tcompiler="GCC"/>
1491 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1492 <condition id="ARMv8MML_DSP_NOFPU_GCC">
1493 <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1494 <require condition="ARMv8MML_DSP_NOFPU"/>
1495 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1496 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1497 <condition id="ARMv8MML_NODSP_SP_GCC">
1498 <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1499 <require condition="ARMv8MML_NODSP_SP"/>
1500 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1501 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1502 <condition id="ARMv8MML_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1503 <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1504 <require condition="ARMv8MML_DSP_SP"/>
1505 <require Tcompiler="GCC"/>
1506 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1507 <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1508 <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1509 <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1510 <require Dendian="Little-endian"/>
1511 </condition>
1512 <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1513 <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1514 <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1515 <require Dendian="Little-endian"/>
1516 </condition>
1517 <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1518 <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1519 <require condition="ARMv8MML_NODSP_SP_GCC"/>
1520 <require Dendian="Little-endian"/>
1521 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1522 <condition id="ARMv8MML_DSP_SP_LE_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1523 <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1524 <require condition="ARMv8MML_DSP_SP_GCC"/>
1525 <require Dendian="Little-endian"/>
1526 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1527
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1528 <!-- IAR compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1529 <condition id="CA_IAR">
1530 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1531 <require condition="ARMv7-A Device"/>
1532 <require Tcompiler="IAR"/>
1533 </condition>
1534
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1535 <condition id="CM0_IAR">
1536 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1537 <require condition="CM0"/>
1538 <require Tcompiler="IAR"/>
1539 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1540 <condition id="CM0_LE_IAR">
1541 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1542 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1543 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1544 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1545 <condition id="CM0_BE_IAR">
1546 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1547 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1548 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1549 </condition>
1550
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1551 <condition id="CM3_IAR">
1552 <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1553 <require condition="CM3"/>
1554 <require Tcompiler="IAR"/>
1555 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1556 <condition id="CM3_LE_IAR">
1557 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1558 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1559 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1560 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1561 <condition id="CM3_BE_IAR">
1562 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1563 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1564 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1565 </condition>
1566
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1567 <condition id="CM4_IAR">
1568 <description>Cortex-M4 processor based device for the IAR Compiler</description>
1569 <require condition="CM4"/>
1570 <require Tcompiler="IAR"/>
1571 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1572 <condition id="CM4_LE_IAR">
1573 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1574 <require condition="CM4_IAR"/>
1575 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1576 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1577 <condition id="CM4_BE_IAR">
1578 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1579 <require condition="CM4_IAR"/>
1580 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1581 </condition>
1582
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1583 <condition id="CM4_FP_IAR">
1584 <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1585 <require condition="CM4_FP"/>
1586 <require Tcompiler="IAR"/>
1587 </condition>
1588 <condition id="CM4_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1589 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1590 <require condition="CM4_FP_IAR"/>
1591 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1592 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1593 <condition id="CM4_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1594 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1595 <require condition="CM4_FP_IAR"/>
1596 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1597 </condition>
1598
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1599 <condition id="CM7_IAR">
1600 <description>Cortex-M7 processor based device for the IAR Compiler</description>
1601 <require condition="CM7"/>
1602 <require Tcompiler="IAR"/>
1603 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1604 <condition id="CM7_LE_IAR">
1605 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1606 <require condition="CM7_IAR"/>
1607 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1608 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1609 <condition id="CM7_BE_IAR">
1610 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1611 <require condition="CM7_IAR"/>
1612 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1613 </condition>
1614
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1615 <condition id="CM7_FP_IAR">
1616 <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1617 <require condition="CM7_FP"/>
1618 <require Tcompiler="IAR"/>
1619 </condition>
1620 <condition id="CM7_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1621 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1622 <require condition="CM7_FP_IAR"/>
1623 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1624 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1625 <condition id="CM7_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1626 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1627 <require condition="CM7_FP_IAR"/>
1628 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1629 </condition>
1630
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1631 <condition id="CM7_SP_IAR">
1632 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1633 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1634 <require Tcompiler="IAR"/>
1635 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1636 <condition id="CM7_SP_LE_IAR">
1637 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1638 <require condition="CM7_SP_IAR"/>
1639 <require Dendian="Little-endian"/>
1640 </condition>
1641 <condition id="CM7_SP_BE_IAR">
1642 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1643 <require condition="CM7_SP_IAR"/>
1644 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1645 </condition>
1646
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1647 <condition id="CM7_DP_IAR">
1648 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1649 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1650 <require Tcompiler="IAR"/>
1651 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1652 <condition id="CM7_DP_LE_IAR">
1653 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1654 <require condition="CM7_DP_IAR"/>
1655 <require Dendian="Little-endian"/>
1656 </condition>
1657 <condition id="CM7_DP_BE_IAR">
1658 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1659 <require condition="CM7_DP_IAR"/>
1660 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1661 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1662
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1663 <!-- conditions selecting single devices and CMSIS Core -->
1664 <!-- used for component startup, GCC version is used for C-Startup -->
1665 <condition id="ARMCM0 CMSIS">
1666 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1667 <require Dvendor="ARM:82" Dname="ARMCM0"/>
1668 <require Cclass="CMSIS" Cgroup="CORE"/>
1669 </condition>
1670 <condition id="ARMCM0 CMSIS GCC">
1671 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1672 <require condition="ARMCM0 CMSIS"/>
1673 <require condition="GCC"/>
1674 </condition>
1675
1676 <condition id="ARMCM0+ CMSIS">
1677 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
Jonatan Antonic4e9f462017-10-19 16:51:44 +0200[diff] [blame^]1678 <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1679 <require Cclass="CMSIS" Cgroup="CORE"/>
1680 </condition>
1681 <condition id="ARMCM0+ CMSIS GCC">
1682 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1683 <require condition="ARMCM0+ CMSIS"/>
1684 <require condition="GCC"/>
1685 </condition>
1686
1687 <condition id="ARMCM3 CMSIS">
1688 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1689 <require Dvendor="ARM:82" Dname="ARMCM3"/>
1690 <require Cclass="CMSIS" Cgroup="CORE"/>
1691 </condition>
1692 <condition id="ARMCM3 CMSIS GCC">
1693 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1694 <require condition="ARMCM3 CMSIS"/>
1695 <require condition="GCC"/>
1696 </condition>
1697
1698 <condition id="ARMCM4 CMSIS">
1699 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1700 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1701 <require Cclass="CMSIS" Cgroup="CORE"/>
1702 </condition>
1703 <condition id="ARMCM4 CMSIS GCC">
1704 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1705 <require condition="ARMCM4 CMSIS"/>
1706 <require condition="GCC"/>
1707 </condition>
1708
1709 <condition id="ARMCM7 CMSIS">
1710 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1711 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1712 <require Cclass="CMSIS" Cgroup="CORE"/>
1713 </condition>
1714 <condition id="ARMCM7 CMSIS GCC">
1715 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1716 <require condition="ARMCM7 CMSIS"/>
1717 <require condition="GCC"/>
1718 </condition>
1719
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1720 <condition id="ARMCM23 CMSIS">
1721 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1722 <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1723 <require Cclass="CMSIS" Cgroup="CORE"/>
1724 </condition>
1725 <condition id="ARMCM23 CMSIS GCC">
1726 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1727 <require condition="ARMCM23 CMSIS"/>
1728 <require condition="GCC"/>
1729 </condition>
1730
1731 <condition id="ARMCM33 CMSIS">
1732 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1733 <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1734 <require Cclass="CMSIS" Cgroup="CORE"/>
1735 </condition>
1736 <condition id="ARMCM33 CMSIS GCC">
1737 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1738 <require condition="ARMCM33 CMSIS"/>
1739 <require condition="GCC"/>
1740 </condition>
1741
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1742 <condition id="ARMSC000 CMSIS">
1743 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1744 <require Dvendor="ARM:82" Dname="ARMSC000"/>
1745 <require Cclass="CMSIS" Cgroup="CORE"/>
1746 </condition>
1747 <condition id="ARMSC000 CMSIS GCC">
1748 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1749 <require condition="ARMSC000 CMSIS"/>
1750 <require condition="GCC"/>
1751 </condition>
1752
1753 <condition id="ARMSC300 CMSIS">
1754 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1755 <require Dvendor="ARM:82" Dname="ARMSC300"/>
1756 <require Cclass="CMSIS" Cgroup="CORE"/>
1757 </condition>
1758 <condition id="ARMSC300 CMSIS GCC">
1759 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1760 <require condition="ARMSC300 CMSIS"/>
1761 <require condition="GCC"/>
1762 </condition>
1763
1764 <condition id="ARMv8MBL CMSIS">
1765 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1766 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1767 <require Cclass="CMSIS" Cgroup="CORE"/>
1768 </condition>
1769 <condition id="ARMv8MBL CMSIS GCC">
1770 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1771 <require condition="ARMv8MBL CMSIS"/>
1772 <require condition="GCC"/>
1773 </condition>
1774
1775 <condition id="ARMv8MML CMSIS">
1776 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1777 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1778 <require Cclass="CMSIS" Cgroup="CORE"/>
1779 </condition>
1780 <condition id="ARMv8MML CMSIS GCC">
1781 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1782 <require condition="ARMv8MML CMSIS"/>
1783 <require condition="GCC"/>
1784 </condition>
1785
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1786 <condition id="ARMCA5 CMSIS">
1787 <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1788 <require Dvendor="ARM:82" Dname="ARMCA5"/>
1789 <require Cclass="CMSIS" Cgroup="CORE"/>
1790 </condition>
1791
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1792 <condition id="ARMCA7 CMSIS">
1793 <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1794 <require Dvendor="ARM:82" Dname="ARMCA7"/>
1795 <require Cclass="CMSIS" Cgroup="CORE"/>
1796 </condition>
1797
1798 <condition id="ARMCA9 CMSIS">
1799 <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1800 <require Dvendor="ARM:82" Dname="ARMCA9"/>
1801 <require Cclass="CMSIS" Cgroup="CORE"/>
1802 </condition>
1803
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1804 <!-- CMSIS DSP -->
1805 <condition id="CMSIS DSP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1806 <description>Components required for DSP</description>
1807 <require condition="ARMv6_7_8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1808 <require condition="ARMCC GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1809 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1810 </condition>
1811
1812 <!-- RTOS RTX -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1813 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1814 <description>Components required for RTOS RTX</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1815 <require condition="ARMv6_7-M Device"/>
1816 <require condition="ARMCC GCC IAR"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1817 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1818 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1819 </condition>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]1820 <condition id="RTOS RTX IFX">
1821 <description>Components required for RTOS RTX IFX</description>
1822 <require condition="ARMv6_7-M Device"/>
1823 <require condition="ARMCC GCC IAR"/>
1824 <require Dvendor="Infineon:7" Dname="XMC4*"/>
1825 <require Cclass="Device" Cgroup="Startup"/>
1826 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
1827 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1828 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1829 <description>Components required for RTOS RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1830 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]1831 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1832 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1833 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1834 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1835 <description>Components required for RTOS2 RTX5</description>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]1836 <require condition="ARMv6_7_8-M Device"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1837 <require condition="ARMCC GCC IAR"/>
1838 <require Cclass="CMSIS" Cgroup="CORE"/>
1839 <require Cclass="Device" Cgroup="Startup"/>
1840 </condition>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]1841 <condition id="RTOS2 RTX5 v7-A">
1842 <description>Components required for RTOS2 RTX5 v7-A</description>
1843 <require condition="ARMv7-A Device"/>
1844 <require condition="ARMCC GCC IAR"/>
1845 <require Cclass="CMSIS" Cgroup="CORE"/>
1846 <require Cclass="Device" Cgroup="Startup"/>
1847 <require Cclass="Device" Cgroup="OS Tick"/>
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]1848 <require Cclass="Device" Cgroup="IRQ Controller"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]1849 </condition>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1850 <condition id="RTOS2 RTX5 Lib">
1851 <description>Components required for RTOS2 RTX5 Library</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1852 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]1853 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1854 <require Cclass="CMSIS" Cgroup="CORE"/>
1855 <require Cclass="Device" Cgroup="Startup"/>
1856 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1857 <condition id="RTOS2 RTX5 NS">
1858 <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1859 <require condition="ARMv8-M TZ Device"/>
1860 <require condition="ARMCC GCC"/>
1861 <require Cclass="CMSIS" Cgroup="CORE"/>
1862 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1863 </condition>
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]1864
1865 <!-- OS Tick -->
1866 <condition id="OS Tick PTIM">
1867 <description>Components required for OS Tick Private Timer</description>
1868 <require condition="CA5_CA9"/>
1869 <require Cclass="Device" Cgroup="IRQ Controller"/>
1870 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1871
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]1872 <condition id="OS Tick GTIM">
1873 <description>Components required for OS Tick Generic Physical Timer</description>
1874 <require condition="CA7"/>
1875 <require Cclass="Device" Cgroup="IRQ Controller"/>
1876 </condition>
1877
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1878 </conditions>
1879
1880 <components>
1881 <!-- CMSIS-Core component -->
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]1882 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2" condition="ARMv6_7_8-M Device" >
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1883 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1884 <files>
1885 <!-- CPU independent -->
1886 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1887 <file category="include" name="CMSIS/Include/"/>
Robert Rostoharb2e07162016-11-04 10:43:56 +0100[diff] [blame]1888 <file category="header" name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]1889 <!-- Code template -->
Robert Rostohar0e71e882016-11-16 19:03:44 +0100[diff] [blame]1890 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c" version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
Robert Rostohar71f4dcf2016-11-16 19:06:01 +0100[diff] [blame]1891 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1892 </files>
1893 </component>
1894
Jonatan Antoni44c39182017-10-12 16:40:01 +0200[diff] [blame]1895 <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.1" condition="ARMv7-A Device" >
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1896 <description>CMSIS-CORE for Cortex-A</description>
1897 <files>
1898 <!-- CPU independent -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1899 <file category="doc" name="CMSIS/Documentation/Core_A/html/index.html"/>
brondanib6bdb2c2017-03-02 16:15:52 +0100[diff] [blame]1900 <file category="include" name="CMSIS/Core_A/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1901 </files>
1902 </component>
1903
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1904 <!-- CMSIS-Startup components -->
1905 <!-- Cortex-M0 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1906 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1907 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1908 <files>
1909 <!-- include folder / device header file -->
1910 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1911 <!-- startup / system file -->
1912 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1913 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1914 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1915 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1916 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1917 </files>
1918 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1919 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1920 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1921 <files>
1922 <!-- include folder / device header file -->
1923 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1924 <!-- startup / system file -->
1925 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1926 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1927 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1928 </files>
1929 </component>
1930
1931 <!-- Cortex-M0+ -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1932 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1933 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1934 <files>
1935 <!-- include folder / device header file -->
1936 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1937 <!-- startup / system file -->
1938 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1939 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1940 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1941 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1942 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1943 </files>
1944 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1945 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1946 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1947 <files>
1948 <!-- include folder / device header file -->
1949 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1950 <!-- startup / system file -->
1951 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1952 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1953 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1954 </files>
1955 </component>
1956
1957 <!-- Cortex-M3 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1958 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1959 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1960 <files>
1961 <!-- include folder / device header file -->
1962 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1963 <!-- startup / system file -->
1964 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1965 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1966 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1967 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1968 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1969 </files>
1970 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1971 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1972 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1973 <files>
1974 <!-- include folder / device header file -->
1975 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1976 <!-- startup / system file -->
1977 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1978 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1979 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1980 </files>
1981 </component>
1982
1983 <!-- Cortex-M4 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1984 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1985 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1986 <files>
1987 <!-- include folder / device header file -->
1988 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1989 <!-- startup / system file -->
1990 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1991 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1992 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1993 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1994 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1995 </files>
1996 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1997 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1998 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1999 <files>
2000 <!-- include folder / device header file -->
2001 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2002 <!-- startup / system file -->
2003 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2004 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2005 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
2006 </files>
2007 </component>
2008
2009 <!-- Cortex-M7 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2010 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2011 <description>System and Startup for Generic ARM Cortex-M7 device</description>
2012 <files>
2013 <!-- include folder / device header file -->
2014 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
2015 <!-- startup / system file -->
2016 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2017 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2018 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2019 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2020 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
2021 </files>
2022 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2023 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2024 <description>System and Startup for Generic ARM Cortex-M7 device</description>
2025 <files>
2026 <!-- include folder / device header file -->
2027 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
2028 <!-- startup / system file -->
2029 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2030 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2031 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
2032 </files>
2033 </component>
2034
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2035 <!-- Cortex-M23 -->
2036 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS">
2037 <description>System and Startup for Generic ARM Cortex-M23 device</description>
2038 <files>
2039 <!-- include folder / device header file -->
2040 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2041 <!-- startup / system file -->
2042 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2043 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2044 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antonie1454c12017-09-11 09:23:17 +0200[diff] [blame]2045 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2046 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2047 <!-- SAU configuration -->
2048 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2049 </files>
2050 </component>
2051 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2052 <description>System and Startup for Generic ARM Cortex-M23 device</description>
2053 <files>
2054 <!-- include folder / device header file -->
2055 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2056 <!-- startup / system file -->
2057 <file category="sourceC" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2058 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2059 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
2060 <!-- SAU configuration -->
2061 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2062 </files>
2063 </component>
2064
2065 <!-- Cortex-M33 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2066 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2067 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2068 <files>
2069 <!-- include folder / device header file -->
2070 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2071 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2072 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
2073 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
2074 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antonie1454c12017-09-11 09:23:17 +0200[diff] [blame]2075 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s" version="1.0.0" attr="config" condition="IAR"/>
2076 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2077 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2078 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2079 </files>
2080 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2081 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2082 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2083 <files>
2084 <!-- include folder / device header file -->
2085 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2086 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2087 <file category="sourceC" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
2088 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2089 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2090 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2091 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2092 </files>
2093 </component>
2094
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2095 <!-- Cortex-SC000 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2096 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2097 <description>System and Startup for Generic ARM SC000 device</description>
2098 <files>
2099 <!-- include folder / device header file -->
2100 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2101 <!-- startup / system file -->
2102 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2103 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2104 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2105 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2106 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2107 </files>
2108 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2109 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2110 <description>System and Startup for Generic ARM SC000 device</description>
2111 <files>
2112 <!-- include folder / device header file -->
2113 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2114 <!-- startup / system file -->
2115 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2116 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2117 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2118 </files>
2119 </component>
2120
2121 <!-- Cortex-SC300 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2122 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2123 <description>System and Startup for Generic ARM SC300 device</description>
2124 <files>
2125 <!-- include folder / device header file -->
2126 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2127 <!-- startup / system file -->
2128 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2129 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2130 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2131 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2132 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2133 </files>
2134 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2135 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2136 <description>System and Startup for Generic ARM SC300 device</description>
2137 <files>
2138 <!-- include folder / device header file -->
2139 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2140 <!-- startup / system file -->
2141 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2142 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2143 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2144 </files>
2145 </component>
2146
2147 <!-- ARMv8MBL -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2148 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2149 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2150 <files>
2151 <!-- include folder / device header file -->
2152 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2153 <!-- startup / system file -->
2154 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2155 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2156 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2157 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2158 <!-- SAU configuration -->
2159 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2160 </files>
2161 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2162 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2163 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2164 <files>
2165 <!-- include folder / device header file -->
2166 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2167 <!-- startup / system file -->
2168 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2169 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2170 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2171 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2172 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2173 </files>
2174 </component>
2175
2176 <!-- ARMv8MML -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2177 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2178 <description>System and Startup for Generic ARM ARMv8MML device</description>
2179 <files>
2180 <!-- include folder / device header file -->
2181 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2182 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2183 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2184 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2185 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2186 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2187 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2188 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2189 </files>
2190 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2191 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2192 <description>System and Startup for Generic ARM ARMv8MML device</description>
2193 <files>
2194 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2195 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2196 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2197 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2198 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2199 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2200 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2201 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2202 </files>
2203 </component>
2204
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2205 <!-- Cortex-A5 -->
2206 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA5 CMSIS">
2207 <description>System and Startup for Generic ARM Cortex-A5 device</description>
2208 <files>
2209 <!-- include folder / device header file -->
2210 <file category="include" name="Device/ARM/ARMCA5/Include/"/>
2211 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2212 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2213 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2214 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2215 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antoni7e5e24f2017-09-12 16:40:22 +0200[diff] [blame]2216 <file category="sourceC" name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2217 <file category="other" name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld" version="1.0.0" attr="config" condition="GCC"/>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2218 <file category="sourceC" name="Device/ARM/ARMCA5/Source/system_ARMCA5.c" version="1.0.0" attr="config"/>
2219 <file category="sourceC" name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c" version="1.0.0" attr="config"/>
2220 <file category="header" name="Device/ARM/ARMCA5/Include/system_ARMCA5.h" version="1.0.0" attr="config"/>
2221 <file category="header" name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h" version="1.0.0" attr="config"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2222
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2223 </files>
2224 </component>
2225
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2226 <!-- Cortex-A7 -->
2227 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA7 CMSIS">
2228 <description>System and Startup for Generic ARM Cortex-A7 device</description>
2229 <files>
2230 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2231 <file category="include" name="Device/ARM/ARMCA7/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2232 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2233 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2234 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2235 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2236 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antoni7e5e24f2017-09-12 16:40:22 +0200[diff] [blame]2237 <file category="sourceC" name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2238 <file category="other" name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld" version="1.0.0" attr="config" condition="GCC"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2239 <file category="sourceC" name="Device/ARM/ARMCA7/Source/system_ARMCA7.c" version="1.0.0" attr="config"/>
2240 <file category="sourceC" name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2241 <file category="header" name="Device/ARM/ARMCA7/Include/system_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2242 <file category="header" name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2243 </files>
2244 </component>
2245
2246 <!-- Cortex-A9 -->
Jonatan Antonib27a4122017-08-08 13:30:19 +0200[diff] [blame]2247 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCA9 CMSIS">
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2248 <description>System and Startup for Generic ARM Cortex-A9 device</description>
2249 <files>
2250 <!-- include folder / device header file -->
2251 <file category="include" name="Device/ARM/ARMCA9/Include/"/>
2252 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2253 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2254 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2255 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2256 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antonib27a4122017-08-08 13:30:19 +0200[diff] [blame]2257 <file category="sourceC" name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2258 <file category="other" name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld" version="1.0.0" attr="config" condition="GCC"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2259 <file category="sourceC" name="Device/ARM/ARMCA9/Source/system_ARMCA9.c" version="1.0.0" attr="config"/>
2260 <file category="sourceC" name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2261 <file category="header" name="Device/ARM/ARMCA9/Include/system_ARMCA9.h" version="1.0.0" attr="config"/>
2262 <file category="header" name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2263 </files>
2264 </component>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2265
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2266 <!-- IRQ Controller -->
2267 <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2268 <description>IRQ Controller implementation using GIC</description>
2269 <files>
2270 <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2271 </files>
2272 </component>
2273
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]2274 <!-- OS Tick -->
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2275 <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]2276 <description>OS Tick implementation using Private Timer</description>
2277 <files>
2278 <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2279 </files>
2280 </component>
2281
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]2282 <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick GTIM">
2283 <description>OS Tick implementation using Generic Physical Timer</description>
2284 <files>
2285 <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2286 </files>
2287 </component>
2288
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2289 <!-- CMSIS-DSP component -->
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2290 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2291 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2292 <files>
2293 <!-- CPU independent -->
2294 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2295 <file category="header" name="CMSIS/Include/arm_math.h"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2296
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2297 <!-- CPU and Compiler dependent -->
2298 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2299 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2300 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2301 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2302 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2303 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2304 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2305 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2306 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2307 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2308 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2309 <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2310 <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2311 <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2312 <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2313
2314 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2315 <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2316 <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2317 <file category="library" condition="CM33_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2318 <file category="library" condition="CM33_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2319 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2320 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2321 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2322 <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2323 <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2324 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2325 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2326
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2327 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2328 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2329 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2330 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2331 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2332 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2333 <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2334 <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2335
2336 <file category="library" condition="CM23_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2337 <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2338 <file category="library" condition="CM33_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2339 <file category="library" condition="CM33_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2340 <file category="library" condition="CM33_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2341 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2342 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2343 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2344 <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2345 <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2346 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2347 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2348
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2349 </files>
2350 </component>
2351
2352 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2353 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2354 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2355 <RTE_Components_h>
2356 <!-- the following content goes into file 'RTE_Components.h' -->
2357 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2358 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2359 </RTE_Components_h>
2360 <files>
2361 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]2362 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2363 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2364 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2365
2366 <!-- RTX templates -->
2367 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2368 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2369 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2370 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2371 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2372 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2373 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2374 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2375 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2376 <!-- tool-chain specific template file -->
2377 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2378 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2379 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2380
2381 <!-- CPU and Compiler dependent -->
2382 <!-- ARMCC -->
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2383 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2384 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2385 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2386 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2387 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2388 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2389 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2390 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2391 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2392 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2393 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2394 <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2395 <!-- GCC -->
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2396 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2397 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2398 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2399 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2400 <file category="library" condition="CM4_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2401 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2402 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2403 <file category="library" condition="CM4_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2404 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2405 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2406 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2407 <file category="library" condition="CM7_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2408 <!-- IAR -->
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2409 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2410 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2411 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2412 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2413 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2414 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2415 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2416 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2417 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2418 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2419 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2420 <file category="library" condition="CM7_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2421 </files>
2422 </component>
2423 <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2424 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2425 <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2426 <RTE_Components_h>
2427 <!-- the following content goes into file 'RTE_Components.h' -->
2428 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2429 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2430 </RTE_Components_h>
2431 <files>
2432 <!-- CPU independent -->
2433 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2434 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2435 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2436
2437 <!-- RTX templates -->
2438 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2439 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2440 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2441 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2442 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2443 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2444 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2445 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2446 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2447 <!-- tool-chain specific template file -->
2448 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2449 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2450 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2451
2452 <!-- CPU and Compiler dependent -->
2453 <!-- ARMCC -->
2454 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2455 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2456 <!-- GCC -->
2457 <file category="library" condition="CM4_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2458 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2459 <!-- IAR -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2460 </files>
2461 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2462
2463 <!-- CMSIS-RTOS Keil RTX5 component -->
Vladimir Umek5e4b3922017-09-20 11:54:19 +0200[diff] [blame]2464 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.2" Capiversion="1.0.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2465 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2466 <RTE_Components_h>
2467 <!-- the following content goes into file 'RTE_Components.h' -->
2468 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2469 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
2470 </RTE_Components_h>
2471 <files>
2472 <!-- RTX header file -->
2473 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2474 <!-- RTX compatibility module for API V1 -->
2475 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2476 </files>
2477 </component>
2478
2479 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Vladimir Umek5e4b3922017-09-20 11:54:19 +0200[diff] [blame]2480 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2481 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2482 <RTE_Components_h>
2483 <!-- the following content goes into file 'RTE_Components.h' -->
2484 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2485 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2486 </RTE_Components_h>
2487 <files>
2488 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2489 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2490
2491 <!-- RTX header files -->
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2492 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2493
2494 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2495 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2496 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2497
2498 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2499 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2500 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2501 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2502 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2503 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2504 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2505 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2506 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2507 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2508 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2509
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2510 <!-- RTX library configuration -->
2511 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2512
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2513 <!-- RTX libraries (CPU and Compiler dependent) -->
2514 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2515 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
2516 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2517 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2518 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2519 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2520 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2521 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2522 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2523 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2524 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2525 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2526 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
2527 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2528 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2529 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2530 <file category="library" condition="CM4_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2531 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2532 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2533 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2534 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2535 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2536 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2537 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2538 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2539 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2540 <!-- IAR -->
2541 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2542 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2543 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2544 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2545 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2546 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2547 </files>
2548 </component>
Vladimir Umek5e4b3922017-09-20 11:54:19 +0200[diff] [blame]2549 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2550 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2551 <RTE_Components_h>
2552 <!-- the following content goes into file 'RTE_Components.h' -->
2553 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2554 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2555 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2556 </RTE_Components_h>
2557 <files>
2558 <!-- RTX documentation -->
2559 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2560
2561 <!-- RTX header files -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2562 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2563
2564 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2565 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2566 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2567
2568 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2569 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2570 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2571 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2572 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2573 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2574 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2575 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2576 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2577 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2578 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2579
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2580 <!-- RTX library configuration -->
2581 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2582
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2583 <!-- RTX libraries (CPU and Compiler dependent) -->
2584 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2585 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2586 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2587 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2588 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2589 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2590 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2591 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2592 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2593 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2594 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2595 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2596 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2597 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2598 </files>
2599 </component>
Vladimir Umek5e4b3922017-09-20 11:54:19 +0200[diff] [blame]2600 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2601 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2602 <RTE_Components_h>
2603 <!-- the following content goes into file 'RTE_Components.h' -->
2604 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2605 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2606 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2607 </RTE_Components_h>
2608 <files>
2609 <!-- RTX documentation -->
2610 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2611
2612 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2613 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2614
2615 <!-- RTX configuration -->
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2616 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2617 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2618
2619 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2620 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2621 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2622 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2623 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2624 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2625 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2626 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2627 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2628 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2629 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2630
2631 <!-- RTX sources (core) -->
2632 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2633 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2634 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2635 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2636 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2637 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2638 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2639 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2640 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2641 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2642 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2643 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2644 <!-- RTX sources (library configuration) -->
2645 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2646 <!-- RTX sources (handlers ARMCC) -->
2647 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
2648 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
2649 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
2650 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
2651 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
2652 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2653 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
2654 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
2655 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2656 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
2657 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
2658 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
2659 <!-- RTX sources (handlers GCC) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2660 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S" condition="CM0_GCC"/>
2661 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM3_GCC"/>
2662 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM4_GCC"/>
2663 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM4_FP_GCC"/>
2664 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM7_GCC"/>
2665 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM7_FP_GCC"/>
2666 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
2667 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
2668 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2669 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
2670 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
2671 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2672 <!-- RTX sources (handlers IAR) -->
2673 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s" condition="CM0_IAR"/>
2674 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM3_IAR"/>
2675 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM4_IAR"/>
2676 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM4_FP_IAR"/>
2677 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM7_IAR"/>
2678 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM7_FP_IAR"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2679 <!-- OS Tick (SysTick) -->
2680 <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2681 </files>
2682 </component>
Vladimir Umek5e4b3922017-09-20 11:54:19 +0200[diff] [blame]2683 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2684 <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2685 <RTE_Components_h>
2686 <!-- the following content goes into file 'RTE_Components.h' -->
2687 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2688 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
2689 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
2690 </RTE_Components_h>
2691 <files>
2692 <!-- RTX documentation -->
2693 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2694
2695 <!-- RTX header files -->
2696 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2697
2698 <!-- RTX configuration -->
2699 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2700 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
2701
2702 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/handlers.c" version="5.1.0"/>
2703
2704 <!-- RTX templates -->
2705 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2706 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2707 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2708 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2709 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2710 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2711 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2712 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2713 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2714 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2715
2716 <!-- RTX sources (core) -->
2717 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2718 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2719 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2720 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2721 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2722 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2723 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2724 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2725 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2726 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2727 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2728 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2729 <!-- RTX sources (library configuration) -->
2730 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2731 <!-- RTX sources (handlers ARMCC) -->
2732 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s" condition="CA_ARMCC5"/>
2733 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_ARMCC6"/>
2734 <!-- RTX sources (handlers GCC) -->
2735 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_GCC"/>
2736 <!-- RTX sources (handlers IAR) -->
2737 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s" condition="CA_IAR"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2738 </files>
2739 </component>
Vladimir Umek5e4b3922017-09-20 11:54:19 +0200[diff] [blame]2740 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2741 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2742 <RTE_Components_h>
2743 <!-- the following content goes into file 'RTE_Components.h' -->
2744 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2745 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2746 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2747 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2748 </RTE_Components_h>
2749 <files>
2750 <!-- RTX documentation -->
2751 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2752
2753 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2754 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2755
2756 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2757 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2758 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2759
2760 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2761 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2762 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2763 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2764 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2765 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2766 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2767 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2768 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2769 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2770 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2771
2772 <!-- RTX sources (core) -->
2773 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2774 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2775 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2776 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2777 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2778 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2779 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2780 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2781 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2782 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2783 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2784 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2785 <!-- RTX sources (library configuration) -->
2786 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2787 <!-- RTX sources (ARMCC handlers) -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2788 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
2789 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
2790 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2791 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
2792 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
2793 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
2794 <!-- RTX sources (GCC handlers) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2795 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="CM23_GCC"/>
2796 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="CM33_GCC"/>
2797 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2798 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="ARMv8MBL_GCC"/>
2799 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="ARMv8MML_GCC"/>
2800 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2801 <!-- OS Tick (SysTick) -->
2802 <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2803 </files>
2804 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2805
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2806 </components>
2807
2808 <boards>
2809 <board name="uVision Simulator" vendor="Keil">
2810 <description>uVision Simulator</description>
2811 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2812 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
Jonatan Antonic4e9f462017-10-19 16:51:44 +0200[diff] [blame^]2813 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2814 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2815 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2816 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2817 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2818 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2819 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2820 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2821 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2822 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2823 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2824 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
Joachim Krech4a03e6d2017-02-06 13:17:39 +0100[diff] [blame]2825 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2826 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2827 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2828 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2829 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
Daniel Brondanifaaa48f2017-07-31 14:00:54 +0200[diff] [blame]2830 </board>
2831
2832 <board name="Fixed Virtual Platform" vendor="ARM">
Daniel Brondani040d63b2017-08-01 16:49:57 +0200[diff] [blame]2833 <description>Fixed Virtual Platform</description>
Daniel Brondanifaaa48f2017-07-31 14:00:54 +0200[diff] [blame]2834 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
2835 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
2836 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
2837 </board>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2838 </boards>
2839
2840 <examples>
2841 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2842 <description>DSP_Lib Class Marks example</description>
2843 <board name="uVision Simulator" vendor="Keil"/>
2844 <project>
2845 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2846 </project>
2847 <attributes>
2848 <component Cclass="CMSIS" Cgroup="CORE"/>
2849 <component Cclass="CMSIS" Cgroup="DSP"/>
2850 <component Cclass="Device" Cgroup="Startup"/>
2851 <category>Getting Started</category>
2852 </attributes>
2853 </example>
2854
2855 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2856 <description>DSP_Lib Convolution example</description>
2857 <board name="uVision Simulator" vendor="Keil"/>
2858 <project>
2859 <environment name="uv" load="arm_convolution_example.uvprojx"/>
2860 </project>
2861 <attributes>
2862 <component Cclass="CMSIS" Cgroup="CORE"/>
2863 <component Cclass="CMSIS" Cgroup="DSP"/>
2864 <component Cclass="Device" Cgroup="Startup"/>
2865 <category>Getting Started</category>
2866 </attributes>
2867 </example>
2868
2869 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2870 <description>DSP_Lib Dotproduct example</description>
2871 <board name="uVision Simulator" vendor="Keil"/>
2872 <project>
2873 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2874 </project>
2875 <attributes>
2876 <component Cclass="CMSIS" Cgroup="CORE"/>
2877 <component Cclass="CMSIS" Cgroup="DSP"/>
2878 <component Cclass="Device" Cgroup="Startup"/>
2879 <category>Getting Started</category>
2880 </attributes>
2881 </example>
2882
2883 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2884 <description>DSP_Lib FFT Bin example</description>
2885 <board name="uVision Simulator" vendor="Keil"/>
2886 <project>
2887 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2888 </project>
2889 <attributes>
2890 <component Cclass="CMSIS" Cgroup="CORE"/>
2891 <component Cclass="CMSIS" Cgroup="DSP"/>
2892 <component Cclass="Device" Cgroup="Startup"/>
2893 <category>Getting Started</category>
2894 </attributes>
2895 </example>
2896
2897 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2898 <description>DSP_Lib FIR example</description>
2899 <board name="uVision Simulator" vendor="Keil"/>
2900 <project>
2901 <environment name="uv" load="arm_fir_example.uvprojx"/>
2902 </project>
2903 <attributes>
2904 <component Cclass="CMSIS" Cgroup="CORE"/>
2905 <component Cclass="CMSIS" Cgroup="DSP"/>
2906 <component Cclass="Device" Cgroup="Startup"/>
2907 <category>Getting Started</category>
2908 </attributes>
2909 </example>
2910
2911 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2912 <description>DSP_Lib Graphic Equalizer example</description>
2913 <board name="uVision Simulator" vendor="Keil"/>
2914 <project>
2915 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2916 </project>
2917 <attributes>
2918 <component Cclass="CMSIS" Cgroup="CORE"/>
2919 <component Cclass="CMSIS" Cgroup="DSP"/>
2920 <component Cclass="Device" Cgroup="Startup"/>
2921 <category>Getting Started</category>
2922 </attributes>
2923 </example>
2924
2925 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2926 <description>DSP_Lib Linear Interpolation example</description>
2927 <board name="uVision Simulator" vendor="Keil"/>
2928 <project>
2929 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2930 </project>
2931 <attributes>
2932 <component Cclass="CMSIS" Cgroup="CORE"/>
2933 <component Cclass="CMSIS" Cgroup="DSP"/>
2934 <component Cclass="Device" Cgroup="Startup"/>
2935 <category>Getting Started</category>
2936 </attributes>
2937 </example>
2938
2939 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2940 <description>DSP_Lib Matrix example</description>
2941 <board name="uVision Simulator" vendor="Keil"/>
2942 <project>
2943 <environment name="uv" load="arm_matrix_example.uvprojx"/>
2944 </project>
2945 <attributes>
2946 <component Cclass="CMSIS" Cgroup="CORE"/>
2947 <component Cclass="CMSIS" Cgroup="DSP"/>
2948 <component Cclass="Device" Cgroup="Startup"/>
2949 <category>Getting Started</category>
2950 </attributes>
2951 </example>
2952
2953 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2954 <description>DSP_Lib Signal Convergence example</description>
2955 <board name="uVision Simulator" vendor="Keil"/>
2956 <project>
2957 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2958 </project>
2959 <attributes>
2960 <component Cclass="CMSIS" Cgroup="CORE"/>
2961 <component Cclass="CMSIS" Cgroup="DSP"/>
2962 <component Cclass="Device" Cgroup="Startup"/>
2963 <category>Getting Started</category>
2964 </attributes>
2965 </example>
2966
2967 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2968 <description>DSP_Lib Sinus/Cosinus example</description>
2969 <board name="uVision Simulator" vendor="Keil"/>
2970 <project>
2971 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2972 </project>
2973 <attributes>
2974 <component Cclass="CMSIS" Cgroup="CORE"/>
2975 <component Cclass="CMSIS" Cgroup="DSP"/>
2976 <component Cclass="Device" Cgroup="Startup"/>
2977 <category>Getting Started</category>
2978 </attributes>
2979 </example>
2980
2981 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2982 <description>DSP_Lib Variance example</description>
2983 <board name="uVision Simulator" vendor="Keil"/>
2984 <project>
2985 <environment name="uv" load="arm_variance_example.uvprojx"/>
2986 </project>
2987 <attributes>
2988 <component Cclass="CMSIS" Cgroup="CORE"/>
2989 <component Cclass="CMSIS" Cgroup="DSP"/>
2990 <component Cclass="Device" Cgroup="Startup"/>
2991 <category>Getting Started</category>
2992 </attributes>
2993 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2994
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2995 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2996 <description>CMSIS-RTOS2 Blinky example</description>
2997 <board name="uVision Simulator" vendor="Keil"/>
2998 <project>
2999 <environment name="uv" load="Blinky.uvprojx"/>
3000 </project>
3001 <attributes>
3002 <component Cclass="CMSIS" Cgroup="CORE"/>
3003 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3004 <component Cclass="Device" Cgroup="Startup"/>
3005 <category>Getting Started</category>
3006 </attributes>
3007 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]3008
Robert Rostohare13e4702016-11-07 15:23:44 +0100[diff] [blame]3009 <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
Matthias Hertel4b70ae42016-11-07 14:14:59 +0100[diff] [blame]3010 <description>CMSIS-RTOS2 mixed API v1 and v2</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3011 <board name="uVision Simulator" vendor="Keil"/>
3012 <project>
3013 <environment name="uv" load="Blinky.uvprojx"/>
3014 </project>
3015 <attributes>
3016 <component Cclass="CMSIS" Cgroup="CORE"/>
3017 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3018 <component Cclass="Device" Cgroup="Startup"/>
3019 <category>Getting Started</category>
3020 </attributes>
3021 </example>
3022
Jonatan Antoni401391f2017-08-30 16:52:33 +0200[diff] [blame]3023 <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3024 <description>CMSIS-RTOS2 Message Queue Example</description>
3025 <board name="uVision Simulator" vendor="Keil"/>
3026 <project>
3027 <environment name="uv" load="MsqQueue.uvprojx"/>
3028 </project>
3029 <attributes>
3030 <component Cclass="CMSIS" Cgroup="CORE"/>
3031 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3032 <component Cclass="Compiler" Cgroup="EventRecorder"/>
3033 <component Cclass="Device" Cgroup="Startup"/>
3034 <category>Getting Started</category>
3035 </attributes>
3036 </example>
Jonatan Antoni6c160d42017-09-01 10:48:45 +0200[diff] [blame]3037
3038 <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3039 <description>CMSIS-RTOS2 Memory Pool Example</description>
3040 <board name="Fixed Virtual Platform" vendor="ARM"/>
3041 <project>
3042 <environment name="uv" load="MemPool.uvprojx"/>
3043 </project>
3044 <attributes>
3045 <component Cclass="CMSIS" Cgroup="CORE"/>
3046 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3047 <component Cclass="Compiler" Cgroup="EventRecorder"/>
3048 <component Cclass="Device" Cgroup="Startup"/>
3049 <category>Getting Started</category>
3050 </attributes>
3051 </example>
Jonatan Antoni401391f2017-08-30 16:52:33 +0200[diff] [blame]3052
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]3053 <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]3054 <description>Bare-metal secure/non-secure example without RTOS</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3055 <board name="uVision Simulator" vendor="Keil"/>
3056 <project>
3057 <environment name="uv" load="NoRTOS.uvmpw"/>
3058 </project>
3059 <attributes>
3060 <component Cclass="CMSIS" Cgroup="CORE"/>
3061 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3062 <component Cclass="Device" Cgroup="Startup"/>
3063 <category>Getting Started</category>
3064 </attributes>
3065 </example>
3066
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]3067 <example name="TrustZone for ARMv8-M RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]3068 <description>Secure/non-secure RTOS example with thread context management</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3069 <board name="uVision Simulator" vendor="Keil"/>
3070 <project>
3071 <environment name="uv" load="RTOS.uvmpw"/>
3072 </project>
3073 <attributes>
3074 <component Cclass="CMSIS" Cgroup="CORE"/>
3075 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3076 <component Cclass="Device" Cgroup="Startup"/>
3077 <category>Getting Started</category>
3078 </attributes>
3079 </example>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3080
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]3081 <example name="TrustZone for ARMv8-M RTOS Security Tests" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3082 <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3083 <board name="uVision Simulator" vendor="Keil"/>
3084 <project>
3085 <environment name="uv" load="RTOS_Faults.uvmpw"/>
3086 </project>
3087 <attributes>
3088 <component Cclass="CMSIS" Cgroup="CORE"/>
3089 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3090 <component Cclass="Device" Cgroup="Startup"/>
3091 <category>Getting Started</category>
3092 </attributes>
3093 </example>
3094
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3095 </examples>
3096
3097</package>