blob: 80282cf81553a64644ef0889523b224a35bb9fa6 [file] [log] [blame]
Christophe Favergeone0181322019-05-20 13:25:14 +02001function(interpol PROJECT)
2
3if (CONFIGTABLE AND ARM_COS_F32)
4 target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_F32)
5endif()
6
7if (CONFIGTABLE AND ARM_COS_Q31)
8 target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q31)
9endif()
10
11if (CONFIGTABLE AND ARM_COS_Q15)
12 target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q15)
13endif()
14
15if (CONFIGTABLE AND ARM_SIN_F32)
16 target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_F32)
17endif()
18
19if (CONFIGTABLE AND ARM_SIN_Q31)
20 target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q31)
21endif()
22
23if (CONFIGTABLE AND ARM_SIN_Q15)
24 target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q15)
25endif()
26
27if (CONFIGTABLE AND ARM_SIN_COS_F32)
28 target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_F32)
29endif()
30
31if (CONFIGTABLE AND ARM_SIN_COS_Q31)
32 target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q31)
33endif()
34
35if (CONFIGTABLE AND ARM_LMS_NORM_Q31)
36 target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_RECIP_Q31)
37endif()
38
39if (CONFIGTABLE AND ARM_LMS_NORM_Q15)
40 target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_RECIP_Q15)
41endif()
42
43endfunction()