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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 9470b0bfa35625542f54afb99ec8ddf70ea8f756 / . / ARM.CMSIS.pdsc
blob: 1b5c16c7095ee6f1e9298fd9ca767eae738dad06 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
Joachim Krecha33860c2016-11-09 22:25:55 +0100[diff] [blame]7 <!-- <license>license.txt</license> -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]11 <release version="5.0.2-dev3">
12 CMSIS-Core_A:
13 - Added ARM Compiler 6 support
14 - Updated Cortex-A core functions
15 - Updated Startup and System files
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]16 CMSIS-RTOS2:
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame^]17 - API 2.1.1 (see revision history for details)
18 - RTX 5.2.0 (see revision history for details)
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]19 </release>
Robert Rostoharbb902b42017-04-03 14:06:24 +0200[diff] [blame]20 <release version="5.0.2-dev2">
21 CMSIS-RTOS2:
22 - RTX 5.1.1 (see revision history for details)
23 </release>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]24 <release version="5.0.2-dev1">
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]25 CMSIS-Core_A:
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]26 - Added Cortex-A core support, ARMCC specific:
27 - Core specific register definitions
28 - Generic Interrupt Controller functions
29 - Generic Timer functions
30 - L1 and L2 Cache functions
31 - MMU functions
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]32 - Added ARMCA5, ARMCA7 and ARMCA9 devices
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]33 - Added Startup, System and MMU configuration files
34 </release>
Martin Güntherc5e87e52017-02-13 16:03:07 +0100[diff] [blame]35 <release version="5.0.2-dev0">
36 CMSIS-Core: 5.0.2 (see revision history for details)
37 - Added macros __UNALIGNED_UINT16_READ, __UNALIGNED_UINT16_WRITE
38 - Added macros __UNALIGNED_UINT32_READ, __UNALIGNED_UINT32_WRITE
39 - Set macro __UNALIGNED_UINT32 to deprecated
40 </release>
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]41 <release version="5.0.1" date="2017-02-03">
42 Package Description:
43 - added taxonomy for Cclass RTOS
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]44 CMSIS-RTOS2:
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]45 - API 2.1 (see revision history for details)
46 - RTX 5.1.0 (see revision history for details)
47 CMSIS-Core: 5.0.1 (see revision history for details)
48 - Added __PACKED_STRUCT macro
49 - Added uVisior support
50 - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
51 - Updated template for secure main function (main_s.c)
52 - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
53 CMSIS-DSP: 1.5.1 (see revision history for details)
54 - added ARMv8M DSP libraries.
55 CMSIS-PACK:1.4.9 (see revision history for details)
56 - added Pack Index File specification and schema file
Martin Güntherd1060532016-11-15 09:43:43 +0100[diff] [blame]57 </release>
Joachim Krechc45bb4a2016-11-11 11:01:22 +0100[diff] [blame]58 <release version="5.0.0" date="2016-11-11">
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]59 Changed open source license to Apache 2.0
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]60 CMSIS_Core:
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]61 - Added support for Cortex-M23 and Cortex-M33.
62 - Added ARMv8-M device configurations for mainline and baseline.
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]63 - Added CMSE support and thread context management for TrustZone for ARMv8-M
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]64 - Added cmsis_compiler.h to unify compiler behaviour.
65 - Updated function SCB_EnableICache (for Cortex-M7).
66 - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
67 CMSIS-RTOS:
68 - bug fix in RTX 4.82 (see revision history for details)
69 CMSIS-RTOS2:
70 - new API including compatibility layer to CMSIS-RTOS
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]71 - reference implementation based on RTX5
72 - supports all Cortex-M variants including TrustZone for ARMv8-M
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]73 CMSIS-SVD:
74 - reworked SVD format documentation
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]75 - removed SVD file database documentation as SVD files are distributed in packs
76 - updated SVDConv for Win32 and Linux
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]77 CMSIS-DSP:
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]78 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
79 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]80 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]81 <release version="4.5.0" date="2015-10-28">
82 - CMSIS-Core 4.30.0 (see revision history for details)
83 - CMSIS-DAP 1.1.0 (unchanged)
84 - CMSIS-Driver 2.04.0 (see revision history for details)
85 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
86 - CMSIS-PACK 1.4.1 (see revision history for details)
87 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
88 - CMSIS-SVD 1.3.1 (see revision history for details)
89 </release>
90 <release version="4.4.0" date="2015-09-11">
91 - CMSIS-Core 4.20 (see revision history for details)
92 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
93 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
94 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
95 - CMSIS-RTOS
96 -- API 1.02 (unchanged)
97 -- RTX 4.79 (see revision history for details)
98 - CMSIS-SVD 1.3.0 (see revision history for details)
99 - CMSIS-DAP 1.1.0 (extended with SWO support)
100 </release>
101 <release version="4.3.0" date="2015-03-20">
102 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
103 - CMSIS-DSP 1.4.5 (see revision history for details)
104 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
105 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
106 - CMSIS-RTOS
107 -- API 1.02 (unchanged)
108 -- RTX 4.78 (see revision history for details)
109 - CMSIS-SVD 1.2 (unchanged)
110 </release>
111 <release version="4.2.0" date="2014-09-24">
112 Adding Cortex-M7 support
113 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
114 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
115 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
116 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
117 - CMSIS-RTOS RTX 4.75 (see revision history for details)
118 </release>
119 <release version="4.1.1" date="2014-06-30">
120 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
121 </release>
122 <release version="4.1.0" date="2014-06-12">
123 - CMSIS-Driver 2.02 (incompatible update)
124 - CMSIS-Pack 1.3 (see revision history for details)
125 - CMSIS-DSP 1.4.2 (unchanged)
126 - CMSIS-Core 3.30 (unchanged)
127 - CMSIS-RTOS RTX 4.74 (unchanged)
128 - CMSIS-RTOS API 1.02 (unchanged)
129 - CMSIS-SVD 1.10 (unchanged)
130 PACK:
131 - removed G++ specific files from PACK
132 - added Component Startup variant "C Startup"
133 - added Pack Checking Utility
134 - updated conditions to reflect tool-chain dependency
135 - added Taxonomy for Graphics
136 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
137 </release>
138 <release version="4.0.0">
139 - CMSIS-Driver 2.00 Preliminary (incompatible update)
140 - CMSIS-Pack 1.1 Preliminary
141 - CMSIS-DSP 1.4.2 (see revision history for details)
142 - CMSIS-Core 3.30 (see revision history for details)
143 - CMSIS-RTOS RTX 4.74 (see revision history for details)
144 - CMSIS-RTOS API 1.02 (unchanged)
145 - CMSIS-SVD 1.10 (unchanged)
146 </release>
147 <release version="3.20.4">
148 - CMSIS-RTOS 4.74 (see revision history for details)
149 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
150 </release>
151 <release version="3.20.3">
152 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
153 - CMSIS-RTOS 4.73 (see revision history for details)
154 </release>
155 <release version="3.20.2">
156 - CMSIS-Pack documentation has been added
157 - CMSIS-Drivers header and documentation have been added to PACK
158 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
159 </release>
160 <release version="3.20.1">
161 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
162 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
163 </release>
164 <release version="3.20.0">
165 The software portions that are deployed in the application program are now under a BSD license which allows usage
166 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
167 The individual components have been update as listed below:
168 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
169 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
170 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
171 - CMSIS-SVD is unchanged.
172 </release>
173 </releases>
174
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]175 <taxonomy>
176 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
177 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
178 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
179 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
180 <description Cclass="File System">File Drive Support and File System</description>
181 <description Cclass="Graphics">Graphical User Interface</description>
182 <description Cclass="Network">Network Stack using Internet Protocols</description>
183 <description Cclass="USB">Universal Serial Bus Stack</description>
Joachim Krech2384b8a2017-02-02 15:58:30 +0100[diff] [blame]184 <description Cclass="Compiler">Compiler Software Extensions</description>
Joachim Krech62838c82017-02-02 15:54:57 +0100[diff] [blame]185 <description Cclass="RTOS">Real-time Operating System</description>
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]186 </taxonomy>
187
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]188 <devices>
189 <!-- ****************************** Cortex-M0 ****************************** -->
190 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]191 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]192 <description>
193The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
194- simple, easy-to-use programmers model
195- highly efficient ultra-low power operation
196- excellent code density
197- deterministic, high-performance interrupt handling
198- upward compatibility with the rest of the Cortex-M processor family.
199 </description>
200 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
201 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
202 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
203 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
204
205 <device Dname="ARMCM0">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]206 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]207 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
208 </device>
209 </family>
210
211 <!-- ****************************** Cortex-M0P ****************************** -->
212 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]213 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]214 <description>
215The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
216- simple, easy-to-use programmers model
217- highly efficient ultra-low power operation
218- excellent code density
219- deterministic, high-performance interrupt handling
220- upward compatibility with the rest of the Cortex-M processor family.
221 </description>
222 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
223 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
224 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
225 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
226
227 <device Dname="ARMCM0P">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]228 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]229 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
230 </device>
231 </family>
232
233 <!-- ****************************** Cortex-M3 ****************************** -->
234 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]235 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]236 <description>
237The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
238- simple, easy-to-use programmers model
239- highly efficient ultra-low power operation
240- excellent code density
241- deterministic, high-performance interrupt handling
242- upward compatibility with the rest of the Cortex-M processor family.
243 </description>
244 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
245 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
246 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
247 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
248
249 <device Dname="ARMCM3">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]250 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]251 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
252 </device>
253 </family>
254
255 <!-- ****************************** Cortex-M4 ****************************** -->
256 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]257 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]258 <description>
259The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
260- simple, easy-to-use programmers model
261- highly efficient ultra-low power operation
262- excellent code density
263- deterministic, high-performance interrupt handling
264- upward compatibility with the rest of the Cortex-M processor family.
265 </description>
266 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
267 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
268 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
269 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
270
271 <device Dname="ARMCM4">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]272 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]273 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
274 </device>
275
276 <device Dname="ARMCM4_FP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]277 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]278 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
279 </device>
280 </family>
281
282 <!-- ****************************** Cortex-M7 ****************************** -->
283 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]284 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]285 <description>
Martin Güntheraa246272016-11-15 16:01:05 +0100[diff] [blame]286The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]287- simple, easy-to-use programmers model
288- highly efficient ultra-low power operation
289- excellent code density
290- deterministic, high-performance interrupt handling
291- upward compatibility with the rest of the Cortex-M processor family.
292 </description>
293 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
294 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
295 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
296 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
297
298 <device Dname="ARMCM7">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]299 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]300 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
301 </device>
302
303 <device Dname="ARMCM7_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]304 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]305 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
306 </device>
307
308 <device Dname="ARMCM7_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]309 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]310 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
311 </device>
312 </family>
313
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]314 <!-- ****************************** Cortex-M23 ********************** -->
315 <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
316 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
317 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]318The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]319It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]320Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]321 </description>
322 <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]323 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
324 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]325 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]326 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]327 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
328
329 <device Dname="ARMCM23">
330 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
331 <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
332 </device>
333
334 <device Dname="ARMCM23_TZ">
335 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
336 <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
337 </device>
338 </family>
339
340 <!-- ****************************** Cortex-M33 ****************************** -->
341 <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
342 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
343 <description>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]344The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]345class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]346 </description>
347 <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]348 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
349 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]350 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]351 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
352 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]353
354 <device Dname="ARMCM33">
355 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]356 <description>
357 no DSP Instructions, no Floating Point Unit, no TrustZone
358 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]359 <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
360 </device>
361
362 <device Dname="ARMCM33_TZ">
363 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]364 <description>
365 no DSP Instructions, no Floating Point Unit, TrustZone
366 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]367 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
368 </device>
369
370 <device Dname="ARMCM33_DSP_FP">
371 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]372 <description>
373 DSP Instructions, Single Precision Floating Point Unit, no TrustZone
374 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]375 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
376 </device>
377
378 <device Dname="ARMCM33_DSP_FP_TZ">
379 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]380 <description>
381 DSP Instructions, Single Precision Floating Point Unit, TrustZone
382 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]383 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
384 </device>
385 </family>
386
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]387 <!-- ****************************** ARMSC000 ****************************** -->
388 <family Dfamily="ARM SC000" Dvendor="ARM:82">
389 <description>
390The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
391- simple, easy-to-use programmers model
392- highly efficient ultra-low power operation
393- excellent code density
394- deterministic, high-performance interrupt handling
395 </description>
396 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
397 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
398 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
399 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
400
401 <device Dname="ARMSC000">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]402 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]403 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
404 </device>
405 </family>
406
407 <!-- ****************************** ARMSC300 ****************************** -->
408 <family Dfamily="ARM SC300" Dvendor="ARM:82">
409 <description>
410The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
411- simple, easy-to-use programmers model
412- highly efficient ultra-low power operation
413- excellent code density
414- deterministic, high-performance interrupt handling
415 </description>
416 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
417 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
418 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
419 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
420
421 <device Dname="ARMSC300">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]422 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]423 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
424 </device>
425 </family>
426
427 <!-- ****************************** ARMv8-M Baseline ********************** -->
428 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
429 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
430 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]431ARMv8-M Baseline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]432 </description>
433 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]434 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
435 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]436 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]437 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]438 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
439
440 <device Dname="ARMv8MBL">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]441 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]442 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
443 </device>
444 </family>
445
446 <!-- ****************************** ARMv8-M Mainline ****************************** -->
447 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
448 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
449 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]450ARMv8-M Mainline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]451 </description>
452 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]453 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
454 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]455 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]456 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]457 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
458
459 <device Dname="ARMv8MML">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]460 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]461 <description>
462 no DSP Instructions, no Floating Point Unit, TrustZone
463 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]464 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
465 </device>
466
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]467 <device Dname="ARMv8MML_DSP">
468 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]469 <description>
470 DSP Instructions, no Floating Point Unit, TrustZone
471 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]472 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]473 </device>
474
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]475 <device Dname="ARMv8MML_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]476 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]477 <description>
478 no DSP Instructions, Single Precision Floating Point Unit, TrustZone
479 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]480 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
481 </device>
482
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]483 <device Dname="ARMv8MML_DSP_SP">
484 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]485 <description>
486 DSP Instructions, Single Precision Floating Point Unit, TrustZone
487 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]488 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]489 </device>
490
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]491 <device Dname="ARMv8MML_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]492 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]493 <description>
494 no DSP Instructions, Double Precision Floating Point Unit, TrustZone
495 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]496 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
497 </device>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]498
499 <device Dname="ARMv8MML_DSP_DP">
500 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]501 <description>
502 DSP Instructions, Double Precision Floating Point Unit, TrustZone
503 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]504 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]505 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]506 </family>
507
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]508 <!-- ****************************** Cortex-A5 ****************************** -->
509 <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
510 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
511 <description>
512The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
513virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
514ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
515 </description>
516
517 <device Dname="ARMCA5">
518 <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
519 <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
520 </device>
521 </family>
522
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]523 <!-- ****************************** Cortex-A7 ****************************** -->
524 <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
525 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
526 <description>
527The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
528The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
529an optional integrated GIC, and an optional L2 cache controller.
530 </description>
531
532 <device Dname="ARMCA7">
533 <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
534 <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
535 </device>
536 </family>
537
538 <!-- ****************************** Cortex-A9 ****************************** -->
539 <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]540 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]541 <description>
542The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
543The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
544and 8-bit Java bytecodes in Jazelle state.
545 </description>
546
547 <device Dname="ARMCA9">
548 <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
549 <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
550 </device>
551 </family>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]552 </devices>
553
554
555 <apis>
556 <!-- CMSIS-RTOS API -->
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]557 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]558 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
559 <files>
560 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
561 </files>
562 </api>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame^]563 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.1" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]564 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
565 <files>
566 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
Robert Rostohar0a364052017-01-25 12:35:54 +0100[diff] [blame]567 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]568 </files>
569 </api>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame^]570 <!-- CMSIS Driver API -->
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]571 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]572 <description>USART Driver API for Cortex-M</description>
573 <files>
574 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
575 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
576 </files>
577 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]578 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]579 <description>SPI Driver API for Cortex-M</description>
580 <files>
581 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
582 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
583 </files>
584 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]585 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]586 <description>SAI Driver API for Cortex-M</description>
587 <files>
588 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
589 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
590 </files>
591 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]592 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]593 <description>I2C Driver API for Cortex-M</description>
594 <files>
595 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
596 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
597 </files>
598 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]599 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]600 <description>CAN Driver API for Cortex-M</description>
601 <files>
602 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
603 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
604 </files>
605 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]606 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]607 <description>Flash Driver API for Cortex-M</description>
608 <files>
609 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
610 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
611 </files>
612 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]613 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]614 <description>MCI Driver API for Cortex-M</description>
615 <files>
616 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
617 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
618 </files>
619 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]620 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]621 <description>NAND Flash Driver API for Cortex-M</description>
622 <files>
623 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
624 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
625 </files>
626 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]627 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]628 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
629 <files>
630 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
631 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
632 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
633 </files>
634 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]635 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]636 <description>Ethernet MAC Driver API for Cortex-M</description>
637 <files>
638 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
639 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
640 </files>
641 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]642 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]643 <description>Ethernet PHY Driver API for Cortex-M</description>
644 <files>
645 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
646 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
647 </files>
648 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]649 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]650 <description>USB Device Driver API for Cortex-M</description>
651 <files>
652 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
653 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
654 </files>
655 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]656 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]657 <description>USB Host Driver API for Cortex-M</description>
658 <files>
659 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
660 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
661 </files>
662 </api>
663 </apis>
664
665 <!-- conditions are dependency rules that can apply to a component or an individual file -->
666 <conditions>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]667 <!-- compiler -->
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]668 <condition id="ARMCC6">
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]669 <accept Tcompiler="ARMCC" Toptions="AC6"/>
670 <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]671 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]672 <condition id="ARMCC5">
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]673 <require Tcompiler="ARMCC" Toptions="AC5"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]674 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]675 <condition id="ARMCC">
676 <require Tcompiler="ARMCC"/>
677 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]678 <condition id="GCC">
679 <require Tcompiler="GCC"/>
680 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]681 <condition id="IAR">
682 <require Tcompiler="IAR"/>
683 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]684 <condition id="ARMCC GCC">
685 <accept Tcompiler="ARMCC"/>
686 <accept Tcompiler="GCC"/>
687 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]688 <condition id="ARMCC GCC IAR">
689 <accept Tcompiler="ARMCC"/>
690 <accept Tcompiler="GCC"/>
691 <accept Tcompiler="IAR"/>
692 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]693
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]694 <!-- ARM architecture -->
695 <condition id="ARMv6-M Device">
696 <description>ARMv6-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]697 <accept Dcore="Cortex-M0"/>
698 <accept Dcore="Cortex-M0+"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]699 <accept Dcore="SC000"/>
700 </condition>
701 <condition id="ARMv7-M Device">
702 <description>ARMv7-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]703 <accept Dcore="Cortex-M3"/>
704 <accept Dcore="Cortex-M4"/>
705 <accept Dcore="Cortex-M7"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]706 <accept Dcore="SC300"/>
707 </condition>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]708 <condition id="ARMv8-M Device">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]709 <description>ARMv8-M architecture based device</description>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]710 <accept Dcore="ARMV8MBL"/>
711 <accept Dcore="ARMV8MML"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]712 <accept Dcore="Cortex-M23"/>
713 <accept Dcore="Cortex-M33"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]714 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]715 <condition id="ARMv8-M TZ Device">
716 <description>ARMv8-M architecture based device with TrustZone</description>
717 <require condition="ARMv8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]718 <require Dtz="TZ"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]719 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]720 <condition id="ARMv6_7-M Device">
721 <description>ARMv6_7-M architecture based device</description>
722 <accept condition="ARMv6-M Device"/>
723 <accept condition="ARMv7-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]724 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]725 <condition id="ARMv6_7_8-M Device">
726 <description>ARMv6_7_8-M architecture based device</description>
727 <accept condition="ARMv6-M Device"/>
728 <accept condition="ARMv7-M Device"/>
729 <accept condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]730 </condition>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]731 <condition id="ARMv7-A Device">
732 <description>ARMv7-A architecture based device</description>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]733 <accept Dcore="Cortex-A5"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]734 <accept Dcore="Cortex-A7"/>
735 <accept Dcore="Cortex-A9"/>
736 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]737
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]738 <!-- ARM core -->
739 <condition id="CM0">
740 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
741 <accept Dcore="Cortex-M0"/>
742 <accept Dcore="Cortex-M0+"/>
743 <accept Dcore="SC000"/>
744 </condition>
745 <condition id="CM3">
746 <description>Cortex-M3 or SC300 processor based device</description>
747 <accept Dcore="Cortex-M3"/>
748 <accept Dcore="SC300"/>
749 </condition>
750 <condition id="CM4">
751 <description>Cortex-M4 processor based device</description>
752 <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
753 </condition>
754 <condition id="CM4_FP">
755 <description>Cortex-M4 processor based device using Floating Point Unit</description>
756 <require Dcore="Cortex-M4" Dfpu="FPU"/>
757 </condition>
758 <condition id="CM7">
759 <description>Cortex-M7 processor based device</description>
760 <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
761 </condition>
762 <condition id="CM7_FP">
763 <description>Cortex-M7 processor based device using Floating Point Unit</description>
764 <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
765 <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
766 </condition>
767 <condition id="CM7_SP">
768 <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
769 <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
770 </condition>
771 <condition id="CM7_DP">
772 <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
773 <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
774 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]775 <condition id="CM23">
776 <description>Cortex-M23 processor based device</description>
777 <require Dcore="Cortex-M23"/>
778 </condition>
779 <condition id="CM33">
780 <description>Cortex-M33 processor based device</description>
781 <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
782 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]783 <condition id="CM33_FP">
784 <description>Cortex-M33 processor based device using Floating Point Unit</description>
785 <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
786 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]787 <condition id="ARMv8MBL">
788 <description>ARMv8-M Baseline processor based device</description>
789 <require Dcore="ARMV8MBL"/>
790 </condition>
791 <condition id="ARMv8MML">
792 <description>ARMv8-M Mainline processor based device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]793 <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
794 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]795 <condition id="ARMv8MML_FP">
796 <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
797 <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
798 <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]799 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]800
801 <condition id="CM33_NODSP_NOFPU">
802 <description>CM33, no DSP, no FPU</description>
803 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
804 </condition>
805 <condition id="CM33_DSP_NOFPU">
806 <description>CM33, DSP, no FPU</description>
807 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
808 </condition>
809 <condition id="CM33_NODSP_SP">
810 <description>CM33, no DSP, SP FPU</description>
811 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
812 </condition>
813 <condition id="CM33_DSP_SP">
814 <description>CM33, DSP, SP FPU</description>
815 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
816 </condition>
817
818 <condition id="ARMv8MML_NODSP_NOFPU">
819 <description>ARMv8MML, no DSP, no FPU</description>
820 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
821 </condition>
822 <condition id="ARMv8MML_DSP_NOFPU">
823 <description>ARMv8MML, DSP, no FPU</description>
824 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
825 </condition>
826 <condition id="ARMv8MML_NODSP_SP">
827 <description>ARMv8MML, no DSP, SP FPU</description>
828 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]829 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]830 <condition id="ARMv8MML_DSP_SP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]831 <description>ARMv8MML, DSP, SP FPU</description>
832 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]833 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]834
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]835 <!-- Cortex-A Devices -->
836 <condition id="RZ_A Device">
837 <description>Renesas RZ_A Device</description>
838 <require Dvendor="Renesas:117"/>
839 <require Dfamily="RZ_A"/>
840 </condition>
841 <condition id="Unknown Cortex-A Device">
842 <description>Unknown Cortex-A Device</description>
843 <require condition="ARMv7-A Device"/>
844 <deny condition="RZ_A Device"/>
845 </condition>
846
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]847 <!-- ARMCC compiler -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]848 <condition id="CA_ARMCC5">
849 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]850 <require condition="ARMv7-A Device"/>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]851 <require condition="ARMCC5"/>
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]852 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]853 <condition id="CA_ARMCC6">
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]854 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
855 <require condition="ARMv7-A Device"/>
856 <require condition="ARMCC6"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]857 </condition>
858
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]859 <condition id="CM0_ARMCC">
860 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
861 <require condition="CM0"/>
862 <require Tcompiler="ARMCC"/>
863 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]864 <condition id="CM0_LE_ARMCC">
865 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]866 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]867 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]868 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]869 <condition id="CM0_BE_ARMCC">
870 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]871 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]872 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]873 </condition>
874
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]875 <condition id="CM3_ARMCC">
876 <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
877 <require condition="CM3"/>
878 <require Tcompiler="ARMCC"/>
879 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]880 <condition id="CM3_LE_ARMCC">
881 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]882 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]883 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]884 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]885 <condition id="CM3_BE_ARMCC">
886 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]887 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]888 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]889 </condition>
890
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]891 <condition id="CM4_ARMCC">
892 <description>Cortex-M4 processor based device for the ARM Compiler</description>
893 <require condition="CM4"/>
894 <require Tcompiler="ARMCC"/>
895 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]896 <condition id="CM4_LE_ARMCC">
897 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]898 <require condition="CM4_ARMCC"/>
899 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]900 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]901 <condition id="CM4_BE_ARMCC">
902 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]903 <require condition="CM4_ARMCC"/>
904 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]905 </condition>
906
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]907 <condition id="CM4_FP_ARMCC">
908 <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
909 <require condition="CM4_FP"/>
910 <require Tcompiler="ARMCC"/>
911 </condition>
912 <condition id="CM4_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]913 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]914 <require condition="CM4_FP_ARMCC"/>
915 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]916 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]917 <condition id="CM4_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]918 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]919 <require condition="CM4_FP_ARMCC"/>
920 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]921 </condition>
922
923 <!-- XMC 4000 Series devices from Infineon require a special library -->
924 <condition id="CM4_LE_ARMCC_STD">
925 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
926 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
927 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
928 <require Tcompiler="ARMCC"/>
929 </condition>
930 <condition id="CM4_LE_ARMCC_IFX">
931 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
932 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
933 <require Tcompiler="ARMCC"/>
934 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]935 <condition id="CM4_FP_LE_ARMCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]936 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
937 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
938 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
939 <require Tcompiler="ARMCC"/>
940 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]941 <condition id="CM4_FP_LE_ARMCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]942 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
943 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
944 <require Tcompiler="ARMCC"/>
945 </condition>
946
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]947 <condition id="CM7_ARMCC">
948 <description>Cortex-M7 processor based device for the ARM Compiler</description>
949 <require condition="CM7"/>
950 <require Tcompiler="ARMCC"/>
951 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]952 <condition id="CM7_LE_ARMCC">
953 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]954 <require condition="CM7_ARMCC"/>
955 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]956 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]957 <condition id="CM7_BE_ARMCC">
958 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]959 <require condition="CM7_ARMCC"/>
960 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]961 </condition>
962
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]963 <condition id="CM7_FP_ARMCC">
964 <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
965 <require condition="CM7_FP"/>
966 <require Tcompiler="ARMCC"/>
967 </condition>
968 <condition id="CM7_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]969 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]970 <require condition="CM7_FP_ARMCC"/>
971 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]972 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]973 <condition id="CM7_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]974 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]975 <require condition="CM7_FP_ARMCC"/>
976 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]977 </condition>
978
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]979 <condition id="CM7_SP_ARMCC">
980 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
981 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]982 <require Tcompiler="ARMCC"/>
983 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]984 <condition id="CM7_SP_LE_ARMCC">
985 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
986 <require condition="CM7_SP_ARMCC"/>
987 <require Dendian="Little-endian"/>
988 </condition>
989 <condition id="CM7_SP_BE_ARMCC">
990 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
991 <require condition="CM7_SP_ARMCC"/>
992 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]993 </condition>
994
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]995 <condition id="CM7_DP_ARMCC">
996 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
997 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]998 <require Tcompiler="ARMCC"/>
999 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1000 <condition id="CM7_DP_LE_ARMCC">
1001 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1002 <require condition="CM7_DP_ARMCC"/>
1003 <require Dendian="Little-endian"/>
1004 </condition>
1005 <condition id="CM7_DP_BE_ARMCC">
1006 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1007 <require condition="CM7_DP_ARMCC"/>
1008 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1009 </condition>
1010
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1011 <condition id="CM23_ARMCC">
1012 <description>Cortex-M23 processor based device for the ARM Compiler</description>
1013 <require condition="CM23"/>
1014 <require Tcompiler="ARMCC"/>
1015 </condition>
1016 <condition id="CM23_LE_ARMCC">
1017 <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1018 <require condition="CM23_ARMCC"/>
1019 <require Dendian="Little-endian"/>
1020 </condition>
1021 <condition id="CM23_BE_ARMCC">
1022 <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1023 <require condition="CM23_ARMCC"/>
1024 <require Dendian="Big-endian"/>
1025 </condition>
1026
1027 <condition id="CM33_ARMCC">
1028 <description>Cortex-M33 processor based device for the ARM Compiler</description>
1029 <require condition="CM33"/>
1030 <require Tcompiler="ARMCC"/>
1031 </condition>
1032 <condition id="CM33_LE_ARMCC">
1033 <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1034 <require condition="CM33_ARMCC"/>
1035 <require Dendian="Little-endian"/>
1036 </condition>
1037 <condition id="CM33_BE_ARMCC">
1038 <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1039 <require condition="CM33_ARMCC"/>
1040 <require Dendian="Big-endian"/>
1041 </condition>
1042
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1043 <condition id="CM33_FP_ARMCC">
1044 <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1045 <require condition="CM33_FP"/>
1046 <require Tcompiler="ARMCC"/>
1047 </condition>
1048 <condition id="CM33_FP_LE_ARMCC">
1049 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1050 <require condition="CM33_FP_ARMCC"/>
1051 <require Dendian="Little-endian"/>
1052 </condition>
1053 <condition id="CM33_FP_BE_ARMCC">
1054 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1055 <require condition="CM33_FP_ARMCC"/>
1056 <require Dendian="Big-endian"/>
1057 </condition>
1058
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1059 <condition id="CM33_NODSP_NOFPU_ARMCC">
1060 <description>CM33, no DSP, no FPU, ARM Compiler</description>
1061 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1062 <require Tcompiler="ARMCC"/>
1063 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1064 <condition id="CM33_DSP_NOFPU_ARMCC">
1065 <description>CM33, DSP, no FPU, ARM Compiler</description>
1066 <require condition="CM33_DSP_NOFPU"/>
1067 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1068 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1069 <condition id="CM33_NODSP_SP_ARMCC">
1070 <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1071 <require condition="CM33_NODSP_SP"/>
1072 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1073 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1074 <condition id="CM33_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1075 <description>CM33, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1076 <require condition="CM33_DSP_SP"/>
1077 <require Tcompiler="ARMCC"/>
1078 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1079 <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1080 <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1081 <require condition="CM33_NODSP_NOFPU_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1082 <require Dendian="Little-endian"/>
1083 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1084 <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1085 <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1086 <require condition="CM33_DSP_NOFPU_ARMCC"/>
1087 <require Dendian="Little-endian"/>
1088 </condition>
1089 <condition id="CM33_NODSP_SP_LE_ARMCC">
1090 <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1091 <require condition="CM33_NODSP_SP_ARMCC"/>
1092 <require Dendian="Little-endian"/>
1093 </condition>
1094 <condition id="CM33_DSP_SP_LE_ARMCC">
1095 <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1096 <require condition="CM33_DSP_SP_ARMCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1097 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1098 </condition>
1099
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1100 <condition id="ARMv8MBL_ARMCC">
1101 <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1102 <require condition="ARMv8MBL"/>
1103 <require Tcompiler="ARMCC"/>
1104 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1105 <condition id="ARMv8MBL_LE_ARMCC">
1106 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1107 <require condition="ARMv8MBL_ARMCC"/>
1108 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1109 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1110 <condition id="ARMv8MBL_BE_ARMCC">
1111 <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1112 <require condition="ARMv8MBL_ARMCC"/>
1113 <require Dendian="Big-endian"/>
1114 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1115
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1116 <condition id="ARMv8MML_ARMCC">
1117 <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1118 <require condition="ARMv8MML"/>
1119 <require Tcompiler="ARMCC"/>
1120 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1121 <condition id="ARMv8MML_LE_ARMCC">
1122 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1123 <require condition="ARMv8MML_ARMCC"/>
1124 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1125 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1126 <condition id="ARMv8MML_BE_ARMCC">
1127 <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1128 <require condition="ARMv8MML_ARMCC"/>
1129 <require Dendian="Big-endian"/>
1130 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1131
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1132 <condition id="ARMv8MML_FP_ARMCC">
1133 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1134 <require condition="ARMv8MML_FP"/>
1135 <require Tcompiler="ARMCC"/>
1136 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1137 <condition id="ARMv8MML_FP_LE_ARMCC">
1138 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1139 <require condition="ARMv8MML_FP_ARMCC"/>
1140 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1141 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1142 <condition id="ARMv8MML_FP_BE_ARMCC">
1143 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1144 <require condition="ARMv8MML_FP_ARMCC"/>
1145 <require Dendian="Big-endian"/>
1146 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1147
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1148 <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1149 <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1150 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1151 <require Tcompiler="ARMCC"/>
1152 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1153 <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1154 <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1155 <require condition="ARMv8MML_DSP_NOFPU"/>
1156 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1157 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1158 <condition id="ARMv8MML_NODSP_SP_ARMCC">
1159 <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1160 <require condition="ARMv8MML_NODSP_SP"/>
1161 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1162 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1163 <condition id="ARMv8MML_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1164 <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1165 <require condition="ARMv8MML_DSP_SP"/>
1166 <require Tcompiler="ARMCC"/>
1167 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1168 <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1169 <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1170 <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1171 <require Dendian="Little-endian"/>
1172 </condition>
1173 <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1174 <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1175 <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1176 <require Dendian="Little-endian"/>
1177 </condition>
1178 <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1179 <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1180 <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1181 <require Dendian="Little-endian"/>
1182 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1183 <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1184 <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1185 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1186 <require Dendian="Little-endian"/>
1187 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1188
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1189 <!-- GCC compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1190 <condition id="CA_GCC">
1191 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1192 <require condition="ARMv7-A Device"/>
1193 <require Tcompiler="GCC"/>
1194 </condition>
1195
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1196 <condition id="CM0_GCC">
1197 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1198 <require condition="CM0"/>
1199 <require Tcompiler="GCC"/>
1200 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1201 <condition id="CM0_LE_GCC">
1202 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1203 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1204 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1205 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1206 <condition id="CM0_BE_GCC">
1207 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1208 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1209 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1210 </condition>
1211
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1212 <condition id="CM3_GCC">
1213 <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1214 <require condition="CM3"/>
1215 <require Tcompiler="GCC"/>
1216 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1217 <condition id="CM3_LE_GCC">
1218 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1219 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1220 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1221 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1222 <condition id="CM3_BE_GCC">
1223 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1224 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1225 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1226 </condition>
1227
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1228 <condition id="CM4_GCC">
1229 <description>Cortex-M4 processor based device for the GCC Compiler</description>
1230 <require condition="CM4"/>
1231 <require Tcompiler="GCC"/>
1232 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1233 <condition id="CM4_LE_GCC">
1234 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1235 <require condition="CM4_GCC"/>
1236 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1237 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1238 <condition id="CM4_BE_GCC">
1239 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1240 <require condition="CM4_GCC"/>
1241 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1242 </condition>
1243
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1244 <condition id="CM4_FP_GCC">
1245 <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1246 <require condition="CM4_FP"/>
1247 <require Tcompiler="GCC"/>
1248 </condition>
1249 <condition id="CM4_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1250 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1251 <require condition="CM4_FP_GCC"/>
1252 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1253 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1254 <condition id="CM4_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1255 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1256 <require condition="CM4_FP_GCC"/>
1257 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1258 </condition>
1259
1260 <!-- XMC 4000 Series devices from Infineon require a special library -->
1261 <condition id="CM4_LE_GCC_STD">
1262 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1263 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1264 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1265 <require Tcompiler="GCC"/>
1266 </condition>
1267 <condition id="CM4_LE_GCC_IFX">
1268 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1269 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1270 <require Tcompiler="GCC"/>
1271 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1272 <condition id="CM4_FP_LE_GCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1273 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1274 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1275 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1276 <require Tcompiler="GCC"/>
1277 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1278 <condition id="CM4_FP_LE_GCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1279 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1280 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1281 <require Tcompiler="GCC"/>
1282 </condition>
1283
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1284 <condition id="CM7_GCC">
1285 <description>Cortex-M7 processor based device for the GCC Compiler</description>
1286 <require condition="CM7"/>
1287 <require Tcompiler="GCC"/>
1288 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1289 <condition id="CM7_LE_GCC">
1290 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1291 <require condition="CM7_GCC"/>
1292 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1293 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1294 <condition id="CM7_BE_GCC">
1295 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1296 <require condition="CM7_GCC"/>
1297 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1298 </condition>
1299
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1300 <condition id="CM7_FP_GCC">
1301 <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1302 <require condition="CM7_FP"/>
1303 <require Tcompiler="GCC"/>
1304 </condition>
1305 <condition id="CM7_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1306 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1307 <require condition="CM7_FP_GCC"/>
1308 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1309 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1310 <condition id="CM7_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1311 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1312 <require condition="CM7_FP_GCC"/>
1313 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1314 </condition>
1315
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1316 <condition id="CM7_SP_GCC">
1317 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1318 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1319 <require Tcompiler="GCC"/>
1320 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1321 <condition id="CM7_SP_LE_GCC">
1322 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1323 <require condition="CM7_SP_GCC"/>
1324 <require Dendian="Little-endian"/>
1325 </condition>
1326 <condition id="CM7_SP_BE_GCC">
1327 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1328 <require condition="CM7_SP_GCC"/>
1329 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1330 </condition>
1331
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1332 <condition id="CM7_DP_GCC">
1333 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1334 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1335 <require Tcompiler="GCC"/>
1336 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1337 <condition id="CM7_DP_LE_GCC">
1338 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1339 <require condition="CM7_DP_GCC"/>
1340 <require Dendian="Little-endian"/>
1341 </condition>
1342 <condition id="CM7_DP_BE_GCC">
1343 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1344 <require condition="CM7_DP_GCC"/>
1345 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1346 </condition>
1347
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1348 <condition id="CM23_GCC">
1349 <description>Cortex-M23 processor based device for the GCC Compiler</description>
1350 <require condition="CM23"/>
1351 <require Tcompiler="GCC"/>
1352 </condition>
1353 <condition id="CM23_LE_GCC">
1354 <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1355 <require condition="CM23_GCC"/>
1356 <require Dendian="Little-endian"/>
1357 </condition>
1358 <condition id="CM23_BE_GCC">
1359 <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1360 <require condition="CM23_GCC"/>
1361 <require Dendian="Big-endian"/>
1362 </condition>
1363
1364 <condition id="CM33_GCC">
1365 <description>Cortex-M33 processor based device for the GCC Compiler</description>
1366 <require condition="CM33"/>
1367 <require Tcompiler="GCC"/>
1368 </condition>
1369 <condition id="CM33_LE_GCC">
1370 <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1371 <require condition="CM33_GCC"/>
1372 <require Dendian="Little-endian"/>
1373 </condition>
1374 <condition id="CM33_BE_GCC">
1375 <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1376 <require condition="CM33_GCC"/>
1377 <require Dendian="Big-endian"/>
1378 </condition>
1379
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1380 <condition id="CM33_FP_GCC">
1381 <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1382 <require condition="CM33_FP"/>
1383 <require Tcompiler="GCC"/>
1384 </condition>
1385 <condition id="CM33_FP_LE_GCC">
1386 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1387 <require condition="CM33_FP_GCC"/>
1388 <require Dendian="Little-endian"/>
1389 </condition>
1390 <condition id="CM33_FP_BE_GCC">
1391 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1392 <require condition="CM33_FP_GCC"/>
1393 <require Dendian="Big-endian"/>
1394 </condition>
1395
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1396 <condition id="CM33_NODSP_NOFPU_GCC">
1397 <description>CM33, no DSP, no FPU, GCC Compiler</description>
1398 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1399 <require Tcompiler="GCC"/>
1400 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1401 <condition id="CM33_DSP_NOFPU_GCC">
1402 <description>CM33, DSP, no FPU, GCC Compiler</description>
1403 <require condition="CM33_DSP_NOFPU"/>
1404 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1405 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1406 <condition id="CM33_NODSP_SP_GCC">
1407 <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1408 <require condition="CM33_NODSP_SP"/>
1409 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1410 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1411 <condition id="CM33_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1412 <description>CM33, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1413 <require condition="CM33_DSP_SP"/>
1414 <require Tcompiler="GCC"/>
1415 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1416 <condition id="CM33_NODSP_NOFPU_LE_GCC">
1417 <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1418 <require condition="CM33_NODSP_NOFPU_GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1419 <require Dendian="Little-endian"/>
1420 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1421 <condition id="CM33_DSP_NOFPU_LE_GCC">
1422 <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1423 <require condition="CM33_DSP_NOFPU_GCC"/>
1424 <require Dendian="Little-endian"/>
1425 </condition>
1426 <condition id="CM33_NODSP_SP_LE_GCC">
1427 <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1428 <require condition="CM33_NODSP_SP_GCC"/>
1429 <require Dendian="Little-endian"/>
1430 </condition>
1431 <condition id="CM33_DSP_SP_LE_GCC">
1432 <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1433 <require condition="CM33_DSP_SP_GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1434 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1435 </condition>
1436
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1437 <condition id="ARMv8MBL_GCC">
1438 <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1439 <require condition="ARMv8MBL"/>
1440 <require Tcompiler="GCC"/>
1441 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1442 <condition id="ARMv8MBL_LE_GCC">
1443 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1444 <require condition="ARMv8MBL_GCC"/>
1445 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1446 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1447 <condition id="ARMv8MBL_BE_GCC">
1448 <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1449 <require condition="ARMv8MBL_GCC"/>
1450 <require Dendian="Big-endian"/>
1451 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1452
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1453 <condition id="ARMv8MML_GCC">
1454 <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1455 <require condition="ARMv8MML"/>
1456 <require Tcompiler="GCC"/>
1457 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1458 <condition id="ARMv8MML_LE_GCC">
1459 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1460 <require condition="ARMv8MML_GCC"/>
1461 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1462 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1463 <condition id="ARMv8MML_BE_GCC">
1464 <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1465 <require condition="ARMv8MML_GCC"/>
1466 <require Dendian="Big-endian"/>
1467 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1468
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1469 <condition id="ARMv8MML_FP_GCC">
1470 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1471 <require condition="ARMv8MML_FP"/>
1472 <require Tcompiler="GCC"/>
1473 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1474 <condition id="ARMv8MML_FP_LE_GCC">
1475 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1476 <require condition="ARMv8MML_FP_GCC"/>
1477 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1478 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1479 <condition id="ARMv8MML_FP_BE_GCC">
1480 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1481 <require condition="ARMv8MML_FP_GCC"/>
1482 <require Dendian="Big-endian"/>
1483 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1484
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1485 <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1486 <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1487 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1488 <require Tcompiler="GCC"/>
1489 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1490 <condition id="ARMv8MML_DSP_NOFPU_GCC">
1491 <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1492 <require condition="ARMv8MML_DSP_NOFPU"/>
1493 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1494 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1495 <condition id="ARMv8MML_NODSP_SP_GCC">
1496 <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1497 <require condition="ARMv8MML_NODSP_SP"/>
1498 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1499 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1500 <condition id="ARMv8MML_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1501 <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1502 <require condition="ARMv8MML_DSP_SP"/>
1503 <require Tcompiler="GCC"/>
1504 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1505 <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1506 <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1507 <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1508 <require Dendian="Little-endian"/>
1509 </condition>
1510 <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1511 <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1512 <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1513 <require Dendian="Little-endian"/>
1514 </condition>
1515 <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1516 <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1517 <require condition="ARMv8MML_NODSP_SP_GCC"/>
1518 <require Dendian="Little-endian"/>
1519 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1520 <condition id="ARMv8MML_DSP_SP_LE_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1521 <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1522 <require condition="ARMv8MML_DSP_SP_GCC"/>
1523 <require Dendian="Little-endian"/>
1524 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1525
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1526 <!-- IAR compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1527 <condition id="CA_IAR">
1528 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1529 <require condition="ARMv7-A Device"/>
1530 <require Tcompiler="IAR"/>
1531 </condition>
1532
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1533 <condition id="CM0_IAR">
1534 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1535 <require condition="CM0"/>
1536 <require Tcompiler="IAR"/>
1537 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1538 <condition id="CM0_LE_IAR">
1539 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1540 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1541 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1542 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1543 <condition id="CM0_BE_IAR">
1544 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1545 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1546 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1547 </condition>
1548
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1549 <condition id="CM3_IAR">
1550 <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1551 <require condition="CM3"/>
1552 <require Tcompiler="IAR"/>
1553 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1554 <condition id="CM3_LE_IAR">
1555 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1556 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1557 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1558 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1559 <condition id="CM3_BE_IAR">
1560 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1561 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1562 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1563 </condition>
1564
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1565 <condition id="CM4_IAR">
1566 <description>Cortex-M4 processor based device for the IAR Compiler</description>
1567 <require condition="CM4"/>
1568 <require Tcompiler="IAR"/>
1569 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1570 <condition id="CM4_LE_IAR">
1571 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1572 <require condition="CM4_IAR"/>
1573 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1574 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1575 <condition id="CM4_BE_IAR">
1576 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1577 <require condition="CM4_IAR"/>
1578 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1579 </condition>
1580
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1581 <condition id="CM4_FP_IAR">
1582 <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1583 <require condition="CM4_FP"/>
1584 <require Tcompiler="IAR"/>
1585 </condition>
1586 <condition id="CM4_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1587 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1588 <require condition="CM4_FP_IAR"/>
1589 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1590 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1591 <condition id="CM4_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1592 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1593 <require condition="CM4_FP_IAR"/>
1594 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1595 </condition>
1596
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1597 <condition id="CM7_IAR">
1598 <description>Cortex-M7 processor based device for the IAR Compiler</description>
1599 <require condition="CM7"/>
1600 <require Tcompiler="IAR"/>
1601 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1602 <condition id="CM7_LE_IAR">
1603 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1604 <require condition="CM7_IAR"/>
1605 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1606 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1607 <condition id="CM7_BE_IAR">
1608 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1609 <require condition="CM7_IAR"/>
1610 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1611 </condition>
1612
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1613 <condition id="CM7_FP_IAR">
1614 <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1615 <require condition="CM7_FP"/>
1616 <require Tcompiler="IAR"/>
1617 </condition>
1618 <condition id="CM7_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1619 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1620 <require condition="CM7_FP_IAR"/>
1621 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1622 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1623 <condition id="CM7_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1624 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1625 <require condition="CM7_FP_IAR"/>
1626 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1627 </condition>
1628
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1629 <condition id="CM7_SP_IAR">
1630 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1631 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1632 <require Tcompiler="IAR"/>
1633 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1634 <condition id="CM7_SP_LE_IAR">
1635 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1636 <require condition="CM7_SP_IAR"/>
1637 <require Dendian="Little-endian"/>
1638 </condition>
1639 <condition id="CM7_SP_BE_IAR">
1640 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1641 <require condition="CM7_SP_IAR"/>
1642 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1643 </condition>
1644
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1645 <condition id="CM7_DP_IAR">
1646 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1647 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1648 <require Tcompiler="IAR"/>
1649 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1650 <condition id="CM7_DP_LE_IAR">
1651 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1652 <require condition="CM7_DP_IAR"/>
1653 <require Dendian="Little-endian"/>
1654 </condition>
1655 <condition id="CM7_DP_BE_IAR">
1656 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1657 <require condition="CM7_DP_IAR"/>
1658 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1659 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1660
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1661 <!-- conditions selecting single devices and CMSIS Core -->
1662 <!-- used for component startup, GCC version is used for C-Startup -->
1663 <condition id="ARMCM0 CMSIS">
1664 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1665 <require Dvendor="ARM:82" Dname="ARMCM0"/>
1666 <require Cclass="CMSIS" Cgroup="CORE"/>
1667 </condition>
1668 <condition id="ARMCM0 CMSIS GCC">
1669 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1670 <require condition="ARMCM0 CMSIS"/>
1671 <require condition="GCC"/>
1672 </condition>
1673
1674 <condition id="ARMCM0+ CMSIS">
1675 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1676 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1677 <require Cclass="CMSIS" Cgroup="CORE"/>
1678 </condition>
1679 <condition id="ARMCM0+ CMSIS GCC">
1680 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1681 <require condition="ARMCM0+ CMSIS"/>
1682 <require condition="GCC"/>
1683 </condition>
1684
1685 <condition id="ARMCM3 CMSIS">
1686 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1687 <require Dvendor="ARM:82" Dname="ARMCM3"/>
1688 <require Cclass="CMSIS" Cgroup="CORE"/>
1689 </condition>
1690 <condition id="ARMCM3 CMSIS GCC">
1691 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1692 <require condition="ARMCM3 CMSIS"/>
1693 <require condition="GCC"/>
1694 </condition>
1695
1696 <condition id="ARMCM4 CMSIS">
1697 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1698 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1699 <require Cclass="CMSIS" Cgroup="CORE"/>
1700 </condition>
1701 <condition id="ARMCM4 CMSIS GCC">
1702 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1703 <require condition="ARMCM4 CMSIS"/>
1704 <require condition="GCC"/>
1705 </condition>
1706
1707 <condition id="ARMCM7 CMSIS">
1708 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1709 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1710 <require Cclass="CMSIS" Cgroup="CORE"/>
1711 </condition>
1712 <condition id="ARMCM7 CMSIS GCC">
1713 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1714 <require condition="ARMCM7 CMSIS"/>
1715 <require condition="GCC"/>
1716 </condition>
1717
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1718 <condition id="ARMCM23 CMSIS">
1719 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1720 <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1721 <require Cclass="CMSIS" Cgroup="CORE"/>
1722 </condition>
1723 <condition id="ARMCM23 CMSIS GCC">
1724 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1725 <require condition="ARMCM23 CMSIS"/>
1726 <require condition="GCC"/>
1727 </condition>
1728
1729 <condition id="ARMCM33 CMSIS">
1730 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1731 <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1732 <require Cclass="CMSIS" Cgroup="CORE"/>
1733 </condition>
1734 <condition id="ARMCM33 CMSIS GCC">
1735 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1736 <require condition="ARMCM33 CMSIS"/>
1737 <require condition="GCC"/>
1738 </condition>
1739
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1740 <condition id="ARMSC000 CMSIS">
1741 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1742 <require Dvendor="ARM:82" Dname="ARMSC000"/>
1743 <require Cclass="CMSIS" Cgroup="CORE"/>
1744 </condition>
1745 <condition id="ARMSC000 CMSIS GCC">
1746 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1747 <require condition="ARMSC000 CMSIS"/>
1748 <require condition="GCC"/>
1749 </condition>
1750
1751 <condition id="ARMSC300 CMSIS">
1752 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1753 <require Dvendor="ARM:82" Dname="ARMSC300"/>
1754 <require Cclass="CMSIS" Cgroup="CORE"/>
1755 </condition>
1756 <condition id="ARMSC300 CMSIS GCC">
1757 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1758 <require condition="ARMSC300 CMSIS"/>
1759 <require condition="GCC"/>
1760 </condition>
1761
1762 <condition id="ARMv8MBL CMSIS">
1763 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1764 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1765 <require Cclass="CMSIS" Cgroup="CORE"/>
1766 </condition>
1767 <condition id="ARMv8MBL CMSIS GCC">
1768 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1769 <require condition="ARMv8MBL CMSIS"/>
1770 <require condition="GCC"/>
1771 </condition>
1772
1773 <condition id="ARMv8MML CMSIS">
1774 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1775 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1776 <require Cclass="CMSIS" Cgroup="CORE"/>
1777 </condition>
1778 <condition id="ARMv8MML CMSIS GCC">
1779 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1780 <require condition="ARMv8MML CMSIS"/>
1781 <require condition="GCC"/>
1782 </condition>
1783
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1784 <condition id="ARMCA5 CMSIS">
1785 <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1786 <require Dvendor="ARM:82" Dname="ARMCA5"/>
1787 <require Cclass="CMSIS" Cgroup="CORE"/>
1788 </condition>
1789
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1790 <condition id="ARMCA7 CMSIS">
1791 <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1792 <require Dvendor="ARM:82" Dname="ARMCA7"/>
1793 <require Cclass="CMSIS" Cgroup="CORE"/>
1794 </condition>
1795
1796 <condition id="ARMCA9 CMSIS">
1797 <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1798 <require Dvendor="ARM:82" Dname="ARMCA9"/>
1799 <require Cclass="CMSIS" Cgroup="CORE"/>
1800 </condition>
1801
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1802 <!-- CMSIS DSP -->
1803 <condition id="CMSIS DSP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1804 <description>Components required for DSP</description>
1805 <require condition="ARMv6_7_8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1806 <require condition="ARMCC GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1807 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1808 </condition>
1809
1810 <!-- RTOS RTX -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1811 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1812 <description>Components required for RTOS RTX</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1813 <require condition="ARMv6_7-M Device"/>
1814 <require condition="ARMCC GCC IAR"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1815 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1816 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1817 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1818 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1819 <description>Components required for RTOS RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1820 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]1821 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1822 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1823 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1824 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1825 <description>Components required for RTOS2 RTX5</description>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1826 <accept condition="ARMv6_7_8-M Device"/>
1827 <accept condition="ARMv7-A Device"/>
1828 <require condition="ARMCC GCC IAR"/>
1829 <require Cclass="CMSIS" Cgroup="CORE"/>
1830 <require Cclass="Device" Cgroup="Startup"/>
1831 </condition>
1832 <condition id="RTOS2 RTX5 Lib">
1833 <description>Components required for RTOS2 RTX5 Library</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1834 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]1835 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1836 <require Cclass="CMSIS" Cgroup="CORE"/>
1837 <require Cclass="Device" Cgroup="Startup"/>
1838 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1839 <condition id="RTOS2 RTX5 NS">
1840 <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1841 <require condition="ARMv8-M TZ Device"/>
1842 <require condition="ARMCC GCC"/>
1843 <require Cclass="CMSIS" Cgroup="CORE"/>
1844 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1845 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1846
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1847 </conditions>
1848
1849 <components>
1850 <!-- CMSIS-Core component -->
Joachim Krech8cd76b42017-02-03 15:18:56 +0100[diff] [blame]1851 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.1" condition="ARMv6_7_8-M Device" >
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1852 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1853 <files>
1854 <!-- CPU independent -->
1855 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1856 <file category="include" name="CMSIS/Include/"/>
Robert Rostoharb2e07162016-11-04 10:43:56 +0100[diff] [blame]1857 <file category="header" name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]1858 <!-- Code template -->
Robert Rostohar0e71e882016-11-16 19:03:44 +0100[diff] [blame]1859 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c" version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
Robert Rostohar71f4dcf2016-11-16 19:06:01 +0100[diff] [blame]1860 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1861 </files>
1862 </component>
1863
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1864 <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0" condition="ARMv7-A Device" >
1865 <description>CMSIS-CORE for Cortex-A</description>
1866 <files>
1867 <!-- CPU independent -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1868 <file category="doc" name="CMSIS/Documentation/Core_A/html/index.html"/>
brondanib6bdb2c2017-03-02 16:15:52 +0100[diff] [blame]1869 <file category="include" name="CMSIS/Core_A/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1870 </files>
1871 </component>
1872
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1873 <!-- CMSIS-Startup components -->
1874 <!-- Cortex-M0 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1875 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1876 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1877 <files>
1878 <!-- include folder / device header file -->
1879 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1880 <!-- startup / system file -->
1881 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1882 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1883 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1884 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1885 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1886 </files>
1887 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1888 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1889 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1890 <files>
1891 <!-- include folder / device header file -->
1892 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1893 <!-- startup / system file -->
1894 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1895 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1896 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1897 </files>
1898 </component>
1899
1900 <!-- Cortex-M0+ -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1901 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1902 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1903 <files>
1904 <!-- include folder / device header file -->
1905 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1906 <!-- startup / system file -->
1907 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1908 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1909 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1910 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1911 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1912 </files>
1913 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1914 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1915 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1916 <files>
1917 <!-- include folder / device header file -->
1918 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1919 <!-- startup / system file -->
1920 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1921 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1922 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1923 </files>
1924 </component>
1925
1926 <!-- Cortex-M3 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1927 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1928 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1929 <files>
1930 <!-- include folder / device header file -->
1931 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1932 <!-- startup / system file -->
1933 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1934 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1935 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1936 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1937 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1938 </files>
1939 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1940 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1941 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1942 <files>
1943 <!-- include folder / device header file -->
1944 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1945 <!-- startup / system file -->
1946 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1947 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1948 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1949 </files>
1950 </component>
1951
1952 <!-- Cortex-M4 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1953 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1954 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1955 <files>
1956 <!-- include folder / device header file -->
1957 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1958 <!-- startup / system file -->
1959 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1960 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1961 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1962 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1963 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1964 </files>
1965 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1966 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1967 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1968 <files>
1969 <!-- include folder / device header file -->
1970 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1971 <!-- startup / system file -->
1972 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1973 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1974 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1975 </files>
1976 </component>
1977
1978 <!-- Cortex-M7 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1979 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1980 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1981 <files>
1982 <!-- include folder / device header file -->
1983 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1984 <!-- startup / system file -->
1985 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1986 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1987 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1988 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1989 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1990 </files>
1991 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1992 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1993 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1994 <files>
1995 <!-- include folder / device header file -->
1996 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1997 <!-- startup / system file -->
1998 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1999 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2000 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
2001 </files>
2002 </component>
2003
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2004 <!-- Cortex-M23 -->
2005 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS">
2006 <description>System and Startup for Generic ARM Cortex-M23 device</description>
2007 <files>
2008 <!-- include folder / device header file -->
2009 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2010 <!-- startup / system file -->
2011 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2012 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2013 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2014 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2015 <!-- SAU configuration -->
2016 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2017 </files>
2018 </component>
2019 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2020 <description>System and Startup for Generic ARM Cortex-M23 device</description>
2021 <files>
2022 <!-- include folder / device header file -->
2023 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2024 <!-- startup / system file -->
2025 <file category="sourceC" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2026 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2027 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
2028 <!-- SAU configuration -->
2029 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2030 </files>
2031 </component>
2032
2033 <!-- Cortex-M33 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2034 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2035 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2036 <files>
2037 <!-- include folder / device header file -->
2038 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2039 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2040 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
2041 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
2042 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2043 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2044 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2045 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2046 </files>
2047 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2048 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2049 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2050 <files>
2051 <!-- include folder / device header file -->
2052 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2053 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2054 <file category="sourceC" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
2055 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2056 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2057 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2058 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2059 </files>
2060 </component>
2061
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2062 <!-- Cortex-SC000 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2063 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2064 <description>System and Startup for Generic ARM SC000 device</description>
2065 <files>
2066 <!-- include folder / device header file -->
2067 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2068 <!-- startup / system file -->
2069 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2070 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2071 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2072 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2073 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2074 </files>
2075 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2076 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2077 <description>System and Startup for Generic ARM SC000 device</description>
2078 <files>
2079 <!-- include folder / device header file -->
2080 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2081 <!-- startup / system file -->
2082 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2083 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2084 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2085 </files>
2086 </component>
2087
2088 <!-- Cortex-SC300 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2089 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2090 <description>System and Startup for Generic ARM SC300 device</description>
2091 <files>
2092 <!-- include folder / device header file -->
2093 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2094 <!-- startup / system file -->
2095 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2096 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2097 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2098 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2099 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2100 </files>
2101 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2102 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2103 <description>System and Startup for Generic ARM SC300 device</description>
2104 <files>
2105 <!-- include folder / device header file -->
2106 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2107 <!-- startup / system file -->
2108 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2109 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2110 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2111 </files>
2112 </component>
2113
2114 <!-- ARMv8MBL -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2115 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2116 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2117 <files>
2118 <!-- include folder / device header file -->
2119 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2120 <!-- startup / system file -->
2121 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2122 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2123 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2124 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2125 <!-- SAU configuration -->
2126 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2127 </files>
2128 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2129 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2130 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2131 <files>
2132 <!-- include folder / device header file -->
2133 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2134 <!-- startup / system file -->
2135 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2136 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2137 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2138 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2139 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2140 </files>
2141 </component>
2142
2143 <!-- ARMv8MML -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2144 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2145 <description>System and Startup for Generic ARM ARMv8MML device</description>
2146 <files>
2147 <!-- include folder / device header file -->
2148 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2149 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2150 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2151 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2152 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2153 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2154 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2155 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2156 </files>
2157 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2158 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2159 <description>System and Startup for Generic ARM ARMv8MML device</description>
2160 <files>
2161 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2162 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2163 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2164 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2165 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2166 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2167 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2168 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2169 </files>
2170 </component>
2171
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2172 <!-- Cortex-A5 -->
2173 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA5 CMSIS">
2174 <description>System and Startup for Generic ARM Cortex-A5 device</description>
2175 <files>
2176 <!-- include folder / device header file -->
2177 <file category="include" name="Device/ARM/ARMCA5/Include/"/>
2178 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2179 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2180 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2181 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2182 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2183 <file category="sourceC" name="Device/ARM/ARMCA5/Source/system_ARMCA5.c" version="1.0.0" attr="config"/>
2184 <file category="sourceC" name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c" version="1.0.0" attr="config"/>
2185 <file category="header" name="Device/ARM/ARMCA5/Include/system_ARMCA5.h" version="1.0.0" attr="config"/>
2186 <file category="header" name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h" version="1.0.0" attr="config"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2187
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2188 </files>
2189 </component>
2190
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2191 <!-- Cortex-A7 -->
2192 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA7 CMSIS">
2193 <description>System and Startup for Generic ARM Cortex-A7 device</description>
2194 <files>
2195 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2196 <file category="include" name="Device/ARM/ARMCA7/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2197 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2198 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2199 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2200 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2201 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2202 <file category="sourceC" name="Device/ARM/ARMCA7/Source/system_ARMCA7.c" version="1.0.0" attr="config"/>
2203 <file category="sourceC" name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2204 <file category="header" name="Device/ARM/ARMCA7/Include/system_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2205 <file category="header" name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2206 </files>
2207 </component>
2208
2209 <!-- Cortex-A9 -->
2210 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA9 CMSIS">
2211 <description>System and Startup for Generic ARM Cortex-A9 device</description>
2212 <files>
2213 <!-- include folder / device header file -->
2214 <file category="include" name="Device/ARM/ARMCA9/Include/"/>
2215 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2216 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2217 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2218 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2219 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2220 <file category="sourceC" name="Device/ARM/ARMCA9/Source/system_ARMCA9.c" version="1.0.0" attr="config"/>
2221 <file category="sourceC" name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2222 <file category="header" name="Device/ARM/ARMCA9/Include/system_ARMCA9.h" version="1.0.0" attr="config"/>
2223 <file category="header" name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2224 </files>
2225 </component>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2226
2227 <!-- CMSIS-DSP component -->
Martin Günther1b4ba8f2017-02-02 14:38:48 +0100[diff] [blame]2228 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.1" condition="CMSIS DSP">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2229 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2230 <files>
2231 <!-- CPU independent -->
2232 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2233 <file category="header" name="CMSIS/Include/arm_math.h"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2234
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2235 <!-- CPU and Compiler dependent -->
2236 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2237 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2238 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2239 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2240 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2241 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2242 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2243 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2244 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2245 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2246 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2247 <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2248 <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2249 <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2250 <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2251
2252 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2253 <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2254 <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2255 <file category="library" condition="CM33_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2256 <file category="library" condition="CM33_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2257 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2258 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2259 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2260 <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2261 <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2262 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2263 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2264
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2265 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2266 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2267 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2268 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2269 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2270 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2271 <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2272 <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2273
2274 <file category="library" condition="CM23_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2275 <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2276 <file category="library" condition="CM33_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2277 <file category="library" condition="CM33_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2278 <file category="library" condition="CM33_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2279 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2280 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2281 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2282 <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2283 <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2284 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2285 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2286
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2287 </files>
2288 </component>
2289
2290 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]2291 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0.0" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2292 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2293 <RTE_Components_h>
2294 <!-- the following content goes into file 'RTE_Components.h' -->
2295 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2296 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2297 </RTE_Components_h>
2298 <files>
2299 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]2300 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2301 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2302 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2303
2304 <!-- RTX templates -->
2305 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2306 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2307 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2308 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2309 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2310 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2311 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2312 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2313 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2314 <!-- tool-chain specific template file -->
2315 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2316 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2317 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2318
2319 <!-- CPU and Compiler dependent -->
2320 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2321 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2322 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2323 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2324 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2325 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2326 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2327 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2328 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2329 <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2330 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2331 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2332 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2333 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2334 <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2335 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2336 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2337 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2338 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2339 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2340 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2341 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2342 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2343 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2344 <file category="library" condition="CM4_FP_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2345 <file category="library" condition="CM4_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2346 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2347 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2348 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2349 <file category="library" condition="CM7_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2350 <!-- IAR -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2351 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2352 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2353 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2354 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2355 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2356 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2357 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2358 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2359 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2360 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2361 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2362 <file category="library" condition="CM7_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2363 </files>
2364 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2365
2366 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame^]2367 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.0" Capiversion="1.0.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2368 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2369 <RTE_Components_h>
2370 <!-- the following content goes into file 'RTE_Components.h' -->
2371 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2372 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
2373 </RTE_Components_h>
2374 <files>
2375 <!-- RTX header file -->
2376 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2377 <!-- RTX compatibility module for API V1 -->
2378 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2379 </files>
2380 </component>
2381
2382 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame^]2383 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2384 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2385 <RTE_Components_h>
2386 <!-- the following content goes into file 'RTE_Components.h' -->
2387 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2388 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2389 </RTE_Components_h>
2390 <files>
2391 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2392 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2393
2394 <!-- RTX header files -->
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2395 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2396
2397 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2398 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2399 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2400
2401 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2402 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2403 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2404 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2405 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2406 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2407 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2408 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2409 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Jonatan Antoni1f9190f2017-03-13 10:46:34 +0100[diff] [blame]2410 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="2.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2411 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2412
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2413 <!-- RTX library configuration -->
2414 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2415
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2416 <!-- RTX libraries (CPU and Compiler dependent) -->
2417 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2418 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
2419 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2420 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2421 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
2422 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2423 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2424 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2425 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2426 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2427 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2428 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2429 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
2430 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2431 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2432 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2433 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2434 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2435 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2436 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2437 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2438 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2439 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2440 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2441 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2442 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2443 <!-- IAR -->
2444 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2445 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2446 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2447 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2448 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2449 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2450 </files>
2451 </component>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame^]2452 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2453 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2454 <RTE_Components_h>
2455 <!-- the following content goes into file 'RTE_Components.h' -->
2456 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2457 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2458 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2459 </RTE_Components_h>
2460 <files>
2461 <!-- RTX documentation -->
2462 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2463
2464 <!-- RTX header files -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2465 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2466
2467 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2468 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2469 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2470
2471 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2472 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2473 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2474 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2475 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2476 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2477 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2478 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2479 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2480 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2481
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2482 <!-- RTX library configuration -->
2483 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2484
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2485 <!-- RTX libraries (CPU and Compiler dependent) -->
2486 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2487 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2488 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2489 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2490 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2491 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2492 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2493 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2494 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2495 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2496 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2497 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2498 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2499 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2500 </files>
2501 </component>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame^]2502 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2503 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2504 <RTE_Components_h>
2505 <!-- the following content goes into file 'RTE_Components.h' -->
2506 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2507 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2508 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2509 </RTE_Components_h>
2510 <files>
2511 <!-- RTX documentation -->
2512 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2513
2514 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2515 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2516
2517 <!-- RTX configuration -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]2518 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2519 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0" condition="ARMv6_7_8-M Device" />
2520 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/Cortex_A/RTX_Config.c" version="5.1.0" condition="Unknown Cortex-A Device"/>
2521 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/Renesas/RZ_A/RTX_Config.c" version="5.1.0" condition="RZ_A Device"/>
2522
2523 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/handlers.c" version="5.1.0" condition="ARMv7-A Device"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2524
2525 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2526 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2527 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2528 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2529 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2530 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2531 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2532 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2533 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2534 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2535
2536 <!-- RTX sources (core) -->
2537 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2538 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2539 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2540 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2541 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2542 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2543 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2544 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2545 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2546 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2547 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2548 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]2549 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_gic.c" condition="ARMv7-A Device"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2550 <!-- RTX sources (library configuration) -->
2551 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2552 <!-- RTX sources (handlers ARMCC) -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2553 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s" condition="CA_ARMCC5"/>
2554 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_ARMCC6"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2555 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
2556 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
2557 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
2558 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
2559 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
2560 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2561 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
2562 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
2563 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2564 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
2565 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
2566 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
2567 <!-- RTX sources (handlers GCC) -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]2568 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_GCC"/>
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2569 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S" condition="CM0_GCC"/>
2570 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM3_GCC"/>
2571 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM4_GCC"/>
2572 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM4_FP_GCC"/>
2573 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM7_GCC"/>
2574 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM7_FP_GCC"/>
2575 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
2576 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
2577 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2578 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
2579 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
2580 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2581 <!-- RTX sources (handlers IAR) -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]2582 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s" condition="CA_IAR"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2583 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s" condition="CM0_IAR"/>
2584 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM3_IAR"/>
2585 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM4_IAR"/>
2586 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM4_FP_IAR"/>
2587 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM7_IAR"/>
2588 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM7_FP_IAR"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2589 </files>
2590 </component>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame^]2591 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2592 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2593 <RTE_Components_h>
2594 <!-- the following content goes into file 'RTE_Components.h' -->
2595 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2596 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2597 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2598 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2599 </RTE_Components_h>
2600 <files>
2601 <!-- RTX documentation -->
2602 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2603
2604 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2605 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2606
2607 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2608 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2609 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2610
2611 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2612 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2613 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2614 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2615 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2616 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2617 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2618 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2619 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2620 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2621
2622 <!-- RTX sources (core) -->
2623 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2624 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2625 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2626 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2627 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2628 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2629 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2630 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2631 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2632 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2633 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2634 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2635 <!-- RTX sources (library configuration) -->
2636 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2637 <!-- RTX sources (ARMCC handlers) -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2638 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
2639 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
2640 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2641 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
2642 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
2643 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
2644 <!-- RTX sources (GCC handlers) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2645 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="CM23_GCC"/>
2646 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="CM33_GCC"/>
2647 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2648 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="ARMv8MBL_GCC"/>
2649 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="ARMv8MML_GCC"/>
2650 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2651 </files>
2652 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2653
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2654 </components>
2655
2656 <boards>
2657 <board name="uVision Simulator" vendor="Keil">
2658 <description>uVision Simulator</description>
2659 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2660 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2661 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2662 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2663 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2664 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2665 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2666 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2667 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2668 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2669 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2670 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2671 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
Joachim Krech4a03e6d2017-02-06 13:17:39 +0100[diff] [blame]2672 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2673 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2674 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2675 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2676 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2677 </board>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2678 </boards>
2679
2680 <examples>
2681 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2682 <description>DSP_Lib Class Marks example</description>
2683 <board name="uVision Simulator" vendor="Keil"/>
2684 <project>
2685 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2686 </project>
2687 <attributes>
2688 <component Cclass="CMSIS" Cgroup="CORE"/>
2689 <component Cclass="CMSIS" Cgroup="DSP"/>
2690 <component Cclass="Device" Cgroup="Startup"/>
2691 <category>Getting Started</category>
2692 </attributes>
2693 </example>
2694
2695 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2696 <description>DSP_Lib Convolution example</description>
2697 <board name="uVision Simulator" vendor="Keil"/>
2698 <project>
2699 <environment name="uv" load="arm_convolution_example.uvprojx"/>
2700 </project>
2701 <attributes>
2702 <component Cclass="CMSIS" Cgroup="CORE"/>
2703 <component Cclass="CMSIS" Cgroup="DSP"/>
2704 <component Cclass="Device" Cgroup="Startup"/>
2705 <category>Getting Started</category>
2706 </attributes>
2707 </example>
2708
2709 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2710 <description>DSP_Lib Dotproduct example</description>
2711 <board name="uVision Simulator" vendor="Keil"/>
2712 <project>
2713 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2714 </project>
2715 <attributes>
2716 <component Cclass="CMSIS" Cgroup="CORE"/>
2717 <component Cclass="CMSIS" Cgroup="DSP"/>
2718 <component Cclass="Device" Cgroup="Startup"/>
2719 <category>Getting Started</category>
2720 </attributes>
2721 </example>
2722
2723 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2724 <description>DSP_Lib FFT Bin example</description>
2725 <board name="uVision Simulator" vendor="Keil"/>
2726 <project>
2727 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2728 </project>
2729 <attributes>
2730 <component Cclass="CMSIS" Cgroup="CORE"/>
2731 <component Cclass="CMSIS" Cgroup="DSP"/>
2732 <component Cclass="Device" Cgroup="Startup"/>
2733 <category>Getting Started</category>
2734 </attributes>
2735 </example>
2736
2737 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2738 <description>DSP_Lib FIR example</description>
2739 <board name="uVision Simulator" vendor="Keil"/>
2740 <project>
2741 <environment name="uv" load="arm_fir_example.uvprojx"/>
2742 </project>
2743 <attributes>
2744 <component Cclass="CMSIS" Cgroup="CORE"/>
2745 <component Cclass="CMSIS" Cgroup="DSP"/>
2746 <component Cclass="Device" Cgroup="Startup"/>
2747 <category>Getting Started</category>
2748 </attributes>
2749 </example>
2750
2751 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2752 <description>DSP_Lib Graphic Equalizer example</description>
2753 <board name="uVision Simulator" vendor="Keil"/>
2754 <project>
2755 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2756 </project>
2757 <attributes>
2758 <component Cclass="CMSIS" Cgroup="CORE"/>
2759 <component Cclass="CMSIS" Cgroup="DSP"/>
2760 <component Cclass="Device" Cgroup="Startup"/>
2761 <category>Getting Started</category>
2762 </attributes>
2763 </example>
2764
2765 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2766 <description>DSP_Lib Linear Interpolation example</description>
2767 <board name="uVision Simulator" vendor="Keil"/>
2768 <project>
2769 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2770 </project>
2771 <attributes>
2772 <component Cclass="CMSIS" Cgroup="CORE"/>
2773 <component Cclass="CMSIS" Cgroup="DSP"/>
2774 <component Cclass="Device" Cgroup="Startup"/>
2775 <category>Getting Started</category>
2776 </attributes>
2777 </example>
2778
2779 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2780 <description>DSP_Lib Matrix example</description>
2781 <board name="uVision Simulator" vendor="Keil"/>
2782 <project>
2783 <environment name="uv" load="arm_matrix_example.uvprojx"/>
2784 </project>
2785 <attributes>
2786 <component Cclass="CMSIS" Cgroup="CORE"/>
2787 <component Cclass="CMSIS" Cgroup="DSP"/>
2788 <component Cclass="Device" Cgroup="Startup"/>
2789 <category>Getting Started</category>
2790 </attributes>
2791 </example>
2792
2793 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2794 <description>DSP_Lib Signal Convergence example</description>
2795 <board name="uVision Simulator" vendor="Keil"/>
2796 <project>
2797 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2798 </project>
2799 <attributes>
2800 <component Cclass="CMSIS" Cgroup="CORE"/>
2801 <component Cclass="CMSIS" Cgroup="DSP"/>
2802 <component Cclass="Device" Cgroup="Startup"/>
2803 <category>Getting Started</category>
2804 </attributes>
2805 </example>
2806
2807 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2808 <description>DSP_Lib Sinus/Cosinus example</description>
2809 <board name="uVision Simulator" vendor="Keil"/>
2810 <project>
2811 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2812 </project>
2813 <attributes>
2814 <component Cclass="CMSIS" Cgroup="CORE"/>
2815 <component Cclass="CMSIS" Cgroup="DSP"/>
2816 <component Cclass="Device" Cgroup="Startup"/>
2817 <category>Getting Started</category>
2818 </attributes>
2819 </example>
2820
2821 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2822 <description>DSP_Lib Variance example</description>
2823 <board name="uVision Simulator" vendor="Keil"/>
2824 <project>
2825 <environment name="uv" load="arm_variance_example.uvprojx"/>
2826 </project>
2827 <attributes>
2828 <component Cclass="CMSIS" Cgroup="CORE"/>
2829 <component Cclass="CMSIS" Cgroup="DSP"/>
2830 <component Cclass="Device" Cgroup="Startup"/>
2831 <category>Getting Started</category>
2832 </attributes>
2833 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2834
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2835 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2836 <description>CMSIS-RTOS2 Blinky example</description>
2837 <board name="uVision Simulator" vendor="Keil"/>
2838 <project>
2839 <environment name="uv" load="Blinky.uvprojx"/>
2840 </project>
2841 <attributes>
2842 <component Cclass="CMSIS" Cgroup="CORE"/>
2843 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2844 <component Cclass="Device" Cgroup="Startup"/>
2845 <category>Getting Started</category>
2846 </attributes>
2847 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2848
Robert Rostohare13e4702016-11-07 15:23:44 +0100[diff] [blame]2849 <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
Matthias Hertel4b70ae42016-11-07 14:14:59 +0100[diff] [blame]2850 <description>CMSIS-RTOS2 mixed API v1 and v2</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2851 <board name="uVision Simulator" vendor="Keil"/>
2852 <project>
2853 <environment name="uv" load="Blinky.uvprojx"/>
2854 </project>
2855 <attributes>
2856 <component Cclass="CMSIS" Cgroup="CORE"/>
2857 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2858 <component Cclass="Device" Cgroup="Startup"/>
2859 <category>Getting Started</category>
2860 </attributes>
2861 </example>
2862
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]2863 <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]2864 <description>Bare-metal secure/non-secure example without RTOS</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2865 <board name="uVision Simulator" vendor="Keil"/>
2866 <project>
2867 <environment name="uv" load="NoRTOS.uvmpw"/>
2868 </project>
2869 <attributes>
2870 <component Cclass="CMSIS" Cgroup="CORE"/>
2871 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2872 <component Cclass="Device" Cgroup="Startup"/>
2873 <category>Getting Started</category>
2874 </attributes>
2875 </example>
2876
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]2877 <example name="TrustZone for ARMv8-M RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]2878 <description>Secure/non-secure RTOS example with thread context management</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2879 <board name="uVision Simulator" vendor="Keil"/>
2880 <project>
2881 <environment name="uv" load="RTOS.uvmpw"/>
2882 </project>
2883 <attributes>
2884 <component Cclass="CMSIS" Cgroup="CORE"/>
2885 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2886 <component Cclass="Device" Cgroup="Startup"/>
2887 <category>Getting Started</category>
2888 </attributes>
2889 </example>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2890
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]2891 <example name="TrustZone for ARMv8-M RTOS Security Tests" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2892 <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2893 <board name="uVision Simulator" vendor="Keil"/>
2894 <project>
2895 <environment name="uv" load="RTOS_Faults.uvmpw"/>
2896 </project>
2897 <attributes>
2898 <component Cclass="CMSIS" Cgroup="CORE"/>
2899 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2900 <component Cclass="Device" Cgroup="Startup"/>
2901 <category>Getting Started</category>
2902 </attributes>
2903 </example>
2904
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2905 </examples>
2906
2907</package>