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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 5d19e5f08286706bb4cf5a9ae89a0cb44a82c3f6 / . / ARM.CMSIS.pdsc
blob: 942b545d3312a94eeac44e4aa88ab3b0c00a05d4 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
Joachim Krecha33860c2016-11-09 22:25:55 +0100[diff] [blame]7 <!-- <license>license.txt</license> -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Jonatan Antonic6dca332018-03-02 12:23:44 +0100[diff] [blame]11 <release version="5.3.1-dev1">
Jonatan Antoni5d19e5f2018-04-09 10:16:49 +0200[diff] [blame^]12 CMSIS-Core(M): 5.1.2 (see revision history for details)
13 CMSIS-Core(A): 1.1.2 (see revision history for details)
Robert Rostohar84a93882018-03-06 14:27:36 +0100[diff] [blame]14 CMSIS-RTOS2:
15 - RTX 5.3.1 (see revision history for details)
Jonatan Antonic6dca332018-03-02 12:23:44 +0100[diff] [blame]16 </release>
Jonatan Antoni7f501a72018-02-22 10:13:58 +0100[diff] [blame]17 <release version="5.3.1-dev0">
18 Patch release scheduled for after EW18.
19 </release>
20 <release version="5.3.0" date="2018-02-22">
Jonatan Antonie924d642018-02-20 11:43:50 +0100[diff] [blame]21 Updated Arm company brand.
22 CMSIS-Core(M): 5.1.1 (see revision history for details)
23 CMSIS-Core(A): 1.1.1 (see revision history for details)
Jonatan Antonia3ec1f22018-02-21 13:51:30 +0100[diff] [blame]24 CMSIS-DAP: 2.0.0 (see revision history for details)
Jonatan Antonie924d642018-02-20 11:43:50 +0100[diff] [blame]25 CMSIS-NN: 1.0.0
Jonatan Antoni13bff482018-01-19 13:05:57 +0100[diff] [blame]26 - Initial contribution of the bare metal Neural Network Library.
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]27 CMSIS-RTOS2:
Robert Rostoharcd44e6f2018-01-09 11:45:59 +0100[diff] [blame]28 - RTX 5.3.0 (see revision history for details)
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]29 - OS Tick API 1.0.1
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame]30 </release>
31 <release version="5.2.0" date="2017-11-16">
Jonatan Antonide316642017-11-10 11:40:06 +0100[diff] [blame]32 CMSIS-Core(M): 5.1.0 (see revision history for details)
33 - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
34 - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
35 CMSIS-Core(A): 1.1.0 (see revision history for details)
36 - Added compiler_iccarm.h.
37 - Added additional access functions for physical timer.
38 CMSIS-DAP: 1.2.0 (see revision history for details)
39 CMSIS-DSP: 1.5.2 (see revision history for details)
Jonatan Antonie924d642018-02-20 11:43:50 +0100[diff] [blame]40 CMSIS-Driver: 2.6.0 (see revision history for details)
Jonatan Antonide316642017-11-10 11:40:06 +0100[diff] [blame]41 - CAN Driver API V1.2.0
Vladimir Umekb4728092017-11-14 10:12:51 +0100[diff] [blame]42 - NAND Driver API V2.3.0
Jonatan Antonide316642017-11-10 11:40:06 +0100[diff] [blame]43 CMSIS-RTOS:
44 - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
45 CMSIS-RTOS2:
46 - API 2.1.2 (see revision history for details)
47 - RTX 5.2.3 (see revision history for details)
48 Devices:
49 - Added GCC startup and linker script for Cortex-A9.
50 - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
51 - Added IAR startup code for Cortex-A9
52 </release>
Jonatan Antoni5bfb1e62017-09-19 15:46:40 +0200[diff] [blame]53 <release version="5.1.1" date="2017-09-19">
54 CMSIS-RTOS2:
55 - RTX 5.2.1 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]56 </release>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]57 <release version="5.1.0" date="2017-08-04">
58 CMSIS-Core(M): 5.0.2 (see revision history for details)
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]59 - Changed Version Control macros to be core agnostic.
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]60 - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
61 CMSIS-Core(A): 1.0.0 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]62 - Initial release
63 - IRQ Controller API 1.0.0
64 CMSIS-Driver: 2.05 (see revision history for details)
65 - All typedefs related to status have been made volatile.
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]66 CMSIS-RTOS2:
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]67 - API 2.1.1 (see revision history for details)
68 - RTX 5.2.0 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]69 - OS Tick API 1.0.0
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]70 CMSIS-DSP: 1.5.2 (see revision history for details)
71 - Fixed GNU Compiler specific diagnostics.
Jonatan Antoni31e48e62017-08-04 11:26:18 +0200[diff] [blame]72 CMSIS-PACK: 1.5.0 (see revision history for details)
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]73 - added System Description File (*.SDF) Format
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]74 CMSIS-Zone: 0.0.1 (Preview)
75 - Initial specification draft
76 </release>
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]77 <release version="5.0.1" date="2017-02-03">
78 Package Description:
79 - added taxonomy for Cclass RTOS
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]80 CMSIS-RTOS2:
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]81 - API 2.1 (see revision history for details)
82 - RTX 5.1.0 (see revision history for details)
83 CMSIS-Core: 5.0.1 (see revision history for details)
84 - Added __PACKED_STRUCT macro
85 - Added uVisior support
86 - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
87 - Updated template for secure main function (main_s.c)
88 - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
89 CMSIS-DSP: 1.5.1 (see revision history for details)
90 - added ARMv8M DSP libraries.
91 CMSIS-PACK:1.4.9 (see revision history for details)
92 - added Pack Index File specification and schema file
Martin Güntherd1060532016-11-15 09:43:43 +0100[diff] [blame]93 </release>
Joachim Krechc45bb4a2016-11-11 11:01:22 +0100[diff] [blame]94 <release version="5.0.0" date="2016-11-11">
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]95 Changed open source license to Apache 2.0
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]96 CMSIS_Core:
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]97 - Added support for Cortex-M23 and Cortex-M33.
98 - Added ARMv8-M device configurations for mainline and baseline.
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]99 - Added CMSE support and thread context management for TrustZone for ARMv8-M
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]100 - Added cmsis_compiler.h to unify compiler behaviour.
101 - Updated function SCB_EnableICache (for Cortex-M7).
102 - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
103 CMSIS-RTOS:
104 - bug fix in RTX 4.82 (see revision history for details)
105 CMSIS-RTOS2:
106 - new API including compatibility layer to CMSIS-RTOS
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]107 - reference implementation based on RTX5
108 - supports all Cortex-M variants including TrustZone for ARMv8-M
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]109 CMSIS-SVD:
110 - reworked SVD format documentation
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]111 - removed SVD file database documentation as SVD files are distributed in packs
112 - updated SVDConv for Win32 and Linux
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]113 CMSIS-DSP:
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]114 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
115 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]116 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]117 <release version="4.5.0" date="2015-10-28">
118 - CMSIS-Core 4.30.0 (see revision history for details)
119 - CMSIS-DAP 1.1.0 (unchanged)
120 - CMSIS-Driver 2.04.0 (see revision history for details)
121 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
122 - CMSIS-PACK 1.4.1 (see revision history for details)
123 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
124 - CMSIS-SVD 1.3.1 (see revision history for details)
125 </release>
126 <release version="4.4.0" date="2015-09-11">
127 - CMSIS-Core 4.20 (see revision history for details)
128 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
129 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
130 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
131 - CMSIS-RTOS
132 -- API 1.02 (unchanged)
133 -- RTX 4.79 (see revision history for details)
134 - CMSIS-SVD 1.3.0 (see revision history for details)
135 - CMSIS-DAP 1.1.0 (extended with SWO support)
136 </release>
137 <release version="4.3.0" date="2015-03-20">
138 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
139 - CMSIS-DSP 1.4.5 (see revision history for details)
140 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
141 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
142 - CMSIS-RTOS
143 -- API 1.02 (unchanged)
144 -- RTX 4.78 (see revision history for details)
145 - CMSIS-SVD 1.2 (unchanged)
146 </release>
147 <release version="4.2.0" date="2014-09-24">
148 Adding Cortex-M7 support
149 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
150 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
151 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
152 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
153 - CMSIS-RTOS RTX 4.75 (see revision history for details)
154 </release>
155 <release version="4.1.1" date="2014-06-30">
156 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
157 </release>
158 <release version="4.1.0" date="2014-06-12">
159 - CMSIS-Driver 2.02 (incompatible update)
160 - CMSIS-Pack 1.3 (see revision history for details)
161 - CMSIS-DSP 1.4.2 (unchanged)
162 - CMSIS-Core 3.30 (unchanged)
163 - CMSIS-RTOS RTX 4.74 (unchanged)
164 - CMSIS-RTOS API 1.02 (unchanged)
165 - CMSIS-SVD 1.10 (unchanged)
166 PACK:
167 - removed G++ specific files from PACK
168 - added Component Startup variant "C Startup"
169 - added Pack Checking Utility
170 - updated conditions to reflect tool-chain dependency
171 - added Taxonomy for Graphics
172 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
173 </release>
174 <release version="4.0.0">
175 - CMSIS-Driver 2.00 Preliminary (incompatible update)
176 - CMSIS-Pack 1.1 Preliminary
177 - CMSIS-DSP 1.4.2 (see revision history for details)
178 - CMSIS-Core 3.30 (see revision history for details)
179 - CMSIS-RTOS RTX 4.74 (see revision history for details)
180 - CMSIS-RTOS API 1.02 (unchanged)
181 - CMSIS-SVD 1.10 (unchanged)
182 </release>
183 <release version="3.20.4">
184 - CMSIS-RTOS 4.74 (see revision history for details)
185 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
186 </release>
187 <release version="3.20.3">
188 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
189 - CMSIS-RTOS 4.73 (see revision history for details)
190 </release>
191 <release version="3.20.2">
192 - CMSIS-Pack documentation has been added
193 - CMSIS-Drivers header and documentation have been added to PACK
194 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
195 </release>
196 <release version="3.20.1">
197 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
198 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
199 </release>
200 <release version="3.20.0">
201 The software portions that are deployed in the application program are now under a BSD license which allows usage
202 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
203 The individual components have been update as listed below:
204 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
205 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
206 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
207 - CMSIS-SVD is unchanged.
208 </release>
209 </releases>
210
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]211 <taxonomy>
212 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
213 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
214 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
215 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
216 <description Cclass="File System">File Drive Support and File System</description>
217 <description Cclass="Graphics">Graphical User Interface</description>
218 <description Cclass="Network">Network Stack using Internet Protocols</description>
219 <description Cclass="USB">Universal Serial Bus Stack</description>
Joachim Krech2384b8a2017-02-02 15:58:30 +0100[diff] [blame]220 <description Cclass="Compiler">Compiler Software Extensions</description>
Joachim Krech62838c82017-02-02 15:54:57 +0100[diff] [blame]221 <description Cclass="RTOS">Real-time Operating System</description>
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]222 </taxonomy>
223
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]224 <devices>
225 <!-- ****************************** Cortex-M0 ****************************** -->
226 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]227 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]228 <description>
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]229The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]230- simple, easy-to-use programmers model
231- highly efficient ultra-low power operation
232- excellent code density
233- deterministic, high-performance interrupt handling
234- upward compatibility with the rest of the Cortex-M processor family.
235 </description>
236 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
237 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
238 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
239 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
240
241 <device Dname="ARMCM0">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]242 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]243 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
244 </device>
245 </family>
246
247 <!-- ****************************** Cortex-M0P ****************************** -->
248 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]249 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]250 <description>
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]251The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]252- simple, easy-to-use programmers model
253- highly efficient ultra-low power operation
254- excellent code density
255- deterministic, high-performance interrupt handling
256- upward compatibility with the rest of the Cortex-M processor family.
257 </description>
258 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
259 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
260 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
261 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
262
263 <device Dname="ARMCM0P">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]264 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]265 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
266 </device>
Jonatan Antonic4e9f462017-10-19 16:51:44 +0200[diff] [blame]267
268 <device Dname="ARMCM0P_MPU">
269 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
270 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
271 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]272 </family>
273
274 <!-- ****************************** Cortex-M3 ****************************** -->
275 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]276 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]277 <description>
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]278The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]279- simple, easy-to-use programmers model
280- highly efficient ultra-low power operation
281- excellent code density
282- deterministic, high-performance interrupt handling
283- upward compatibility with the rest of the Cortex-M processor family.
284 </description>
285 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
286 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
287 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
288 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
289
290 <device Dname="ARMCM3">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]291 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]292 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
293 </device>
294 </family>
295
296 <!-- ****************************** Cortex-M4 ****************************** -->
297 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]298 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]299 <description>
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]300The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]301- simple, easy-to-use programmers model
302- highly efficient ultra-low power operation
303- excellent code density
304- deterministic, high-performance interrupt handling
305- upward compatibility with the rest of the Cortex-M processor family.
306 </description>
307 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
308 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
309 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
310 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
311
312 <device Dname="ARMCM4">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]313 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]314 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
315 </device>
316
317 <device Dname="ARMCM4_FP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]318 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]319 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
320 </device>
321 </family>
322
323 <!-- ****************************** Cortex-M7 ****************************** -->
324 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]325 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]326 <description>
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]327The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]328- simple, easy-to-use programmers model
329- highly efficient ultra-low power operation
330- excellent code density
331- deterministic, high-performance interrupt handling
332- upward compatibility with the rest of the Cortex-M processor family.
333 </description>
334 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
335 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
336 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
337 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
338
339 <device Dname="ARMCM7">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]340 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]341 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
342 </device>
343
344 <device Dname="ARMCM7_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]345 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]346 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
347 </device>
348
349 <device Dname="ARMCM7_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]350 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]351 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
352 </device>
353 </family>
354
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]355 <!-- ****************************** Cortex-M23 ********************** -->
356 <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
357 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
358 <description>
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]359The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
360It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]361Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]362 </description>
363 <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]364 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
365 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]366 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]367 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]368 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
369
370 <device Dname="ARMCM23">
371 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
372 <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
373 </device>
374
375 <device Dname="ARMCM23_TZ">
376 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
377 <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
378 </device>
379 </family>
380
381 <!-- ****************************** Cortex-M33 ****************************** -->
382 <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
383 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
384 <description>
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]385The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
386class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]387 </description>
388 <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]389 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
390 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]391 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]392 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
393 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]394
395 <device Dname="ARMCM33">
396 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]397 <description>
398 no DSP Instructions, no Floating Point Unit, no TrustZone
399 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]400 <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
401 </device>
402
403 <device Dname="ARMCM33_TZ">
404 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]405 <description>
406 no DSP Instructions, no Floating Point Unit, TrustZone
407 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]408 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
409 </device>
410
411 <device Dname="ARMCM33_DSP_FP">
412 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]413 <description>
414 DSP Instructions, Single Precision Floating Point Unit, no TrustZone
415 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]416 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
417 </device>
418
419 <device Dname="ARMCM33_DSP_FP_TZ">
420 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]421 <description>
422 DSP Instructions, Single Precision Floating Point Unit, TrustZone
423 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]424 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
425 </device>
426 </family>
427
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]428 <!-- ****************************** ARMSC000 ****************************** -->
429 <family Dfamily="ARM SC000" Dvendor="ARM:82">
430 <description>
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]431The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]432- simple, easy-to-use programmers model
433- highly efficient ultra-low power operation
434- excellent code density
435- deterministic, high-performance interrupt handling
436 </description>
437 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
438 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
439 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
440 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
441
442 <device Dname="ARMSC000">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]443 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]444 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
445 </device>
446 </family>
447
448 <!-- ****************************** ARMSC300 ****************************** -->
449 <family Dfamily="ARM SC300" Dvendor="ARM:82">
450 <description>
451The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
452- simple, easy-to-use programmers model
453- highly efficient ultra-low power operation
454- excellent code density
455- deterministic, high-performance interrupt handling
456 </description>
457 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
458 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
459 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
460 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
461
462 <device Dname="ARMSC300">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]463 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]464 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
465 </device>
466 </family>
467
468 <!-- ****************************** ARMv8-M Baseline ********************** -->
469 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
470 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
471 <description>
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]472Armv8-M Baseline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]473 </description>
474 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]475 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
476 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]477 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]478 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]479 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
480
481 <device Dname="ARMv8MBL">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]482 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]483 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
484 </device>
485 </family>
486
487 <!-- ****************************** ARMv8-M Mainline ****************************** -->
488 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
489 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
490 <description>
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]491Armv8-M Mainline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]492 </description>
493 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]494 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
495 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]496 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]497 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]498 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
499
500 <device Dname="ARMv8MML">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]501 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]502 <description>
503 no DSP Instructions, no Floating Point Unit, TrustZone
504 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]505 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
506 </device>
507
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]508 <device Dname="ARMv8MML_DSP">
509 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]510 <description>
511 DSP Instructions, no Floating Point Unit, TrustZone
512 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]513 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]514 </device>
515
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]516 <device Dname="ARMv8MML_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]517 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]518 <description>
519 no DSP Instructions, Single Precision Floating Point Unit, TrustZone
520 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]521 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
522 </device>
523
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]524 <device Dname="ARMv8MML_DSP_SP">
525 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]526 <description>
527 DSP Instructions, Single Precision Floating Point Unit, TrustZone
528 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]529 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]530 </device>
531
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]532 <device Dname="ARMv8MML_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]533 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]534 <description>
535 no DSP Instructions, Double Precision Floating Point Unit, TrustZone
536 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]537 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
538 </device>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]539
540 <device Dname="ARMv8MML_DSP_DP">
541 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]542 <description>
543 DSP Instructions, Double Precision Floating Point Unit, TrustZone
544 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]545 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]546 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]547 </family>
548
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]549 <!-- ****************************** Cortex-A5 ****************************** -->
550 <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
551 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
552 <description>
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]553The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
554virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
555Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]556 </description>
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]557
558 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
559 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
560
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]561 <device Dname="ARMCA5">
562 <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
563 <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
564 </device>
565 </family>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]566
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]567 <!-- ****************************** Cortex-A7 ****************************** -->
568 <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
569 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
570 <description>
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]571The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]572The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]573an optional integrated GIC, and an optional L2 cache controller.
574 </description>
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]575
576 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
577 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
578
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]579 <device Dname="ARMCA7">
580 <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
581 <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
582 </device>
583 </family>
584
585 <!-- ****************************** Cortex-A9 ****************************** -->
586 <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]587 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]588 <description>
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]589The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
590The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]591and 8-bit Java bytecodes in Jazelle state.
592 </description>
593
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]594 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
595 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
596
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]597 <device Dname="ARMCA9">
598 <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
599 <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
600 </device>
601 </family>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]602 </devices>
603
604
605 <apis>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]606 <!-- CMSIS Device API -->
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]607 <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
608 <description>Device interrupt controller interface</description>
609 <files>
610 <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
611 </files>
612 </api>
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]613 <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
Robert Rostoharaeb6dd52017-06-09 14:17:43 +0200[diff] [blame]614 <description>RTOS Kernel system tick timer interface</description>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]615 <files>
616 <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
617 </files>
618 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]619 <!-- CMSIS-RTOS API -->
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]620 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]621 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
622 <files>
623 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
624 </files>
625 </api>
Robert Rostohar17243e62017-10-30 11:31:45 +0100[diff] [blame]626 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.2" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]627 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
628 <files>
629 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
Robert Rostohar0a364052017-01-25 12:35:54 +0100[diff] [blame]630 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]631 </files>
632 </api>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]633 <!-- CMSIS Driver API -->
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]634 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]635 <description>USART Driver API for Cortex-M</description>
636 <files>
637 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
638 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
639 </files>
640 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]641 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]642 <description>SPI Driver API for Cortex-M</description>
643 <files>
644 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
645 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
646 </files>
647 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]648 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]649 <description>SAI Driver API for Cortex-M</description>
650 <files>
651 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
652 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
653 </files>
654 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]655 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]656 <description>I2C Driver API for Cortex-M</description>
657 <files>
658 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
659 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
660 </files>
661 </api>
Robert Rostohar3bb9b772017-09-13 15:24:14 +0200[diff] [blame]662 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]663 <description>CAN Driver API for Cortex-M</description>
664 <files>
665 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
666 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
667 </files>
668 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]669 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]670 <description>Flash Driver API for Cortex-M</description>
671 <files>
672 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
673 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
674 </files>
675 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]676 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]677 <description>MCI Driver API for Cortex-M</description>
678 <files>
679 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
680 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
681 </files>
682 </api>
Vladimir Umekb4728092017-11-14 10:12:51 +0100[diff] [blame]683 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]684 <description>NAND Flash Driver API for Cortex-M</description>
685 <files>
686 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
687 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
688 </files>
689 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]690 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]691 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
692 <files>
693 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
694 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
695 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
696 </files>
697 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]698 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]699 <description>Ethernet MAC Driver API for Cortex-M</description>
700 <files>
701 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
702 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
703 </files>
704 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]705 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]706 <description>Ethernet PHY Driver API for Cortex-M</description>
707 <files>
708 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
709 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
710 </files>
711 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]712 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]713 <description>USB Device Driver API for Cortex-M</description>
714 <files>
715 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
716 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
717 </files>
718 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]719 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]720 <description>USB Host Driver API for Cortex-M</description>
721 <files>
722 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
723 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
724 </files>
725 </api>
726 </apis>
727
728 <!-- conditions are dependency rules that can apply to a component or an individual file -->
729 <conditions>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]730 <!-- compiler -->
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]731 <condition id="ARMCC6">
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]732 <accept Tcompiler="ARMCC" Toptions="AC6"/>
733 <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]734 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]735 <condition id="ARMCC5">
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]736 <require Tcompiler="ARMCC" Toptions="AC5"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]737 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]738 <condition id="ARMCC">
739 <require Tcompiler="ARMCC"/>
740 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]741 <condition id="GCC">
742 <require Tcompiler="GCC"/>
743 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]744 <condition id="IAR">
745 <require Tcompiler="IAR"/>
746 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]747 <condition id="ARMCC GCC">
748 <accept Tcompiler="ARMCC"/>
749 <accept Tcompiler="GCC"/>
750 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]751 <condition id="ARMCC GCC IAR">
752 <accept Tcompiler="ARMCC"/>
753 <accept Tcompiler="GCC"/>
754 <accept Tcompiler="IAR"/>
755 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]756
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]757 <!-- Arm architecture -->
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]758 <condition id="ARMv6-M Device">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]759 <description>Armv6-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]760 <accept Dcore="Cortex-M0"/>
761 <accept Dcore="Cortex-M0+"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]762 <accept Dcore="SC000"/>
763 </condition>
764 <condition id="ARMv7-M Device">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]765 <description>Armv7-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]766 <accept Dcore="Cortex-M3"/>
767 <accept Dcore="Cortex-M4"/>
768 <accept Dcore="Cortex-M7"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]769 <accept Dcore="SC300"/>
770 </condition>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]771 <condition id="ARMv8-M Device">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]772 <description>Armv8-M architecture based device</description>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]773 <accept Dcore="ARMV8MBL"/>
774 <accept Dcore="ARMV8MML"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]775 <accept Dcore="Cortex-M23"/>
776 <accept Dcore="Cortex-M33"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]777 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]778 <condition id="ARMv8-M TZ Device">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]779 <description>Armv8-M architecture based device with TrustZone</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]780 <require condition="ARMv8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]781 <require Dtz="TZ"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]782 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]783 <condition id="ARMv6_7-M Device">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]784 <description>Armv6_7-M architecture based device</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]785 <accept condition="ARMv6-M Device"/>
786 <accept condition="ARMv7-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]787 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]788 <condition id="ARMv6_7_8-M Device">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]789 <description>Armv6_7_8-M architecture based device</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]790 <accept condition="ARMv6-M Device"/>
791 <accept condition="ARMv7-M Device"/>
792 <accept condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]793 </condition>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]794 <condition id="ARMv7-A Device">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]795 <description>Armv7-A architecture based device</description>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]796 <accept Dcore="Cortex-A5"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]797 <accept Dcore="Cortex-A7"/>
798 <accept Dcore="Cortex-A9"/>
799 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]800
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]801 <!-- ARM core -->
802 <condition id="CM0">
803 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
804 <accept Dcore="Cortex-M0"/>
805 <accept Dcore="Cortex-M0+"/>
806 <accept Dcore="SC000"/>
807 </condition>
808 <condition id="CM3">
809 <description>Cortex-M3 or SC300 processor based device</description>
810 <accept Dcore="Cortex-M3"/>
811 <accept Dcore="SC300"/>
812 </condition>
813 <condition id="CM4">
814 <description>Cortex-M4 processor based device</description>
815 <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
816 </condition>
817 <condition id="CM4_FP">
818 <description>Cortex-M4 processor based device using Floating Point Unit</description>
Jonatan Antoni020309a2017-11-09 13:38:36 +0100[diff] [blame]819 <accept Dcore="Cortex-M4" Dfpu="FPU"/>
820 <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
821 <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]822 </condition>
823 <condition id="CM7">
824 <description>Cortex-M7 processor based device</description>
825 <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
826 </condition>
827 <condition id="CM7_FP">
828 <description>Cortex-M7 processor based device using Floating Point Unit</description>
829 <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
830 <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
831 </condition>
832 <condition id="CM7_SP">
833 <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
834 <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
835 </condition>
836 <condition id="CM7_DP">
837 <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
838 <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
839 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]840 <condition id="CM23">
841 <description>Cortex-M23 processor based device</description>
842 <require Dcore="Cortex-M23"/>
843 </condition>
844 <condition id="CM33">
845 <description>Cortex-M33 processor based device</description>
846 <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
847 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]848 <condition id="CM33_FP">
849 <description>Cortex-M33 processor based device using Floating Point Unit</description>
850 <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
851 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]852 <condition id="ARMv8MBL">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]853 <description>Armv8-M Baseline processor based device</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]854 <require Dcore="ARMV8MBL"/>
855 </condition>
856 <condition id="ARMv8MML">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]857 <description>Armv8-M Mainline processor based device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]858 <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
859 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]860 <condition id="ARMv8MML_FP">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]861 <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]862 <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
863 <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]864 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]865
866 <condition id="CM33_NODSP_NOFPU">
867 <description>CM33, no DSP, no FPU</description>
868 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
869 </condition>
870 <condition id="CM33_DSP_NOFPU">
871 <description>CM33, DSP, no FPU</description>
872 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
873 </condition>
874 <condition id="CM33_NODSP_SP">
875 <description>CM33, no DSP, SP FPU</description>
876 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
877 </condition>
878 <condition id="CM33_DSP_SP">
879 <description>CM33, DSP, SP FPU</description>
880 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
881 </condition>
882
883 <condition id="ARMv8MML_NODSP_NOFPU">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]884 <description>Armv8-M Mainline, no DSP, no FPU</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]885 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
886 </condition>
887 <condition id="ARMv8MML_DSP_NOFPU">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]888 <description>Armv8-M Mainline, DSP, no FPU</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]889 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
890 </condition>
891 <condition id="ARMv8MML_NODSP_SP">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]892 <description>Armv8-M Mainline, no DSP, SP FPU</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]893 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]894 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]895 <condition id="ARMv8MML_DSP_SP">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]896 <description>Armv8-M Mainline, DSP, SP FPU</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]897 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]898 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]899
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]900 <condition id="CA5_CA9">
901 <description>Cortex-A5 or Cortex-A9 processor based device</description>
902 <accept Dcore="Cortex-A5"/>
903 <accept Dcore="Cortex-A9"/>
904 </condition>
905
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]906 <condition id="CA7">
907 <description>Cortex-A7 processor based device</description>
908 <accept Dcore="Cortex-A7"/>
909 </condition>
910
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]911 <!-- ARMCC compiler -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]912 <condition id="CA_ARMCC5">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]913 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]914 <require condition="ARMv7-A Device"/>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]915 <require condition="ARMCC5"/>
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]916 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]917 <condition id="CA_ARMCC6">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]918 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]919 <require condition="ARMv7-A Device"/>
920 <require condition="ARMCC6"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]921 </condition>
922
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]923 <condition id="CM0_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]924 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]925 <require condition="CM0"/>
926 <require Tcompiler="ARMCC"/>
927 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]928 <condition id="CM0_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]929 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]930 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]931 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]932 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]933 <condition id="CM0_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]934 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]935 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]936 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]937 </condition>
938
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]939 <condition id="CM3_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]940 <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]941 <require condition="CM3"/>
942 <require Tcompiler="ARMCC"/>
943 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]944 <condition id="CM3_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]945 <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]946 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]947 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]948 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]949 <condition id="CM3_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]950 <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]951 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]952 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]953 </condition>
954
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]955 <condition id="CM4_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]956 <description>Cortex-M4 processor based device for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]957 <require condition="CM4"/>
958 <require Tcompiler="ARMCC"/>
959 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]960 <condition id="CM4_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]961 <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]962 <require condition="CM4_ARMCC"/>
963 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]964 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]965 <condition id="CM4_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]966 <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]967 <require condition="CM4_ARMCC"/>
968 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]969 </condition>
970
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]971 <condition id="CM4_FP_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]972 <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]973 <require condition="CM4_FP"/>
974 <require Tcompiler="ARMCC"/>
975 </condition>
976 <condition id="CM4_FP_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]977 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]978 <require condition="CM4_FP_ARMCC"/>
979 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]980 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]981 <condition id="CM4_FP_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]982 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]983 <require condition="CM4_FP_ARMCC"/>
984 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]985 </condition>
986
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]987 <condition id="CM7_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]988 <description>Cortex-M7 processor based device for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]989 <require condition="CM7"/>
990 <require Tcompiler="ARMCC"/>
991 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]992 <condition id="CM7_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]993 <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]994 <require condition="CM7_ARMCC"/>
995 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]996 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]997 <condition id="CM7_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]998 <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]999 <require condition="CM7_ARMCC"/>
1000 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1001 </condition>
1002
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1003 <condition id="CM7_FP_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1004 <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1005 <require condition="CM7_FP"/>
1006 <require Tcompiler="ARMCC"/>
1007 </condition>
1008 <condition id="CM7_FP_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1009 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1010 <require condition="CM7_FP_ARMCC"/>
1011 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1012 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1013 <condition id="CM7_FP_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1014 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1015 <require condition="CM7_FP_ARMCC"/>
1016 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1017 </condition>
1018
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1019 <condition id="CM7_SP_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1020 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1021 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1022 <require Tcompiler="ARMCC"/>
1023 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1024 <condition id="CM7_SP_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1025 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1026 <require condition="CM7_SP_ARMCC"/>
1027 <require Dendian="Little-endian"/>
1028 </condition>
1029 <condition id="CM7_SP_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1030 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1031 <require condition="CM7_SP_ARMCC"/>
1032 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1033 </condition>
1034
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1035 <condition id="CM7_DP_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1036 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1037 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1038 <require Tcompiler="ARMCC"/>
1039 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1040 <condition id="CM7_DP_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1041 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1042 <require condition="CM7_DP_ARMCC"/>
1043 <require Dendian="Little-endian"/>
1044 </condition>
1045 <condition id="CM7_DP_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1046 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1047 <require condition="CM7_DP_ARMCC"/>
1048 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1049 </condition>
1050
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1051 <condition id="CM23_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1052 <description>Cortex-M23 processor based device for the Arm Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1053 <require condition="CM23"/>
1054 <require Tcompiler="ARMCC"/>
1055 </condition>
1056 <condition id="CM23_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1057 <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1058 <require condition="CM23_ARMCC"/>
1059 <require Dendian="Little-endian"/>
1060 </condition>
1061 <condition id="CM23_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1062 <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1063 <require condition="CM23_ARMCC"/>
1064 <require Dendian="Big-endian"/>
1065 </condition>
1066
1067 <condition id="CM33_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1068 <description>Cortex-M33 processor based device for the Arm Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1069 <require condition="CM33"/>
1070 <require Tcompiler="ARMCC"/>
1071 </condition>
1072 <condition id="CM33_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1073 <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1074 <require condition="CM33_ARMCC"/>
1075 <require Dendian="Little-endian"/>
1076 </condition>
1077 <condition id="CM33_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1078 <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1079 <require condition="CM33_ARMCC"/>
1080 <require Dendian="Big-endian"/>
1081 </condition>
1082
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1083 <condition id="CM33_FP_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1084 <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1085 <require condition="CM33_FP"/>
1086 <require Tcompiler="ARMCC"/>
1087 </condition>
1088 <condition id="CM33_FP_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1089 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1090 <require condition="CM33_FP_ARMCC"/>
1091 <require Dendian="Little-endian"/>
1092 </condition>
1093 <condition id="CM33_FP_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1094 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1095 <require condition="CM33_FP_ARMCC"/>
1096 <require Dendian="Big-endian"/>
1097 </condition>
1098
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1099 <condition id="CM33_NODSP_NOFPU_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1100 <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1101 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1102 <require Tcompiler="ARMCC"/>
1103 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1104 <condition id="CM33_DSP_NOFPU_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1105 <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1106 <require condition="CM33_DSP_NOFPU"/>
1107 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1108 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1109 <condition id="CM33_NODSP_SP_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1110 <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1111 <require condition="CM33_NODSP_SP"/>
1112 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1113 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1114 <condition id="CM33_DSP_SP_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1115 <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1116 <require condition="CM33_DSP_SP"/>
1117 <require Tcompiler="ARMCC"/>
1118 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1119 <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1120 <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1121 <require condition="CM33_NODSP_NOFPU_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1122 <require Dendian="Little-endian"/>
1123 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1124 <condition id="CM33_DSP_NOFPU_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1125 <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1126 <require condition="CM33_DSP_NOFPU_ARMCC"/>
1127 <require Dendian="Little-endian"/>
1128 </condition>
1129 <condition id="CM33_NODSP_SP_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1130 <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1131 <require condition="CM33_NODSP_SP_ARMCC"/>
1132 <require Dendian="Little-endian"/>
1133 </condition>
1134 <condition id="CM33_DSP_SP_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1135 <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1136 <require condition="CM33_DSP_SP_ARMCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1137 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1138 </condition>
1139
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1140 <condition id="ARMv8MBL_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1141 <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1142 <require condition="ARMv8MBL"/>
1143 <require Tcompiler="ARMCC"/>
1144 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1145 <condition id="ARMv8MBL_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1146 <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1147 <require condition="ARMv8MBL_ARMCC"/>
1148 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1149 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1150 <condition id="ARMv8MBL_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1151 <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1152 <require condition="ARMv8MBL_ARMCC"/>
1153 <require Dendian="Big-endian"/>
1154 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1155
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1156 <condition id="ARMv8MML_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1157 <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1158 <require condition="ARMv8MML"/>
1159 <require Tcompiler="ARMCC"/>
1160 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1161 <condition id="ARMv8MML_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1162 <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1163 <require condition="ARMv8MML_ARMCC"/>
1164 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1165 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1166 <condition id="ARMv8MML_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1167 <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1168 <require condition="ARMv8MML_ARMCC"/>
1169 <require Dendian="Big-endian"/>
1170 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1171
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1172 <condition id="ARMv8MML_FP_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1173 <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1174 <require condition="ARMv8MML_FP"/>
1175 <require Tcompiler="ARMCC"/>
1176 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1177 <condition id="ARMv8MML_FP_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1178 <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1179 <require condition="ARMv8MML_FP_ARMCC"/>
1180 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1181 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1182 <condition id="ARMv8MML_FP_BE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1183 <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1184 <require condition="ARMv8MML_FP_ARMCC"/>
1185 <require Dendian="Big-endian"/>
1186 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1187
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1188 <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1189 <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1190 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1191 <require Tcompiler="ARMCC"/>
1192 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1193 <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1194 <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1195 <require condition="ARMv8MML_DSP_NOFPU"/>
1196 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1197 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1198 <condition id="ARMv8MML_NODSP_SP_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1199 <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1200 <require condition="ARMv8MML_NODSP_SP"/>
1201 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1202 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1203 <condition id="ARMv8MML_DSP_SP_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1204 <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1205 <require condition="ARMv8MML_DSP_SP"/>
1206 <require Tcompiler="ARMCC"/>
1207 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1208 <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1209 <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1210 <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1211 <require Dendian="Little-endian"/>
1212 </condition>
1213 <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1214 <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1215 <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1216 <require Dendian="Little-endian"/>
1217 </condition>
1218 <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1219 <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1220 <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1221 <require Dendian="Little-endian"/>
1222 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1223 <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1224 <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1225 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1226 <require Dendian="Little-endian"/>
1227 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1228
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1229 <!-- GCC compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1230 <condition id="CA_GCC">
1231 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1232 <require condition="ARMv7-A Device"/>
1233 <require Tcompiler="GCC"/>
1234 </condition>
1235
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1236 <condition id="CM0_GCC">
1237 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1238 <require condition="CM0"/>
1239 <require Tcompiler="GCC"/>
1240 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1241 <condition id="CM0_LE_GCC">
1242 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1243 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1244 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1245 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1246 <condition id="CM0_BE_GCC">
1247 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1248 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1249 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1250 </condition>
1251
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1252 <condition id="CM3_GCC">
1253 <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1254 <require condition="CM3"/>
1255 <require Tcompiler="GCC"/>
1256 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1257 <condition id="CM3_LE_GCC">
1258 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1259 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1260 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1261 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1262 <condition id="CM3_BE_GCC">
1263 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1264 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1265 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1266 </condition>
1267
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1268 <condition id="CM4_GCC">
1269 <description>Cortex-M4 processor based device for the GCC Compiler</description>
1270 <require condition="CM4"/>
1271 <require Tcompiler="GCC"/>
1272 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1273 <condition id="CM4_LE_GCC">
1274 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1275 <require condition="CM4_GCC"/>
1276 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1277 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1278 <condition id="CM4_BE_GCC">
1279 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1280 <require condition="CM4_GCC"/>
1281 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1282 </condition>
1283
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1284 <condition id="CM4_FP_GCC">
1285 <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1286 <require condition="CM4_FP"/>
1287 <require Tcompiler="GCC"/>
1288 </condition>
1289 <condition id="CM4_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1290 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1291 <require condition="CM4_FP_GCC"/>
1292 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1293 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1294 <condition id="CM4_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1295 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1296 <require condition="CM4_FP_GCC"/>
1297 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1298 </condition>
1299
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1300 <condition id="CM7_GCC">
1301 <description>Cortex-M7 processor based device for the GCC Compiler</description>
1302 <require condition="CM7"/>
1303 <require Tcompiler="GCC"/>
1304 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1305 <condition id="CM7_LE_GCC">
1306 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1307 <require condition="CM7_GCC"/>
1308 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1309 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1310 <condition id="CM7_BE_GCC">
1311 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1312 <require condition="CM7_GCC"/>
1313 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1314 </condition>
1315
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1316 <condition id="CM7_FP_GCC">
1317 <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1318 <require condition="CM7_FP"/>
1319 <require Tcompiler="GCC"/>
1320 </condition>
1321 <condition id="CM7_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1322 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1323 <require condition="CM7_FP_GCC"/>
1324 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1325 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1326 <condition id="CM7_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1327 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1328 <require condition="CM7_FP_GCC"/>
1329 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1330 </condition>
1331
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1332 <condition id="CM7_SP_GCC">
1333 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1334 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1335 <require Tcompiler="GCC"/>
1336 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1337 <condition id="CM7_SP_LE_GCC">
1338 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1339 <require condition="CM7_SP_GCC"/>
1340 <require Dendian="Little-endian"/>
1341 </condition>
1342 <condition id="CM7_SP_BE_GCC">
1343 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1344 <require condition="CM7_SP_GCC"/>
1345 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1346 </condition>
1347
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1348 <condition id="CM7_DP_GCC">
1349 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1350 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1351 <require Tcompiler="GCC"/>
1352 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1353 <condition id="CM7_DP_LE_GCC">
1354 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1355 <require condition="CM7_DP_GCC"/>
1356 <require Dendian="Little-endian"/>
1357 </condition>
1358 <condition id="CM7_DP_BE_GCC">
1359 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1360 <require condition="CM7_DP_GCC"/>
1361 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1362 </condition>
1363
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1364 <condition id="CM23_GCC">
1365 <description>Cortex-M23 processor based device for the GCC Compiler</description>
1366 <require condition="CM23"/>
1367 <require Tcompiler="GCC"/>
1368 </condition>
1369 <condition id="CM23_LE_GCC">
1370 <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1371 <require condition="CM23_GCC"/>
1372 <require Dendian="Little-endian"/>
1373 </condition>
1374 <condition id="CM23_BE_GCC">
1375 <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1376 <require condition="CM23_GCC"/>
1377 <require Dendian="Big-endian"/>
1378 </condition>
1379
1380 <condition id="CM33_GCC">
1381 <description>Cortex-M33 processor based device for the GCC Compiler</description>
1382 <require condition="CM33"/>
1383 <require Tcompiler="GCC"/>
1384 </condition>
1385 <condition id="CM33_LE_GCC">
1386 <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1387 <require condition="CM33_GCC"/>
1388 <require Dendian="Little-endian"/>
1389 </condition>
1390 <condition id="CM33_BE_GCC">
1391 <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1392 <require condition="CM33_GCC"/>
1393 <require Dendian="Big-endian"/>
1394 </condition>
1395
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1396 <condition id="CM33_FP_GCC">
1397 <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1398 <require condition="CM33_FP"/>
1399 <require Tcompiler="GCC"/>
1400 </condition>
1401 <condition id="CM33_FP_LE_GCC">
1402 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1403 <require condition="CM33_FP_GCC"/>
1404 <require Dendian="Little-endian"/>
1405 </condition>
1406 <condition id="CM33_FP_BE_GCC">
1407 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1408 <require condition="CM33_FP_GCC"/>
1409 <require Dendian="Big-endian"/>
1410 </condition>
1411
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1412 <condition id="CM33_NODSP_NOFPU_GCC">
1413 <description>CM33, no DSP, no FPU, GCC Compiler</description>
1414 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1415 <require Tcompiler="GCC"/>
1416 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1417 <condition id="CM33_DSP_NOFPU_GCC">
1418 <description>CM33, DSP, no FPU, GCC Compiler</description>
1419 <require condition="CM33_DSP_NOFPU"/>
1420 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1421 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1422 <condition id="CM33_NODSP_SP_GCC">
1423 <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1424 <require condition="CM33_NODSP_SP"/>
1425 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1426 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1427 <condition id="CM33_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1428 <description>CM33, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1429 <require condition="CM33_DSP_SP"/>
1430 <require Tcompiler="GCC"/>
1431 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1432 <condition id="CM33_NODSP_NOFPU_LE_GCC">
1433 <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1434 <require condition="CM33_NODSP_NOFPU_GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1435 <require Dendian="Little-endian"/>
1436 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1437 <condition id="CM33_DSP_NOFPU_LE_GCC">
1438 <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1439 <require condition="CM33_DSP_NOFPU_GCC"/>
1440 <require Dendian="Little-endian"/>
1441 </condition>
1442 <condition id="CM33_NODSP_SP_LE_GCC">
1443 <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1444 <require condition="CM33_NODSP_SP_GCC"/>
1445 <require Dendian="Little-endian"/>
1446 </condition>
1447 <condition id="CM33_DSP_SP_LE_GCC">
1448 <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1449 <require condition="CM33_DSP_SP_GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1450 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1451 </condition>
1452
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1453 <condition id="ARMv8MBL_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1454 <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1455 <require condition="ARMv8MBL"/>
1456 <require Tcompiler="GCC"/>
1457 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1458 <condition id="ARMv8MBL_LE_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1459 <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1460 <require condition="ARMv8MBL_GCC"/>
1461 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1462 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1463 <condition id="ARMv8MBL_BE_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1464 <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1465 <require condition="ARMv8MBL_GCC"/>
1466 <require Dendian="Big-endian"/>
1467 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1468
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1469 <condition id="ARMv8MML_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1470 <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1471 <require condition="ARMv8MML"/>
1472 <require Tcompiler="GCC"/>
1473 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1474 <condition id="ARMv8MML_LE_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1475 <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1476 <require condition="ARMv8MML_GCC"/>
1477 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1478 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1479 <condition id="ARMv8MML_BE_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1480 <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1481 <require condition="ARMv8MML_GCC"/>
1482 <require Dendian="Big-endian"/>
1483 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1484
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1485 <condition id="ARMv8MML_FP_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1486 <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1487 <require condition="ARMv8MML_FP"/>
1488 <require Tcompiler="GCC"/>
1489 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1490 <condition id="ARMv8MML_FP_LE_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1491 <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1492 <require condition="ARMv8MML_FP_GCC"/>
1493 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1494 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1495 <condition id="ARMv8MML_FP_BE_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1496 <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1497 <require condition="ARMv8MML_FP_GCC"/>
1498 <require Dendian="Big-endian"/>
1499 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1500
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1501 <condition id="ARMv8MML_NODSP_NOFPU_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1502 <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1503 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1504 <require Tcompiler="GCC"/>
1505 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1506 <condition id="ARMv8MML_DSP_NOFPU_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1507 <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1508 <require condition="ARMv8MML_DSP_NOFPU"/>
1509 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1510 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1511 <condition id="ARMv8MML_NODSP_SP_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1512 <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1513 <require condition="ARMv8MML_NODSP_SP"/>
1514 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1515 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1516 <condition id="ARMv8MML_DSP_SP_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1517 <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1518 <require condition="ARMv8MML_DSP_SP"/>
1519 <require Tcompiler="GCC"/>
1520 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1521 <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1522 <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1523 <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1524 <require Dendian="Little-endian"/>
1525 </condition>
1526 <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1527 <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1528 <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1529 <require Dendian="Little-endian"/>
1530 </condition>
1531 <condition id="ARMv8MML_NODSP_SP_LE_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1532 <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1533 <require condition="ARMv8MML_NODSP_SP_GCC"/>
1534 <require Dendian="Little-endian"/>
1535 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1536 <condition id="ARMv8MML_DSP_SP_LE_GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1537 <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1538 <require condition="ARMv8MML_DSP_SP_GCC"/>
1539 <require Dendian="Little-endian"/>
1540 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1541
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1542 <!-- IAR compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1543 <condition id="CA_IAR">
1544 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1545 <require condition="ARMv7-A Device"/>
1546 <require Tcompiler="IAR"/>
1547 </condition>
1548
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1549 <condition id="CM0_IAR">
1550 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1551 <require condition="CM0"/>
1552 <require Tcompiler="IAR"/>
1553 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1554 <condition id="CM0_LE_IAR">
1555 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1556 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1557 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1558 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1559 <condition id="CM0_BE_IAR">
1560 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1561 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1562 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1563 </condition>
1564
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1565 <condition id="CM3_IAR">
1566 <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1567 <require condition="CM3"/>
1568 <require Tcompiler="IAR"/>
1569 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1570 <condition id="CM3_LE_IAR">
1571 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1572 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1573 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1574 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1575 <condition id="CM3_BE_IAR">
1576 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1577 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1578 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1579 </condition>
1580
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1581 <condition id="CM4_IAR">
1582 <description>Cortex-M4 processor based device for the IAR Compiler</description>
1583 <require condition="CM4"/>
1584 <require Tcompiler="IAR"/>
1585 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1586 <condition id="CM4_LE_IAR">
1587 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1588 <require condition="CM4_IAR"/>
1589 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1590 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1591 <condition id="CM4_BE_IAR">
1592 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1593 <require condition="CM4_IAR"/>
1594 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1595 </condition>
1596
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1597 <condition id="CM4_FP_IAR">
1598 <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1599 <require condition="CM4_FP"/>
1600 <require Tcompiler="IAR"/>
1601 </condition>
1602 <condition id="CM4_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1603 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1604 <require condition="CM4_FP_IAR"/>
1605 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1606 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1607 <condition id="CM4_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1608 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1609 <require condition="CM4_FP_IAR"/>
1610 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1611 </condition>
1612
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1613 <condition id="CM7_IAR">
1614 <description>Cortex-M7 processor based device for the IAR Compiler</description>
1615 <require condition="CM7"/>
1616 <require Tcompiler="IAR"/>
1617 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1618 <condition id="CM7_LE_IAR">
1619 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1620 <require condition="CM7_IAR"/>
1621 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1622 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1623 <condition id="CM7_BE_IAR">
1624 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1625 <require condition="CM7_IAR"/>
1626 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1627 </condition>
1628
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1629 <condition id="CM7_FP_IAR">
1630 <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1631 <require condition="CM7_FP"/>
1632 <require Tcompiler="IAR"/>
1633 </condition>
1634 <condition id="CM7_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1635 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1636 <require condition="CM7_FP_IAR"/>
1637 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1638 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1639 <condition id="CM7_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1640 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1641 <require condition="CM7_FP_IAR"/>
1642 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1643 </condition>
1644
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1645 <condition id="CM7_SP_IAR">
1646 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1647 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1648 <require Tcompiler="IAR"/>
1649 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1650 <condition id="CM7_SP_LE_IAR">
1651 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1652 <require condition="CM7_SP_IAR"/>
1653 <require Dendian="Little-endian"/>
1654 </condition>
1655 <condition id="CM7_SP_BE_IAR">
1656 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1657 <require condition="CM7_SP_IAR"/>
1658 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1659 </condition>
1660
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1661 <condition id="CM7_DP_IAR">
1662 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1663 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1664 <require Tcompiler="IAR"/>
1665 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1666 <condition id="CM7_DP_LE_IAR">
1667 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1668 <require condition="CM7_DP_IAR"/>
1669 <require Dendian="Little-endian"/>
1670 </condition>
1671 <condition id="CM7_DP_BE_IAR">
1672 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1673 <require condition="CM7_DP_IAR"/>
1674 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1675 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1676
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1677 <condition id="CM23_IAR">
1678 <description>Cortex-M23 processor based device for the IAR Compiler</description>
1679 <require condition="CM23"/>
1680 <require Tcompiler="IAR"/>
1681 </condition>
1682 <condition id="CM23_LE_IAR">
1683 <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1684 <require condition="CM23_IAR"/>
1685 <require Dendian="Little-endian"/>
1686 </condition>
1687 <condition id="CM23_BE_IAR">
1688 <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1689 <require condition="CM23_IAR"/>
1690 <require Dendian="Big-endian"/>
1691 </condition>
1692
1693 <condition id="CM33_IAR">
1694 <description>Cortex-M33 processor based device for the IAR Compiler</description>
1695 <require condition="CM33"/>
1696 <require Tcompiler="IAR"/>
1697 </condition>
1698 <condition id="CM33_LE_IAR">
1699 <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1700 <require condition="CM33_IAR"/>
1701 <require Dendian="Little-endian"/>
1702 </condition>
1703 <condition id="CM33_BE_IAR">
1704 <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1705 <require condition="CM33_IAR"/>
1706 <require Dendian="Big-endian"/>
1707 </condition>
1708
1709 <condition id="CM33_FP_IAR">
1710 <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1711 <require condition="CM33_FP"/>
1712 <require Tcompiler="IAR"/>
1713 </condition>
1714 <condition id="CM33_FP_LE_IAR">
1715 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1716 <require condition="CM33_FP_IAR"/>
1717 <require Dendian="Little-endian"/>
1718 </condition>
1719 <condition id="CM33_FP_BE_IAR">
1720 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1721 <require condition="CM33_FP_IAR"/>
1722 <require Dendian="Big-endian"/>
1723 </condition>
1724
1725 <condition id="CM33_NODSP_NOFPU_IAR">
1726 <description>CM33, no DSP, no FPU, IAR Compiler</description>
1727 <require condition="CM33_NODSP_NOFPU"/>
1728 <require Tcompiler="IAR"/>
1729 </condition>
1730 <condition id="CM33_DSP_NOFPU_IAR">
1731 <description>CM33, DSP, no FPU, IAR Compiler</description>
1732 <require condition="CM33_DSP_NOFPU"/>
1733 <require Tcompiler="IAR"/>
1734 </condition>
1735 <condition id="CM33_NODSP_SP_IAR">
1736 <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1737 <require condition="CM33_NODSP_SP"/>
1738 <require Tcompiler="IAR"/>
1739 </condition>
1740 <condition id="CM33_DSP_SP_IAR">
1741 <description>CM33, DSP, SP FPU, IAR Compiler</description>
1742 <require condition="CM33_DSP_SP"/>
1743 <require Tcompiler="IAR"/>
1744 </condition>
1745 <condition id="CM33_NODSP_NOFPU_LE_IAR">
1746 <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1747 <require condition="CM33_NODSP_NOFPU_IAR"/>
1748 <require Dendian="Little-endian"/>
1749 </condition>
1750 <condition id="CM33_DSP_NOFPU_LE_IAR">
1751 <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1752 <require condition="CM33_DSP_NOFPU_IAR"/>
1753 <require Dendian="Little-endian"/>
1754 </condition>
1755 <condition id="CM33_NODSP_SP_LE_IAR">
1756 <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1757 <require condition="CM33_NODSP_SP_IAR"/>
1758 <require Dendian="Little-endian"/>
1759 </condition>
1760 <condition id="CM33_DSP_SP_LE_IAR">
1761 <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1762 <require condition="CM33_DSP_SP_IAR"/>
1763 <require Dendian="Little-endian"/>
1764 </condition>
1765
1766 <condition id="ARMv8MBL_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1767 <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1768 <require condition="ARMv8MBL"/>
1769 <require Tcompiler="IAR"/>
1770 </condition>
1771 <condition id="ARMv8MBL_LE_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1772 <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1773 <require condition="ARMv8MBL_IAR"/>
1774 <require Dendian="Little-endian"/>
1775 </condition>
1776 <condition id="ARMv8MBL_BE_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1777 <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1778 <require condition="ARMv8MBL_IAR"/>
1779 <require Dendian="Big-endian"/>
1780 </condition>
1781
1782 <condition id="ARMv8MML_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1783 <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1784 <require condition="ARMv8MML"/>
1785 <require Tcompiler="IAR"/>
1786 </condition>
1787 <condition id="ARMv8MML_LE_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1788 <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1789 <require condition="ARMv8MML_IAR"/>
1790 <require Dendian="Little-endian"/>
1791 </condition>
1792 <condition id="ARMv8MML_BE_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1793 <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1794 <require condition="ARMv8MML_IAR"/>
1795 <require Dendian="Big-endian"/>
1796 </condition>
1797
1798 <condition id="ARMv8MML_FP_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1799 <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1800 <require condition="ARMv8MML_FP"/>
1801 <require Tcompiler="IAR"/>
1802 </condition>
1803 <condition id="ARMv8MML_FP_LE_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1804 <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1805 <require condition="ARMv8MML_FP_IAR"/>
1806 <require Dendian="Little-endian"/>
1807 </condition>
1808 <condition id="ARMv8MML_FP_BE_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1809 <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1810 <require condition="ARMv8MML_FP_IAR"/>
1811 <require Dendian="Big-endian"/>
1812 </condition>
1813
1814 <condition id="ARMv8MML_NODSP_NOFPU_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1815 <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1816 <require condition="ARMv8MML_NODSP_NOFPU"/>
1817 <require Tcompiler="IAR"/>
1818 </condition>
1819 <condition id="ARMv8MML_DSP_NOFPU_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1820 <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1821 <require condition="ARMv8MML_DSP_NOFPU"/>
1822 <require Tcompiler="IAR"/>
1823 </condition>
1824 <condition id="ARMv8MML_NODSP_SP_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1825 <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1826 <require condition="ARMv8MML_NODSP_SP"/>
1827 <require Tcompiler="IAR"/>
1828 </condition>
1829 <condition id="ARMv8MML_DSP_SP_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1830 <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1831 <require condition="ARMv8MML_DSP_SP"/>
1832 <require Tcompiler="IAR"/>
1833 </condition>
1834 <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1835 <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1836 <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1837 <require Dendian="Little-endian"/>
1838 </condition>
1839 <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1840 <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1841 <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1842 <require Dendian="Little-endian"/>
1843 </condition>
1844 <condition id="ARMv8MML_NODSP_SP_LE_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1845 <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1846 <require condition="ARMv8MML_NODSP_SP_IAR"/>
1847 <require Dendian="Little-endian"/>
1848 </condition>
1849 <condition id="ARMv8MML_DSP_SP_LE_IAR">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1850 <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1851 <require condition="ARMv8MML_DSP_SP_IAR"/>
1852 <require Dendian="Little-endian"/>
1853 </condition>
1854
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1855 <!-- conditions selecting single devices and CMSIS Core -->
1856 <!-- used for component startup, GCC version is used for C-Startup -->
1857 <condition id="ARMCM0 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1858 <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1859 <require Dvendor="ARM:82" Dname="ARMCM0"/>
1860 <require Cclass="CMSIS" Cgroup="CORE"/>
1861 </condition>
1862 <condition id="ARMCM0 CMSIS GCC">
1863 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1864 <require condition="ARMCM0 CMSIS"/>
1865 <require condition="GCC"/>
1866 </condition>
1867
1868 <condition id="ARMCM0+ CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1869 <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
Jonatan Antonic4e9f462017-10-19 16:51:44 +0200[diff] [blame]1870 <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1871 <require Cclass="CMSIS" Cgroup="CORE"/>
1872 </condition>
1873 <condition id="ARMCM0+ CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1874 <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1875 <require condition="ARMCM0+ CMSIS"/>
1876 <require condition="GCC"/>
1877 </condition>
1878
1879 <condition id="ARMCM3 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1880 <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1881 <require Dvendor="ARM:82" Dname="ARMCM3"/>
1882 <require Cclass="CMSIS" Cgroup="CORE"/>
1883 </condition>
1884 <condition id="ARMCM3 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1885 <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1886 <require condition="ARMCM3 CMSIS"/>
1887 <require condition="GCC"/>
1888 </condition>
1889
1890 <condition id="ARMCM4 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1891 <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1892 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1893 <require Cclass="CMSIS" Cgroup="CORE"/>
1894 </condition>
1895 <condition id="ARMCM4 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1896 <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1897 <require condition="ARMCM4 CMSIS"/>
1898 <require condition="GCC"/>
1899 </condition>
1900
1901 <condition id="ARMCM7 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1902 <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1903 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1904 <require Cclass="CMSIS" Cgroup="CORE"/>
1905 </condition>
1906 <condition id="ARMCM7 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1907 <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1908 <require condition="ARMCM7 CMSIS"/>
1909 <require condition="GCC"/>
1910 </condition>
1911
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1912 <condition id="ARMCM23 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1913 <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1914 <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1915 <require Cclass="CMSIS" Cgroup="CORE"/>
1916 </condition>
1917 <condition id="ARMCM23 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1918 <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1919 <require condition="ARMCM23 CMSIS"/>
1920 <require condition="GCC"/>
1921 </condition>
1922
1923 <condition id="ARMCM33 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1924 <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1925 <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1926 <require Cclass="CMSIS" Cgroup="CORE"/>
1927 </condition>
1928 <condition id="ARMCM33 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1929 <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1930 <require condition="ARMCM33 CMSIS"/>
1931 <require condition="GCC"/>
1932 </condition>
1933
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1934 <condition id="ARMSC000 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1935 <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1936 <require Dvendor="ARM:82" Dname="ARMSC000"/>
1937 <require Cclass="CMSIS" Cgroup="CORE"/>
1938 </condition>
1939 <condition id="ARMSC000 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1940 <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1941 <require condition="ARMSC000 CMSIS"/>
1942 <require condition="GCC"/>
1943 </condition>
1944
1945 <condition id="ARMSC300 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1946 <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1947 <require Dvendor="ARM:82" Dname="ARMSC300"/>
1948 <require Cclass="CMSIS" Cgroup="CORE"/>
1949 </condition>
1950 <condition id="ARMSC300 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1951 <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1952 <require condition="ARMSC300 CMSIS"/>
1953 <require condition="GCC"/>
1954 </condition>
1955
1956 <condition id="ARMv8MBL CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1957 <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1958 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1959 <require Cclass="CMSIS" Cgroup="CORE"/>
1960 </condition>
1961 <condition id="ARMv8MBL CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1962 <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1963 <require condition="ARMv8MBL CMSIS"/>
1964 <require condition="GCC"/>
1965 </condition>
1966
1967 <condition id="ARMv8MML CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1968 <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1969 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1970 <require Cclass="CMSIS" Cgroup="CORE"/>
1971 </condition>
1972 <condition id="ARMv8MML CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1973 <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1974 <require condition="ARMv8MML CMSIS"/>
1975 <require condition="GCC"/>
1976 </condition>
1977
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1978 <condition id="ARMCA5 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1979 <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1980 <require Dvendor="ARM:82" Dname="ARMCA5"/>
1981 <require Cclass="CMSIS" Cgroup="CORE"/>
1982 </condition>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]1983
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1984 <condition id="ARMCA7 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1985 <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1986 <require Dvendor="ARM:82" Dname="ARMCA7"/>
1987 <require Cclass="CMSIS" Cgroup="CORE"/>
1988 </condition>
1989
1990 <condition id="ARMCA9 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]1991 <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1992 <require Dvendor="ARM:82" Dname="ARMCA9"/>
1993 <require Cclass="CMSIS" Cgroup="CORE"/>
1994 </condition>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]1995
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1996 <!-- CMSIS DSP -->
1997 <condition id="CMSIS DSP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1998 <description>Components required for DSP</description>
1999 <require condition="ARMv6_7_8-M Device"/>
TTornblom3ff89062018-03-08 11:32:29 +0100[diff] [blame]2000 <require condition="ARMCC GCC IAR"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2001 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2002 </condition>
Jonatan Antonia67f5552018-01-18 15:22:46 +0100[diff] [blame]2003
2004 <!-- CMSIS NN -->
2005 <condition id="CMSIS NN">
2006 <description>Components required for NN</description>
2007 <require condition="CMSIS DSP"/>
2008 </condition>
2009
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2010 <!-- RTOS RTX -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2011 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2012 <description>Components required for RTOS RTX</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2013 <require condition="ARMv6_7-M Device"/>
2014 <require condition="ARMCC GCC IAR"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2015 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2016 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2017 </condition>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2018 <condition id="RTOS RTX IFX">
2019 <description>Components required for RTOS RTX IFX</description>
2020 <require condition="ARMv6_7-M Device"/>
2021 <require condition="ARMCC GCC IAR"/>
2022 <require Dvendor="Infineon:7" Dname="XMC4*"/>
2023 <require Cclass="Device" Cgroup="Startup"/>
2024 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
2025 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2026 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2027 <description>Components required for RTOS RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2028 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2029 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2030 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2031 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2032 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2033 <description>Components required for RTOS2 RTX5</description>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2034 <require condition="ARMv6_7_8-M Device"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]2035 <require condition="ARMCC GCC IAR"/>
2036 <require Cclass="CMSIS" Cgroup="CORE"/>
2037 <require Cclass="Device" Cgroup="Startup"/>
2038 </condition>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2039 <condition id="RTOS2 RTX5 v7-A">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2040 <description>Components required for RTOS2 RTX5 on Armv7-A</description>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2041 <require condition="ARMv7-A Device"/>
2042 <require condition="ARMCC GCC IAR"/>
2043 <require Cclass="CMSIS" Cgroup="CORE"/>
2044 <require Cclass="Device" Cgroup="Startup"/>
2045 <require Cclass="Device" Cgroup="OS Tick"/>
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2046 <require Cclass="Device" Cgroup="IRQ Controller"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2047 </condition>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]2048 <condition id="RTOS2 RTX5 Lib">
2049 <description>Components required for RTOS2 RTX5 Library</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2050 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2051 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2052 <require Cclass="CMSIS" Cgroup="CORE"/>
2053 <require Cclass="Device" Cgroup="Startup"/>
2054 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2055 <condition id="RTOS2 RTX5 NS">
2056 <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2057 <require condition="ARMv8-M TZ Device"/>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]2058 <require condition="ARMCC GCC IAR"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2059 <require Cclass="CMSIS" Cgroup="CORE"/>
2060 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2061 </condition>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2062
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2063 <!-- OS Tick -->
2064 <condition id="OS Tick PTIM">
2065 <description>Components required for OS Tick Private Timer</description>
2066 <require condition="CA5_CA9"/>
2067 <require Cclass="Device" Cgroup="IRQ Controller"/>
2068 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2069
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]2070 <condition id="OS Tick GTIM">
2071 <description>Components required for OS Tick Generic Physical Timer</description>
2072 <require condition="CA7"/>
2073 <require Cclass="Device" Cgroup="IRQ Controller"/>
2074 </condition>
2075
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2076 </conditions>
2077
2078 <components>
2079 <!-- CMSIS-Core component -->
Jonatan Antonie924d642018-02-20 11:43:50 +0100[diff] [blame]2080 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.1" condition="ARMv6_7_8-M Device" >
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2081 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2082 <files>
2083 <!-- CPU independent -->
2084 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
2085 <file category="include" name="CMSIS/Include/"/>
Robert Rostoharb2e07162016-11-04 10:43:56 +0100[diff] [blame]2086 <file category="header" name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]2087 <!-- Code template -->
Robert Rostohar0e71e882016-11-16 19:03:44 +0100[diff] [blame]2088 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c" version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
Robert Rostohar71f4dcf2016-11-16 19:06:01 +0100[diff] [blame]2089 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2090 </files>
2091 </component>
2092
Jonatan Antonie924d642018-02-20 11:43:50 +0100[diff] [blame]2093 <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.1" condition="ARMv7-A Device" >
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2094 <description>CMSIS-CORE for Cortex-A</description>
2095 <files>
2096 <!-- CPU independent -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2097 <file category="doc" name="CMSIS/Documentation/Core_A/html/index.html"/>
brondanib6bdb2c2017-03-02 16:15:52 +0100[diff] [blame]2098 <file category="include" name="CMSIS/Core_A/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2099 </files>
2100 </component>
2101
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2102 <!-- CMSIS-Startup components -->
2103 <!-- Cortex-M0 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2104 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2105 <description>System and Startup for Generic Arm Cortex-M0 device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2106 <files>
2107 <!-- include folder / device header file -->
2108 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2109 <!-- startup / system file -->
2110 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2111 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2112 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2113 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2114 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
2115 </files>
2116 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2117 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2118 <description>System and Startup for Generic Arm Cortex-M0 device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2119 <files>
2120 <!-- include folder / device header file -->
2121 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2122 <!-- startup / system file -->
2123 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2124 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2125 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
2126 </files>
2127 </component>
2128
2129 <!-- Cortex-M0+ -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2130 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2131 <description>System and Startup for Generic Arm Cortex-M0+ device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2132 <files>
2133 <!-- include folder / device header file -->
2134 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2135 <!-- startup / system file -->
2136 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2137 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2138 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2139 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2140 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
2141 </files>
2142 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2143 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2144 <description>System and Startup for Generic Arm Cortex-M0+ device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2145 <files>
2146 <!-- include folder / device header file -->
2147 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2148 <!-- startup / system file -->
2149 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2150 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2151 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
2152 </files>
2153 </component>
2154
2155 <!-- Cortex-M3 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2156 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2157 <description>System and Startup for Generic Arm Cortex-M3 device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2158 <files>
2159 <!-- include folder / device header file -->
2160 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2161 <!-- startup / system file -->
2162 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2163 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2164 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2165 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2166 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
2167 </files>
2168 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2169 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2170 <description>System and Startup for Generic Arm Cortex-M3 device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2171 <files>
2172 <!-- include folder / device header file -->
2173 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2174 <!-- startup / system file -->
2175 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2176 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2177 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
2178 </files>
2179 </component>
2180
2181 <!-- Cortex-M4 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2182 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2183 <description>System and Startup for Generic Arm Cortex-M4 device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2184 <files>
2185 <!-- include folder / device header file -->
2186 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2187 <!-- startup / system file -->
2188 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2189 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2190 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2191 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2192 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
2193 </files>
2194 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2195 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2196 <description>System and Startup for Generic Arm Cortex-M4 device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2197 <files>
2198 <!-- include folder / device header file -->
2199 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2200 <!-- startup / system file -->
2201 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2202 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2203 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
2204 </files>
2205 </component>
2206
2207 <!-- Cortex-M7 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2208 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2209 <description>System and Startup for Generic Arm Cortex-M7 device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2210 <files>
2211 <!-- include folder / device header file -->
2212 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
2213 <!-- startup / system file -->
2214 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2215 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2216 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2217 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2218 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
2219 </files>
2220 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2221 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2222 <description>System and Startup for Generic Arm Cortex-M7 device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2223 <files>
2224 <!-- include folder / device header file -->
2225 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
2226 <!-- startup / system file -->
2227 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2228 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2229 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
2230 </files>
2231 </component>
2232
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2233 <!-- Cortex-M23 -->
2234 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2235 <description>System and Startup for Generic Arm Cortex-M23 device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2236 <files>
2237 <!-- include folder / device header file -->
2238 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2239 <!-- startup / system file -->
2240 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2241 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2242 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antonie1454c12017-09-11 09:23:17 +0200[diff] [blame]2243 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2244 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2245 <!-- SAU configuration -->
2246 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2247 </files>
2248 </component>
2249 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2250 <description>System and Startup for Generic Arm Cortex-M23 device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2251 <files>
2252 <!-- include folder / device header file -->
2253 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2254 <!-- startup / system file -->
2255 <file category="sourceC" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2256 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2257 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
2258 <!-- SAU configuration -->
2259 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2260 </files>
2261 </component>
2262
2263 <!-- Cortex-M33 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2264 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2265 <description>System and Startup for Generic Arm Cortex-M33 device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2266 <files>
2267 <!-- include folder / device header file -->
2268 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2269 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2270 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
2271 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
2272 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antonie1454c12017-09-11 09:23:17 +0200[diff] [blame]2273 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s" version="1.0.0" attr="config" condition="IAR"/>
2274 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2275 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2276 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2277 </files>
2278 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2279 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2280 <description>System and Startup for Generic Arm Cortex-M33 device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2281 <files>
2282 <!-- include folder / device header file -->
2283 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2284 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2285 <file category="sourceC" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
2286 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2287 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2288 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2289 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2290 </files>
2291 </component>
2292
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2293 <!-- Cortex-SC000 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2294 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2295 <description>System and Startup for Generic Arm SC000 device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2296 <files>
2297 <!-- include folder / device header file -->
2298 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2299 <!-- startup / system file -->
2300 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2301 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2302 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2303 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2304 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2305 </files>
2306 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2307 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2308 <description>System and Startup for Generic Arm SC000 device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2309 <files>
2310 <!-- include folder / device header file -->
2311 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2312 <!-- startup / system file -->
2313 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2314 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2315 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2316 </files>
2317 </component>
2318
2319 <!-- Cortex-SC300 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2320 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2321 <description>System and Startup for Generic Arm SC300 device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2322 <files>
2323 <!-- include folder / device header file -->
2324 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2325 <!-- startup / system file -->
2326 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2327 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2328 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2329 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2330 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2331 </files>
2332 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2333 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2334 <description>System and Startup for Generic Arm SC300 device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2335 <files>
2336 <!-- include folder / device header file -->
2337 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2338 <!-- startup / system file -->
2339 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2340 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2341 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2342 </files>
2343 </component>
2344
2345 <!-- ARMv8MBL -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2346 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2347 <description>System and Startup for Generic Armv8-M Baseline device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2348 <files>
2349 <!-- include folder / device header file -->
2350 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2351 <!-- startup / system file -->
2352 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2353 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2354 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2355 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2356 <!-- SAU configuration -->
2357 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2358 </files>
2359 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2360 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2361 <description>System and Startup for Generic Armv8-M Baseline device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2362 <files>
2363 <!-- include folder / device header file -->
2364 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2365 <!-- startup / system file -->
2366 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2367 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2368 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2369 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2370 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2371 </files>
2372 </component>
2373
2374 <!-- ARMv8MML -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2375 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2376 <description>System and Startup for Generic Armv8-M Mainline device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2377 <files>
2378 <!-- include folder / device header file -->
2379 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2380 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2381 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2382 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2383 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2384 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2385 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2386 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2387 </files>
2388 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2389 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2390 <description>System and Startup for Generic Armv8-M Mainline device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2391 <files>
2392 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2393 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2394 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2395 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2396 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2397 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2398 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2399 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2400 </files>
2401 </component>
2402
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2403 <!-- Cortex-A5 -->
2404 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA5 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2405 <description>System and Startup for Generic Arm Cortex-A5 device</description>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2406 <files>
2407 <!-- include folder / device header file -->
2408 <file category="include" name="Device/ARM/ARMCA5/Include/"/>
2409 <!-- startup / system / mmu files -->
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2410 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2411 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
2412 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2413 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antoni7e5e24f2017-09-12 16:40:22 +0200[diff] [blame]2414 <file category="sourceC" name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2415 <file category="other" name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2416 <file category="sourceAsm" name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2417 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf" version="1.0.0" attr="config" condition="IAR"/>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2418 <file category="sourceC" name="Device/ARM/ARMCA5/Source/system_ARMCA5.c" version="1.0.0" attr="config"/>
2419 <file category="sourceC" name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c" version="1.0.0" attr="config"/>
2420 <file category="header" name="Device/ARM/ARMCA5/Include/system_ARMCA5.h" version="1.0.0" attr="config"/>
2421 <file category="header" name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h" version="1.0.0" attr="config"/>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2422
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2423 </files>
2424 </component>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2425
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2426 <!-- Cortex-A7 -->
2427 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA7 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2428 <description>System and Startup for Generic Arm Cortex-A7 device</description>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2429 <files>
2430 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2431 <file category="include" name="Device/ARM/ARMCA7/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2432 <!-- startup / system / mmu files -->
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2433 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2434 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
2435 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2436 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antoni7e5e24f2017-09-12 16:40:22 +0200[diff] [blame]2437 <file category="sourceC" name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2438 <file category="other" name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2439 <file category="sourceAsm" name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2440 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf" version="1.0.0" attr="config" condition="IAR"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2441 <file category="sourceC" name="Device/ARM/ARMCA7/Source/system_ARMCA7.c" version="1.0.0" attr="config"/>
2442 <file category="sourceC" name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2443 <file category="header" name="Device/ARM/ARMCA7/Include/system_ARMCA7.h" version="1.0.0" attr="config"/>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2444 <file category="header" name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2445 </files>
2446 </component>
2447
2448 <!-- Cortex-A9 -->
Jonatan Antonib27a4122017-08-08 13:30:19 +0200[diff] [blame]2449 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCA9 CMSIS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2450 <description>System and Startup for Generic Arm Cortex-A9 device</description>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2451 <files>
2452 <!-- include folder / device header file -->
2453 <file category="include" name="Device/ARM/ARMCA9/Include/"/>
2454 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2455 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2456 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2457 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2458 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antonib27a4122017-08-08 13:30:19 +0200[diff] [blame]2459 <file category="sourceC" name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2460 <file category="other" name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld" version="1.0.0" attr="config" condition="GCC"/>
2461 <file category="sourceAsm" name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2462 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf" version="1.0.0" attr="config" condition="IAR"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2463 <file category="sourceC" name="Device/ARM/ARMCA9/Source/system_ARMCA9.c" version="1.0.0" attr="config"/>
2464 <file category="sourceC" name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2465 <file category="header" name="Device/ARM/ARMCA9/Include/system_ARMCA9.h" version="1.0.0" attr="config"/>
2466 <file category="header" name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2467 </files>
2468 </component>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2469
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2470 <!-- IRQ Controller -->
Vladimir Umek184017e2018-04-09 08:11:37 +0200[diff] [blame]2471 <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2472 <description>IRQ Controller implementation using GIC</description>
2473 <files>
2474 <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2475 </files>
2476 </component>
2477
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]2478 <!-- OS Tick -->
Jonatan Antonic6dca332018-03-02 12:23:44 +0100[diff] [blame]2479 <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]2480 <description>OS Tick implementation using Private Timer</description>
2481 <files>
2482 <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2483 </files>
2484 </component>
2485
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]2486 <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]2487 <description>OS Tick implementation using Generic Physical Timer</description>
2488 <files>
2489 <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2490 </files>
2491 </component>
2492
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2493 <!-- CMSIS-DSP component -->
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2494 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2495 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2496 <files>
2497 <!-- CPU independent -->
2498 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2499 <file category="header" name="CMSIS/Include/arm_math.h"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2500
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2501 <!-- CPU and Compiler dependent -->
2502 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2503 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2504 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2505 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2506 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2507 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2508 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2509 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2510 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2511 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2512 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2513 <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2514 <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2515 <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2516 <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2517
2518 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2519 <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2520 <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2521 <file category="library" condition="CM33_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2522 <file category="library" condition="CM33_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2523 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2524 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2525 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2526 <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2527 <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2528 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2529 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2530
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2531 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2532 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2533 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2534 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2535 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2536 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2537 <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2538 <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2539
2540 <file category="library" condition="CM23_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2541 <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2542 <file category="library" condition="CM33_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2543 <file category="library" condition="CM33_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2544 <file category="library" condition="CM33_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2545 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2546 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2547 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2548 <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2549 <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2550 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2551 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2552
TTornblom3ff89062018-03-08 11:32:29 +0100[diff] [blame]2553 <!-- IAR -->
2554 <file category="library" condition="CM0_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2555 <file category="library" condition="CM0_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM0b_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2556 <file category="library" condition="CM3_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2557 <file category="library" condition="CM3_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM3b_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2558 <file category="library" condition="CM4_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2559 <file category="library" condition="CM4_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM4b_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2560 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2561 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM4bf_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2562 <file category="library" condition="CM7_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2563 <file category="library" condition="CM7_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM7b_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2564 <file category="library" condition="CM7_DP_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM7lf_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2565 <file category="library" condition="CM7_DP_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM7bf_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2566 <file category="library" condition="CM7_SP_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM7ls_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2567 <file category="library" condition="CM7_SP_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM7bs_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2568
2569 <file category="library" condition="CM23_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2570 <file category="library" condition="CM33_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2571 <file category="library" condition="CM33_DSP_SP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2572 <file category="library" condition="CM33_FP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2573 <file category="library" condition="CM33_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2574 <file category="library" condition="CM33_DSP_SP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2575 <!--file category="library" condition="CM33_DSP_DP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/-->
2576 <file category="library" condition="ARMv8MBL_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2577 <file category="library" condition="ARMv8MML_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2578 <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2579 <file category="library" condition="ARMv8MML_FP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2580 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2581 <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2582 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/-->
2583
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2584 </files>
2585 </component>
Jonatan Antonia67f5552018-01-18 15:22:46 +0100[diff] [blame]2586
2587 <!-- CMSIS-NN component -->
Jonatan Antoni0cd63832018-02-20 15:00:53 +0100[diff] [blame]2588 <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.0.0" condition="CMSIS NN">
Jonatan Antoni13bff482018-01-19 13:05:57 +0100[diff] [blame]2589 <description>CMSIS-NN Neural Network Library</description>
Jonatan Antonia67f5552018-01-18 15:22:46 +0100[diff] [blame]2590 <files>
2591 <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2592 <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2593
2594 <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2595 <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2596 <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2597 <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2598
2599 <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2600 <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2601 <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2602 <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2603 <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2604 <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2605 <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2606 <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2607 <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2608 <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2609 <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2610
2611 <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2612 <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2613 <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2614 <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2615 <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2616 <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2617
2618 <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2619 <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
Jonatan Antonia67f5552018-01-18 15:22:46 +0100[diff] [blame]2620 <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
Jonatan Antoni6c9a7dd2018-01-22 13:34:21 +0100[diff] [blame]2621
2622 <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
Jonatan Antonia67f5552018-01-18 15:22:46 +0100[diff] [blame]2623
2624 <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2625 <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2626 </files>
2627 </component>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2628
2629 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2630 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2631 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2632 <RTE_Components_h>
2633 <!-- the following content goes into file 'RTE_Components.h' -->
2634 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2635 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2636 </RTE_Components_h>
2637 <files>
2638 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]2639 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2640 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2641 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2642
2643 <!-- RTX templates -->
2644 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2645 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2646 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2647 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2648 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2649 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2650 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2651 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2652 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2653 <!-- tool-chain specific template file -->
2654 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2655 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2656 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2657
2658 <!-- CPU and Compiler dependent -->
2659 <!-- ARMCC -->
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]2660 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2661 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2662 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2663 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2664 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]2665 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2666 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]2667 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2668 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2669 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2670 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2671 <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2672 <!-- GCC -->
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]2673 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2674 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2675 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2676 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2677 <file category="library" condition="CM4_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]2678 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2679 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]2680 <file category="library" condition="CM4_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2681 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2682 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2683 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2684 <file category="library" condition="CM7_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2685 <!-- IAR -->
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]2686 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2687 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2688 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2689 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2690 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2691 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2692 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2693 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2694 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2695 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2696 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2697 <file category="library" condition="CM7_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2698 </files>
2699 </component>
2700 <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2701 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2702 <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2703 <RTE_Components_h>
2704 <!-- the following content goes into file 'RTE_Components.h' -->
2705 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2706 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2707 </RTE_Components_h>
2708 <files>
2709 <!-- CPU independent -->
2710 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2711 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2712 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2713
2714 <!-- RTX templates -->
2715 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2716 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2717 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2718 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2719 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2720 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2721 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2722 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2723 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2724 <!-- tool-chain specific template file -->
2725 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2726 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2727 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2728
2729 <!-- CPU and Compiler dependent -->
2730 <!-- ARMCC -->
2731 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2732 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2733 <!-- GCC -->
2734 <file category="library" condition="CM4_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2735 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2736 <!-- IAR -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2737 </files>
2738 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2739
2740 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostohar84a93882018-03-06 14:27:36 +0100[diff] [blame]2741 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.3.1" Capiversion="1.0.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2742 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2743 <RTE_Components_h>
2744 <!-- the following content goes into file 'RTE_Components.h' -->
2745 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2746 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
2747 </RTE_Components_h>
2748 <files>
2749 <!-- RTX header file -->
2750 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2751 <!-- RTX compatibility module for API V1 -->
2752 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2753 </files>
2754 </component>
2755
2756 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostohar84a93882018-03-06 14:27:36 +0100[diff] [blame]2757 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.3.1" Capiversion="2.1.2" condition="RTOS2 RTX5 Lib">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2758 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2759 <RTE_Components_h>
2760 <!-- the following content goes into file 'RTE_Components.h' -->
2761 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2762 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2763 </RTE_Components_h>
2764 <files>
2765 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2766 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2767
2768 <!-- RTX header files -->
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2769 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2770
2771 <!-- RTX configuration -->
Robert Rostoharcd44e6f2018-01-09 11:45:59 +0100[diff] [blame]2772 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.3.0"/>
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2773 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2774
2775 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2776 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2777 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2778 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2779 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2780 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2781 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2782 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2783 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2784 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2785 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2786
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2787 <!-- RTX library configuration -->
2788 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2789
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2790 <!-- RTX libraries (CPU and Compiler dependent) -->
2791 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2792 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
2793 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2794 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2795 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2796 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2797 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2798 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2799 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2800 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2801 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2802 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2803 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
2804 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2805 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2806 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2807 <file category="library" condition="CM4_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2808 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2809 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2810 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2811 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2812 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2813 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2814 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2815 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2816 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2817 <!-- IAR -->
2818 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2819 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2820 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2821 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2822 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2823 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2824 </files>
2825 </component>
Robert Rostohar84a93882018-03-06 14:27:36 +0100[diff] [blame]2826 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.3.1" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2827 <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2828 <RTE_Components_h>
2829 <!-- the following content goes into file 'RTE_Components.h' -->
2830 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2831 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2832 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2833 </RTE_Components_h>
2834 <files>
2835 <!-- RTX documentation -->
2836 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2837
2838 <!-- RTX header files -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2839 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2840
2841 <!-- RTX configuration -->
Robert Rostoharcd44e6f2018-01-09 11:45:59 +0100[diff] [blame]2842 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.3.0"/>
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2843 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2844
2845 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2846 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2847 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2848 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2849 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2850 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2851 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2852 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2853 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]2854 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2855 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2856
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2857 <!-- RTX library configuration -->
2858 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2859
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2860 <!-- RTX libraries (CPU and Compiler dependent) -->
2861 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2862 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2863 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2864 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2865 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2866 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2867 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2868 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2869 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2870 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2871 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2872 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2873 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2874 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2875 </files>
2876 </component>
Robert Rostohar84a93882018-03-06 14:27:36 +0100[diff] [blame]2877 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.3.1" Capiversion="2.1.2" condition="RTOS2 RTX5">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2878 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2879 <RTE_Components_h>
2880 <!-- the following content goes into file 'RTE_Components.h' -->
2881 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2882 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2883 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2884 </RTE_Components_h>
2885 <files>
2886 <!-- RTX documentation -->
2887 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2888
2889 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2890 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2891
2892 <!-- RTX configuration -->
Robert Rostoharcd44e6f2018-01-09 11:45:59 +0100[diff] [blame]2893 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.3.0"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2894 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2895
2896 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2897 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2898 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2899 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2900 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2901 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2902 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2903 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2904 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]2905 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2906 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2907
2908 <!-- RTX sources (core) -->
2909 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2910 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2911 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2912 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2913 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2914 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2915 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2916 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2917 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2918 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2919 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2920 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2921 <!-- RTX sources (library configuration) -->
2922 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2923 <!-- RTX sources (handlers ARMCC) -->
2924 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
2925 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
2926 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
2927 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
2928 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
2929 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2930 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
2931 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
2932 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2933 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
2934 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
2935 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
2936 <!-- RTX sources (handlers GCC) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2937 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S" condition="CM0_GCC"/>
2938 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM3_GCC"/>
2939 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM4_GCC"/>
2940 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM4_FP_GCC"/>
2941 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM7_GCC"/>
2942 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM7_FP_GCC"/>
2943 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
2944 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
2945 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2946 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
2947 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
2948 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2949 <!-- RTX sources (handlers IAR) -->
2950 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s" condition="CM0_IAR"/>
2951 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM3_IAR"/>
2952 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM4_IAR"/>
2953 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM4_FP_IAR"/>
2954 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM7_IAR"/>
2955 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM7_FP_IAR"/>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]2956 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
2957 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
2958 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
2959 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
2960 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
2961 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2962 <!-- OS Tick (SysTick) -->
2963 <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2964 </files>
2965 </component>
Robert Rostohar84a93882018-03-06 14:27:36 +0100[diff] [blame]2966 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.3.1" Capiversion="2.1.2" condition="RTOS2 RTX5 v7-A">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]2967 <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2968 <RTE_Components_h>
2969 <!-- the following content goes into file 'RTE_Components.h' -->
2970 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2971 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
2972 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
2973 </RTE_Components_h>
2974 <files>
2975 <!-- RTX documentation -->
2976 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2977
2978 <!-- RTX header files -->
2979 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2980
2981 <!-- RTX configuration -->
Robert Rostoharcd44e6f2018-01-09 11:45:59 +0100[diff] [blame]2982 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.3.0"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2983 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
2984
2985 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/handlers.c" version="5.1.0"/>
2986
2987 <!-- RTX templates -->
2988 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2989 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2990 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2991 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2992 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2993 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2994 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2995 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]2996 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2997 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2998
2999 <!-- RTX sources (core) -->
3000 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3001 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3002 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3003 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3004 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3005 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3006 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3007 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3008 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3009 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3010 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3011 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]3012 <!-- RTX sources (library configuration) -->
3013 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3014 <!-- RTX sources (handlers ARMCC) -->
3015 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s" condition="CA_ARMCC5"/>
3016 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_ARMCC6"/>
3017 <!-- RTX sources (handlers GCC) -->
3018 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_GCC"/>
3019 <!-- RTX sources (handlers IAR) -->
3020 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s" condition="CA_IAR"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]3021 </files>
3022 </component>
Robert Rostohar84a93882018-03-06 14:27:36 +0100[diff] [blame]3023 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.3.1" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]3024 <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]3025 <RTE_Components_h>
3026 <!-- the following content goes into file 'RTE_Components.h' -->
3027 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
3028 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]3029 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Jonatan Antoni18cc96d2018-01-09 17:29:30 +0100[diff] [blame]3030 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]3031 </RTE_Components_h>
3032 <files>
3033 <!-- RTX documentation -->
3034 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3035
3036 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]3037 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3038
3039 <!-- RTX configuration -->
Robert Rostoharcd44e6f2018-01-09 11:45:59 +0100[diff] [blame]3040 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.3.0"/>
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]3041 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]3042
3043 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]3044 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3045 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
3046 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3047 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3048 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3049 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3050 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]3051 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Robert Rostohare5b1c2d2017-11-28 15:48:26 +0100[diff] [blame]3052 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]3053 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3054
3055 <!-- RTX sources (core) -->
3056 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3057 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3058 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3059 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3060 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3061 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3062 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3063 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3064 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3065 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3066 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]3067 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3068 <!-- RTX sources (library configuration) -->
3069 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]3070 <!-- RTX sources (ARMCC handlers) -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]3071 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
3072 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
3073 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]3074 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
3075 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
3076 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
3077 <!-- RTX sources (GCC handlers) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]3078 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="CM23_GCC"/>
3079 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="CM33_GCC"/>
3080 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3081 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="ARMv8MBL_GCC"/>
3082 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="ARMv8MML_GCC"/>
3083 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]3084 <!-- RTX sources (IAR handlers) -->
Jonatan Antoni1be0aea2017-11-10 10:01:03 +0100[diff] [blame]3085 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="CM23_IAR"/>
3086 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_IAR"/>
3087 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_FP_IAR"/>
3088 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="ARMv8MBL_IAR"/>
3089 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_IAR"/>
3090 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_FP_IAR"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]3091 <!-- OS Tick (SysTick) -->
3092 <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]3093 </files>
3094 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]3095
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3096 </components>
3097
3098 <boards>
3099 <board name="uVision Simulator" vendor="Keil">
3100 <description>uVision Simulator</description>
3101 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3102 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
Jonatan Antonic4e9f462017-10-19 16:51:44 +0200[diff] [blame]3103 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3104 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]3105 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3106 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]3107 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]3108 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]3109 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3110 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3111 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3112 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3113 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3114 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
Joachim Krech4a03e6d2017-02-06 13:17:39 +0100[diff] [blame]3115 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]3116 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3117 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3118 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3119 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
Daniel Brondanifaaa48f2017-07-31 14:00:54 +0200[diff] [blame]3120 </board>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]3121
Daniel Brondanifaaa48f2017-07-31 14:00:54 +0200[diff] [blame]3122 <board name="Fixed Virtual Platform" vendor="ARM">
Daniel Brondani040d63b2017-08-01 16:49:57 +0200[diff] [blame]3123 <description>Fixed Virtual Platform</description>
Daniel Brondanifaaa48f2017-07-31 14:00:54 +0200[diff] [blame]3124 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3125 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3126 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3127 </board>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3128 </boards>
3129
3130 <examples>
3131 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
3132 <description>DSP_Lib Class Marks example</description>
3133 <board name="uVision Simulator" vendor="Keil"/>
3134 <project>
3135 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3136 </project>
3137 <attributes>
3138 <component Cclass="CMSIS" Cgroup="CORE"/>
3139 <component Cclass="CMSIS" Cgroup="DSP"/>
3140 <component Cclass="Device" Cgroup="Startup"/>
3141 <category>Getting Started</category>
3142 </attributes>
3143 </example>
3144
3145 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
3146 <description>DSP_Lib Convolution example</description>
3147 <board name="uVision Simulator" vendor="Keil"/>
3148 <project>
3149 <environment name="uv" load="arm_convolution_example.uvprojx"/>
3150 </project>
3151 <attributes>
3152 <component Cclass="CMSIS" Cgroup="CORE"/>
3153 <component Cclass="CMSIS" Cgroup="DSP"/>
3154 <component Cclass="Device" Cgroup="Startup"/>
3155 <category>Getting Started</category>
3156 </attributes>
3157 </example>
3158
3159 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
3160 <description>DSP_Lib Dotproduct example</description>
3161 <board name="uVision Simulator" vendor="Keil"/>
3162 <project>
3163 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3164 </project>
3165 <attributes>
3166 <component Cclass="CMSIS" Cgroup="CORE"/>
3167 <component Cclass="CMSIS" Cgroup="DSP"/>
3168 <component Cclass="Device" Cgroup="Startup"/>
3169 <category>Getting Started</category>
3170 </attributes>
3171 </example>
3172
3173 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
3174 <description>DSP_Lib FFT Bin example</description>
3175 <board name="uVision Simulator" vendor="Keil"/>
3176 <project>
3177 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3178 </project>
3179 <attributes>
3180 <component Cclass="CMSIS" Cgroup="CORE"/>
3181 <component Cclass="CMSIS" Cgroup="DSP"/>
3182 <component Cclass="Device" Cgroup="Startup"/>
3183 <category>Getting Started</category>
3184 </attributes>
3185 </example>
3186
3187 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
3188 <description>DSP_Lib FIR example</description>
3189 <board name="uVision Simulator" vendor="Keil"/>
3190 <project>
3191 <environment name="uv" load="arm_fir_example.uvprojx"/>
3192 </project>
3193 <attributes>
3194 <component Cclass="CMSIS" Cgroup="CORE"/>
3195 <component Cclass="CMSIS" Cgroup="DSP"/>
3196 <component Cclass="Device" Cgroup="Startup"/>
3197 <category>Getting Started</category>
3198 </attributes>
3199 </example>
3200
3201 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
3202 <description>DSP_Lib Graphic Equalizer example</description>
3203 <board name="uVision Simulator" vendor="Keil"/>
3204 <project>
3205 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3206 </project>
3207 <attributes>
3208 <component Cclass="CMSIS" Cgroup="CORE"/>
3209 <component Cclass="CMSIS" Cgroup="DSP"/>
3210 <component Cclass="Device" Cgroup="Startup"/>
3211 <category>Getting Started</category>
3212 </attributes>
3213 </example>
3214
3215 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
3216 <description>DSP_Lib Linear Interpolation example</description>
3217 <board name="uVision Simulator" vendor="Keil"/>
3218 <project>
3219 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3220 </project>
3221 <attributes>
3222 <component Cclass="CMSIS" Cgroup="CORE"/>
3223 <component Cclass="CMSIS" Cgroup="DSP"/>
3224 <component Cclass="Device" Cgroup="Startup"/>
3225 <category>Getting Started</category>
3226 </attributes>
3227 </example>
3228
3229 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
3230 <description>DSP_Lib Matrix example</description>
3231 <board name="uVision Simulator" vendor="Keil"/>
3232 <project>
3233 <environment name="uv" load="arm_matrix_example.uvprojx"/>
3234 </project>
3235 <attributes>
3236 <component Cclass="CMSIS" Cgroup="CORE"/>
3237 <component Cclass="CMSIS" Cgroup="DSP"/>
3238 <component Cclass="Device" Cgroup="Startup"/>
3239 <category>Getting Started</category>
3240 </attributes>
3241 </example>
3242
3243 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
3244 <description>DSP_Lib Signal Convergence example</description>
3245 <board name="uVision Simulator" vendor="Keil"/>
3246 <project>
3247 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3248 </project>
3249 <attributes>
3250 <component Cclass="CMSIS" Cgroup="CORE"/>
3251 <component Cclass="CMSIS" Cgroup="DSP"/>
3252 <component Cclass="Device" Cgroup="Startup"/>
3253 <category>Getting Started</category>
3254 </attributes>
3255 </example>
3256
3257 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
3258 <description>DSP_Lib Sinus/Cosinus example</description>
3259 <board name="uVision Simulator" vendor="Keil"/>
3260 <project>
3261 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3262 </project>
3263 <attributes>
3264 <component Cclass="CMSIS" Cgroup="CORE"/>
3265 <component Cclass="CMSIS" Cgroup="DSP"/>
3266 <component Cclass="Device" Cgroup="Startup"/>
3267 <category>Getting Started</category>
3268 </attributes>
3269 </example>
3270
3271 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
3272 <description>DSP_Lib Variance example</description>
3273 <board name="uVision Simulator" vendor="Keil"/>
3274 <project>
3275 <environment name="uv" load="arm_variance_example.uvprojx"/>
3276 </project>
3277 <attributes>
3278 <component Cclass="CMSIS" Cgroup="CORE"/>
3279 <component Cclass="CMSIS" Cgroup="DSP"/>
3280 <component Cclass="Device" Cgroup="Startup"/>
3281 <category>Getting Started</category>
3282 </attributes>
3283 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]3284
Jonatan Antonia67f5552018-01-18 15:22:46 +0100[diff] [blame]3285 <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
Jonatan Antoni13bff482018-01-19 13:05:57 +0100[diff] [blame]3286 <description>Neural Network CIFAR10 example</description>
Jonatan Antonia67f5552018-01-18 15:22:46 +0100[diff] [blame]3287 <board name="uVision Simulator" vendor="Keil"/>
3288 <project>
3289 <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3290 </project>
3291 <attributes>
3292 <component Cclass="CMSIS" Cgroup="CORE"/>
3293 <component Cclass="CMSIS" Cgroup="DSP"/>
Jonatan Antoni0cd63832018-02-20 15:00:53 +0100[diff] [blame]3294 <component Cclass="CMSIS" Cgroup="NN Lib"/>
Jonatan Antonia67f5552018-01-18 15:22:46 +0100[diff] [blame]3295 <component Cclass="Device" Cgroup="Startup"/>
3296 <category>Getting Started</category>
3297 </attributes>
3298 </example>
3299
3300 <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
Jonatan Antoni13bff482018-01-19 13:05:57 +0100[diff] [blame]3301 <description>Neural Network GRU example</description>
Jonatan Antonia67f5552018-01-18 15:22:46 +0100[diff] [blame]3302 <board name="uVision Simulator" vendor="Keil"/>
3303 <project>
3304 <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3305 </project>
3306 <attributes>
3307 <component Cclass="CMSIS" Cgroup="CORE"/>
3308 <component Cclass="CMSIS" Cgroup="DSP"/>
Jonatan Antoni0cd63832018-02-20 15:00:53 +0100[diff] [blame]3309 <component Cclass="CMSIS" Cgroup="NN Lib"/>
Jonatan Antonia67f5552018-01-18 15:22:46 +0100[diff] [blame]3310 <component Cclass="Device" Cgroup="Startup"/>
3311 <category>Getting Started</category>
3312 </attributes>
3313 </example>
3314
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3315 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]3316 <description>CMSIS-RTOS2 Blinky example</description>
3317 <board name="uVision Simulator" vendor="Keil"/>
3318 <project>
3319 <environment name="uv" load="Blinky.uvprojx"/>
3320 </project>
3321 <attributes>
3322 <component Cclass="CMSIS" Cgroup="CORE"/>
3323 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3324 <component Cclass="Device" Cgroup="Startup"/>
3325 <category>Getting Started</category>
3326 </attributes>
3327 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]3328
Robert Rostohare13e4702016-11-07 15:23:44 +0100[diff] [blame]3329 <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
Matthias Hertel4b70ae42016-11-07 14:14:59 +0100[diff] [blame]3330 <description>CMSIS-RTOS2 mixed API v1 and v2</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3331 <board name="uVision Simulator" vendor="Keil"/>
3332 <project>
3333 <environment name="uv" load="Blinky.uvprojx"/>
3334 </project>
3335 <attributes>
3336 <component Cclass="CMSIS" Cgroup="CORE"/>
3337 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3338 <component Cclass="Device" Cgroup="Startup"/>
3339 <category>Getting Started</category>
3340 </attributes>
3341 </example>
3342
Jonatan Antoni401391f2017-08-30 16:52:33 +0200[diff] [blame]3343 <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3344 <description>CMSIS-RTOS2 Message Queue Example</description>
3345 <board name="uVision Simulator" vendor="Keil"/>
3346 <project>
3347 <environment name="uv" load="MsqQueue.uvprojx"/>
3348 </project>
3349 <attributes>
3350 <component Cclass="CMSIS" Cgroup="CORE"/>
3351 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3352 <component Cclass="Compiler" Cgroup="EventRecorder"/>
3353 <component Cclass="Device" Cgroup="Startup"/>
3354 <category>Getting Started</category>
3355 </attributes>
3356 </example>
Jonatan Antoni6c160d42017-09-01 10:48:45 +0200[diff] [blame]3357
3358 <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3359 <description>CMSIS-RTOS2 Memory Pool Example</description>
3360 <board name="Fixed Virtual Platform" vendor="ARM"/>
3361 <project>
3362 <environment name="uv" load="MemPool.uvprojx"/>
3363 </project>
3364 <attributes>
3365 <component Cclass="CMSIS" Cgroup="CORE"/>
3366 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3367 <component Cclass="Compiler" Cgroup="EventRecorder"/>
3368 <component Cclass="Device" Cgroup="Startup"/>
3369 <category>Getting Started</category>
3370 </attributes>
3371 </example>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]3372
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]3373 <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]3374 <description>Bare-metal secure/non-secure example without RTOS</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3375 <board name="uVision Simulator" vendor="Keil"/>
3376 <project>
3377 <environment name="uv" load="NoRTOS.uvmpw"/>
3378 </project>
3379 <attributes>
3380 <component Cclass="CMSIS" Cgroup="CORE"/>
3381 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3382 <component Cclass="Device" Cgroup="Startup"/>
3383 <category>Getting Started</category>
3384 </attributes>
3385 </example>
3386
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]3387 <example name="TrustZone for ARMv8-M RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]3388 <description>Secure/non-secure RTOS example with thread context management</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3389 <board name="uVision Simulator" vendor="Keil"/>
3390 <project>
3391 <environment name="uv" load="RTOS.uvmpw"/>
3392 </project>
3393 <attributes>
3394 <component Cclass="CMSIS" Cgroup="CORE"/>
3395 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3396 <component Cclass="Device" Cgroup="Startup"/>
3397 <category>Getting Started</category>
3398 </attributes>
3399 </example>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3400
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]3401 <example name="TrustZone for ARMv8-M RTOS Security Tests" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3402 <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3403 <board name="uVision Simulator" vendor="Keil"/>
3404 <project>
3405 <environment name="uv" load="RTOS_Faults.uvmpw"/>
3406 </project>
3407 <attributes>
3408 <component Cclass="CMSIS" Cgroup="CORE"/>
3409 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3410 <component Cclass="Device" Cgroup="Startup"/>
3411 <category>Getting Started</category>
3412 </attributes>
3413 </example>
3414
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3415 </examples>
3416
3417</package>