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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 401391fc370397eb7eef4cd9d8f49e0f1d80e8b3 / . / ARM.CMSIS.pdsc
blob: 70fd9feb55d84dfb94b115fdd31ec8dfea2de105 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
Joachim Krecha33860c2016-11-09 22:25:55 +0100[diff] [blame]7 <!-- <license>license.txt</license> -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Jonatan Antonif40ab952017-08-09 14:57:14 +0200[diff] [blame]11 <release version="5.1.1-dev1">
Jonatan Antoni4e074e72017-08-04 15:02:27 +0200[diff] [blame]12 Active development...
Jonatan Antonib27a4122017-08-08 13:30:19 +0200[diff] [blame]13 Devices:
14 - added GCC startup and linker script for Cortex-A9
Jonatan Antonif40ab952017-08-09 14:57:14 +0200[diff] [blame]15 CMSIS-Core(M): 5.0.3 (see revision history for details)
16 - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
Robert Rostohara6351332017-08-18 11:44:41 +0200[diff] [blame]17 CMSIS-RTOS2:
18 - RTX 5.2.1 (see revision history for details)
Jonatan Antoni4e074e72017-08-04 15:02:27 +0200[diff] [blame]19 </release>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]20 <release version="5.1.0" date="2017-08-04">
21 CMSIS-Core(M): 5.0.2 (see revision history for details)
22 - Changed Version Control macros to be core agnostic.
23 - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
24 CMSIS-Core(A): 1.0.0 (see revision history for details)
25 - Initial release
26 - IRQ Controller API 1.0.0
27 CMSIS-Driver: 2.05 (see revision history for details)
28 - All typedefs related to status have been made volatile.
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]29 CMSIS-RTOS2:
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]30 - API 2.1.1 (see revision history for details)
31 - RTX 5.2.0 (see revision history for details)
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]32 - OS Tick API 1.0.0
33 CMSIS-DSP: 1.5.2 (see revision history for details)
34 - Fixed GNU Compiler specific diagnostics.
Jonatan Antoni31e48e62017-08-04 11:26:18 +0200[diff] [blame]35 CMSIS-PACK: 1.5.0 (see revision history for details)
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]36 - added System Description File (*.SDF) Format
Jonatan Antoni31e48e62017-08-04 11:26:18 +0200[diff] [blame]37 CMSIS-Zone: 0.0.1 (Preview)
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]38 - Initial specification draft
39 </release>
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]40 <release version="5.0.1" date="2017-02-03">
41 Package Description:
42 - added taxonomy for Cclass RTOS
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]43 CMSIS-RTOS2:
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]44 - API 2.1 (see revision history for details)
45 - RTX 5.1.0 (see revision history for details)
46 CMSIS-Core: 5.0.1 (see revision history for details)
47 - Added __PACKED_STRUCT macro
48 - Added uVisior support
49 - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
50 - Updated template for secure main function (main_s.c)
51 - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
52 CMSIS-DSP: 1.5.1 (see revision history for details)
53 - added ARMv8M DSP libraries.
54 CMSIS-PACK:1.4.9 (see revision history for details)
55 - added Pack Index File specification and schema file
Martin Güntherd1060532016-11-15 09:43:43 +0100[diff] [blame]56 </release>
Joachim Krechc45bb4a2016-11-11 11:01:22 +0100[diff] [blame]57 <release version="5.0.0" date="2016-11-11">
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]58 Changed open source license to Apache 2.0
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]59 CMSIS_Core:
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]60 - Added support for Cortex-M23 and Cortex-M33.
61 - Added ARMv8-M device configurations for mainline and baseline.
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]62 - Added CMSE support and thread context management for TrustZone for ARMv8-M
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]63 - Added cmsis_compiler.h to unify compiler behaviour.
64 - Updated function SCB_EnableICache (for Cortex-M7).
65 - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
66 CMSIS-RTOS:
67 - bug fix in RTX 4.82 (see revision history for details)
68 CMSIS-RTOS2:
69 - new API including compatibility layer to CMSIS-RTOS
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]70 - reference implementation based on RTX5
71 - supports all Cortex-M variants including TrustZone for ARMv8-M
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]72 CMSIS-SVD:
73 - reworked SVD format documentation
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]74 - removed SVD file database documentation as SVD files are distributed in packs
75 - updated SVDConv for Win32 and Linux
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]76 CMSIS-DSP:
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]77 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
78 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]79 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]80 <release version="4.5.0" date="2015-10-28">
81 - CMSIS-Core 4.30.0 (see revision history for details)
82 - CMSIS-DAP 1.1.0 (unchanged)
83 - CMSIS-Driver 2.04.0 (see revision history for details)
84 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
85 - CMSIS-PACK 1.4.1 (see revision history for details)
86 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
87 - CMSIS-SVD 1.3.1 (see revision history for details)
88 </release>
89 <release version="4.4.0" date="2015-09-11">
90 - CMSIS-Core 4.20 (see revision history for details)
91 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
92 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
93 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
94 - CMSIS-RTOS
95 -- API 1.02 (unchanged)
96 -- RTX 4.79 (see revision history for details)
97 - CMSIS-SVD 1.3.0 (see revision history for details)
98 - CMSIS-DAP 1.1.0 (extended with SWO support)
99 </release>
100 <release version="4.3.0" date="2015-03-20">
101 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
102 - CMSIS-DSP 1.4.5 (see revision history for details)
103 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
104 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
105 - CMSIS-RTOS
106 -- API 1.02 (unchanged)
107 -- RTX 4.78 (see revision history for details)
108 - CMSIS-SVD 1.2 (unchanged)
109 </release>
110 <release version="4.2.0" date="2014-09-24">
111 Adding Cortex-M7 support
112 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
113 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
114 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
115 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
116 - CMSIS-RTOS RTX 4.75 (see revision history for details)
117 </release>
118 <release version="4.1.1" date="2014-06-30">
119 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
120 </release>
121 <release version="4.1.0" date="2014-06-12">
122 - CMSIS-Driver 2.02 (incompatible update)
123 - CMSIS-Pack 1.3 (see revision history for details)
124 - CMSIS-DSP 1.4.2 (unchanged)
125 - CMSIS-Core 3.30 (unchanged)
126 - CMSIS-RTOS RTX 4.74 (unchanged)
127 - CMSIS-RTOS API 1.02 (unchanged)
128 - CMSIS-SVD 1.10 (unchanged)
129 PACK:
130 - removed G++ specific files from PACK
131 - added Component Startup variant "C Startup"
132 - added Pack Checking Utility
133 - updated conditions to reflect tool-chain dependency
134 - added Taxonomy for Graphics
135 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
136 </release>
137 <release version="4.0.0">
138 - CMSIS-Driver 2.00 Preliminary (incompatible update)
139 - CMSIS-Pack 1.1 Preliminary
140 - CMSIS-DSP 1.4.2 (see revision history for details)
141 - CMSIS-Core 3.30 (see revision history for details)
142 - CMSIS-RTOS RTX 4.74 (see revision history for details)
143 - CMSIS-RTOS API 1.02 (unchanged)
144 - CMSIS-SVD 1.10 (unchanged)
145 </release>
146 <release version="3.20.4">
147 - CMSIS-RTOS 4.74 (see revision history for details)
148 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
149 </release>
150 <release version="3.20.3">
151 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
152 - CMSIS-RTOS 4.73 (see revision history for details)
153 </release>
154 <release version="3.20.2">
155 - CMSIS-Pack documentation has been added
156 - CMSIS-Drivers header and documentation have been added to PACK
157 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
158 </release>
159 <release version="3.20.1">
160 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
161 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
162 </release>
163 <release version="3.20.0">
164 The software portions that are deployed in the application program are now under a BSD license which allows usage
165 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
166 The individual components have been update as listed below:
167 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
168 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
169 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
170 - CMSIS-SVD is unchanged.
171 </release>
172 </releases>
173
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]174 <taxonomy>
175 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
176 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
177 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
178 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
179 <description Cclass="File System">File Drive Support and File System</description>
180 <description Cclass="Graphics">Graphical User Interface</description>
181 <description Cclass="Network">Network Stack using Internet Protocols</description>
182 <description Cclass="USB">Universal Serial Bus Stack</description>
Joachim Krech2384b8a2017-02-02 15:58:30 +0100[diff] [blame]183 <description Cclass="Compiler">Compiler Software Extensions</description>
Joachim Krech62838c82017-02-02 15:54:57 +0100[diff] [blame]184 <description Cclass="RTOS">Real-time Operating System</description>
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]185 </taxonomy>
186
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]187 <devices>
188 <!-- ****************************** Cortex-M0 ****************************** -->
189 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]190 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]191 <description>
192The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
193- simple, easy-to-use programmers model
194- highly efficient ultra-low power operation
195- excellent code density
196- deterministic, high-performance interrupt handling
197- upward compatibility with the rest of the Cortex-M processor family.
198 </description>
199 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
200 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
201 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
202 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
203
204 <device Dname="ARMCM0">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]205 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]206 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
207 </device>
208 </family>
209
210 <!-- ****************************** Cortex-M0P ****************************** -->
211 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]212 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]213 <description>
214The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
215- simple, easy-to-use programmers model
216- highly efficient ultra-low power operation
217- excellent code density
218- deterministic, high-performance interrupt handling
219- upward compatibility with the rest of the Cortex-M processor family.
220 </description>
221 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
222 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
223 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
224 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
225
226 <device Dname="ARMCM0P">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]227 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]228 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
229 </device>
230 </family>
231
232 <!-- ****************************** Cortex-M3 ****************************** -->
233 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]234 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]235 <description>
236The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
237- simple, easy-to-use programmers model
238- highly efficient ultra-low power operation
239- excellent code density
240- deterministic, high-performance interrupt handling
241- upward compatibility with the rest of the Cortex-M processor family.
242 </description>
243 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
244 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
245 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
246 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
247
248 <device Dname="ARMCM3">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]249 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]250 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
251 </device>
252 </family>
253
254 <!-- ****************************** Cortex-M4 ****************************** -->
255 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]256 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]257 <description>
258The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
259- simple, easy-to-use programmers model
260- highly efficient ultra-low power operation
261- excellent code density
262- deterministic, high-performance interrupt handling
263- upward compatibility with the rest of the Cortex-M processor family.
264 </description>
265 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
266 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
267 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
268 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
269
270 <device Dname="ARMCM4">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]271 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]272 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
273 </device>
274
275 <device Dname="ARMCM4_FP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]276 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]277 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
278 </device>
279 </family>
280
281 <!-- ****************************** Cortex-M7 ****************************** -->
282 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]283 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]284 <description>
Martin Güntheraa246272016-11-15 16:01:05 +0100[diff] [blame]285The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]286- simple, easy-to-use programmers model
287- highly efficient ultra-low power operation
288- excellent code density
289- deterministic, high-performance interrupt handling
290- upward compatibility with the rest of the Cortex-M processor family.
291 </description>
292 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
293 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
294 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
295 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
296
297 <device Dname="ARMCM7">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]298 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]299 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
300 </device>
301
302 <device Dname="ARMCM7_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]303 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]304 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
305 </device>
306
307 <device Dname="ARMCM7_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]308 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]309 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
310 </device>
311 </family>
312
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]313 <!-- ****************************** Cortex-M23 ********************** -->
314 <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
315 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
316 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]317The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]318It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]319Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]320 </description>
321 <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]322 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
323 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]324 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]325 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]326 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
327
328 <device Dname="ARMCM23">
329 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
330 <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
331 </device>
332
333 <device Dname="ARMCM23_TZ">
334 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
335 <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
336 </device>
337 </family>
338
339 <!-- ****************************** Cortex-M33 ****************************** -->
340 <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
341 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
342 <description>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]343The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]344class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]345 </description>
346 <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]347 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
348 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]349 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]350 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
351 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]352
353 <device Dname="ARMCM33">
354 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]355 <description>
356 no DSP Instructions, no Floating Point Unit, no TrustZone
357 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]358 <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
359 </device>
360
361 <device Dname="ARMCM33_TZ">
362 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]363 <description>
364 no DSP Instructions, no Floating Point Unit, TrustZone
365 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]366 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
367 </device>
368
369 <device Dname="ARMCM33_DSP_FP">
370 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]371 <description>
372 DSP Instructions, Single Precision Floating Point Unit, no TrustZone
373 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]374 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
375 </device>
376
377 <device Dname="ARMCM33_DSP_FP_TZ">
378 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]379 <description>
380 DSP Instructions, Single Precision Floating Point Unit, TrustZone
381 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]382 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
383 </device>
384 </family>
385
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]386 <!-- ****************************** ARMSC000 ****************************** -->
387 <family Dfamily="ARM SC000" Dvendor="ARM:82">
388 <description>
389The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
390- simple, easy-to-use programmers model
391- highly efficient ultra-low power operation
392- excellent code density
393- deterministic, high-performance interrupt handling
394 </description>
395 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
396 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
397 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
398 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
399
400 <device Dname="ARMSC000">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]401 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]402 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
403 </device>
404 </family>
405
406 <!-- ****************************** ARMSC300 ****************************** -->
407 <family Dfamily="ARM SC300" Dvendor="ARM:82">
408 <description>
409The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
410- simple, easy-to-use programmers model
411- highly efficient ultra-low power operation
412- excellent code density
413- deterministic, high-performance interrupt handling
414 </description>
415 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
416 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
417 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
418 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
419
420 <device Dname="ARMSC300">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]421 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]422 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
423 </device>
424 </family>
425
426 <!-- ****************************** ARMv8-M Baseline ********************** -->
427 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
428 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
429 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]430ARMv8-M Baseline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]431 </description>
432 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]433 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
434 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]435 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]436 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]437 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
438
439 <device Dname="ARMv8MBL">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]440 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]441 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
442 </device>
443 </family>
444
445 <!-- ****************************** ARMv8-M Mainline ****************************** -->
446 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
447 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
448 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]449ARMv8-M Mainline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]450 </description>
451 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]452 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
453 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]454 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]455 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]456 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
457
458 <device Dname="ARMv8MML">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]459 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]460 <description>
461 no DSP Instructions, no Floating Point Unit, TrustZone
462 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]463 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
464 </device>
465
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]466 <device Dname="ARMv8MML_DSP">
467 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]468 <description>
469 DSP Instructions, no Floating Point Unit, TrustZone
470 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]471 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]472 </device>
473
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]474 <device Dname="ARMv8MML_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]475 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]476 <description>
477 no DSP Instructions, Single Precision Floating Point Unit, TrustZone
478 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]479 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
480 </device>
481
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]482 <device Dname="ARMv8MML_DSP_SP">
483 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]484 <description>
485 DSP Instructions, Single Precision Floating Point Unit, TrustZone
486 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]487 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]488 </device>
489
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]490 <device Dname="ARMv8MML_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]491 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]492 <description>
493 no DSP Instructions, Double Precision Floating Point Unit, TrustZone
494 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]495 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
496 </device>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]497
498 <device Dname="ARMv8MML_DSP_DP">
499 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]500 <description>
501 DSP Instructions, Double Precision Floating Point Unit, TrustZone
502 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]503 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]504 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]505 </family>
506
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]507 <!-- ****************************** Cortex-A5 ****************************** -->
508 <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
509 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
510 <description>
511The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
512virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
513ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
514 </description>
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]515
516 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
517 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
518
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]519 <device Dname="ARMCA5">
520 <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
521 <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
522 </device>
523 </family>
524
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]525 <!-- ****************************** Cortex-A7 ****************************** -->
526 <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
527 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
528 <description>
529The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
530The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
531an optional integrated GIC, and an optional L2 cache controller.
532 </description>
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]533
534 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
535 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
536
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]537 <device Dname="ARMCA7">
538 <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
539 <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
540 </device>
541 </family>
542
543 <!-- ****************************** Cortex-A9 ****************************** -->
544 <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]545 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]546 <description>
547The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
548The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
549and 8-bit Java bytecodes in Jazelle state.
550 </description>
551
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]552 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
553 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
554
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]555 <device Dname="ARMCA9">
556 <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
557 <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
558 </device>
559 </family>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]560 </devices>
561
562
563 <apis>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]564 <!-- CMSIS Device API -->
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]565 <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
566 <description>Device interrupt controller interface</description>
567 <files>
568 <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
569 </files>
570 </api>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]571 <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
Robert Rostoharaeb6dd52017-06-09 14:17:43 +0200[diff] [blame]572 <description>RTOS Kernel system tick timer interface</description>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]573 <files>
574 <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
575 </files>
576 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]577 <!-- CMSIS-RTOS API -->
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]578 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]579 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
580 <files>
581 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
582 </files>
583 </api>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]584 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.1" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]585 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
586 <files>
587 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
Robert Rostohar0a364052017-01-25 12:35:54 +0100[diff] [blame]588 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]589 </files>
590 </api>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]591 <!-- CMSIS Driver API -->
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]592 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]593 <description>USART Driver API for Cortex-M</description>
594 <files>
595 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
596 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
597 </files>
598 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]599 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]600 <description>SPI Driver API for Cortex-M</description>
601 <files>
602 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
603 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
604 </files>
605 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]606 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]607 <description>SAI Driver API for Cortex-M</description>
608 <files>
609 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
610 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
611 </files>
612 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]613 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]614 <description>I2C Driver API for Cortex-M</description>
615 <files>
616 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
617 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
618 </files>
619 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]620 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]621 <description>CAN Driver API for Cortex-M</description>
622 <files>
623 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
624 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
625 </files>
626 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]627 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]628 <description>Flash Driver API for Cortex-M</description>
629 <files>
630 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
631 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
632 </files>
633 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]634 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]635 <description>MCI Driver API for Cortex-M</description>
636 <files>
637 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
638 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
639 </files>
640 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]641 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]642 <description>NAND Flash Driver API for Cortex-M</description>
643 <files>
644 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
645 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
646 </files>
647 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]648 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]649 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
650 <files>
651 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
652 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
653 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
654 </files>
655 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]656 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]657 <description>Ethernet MAC Driver API for Cortex-M</description>
658 <files>
659 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
660 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
661 </files>
662 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]663 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]664 <description>Ethernet PHY Driver API for Cortex-M</description>
665 <files>
666 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
667 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
668 </files>
669 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]670 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]671 <description>USB Device Driver API for Cortex-M</description>
672 <files>
673 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
674 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
675 </files>
676 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]677 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]678 <description>USB Host Driver API for Cortex-M</description>
679 <files>
680 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
681 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
682 </files>
683 </api>
684 </apis>
685
686 <!-- conditions are dependency rules that can apply to a component or an individual file -->
687 <conditions>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]688 <!-- compiler -->
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]689 <condition id="ARMCC6">
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]690 <accept Tcompiler="ARMCC" Toptions="AC6"/>
691 <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]692 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]693 <condition id="ARMCC5">
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]694 <require Tcompiler="ARMCC" Toptions="AC5"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]695 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]696 <condition id="ARMCC">
697 <require Tcompiler="ARMCC"/>
698 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]699 <condition id="GCC">
700 <require Tcompiler="GCC"/>
701 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]702 <condition id="IAR">
703 <require Tcompiler="IAR"/>
704 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]705 <condition id="ARMCC GCC">
706 <accept Tcompiler="ARMCC"/>
707 <accept Tcompiler="GCC"/>
708 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]709 <condition id="ARMCC GCC IAR">
710 <accept Tcompiler="ARMCC"/>
711 <accept Tcompiler="GCC"/>
712 <accept Tcompiler="IAR"/>
713 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]714
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]715 <!-- ARM architecture -->
716 <condition id="ARMv6-M Device">
717 <description>ARMv6-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]718 <accept Dcore="Cortex-M0"/>
719 <accept Dcore="Cortex-M0+"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]720 <accept Dcore="SC000"/>
721 </condition>
722 <condition id="ARMv7-M Device">
723 <description>ARMv7-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]724 <accept Dcore="Cortex-M3"/>
725 <accept Dcore="Cortex-M4"/>
726 <accept Dcore="Cortex-M7"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]727 <accept Dcore="SC300"/>
728 </condition>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]729 <condition id="ARMv8-M Device">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]730 <description>ARMv8-M architecture based device</description>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]731 <accept Dcore="ARMV8MBL"/>
732 <accept Dcore="ARMV8MML"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]733 <accept Dcore="Cortex-M23"/>
734 <accept Dcore="Cortex-M33"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]735 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]736 <condition id="ARMv8-M TZ Device">
737 <description>ARMv8-M architecture based device with TrustZone</description>
738 <require condition="ARMv8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]739 <require Dtz="TZ"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]740 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]741 <condition id="ARMv6_7-M Device">
742 <description>ARMv6_7-M architecture based device</description>
743 <accept condition="ARMv6-M Device"/>
744 <accept condition="ARMv7-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]745 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]746 <condition id="ARMv6_7_8-M Device">
747 <description>ARMv6_7_8-M architecture based device</description>
748 <accept condition="ARMv6-M Device"/>
749 <accept condition="ARMv7-M Device"/>
750 <accept condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]751 </condition>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]752 <condition id="ARMv7-A Device">
753 <description>ARMv7-A architecture based device</description>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]754 <accept Dcore="Cortex-A5"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]755 <accept Dcore="Cortex-A7"/>
756 <accept Dcore="Cortex-A9"/>
757 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]758
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]759 <!-- ARM core -->
760 <condition id="CM0">
761 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
762 <accept Dcore="Cortex-M0"/>
763 <accept Dcore="Cortex-M0+"/>
764 <accept Dcore="SC000"/>
765 </condition>
766 <condition id="CM3">
767 <description>Cortex-M3 or SC300 processor based device</description>
768 <accept Dcore="Cortex-M3"/>
769 <accept Dcore="SC300"/>
770 </condition>
771 <condition id="CM4">
772 <description>Cortex-M4 processor based device</description>
773 <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
774 </condition>
775 <condition id="CM4_FP">
776 <description>Cortex-M4 processor based device using Floating Point Unit</description>
777 <require Dcore="Cortex-M4" Dfpu="FPU"/>
778 </condition>
779 <condition id="CM7">
780 <description>Cortex-M7 processor based device</description>
781 <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
782 </condition>
783 <condition id="CM7_FP">
784 <description>Cortex-M7 processor based device using Floating Point Unit</description>
785 <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
786 <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
787 </condition>
788 <condition id="CM7_SP">
789 <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
790 <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
791 </condition>
792 <condition id="CM7_DP">
793 <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
794 <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
795 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]796 <condition id="CM23">
797 <description>Cortex-M23 processor based device</description>
798 <require Dcore="Cortex-M23"/>
799 </condition>
800 <condition id="CM33">
801 <description>Cortex-M33 processor based device</description>
802 <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
803 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]804 <condition id="CM33_FP">
805 <description>Cortex-M33 processor based device using Floating Point Unit</description>
806 <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
807 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]808 <condition id="ARMv8MBL">
809 <description>ARMv8-M Baseline processor based device</description>
810 <require Dcore="ARMV8MBL"/>
811 </condition>
812 <condition id="ARMv8MML">
813 <description>ARMv8-M Mainline processor based device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]814 <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
815 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]816 <condition id="ARMv8MML_FP">
817 <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
818 <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
819 <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]820 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]821
822 <condition id="CM33_NODSP_NOFPU">
823 <description>CM33, no DSP, no FPU</description>
824 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
825 </condition>
826 <condition id="CM33_DSP_NOFPU">
827 <description>CM33, DSP, no FPU</description>
828 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
829 </condition>
830 <condition id="CM33_NODSP_SP">
831 <description>CM33, no DSP, SP FPU</description>
832 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
833 </condition>
834 <condition id="CM33_DSP_SP">
835 <description>CM33, DSP, SP FPU</description>
836 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
837 </condition>
838
839 <condition id="ARMv8MML_NODSP_NOFPU">
840 <description>ARMv8MML, no DSP, no FPU</description>
841 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
842 </condition>
843 <condition id="ARMv8MML_DSP_NOFPU">
844 <description>ARMv8MML, DSP, no FPU</description>
845 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
846 </condition>
847 <condition id="ARMv8MML_NODSP_SP">
848 <description>ARMv8MML, no DSP, SP FPU</description>
849 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]850 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]851 <condition id="ARMv8MML_DSP_SP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]852 <description>ARMv8MML, DSP, SP FPU</description>
853 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]854 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]855
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]856 <condition id="CA5_CA9">
857 <description>Cortex-A5 or Cortex-A9 processor based device</description>
858 <accept Dcore="Cortex-A5"/>
859 <accept Dcore="Cortex-A9"/>
860 </condition>
861
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]862 <condition id="CA7">
863 <description>Cortex-A7 processor based device</description>
864 <accept Dcore="Cortex-A7"/>
865 </condition>
866
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]867 <!-- ARMCC compiler -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]868 <condition id="CA_ARMCC5">
869 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]870 <require condition="ARMv7-A Device"/>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]871 <require condition="ARMCC5"/>
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]872 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]873 <condition id="CA_ARMCC6">
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]874 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
875 <require condition="ARMv7-A Device"/>
876 <require condition="ARMCC6"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]877 </condition>
878
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]879 <condition id="CM0_ARMCC">
880 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
881 <require condition="CM0"/>
882 <require Tcompiler="ARMCC"/>
883 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]884 <condition id="CM0_LE_ARMCC">
885 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]886 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]887 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]888 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]889 <condition id="CM0_BE_ARMCC">
890 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]891 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]892 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]893 </condition>
894
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]895 <condition id="CM3_ARMCC">
896 <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
897 <require condition="CM3"/>
898 <require Tcompiler="ARMCC"/>
899 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]900 <condition id="CM3_LE_ARMCC">
901 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]902 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]903 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]904 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]905 <condition id="CM3_BE_ARMCC">
906 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]907 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]908 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]909 </condition>
910
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]911 <condition id="CM4_ARMCC">
912 <description>Cortex-M4 processor based device for the ARM Compiler</description>
913 <require condition="CM4"/>
914 <require Tcompiler="ARMCC"/>
915 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]916 <condition id="CM4_LE_ARMCC">
917 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]918 <require condition="CM4_ARMCC"/>
919 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]920 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]921 <condition id="CM4_BE_ARMCC">
922 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]923 <require condition="CM4_ARMCC"/>
924 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]925 </condition>
926
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]927 <condition id="CM4_FP_ARMCC">
928 <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
929 <require condition="CM4_FP"/>
930 <require Tcompiler="ARMCC"/>
931 </condition>
932 <condition id="CM4_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]933 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]934 <require condition="CM4_FP_ARMCC"/>
935 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]936 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]937 <condition id="CM4_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]938 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]939 <require condition="CM4_FP_ARMCC"/>
940 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]941 </condition>
942
943 <!-- XMC 4000 Series devices from Infineon require a special library -->
944 <condition id="CM4_LE_ARMCC_STD">
945 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
946 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
947 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
948 <require Tcompiler="ARMCC"/>
949 </condition>
950 <condition id="CM4_LE_ARMCC_IFX">
951 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
952 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
953 <require Tcompiler="ARMCC"/>
954 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]955 <condition id="CM4_FP_LE_ARMCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]956 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
957 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
958 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
959 <require Tcompiler="ARMCC"/>
960 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]961 <condition id="CM4_FP_LE_ARMCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]962 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
963 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
964 <require Tcompiler="ARMCC"/>
965 </condition>
966
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]967 <condition id="CM7_ARMCC">
968 <description>Cortex-M7 processor based device for the ARM Compiler</description>
969 <require condition="CM7"/>
970 <require Tcompiler="ARMCC"/>
971 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]972 <condition id="CM7_LE_ARMCC">
973 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]974 <require condition="CM7_ARMCC"/>
975 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]976 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]977 <condition id="CM7_BE_ARMCC">
978 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]979 <require condition="CM7_ARMCC"/>
980 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]981 </condition>
982
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]983 <condition id="CM7_FP_ARMCC">
984 <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
985 <require condition="CM7_FP"/>
986 <require Tcompiler="ARMCC"/>
987 </condition>
988 <condition id="CM7_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]989 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]990 <require condition="CM7_FP_ARMCC"/>
991 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]992 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]993 <condition id="CM7_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]994 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]995 <require condition="CM7_FP_ARMCC"/>
996 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]997 </condition>
998
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]999 <condition id="CM7_SP_ARMCC">
1000 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1001 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1002 <require Tcompiler="ARMCC"/>
1003 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1004 <condition id="CM7_SP_LE_ARMCC">
1005 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1006 <require condition="CM7_SP_ARMCC"/>
1007 <require Dendian="Little-endian"/>
1008 </condition>
1009 <condition id="CM7_SP_BE_ARMCC">
1010 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1011 <require condition="CM7_SP_ARMCC"/>
1012 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1013 </condition>
1014
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1015 <condition id="CM7_DP_ARMCC">
1016 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1017 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1018 <require Tcompiler="ARMCC"/>
1019 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1020 <condition id="CM7_DP_LE_ARMCC">
1021 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1022 <require condition="CM7_DP_ARMCC"/>
1023 <require Dendian="Little-endian"/>
1024 </condition>
1025 <condition id="CM7_DP_BE_ARMCC">
1026 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1027 <require condition="CM7_DP_ARMCC"/>
1028 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1029 </condition>
1030
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1031 <condition id="CM23_ARMCC">
1032 <description>Cortex-M23 processor based device for the ARM Compiler</description>
1033 <require condition="CM23"/>
1034 <require Tcompiler="ARMCC"/>
1035 </condition>
1036 <condition id="CM23_LE_ARMCC">
1037 <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1038 <require condition="CM23_ARMCC"/>
1039 <require Dendian="Little-endian"/>
1040 </condition>
1041 <condition id="CM23_BE_ARMCC">
1042 <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1043 <require condition="CM23_ARMCC"/>
1044 <require Dendian="Big-endian"/>
1045 </condition>
1046
1047 <condition id="CM33_ARMCC">
1048 <description>Cortex-M33 processor based device for the ARM Compiler</description>
1049 <require condition="CM33"/>
1050 <require Tcompiler="ARMCC"/>
1051 </condition>
1052 <condition id="CM33_LE_ARMCC">
1053 <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1054 <require condition="CM33_ARMCC"/>
1055 <require Dendian="Little-endian"/>
1056 </condition>
1057 <condition id="CM33_BE_ARMCC">
1058 <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1059 <require condition="CM33_ARMCC"/>
1060 <require Dendian="Big-endian"/>
1061 </condition>
1062
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1063 <condition id="CM33_FP_ARMCC">
1064 <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1065 <require condition="CM33_FP"/>
1066 <require Tcompiler="ARMCC"/>
1067 </condition>
1068 <condition id="CM33_FP_LE_ARMCC">
1069 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1070 <require condition="CM33_FP_ARMCC"/>
1071 <require Dendian="Little-endian"/>
1072 </condition>
1073 <condition id="CM33_FP_BE_ARMCC">
1074 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1075 <require condition="CM33_FP_ARMCC"/>
1076 <require Dendian="Big-endian"/>
1077 </condition>
1078
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1079 <condition id="CM33_NODSP_NOFPU_ARMCC">
1080 <description>CM33, no DSP, no FPU, ARM Compiler</description>
1081 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1082 <require Tcompiler="ARMCC"/>
1083 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1084 <condition id="CM33_DSP_NOFPU_ARMCC">
1085 <description>CM33, DSP, no FPU, ARM Compiler</description>
1086 <require condition="CM33_DSP_NOFPU"/>
1087 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1088 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1089 <condition id="CM33_NODSP_SP_ARMCC">
1090 <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1091 <require condition="CM33_NODSP_SP"/>
1092 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1093 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1094 <condition id="CM33_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1095 <description>CM33, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1096 <require condition="CM33_DSP_SP"/>
1097 <require Tcompiler="ARMCC"/>
1098 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1099 <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1100 <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1101 <require condition="CM33_NODSP_NOFPU_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1102 <require Dendian="Little-endian"/>
1103 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1104 <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1105 <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1106 <require condition="CM33_DSP_NOFPU_ARMCC"/>
1107 <require Dendian="Little-endian"/>
1108 </condition>
1109 <condition id="CM33_NODSP_SP_LE_ARMCC">
1110 <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1111 <require condition="CM33_NODSP_SP_ARMCC"/>
1112 <require Dendian="Little-endian"/>
1113 </condition>
1114 <condition id="CM33_DSP_SP_LE_ARMCC">
1115 <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1116 <require condition="CM33_DSP_SP_ARMCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1117 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1118 </condition>
1119
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1120 <condition id="ARMv8MBL_ARMCC">
1121 <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1122 <require condition="ARMv8MBL"/>
1123 <require Tcompiler="ARMCC"/>
1124 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1125 <condition id="ARMv8MBL_LE_ARMCC">
1126 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1127 <require condition="ARMv8MBL_ARMCC"/>
1128 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1129 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1130 <condition id="ARMv8MBL_BE_ARMCC">
1131 <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1132 <require condition="ARMv8MBL_ARMCC"/>
1133 <require Dendian="Big-endian"/>
1134 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1135
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1136 <condition id="ARMv8MML_ARMCC">
1137 <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1138 <require condition="ARMv8MML"/>
1139 <require Tcompiler="ARMCC"/>
1140 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1141 <condition id="ARMv8MML_LE_ARMCC">
1142 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1143 <require condition="ARMv8MML_ARMCC"/>
1144 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1145 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1146 <condition id="ARMv8MML_BE_ARMCC">
1147 <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1148 <require condition="ARMv8MML_ARMCC"/>
1149 <require Dendian="Big-endian"/>
1150 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1151
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1152 <condition id="ARMv8MML_FP_ARMCC">
1153 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1154 <require condition="ARMv8MML_FP"/>
1155 <require Tcompiler="ARMCC"/>
1156 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1157 <condition id="ARMv8MML_FP_LE_ARMCC">
1158 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1159 <require condition="ARMv8MML_FP_ARMCC"/>
1160 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1161 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1162 <condition id="ARMv8MML_FP_BE_ARMCC">
1163 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1164 <require condition="ARMv8MML_FP_ARMCC"/>
1165 <require Dendian="Big-endian"/>
1166 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1167
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1168 <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1169 <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1170 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1171 <require Tcompiler="ARMCC"/>
1172 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1173 <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1174 <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1175 <require condition="ARMv8MML_DSP_NOFPU"/>
1176 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1177 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1178 <condition id="ARMv8MML_NODSP_SP_ARMCC">
1179 <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1180 <require condition="ARMv8MML_NODSP_SP"/>
1181 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1182 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1183 <condition id="ARMv8MML_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1184 <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1185 <require condition="ARMv8MML_DSP_SP"/>
1186 <require Tcompiler="ARMCC"/>
1187 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1188 <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1189 <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1190 <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1191 <require Dendian="Little-endian"/>
1192 </condition>
1193 <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1194 <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1195 <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1196 <require Dendian="Little-endian"/>
1197 </condition>
1198 <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1199 <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1200 <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1201 <require Dendian="Little-endian"/>
1202 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1203 <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1204 <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1205 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1206 <require Dendian="Little-endian"/>
1207 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1208
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1209 <!-- GCC compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1210 <condition id="CA_GCC">
1211 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1212 <require condition="ARMv7-A Device"/>
1213 <require Tcompiler="GCC"/>
1214 </condition>
1215
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1216 <condition id="CM0_GCC">
1217 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1218 <require condition="CM0"/>
1219 <require Tcompiler="GCC"/>
1220 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1221 <condition id="CM0_LE_GCC">
1222 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1223 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1224 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1225 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1226 <condition id="CM0_BE_GCC">
1227 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1228 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1229 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1230 </condition>
1231
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1232 <condition id="CM3_GCC">
1233 <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1234 <require condition="CM3"/>
1235 <require Tcompiler="GCC"/>
1236 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1237 <condition id="CM3_LE_GCC">
1238 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1239 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1240 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1241 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1242 <condition id="CM3_BE_GCC">
1243 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1244 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1245 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1246 </condition>
1247
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1248 <condition id="CM4_GCC">
1249 <description>Cortex-M4 processor based device for the GCC Compiler</description>
1250 <require condition="CM4"/>
1251 <require Tcompiler="GCC"/>
1252 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1253 <condition id="CM4_LE_GCC">
1254 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1255 <require condition="CM4_GCC"/>
1256 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1257 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1258 <condition id="CM4_BE_GCC">
1259 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1260 <require condition="CM4_GCC"/>
1261 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1262 </condition>
1263
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1264 <condition id="CM4_FP_GCC">
1265 <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1266 <require condition="CM4_FP"/>
1267 <require Tcompiler="GCC"/>
1268 </condition>
1269 <condition id="CM4_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1270 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1271 <require condition="CM4_FP_GCC"/>
1272 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1273 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1274 <condition id="CM4_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1275 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1276 <require condition="CM4_FP_GCC"/>
1277 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1278 </condition>
1279
1280 <!-- XMC 4000 Series devices from Infineon require a special library -->
1281 <condition id="CM4_LE_GCC_STD">
1282 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1283 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1284 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1285 <require Tcompiler="GCC"/>
1286 </condition>
1287 <condition id="CM4_LE_GCC_IFX">
1288 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1289 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1290 <require Tcompiler="GCC"/>
1291 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1292 <condition id="CM4_FP_LE_GCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1293 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1294 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1295 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1296 <require Tcompiler="GCC"/>
1297 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1298 <condition id="CM4_FP_LE_GCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1299 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1300 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1301 <require Tcompiler="GCC"/>
1302 </condition>
1303
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1304 <condition id="CM7_GCC">
1305 <description>Cortex-M7 processor based device for the GCC Compiler</description>
1306 <require condition="CM7"/>
1307 <require Tcompiler="GCC"/>
1308 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1309 <condition id="CM7_LE_GCC">
1310 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1311 <require condition="CM7_GCC"/>
1312 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1313 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1314 <condition id="CM7_BE_GCC">
1315 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1316 <require condition="CM7_GCC"/>
1317 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1318 </condition>
1319
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1320 <condition id="CM7_FP_GCC">
1321 <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1322 <require condition="CM7_FP"/>
1323 <require Tcompiler="GCC"/>
1324 </condition>
1325 <condition id="CM7_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1326 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1327 <require condition="CM7_FP_GCC"/>
1328 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1329 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1330 <condition id="CM7_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1331 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1332 <require condition="CM7_FP_GCC"/>
1333 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1334 </condition>
1335
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1336 <condition id="CM7_SP_GCC">
1337 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1338 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1339 <require Tcompiler="GCC"/>
1340 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1341 <condition id="CM7_SP_LE_GCC">
1342 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1343 <require condition="CM7_SP_GCC"/>
1344 <require Dendian="Little-endian"/>
1345 </condition>
1346 <condition id="CM7_SP_BE_GCC">
1347 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1348 <require condition="CM7_SP_GCC"/>
1349 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1350 </condition>
1351
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1352 <condition id="CM7_DP_GCC">
1353 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1354 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1355 <require Tcompiler="GCC"/>
1356 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1357 <condition id="CM7_DP_LE_GCC">
1358 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1359 <require condition="CM7_DP_GCC"/>
1360 <require Dendian="Little-endian"/>
1361 </condition>
1362 <condition id="CM7_DP_BE_GCC">
1363 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1364 <require condition="CM7_DP_GCC"/>
1365 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1366 </condition>
1367
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1368 <condition id="CM23_GCC">
1369 <description>Cortex-M23 processor based device for the GCC Compiler</description>
1370 <require condition="CM23"/>
1371 <require Tcompiler="GCC"/>
1372 </condition>
1373 <condition id="CM23_LE_GCC">
1374 <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1375 <require condition="CM23_GCC"/>
1376 <require Dendian="Little-endian"/>
1377 </condition>
1378 <condition id="CM23_BE_GCC">
1379 <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1380 <require condition="CM23_GCC"/>
1381 <require Dendian="Big-endian"/>
1382 </condition>
1383
1384 <condition id="CM33_GCC">
1385 <description>Cortex-M33 processor based device for the GCC Compiler</description>
1386 <require condition="CM33"/>
1387 <require Tcompiler="GCC"/>
1388 </condition>
1389 <condition id="CM33_LE_GCC">
1390 <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1391 <require condition="CM33_GCC"/>
1392 <require Dendian="Little-endian"/>
1393 </condition>
1394 <condition id="CM33_BE_GCC">
1395 <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1396 <require condition="CM33_GCC"/>
1397 <require Dendian="Big-endian"/>
1398 </condition>
1399
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1400 <condition id="CM33_FP_GCC">
1401 <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1402 <require condition="CM33_FP"/>
1403 <require Tcompiler="GCC"/>
1404 </condition>
1405 <condition id="CM33_FP_LE_GCC">
1406 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1407 <require condition="CM33_FP_GCC"/>
1408 <require Dendian="Little-endian"/>
1409 </condition>
1410 <condition id="CM33_FP_BE_GCC">
1411 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1412 <require condition="CM33_FP_GCC"/>
1413 <require Dendian="Big-endian"/>
1414 </condition>
1415
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1416 <condition id="CM33_NODSP_NOFPU_GCC">
1417 <description>CM33, no DSP, no FPU, GCC Compiler</description>
1418 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1419 <require Tcompiler="GCC"/>
1420 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1421 <condition id="CM33_DSP_NOFPU_GCC">
1422 <description>CM33, DSP, no FPU, GCC Compiler</description>
1423 <require condition="CM33_DSP_NOFPU"/>
1424 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1425 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1426 <condition id="CM33_NODSP_SP_GCC">
1427 <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1428 <require condition="CM33_NODSP_SP"/>
1429 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1430 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1431 <condition id="CM33_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1432 <description>CM33, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1433 <require condition="CM33_DSP_SP"/>
1434 <require Tcompiler="GCC"/>
1435 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1436 <condition id="CM33_NODSP_NOFPU_LE_GCC">
1437 <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1438 <require condition="CM33_NODSP_NOFPU_GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1439 <require Dendian="Little-endian"/>
1440 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1441 <condition id="CM33_DSP_NOFPU_LE_GCC">
1442 <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1443 <require condition="CM33_DSP_NOFPU_GCC"/>
1444 <require Dendian="Little-endian"/>
1445 </condition>
1446 <condition id="CM33_NODSP_SP_LE_GCC">
1447 <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1448 <require condition="CM33_NODSP_SP_GCC"/>
1449 <require Dendian="Little-endian"/>
1450 </condition>
1451 <condition id="CM33_DSP_SP_LE_GCC">
1452 <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1453 <require condition="CM33_DSP_SP_GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1454 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1455 </condition>
1456
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1457 <condition id="ARMv8MBL_GCC">
1458 <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1459 <require condition="ARMv8MBL"/>
1460 <require Tcompiler="GCC"/>
1461 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1462 <condition id="ARMv8MBL_LE_GCC">
1463 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1464 <require condition="ARMv8MBL_GCC"/>
1465 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1466 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1467 <condition id="ARMv8MBL_BE_GCC">
1468 <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1469 <require condition="ARMv8MBL_GCC"/>
1470 <require Dendian="Big-endian"/>
1471 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1472
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1473 <condition id="ARMv8MML_GCC">
1474 <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1475 <require condition="ARMv8MML"/>
1476 <require Tcompiler="GCC"/>
1477 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1478 <condition id="ARMv8MML_LE_GCC">
1479 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1480 <require condition="ARMv8MML_GCC"/>
1481 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1482 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1483 <condition id="ARMv8MML_BE_GCC">
1484 <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1485 <require condition="ARMv8MML_GCC"/>
1486 <require Dendian="Big-endian"/>
1487 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1488
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1489 <condition id="ARMv8MML_FP_GCC">
1490 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1491 <require condition="ARMv8MML_FP"/>
1492 <require Tcompiler="GCC"/>
1493 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1494 <condition id="ARMv8MML_FP_LE_GCC">
1495 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1496 <require condition="ARMv8MML_FP_GCC"/>
1497 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1498 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1499 <condition id="ARMv8MML_FP_BE_GCC">
1500 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1501 <require condition="ARMv8MML_FP_GCC"/>
1502 <require Dendian="Big-endian"/>
1503 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1504
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1505 <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1506 <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1507 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1508 <require Tcompiler="GCC"/>
1509 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1510 <condition id="ARMv8MML_DSP_NOFPU_GCC">
1511 <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1512 <require condition="ARMv8MML_DSP_NOFPU"/>
1513 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1514 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1515 <condition id="ARMv8MML_NODSP_SP_GCC">
1516 <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1517 <require condition="ARMv8MML_NODSP_SP"/>
1518 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1519 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1520 <condition id="ARMv8MML_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1521 <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1522 <require condition="ARMv8MML_DSP_SP"/>
1523 <require Tcompiler="GCC"/>
1524 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1525 <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1526 <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1527 <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1528 <require Dendian="Little-endian"/>
1529 </condition>
1530 <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1531 <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1532 <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1533 <require Dendian="Little-endian"/>
1534 </condition>
1535 <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1536 <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1537 <require condition="ARMv8MML_NODSP_SP_GCC"/>
1538 <require Dendian="Little-endian"/>
1539 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1540 <condition id="ARMv8MML_DSP_SP_LE_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1541 <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1542 <require condition="ARMv8MML_DSP_SP_GCC"/>
1543 <require Dendian="Little-endian"/>
1544 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1545
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1546 <!-- IAR compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1547 <condition id="CA_IAR">
1548 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1549 <require condition="ARMv7-A Device"/>
1550 <require Tcompiler="IAR"/>
1551 </condition>
1552
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1553 <condition id="CM0_IAR">
1554 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1555 <require condition="CM0"/>
1556 <require Tcompiler="IAR"/>
1557 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1558 <condition id="CM0_LE_IAR">
1559 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1560 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1561 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1562 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1563 <condition id="CM0_BE_IAR">
1564 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1565 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1566 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1567 </condition>
1568
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1569 <condition id="CM3_IAR">
1570 <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1571 <require condition="CM3"/>
1572 <require Tcompiler="IAR"/>
1573 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1574 <condition id="CM3_LE_IAR">
1575 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1576 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1577 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1578 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1579 <condition id="CM3_BE_IAR">
1580 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1581 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1582 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1583 </condition>
1584
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1585 <condition id="CM4_IAR">
1586 <description>Cortex-M4 processor based device for the IAR Compiler</description>
1587 <require condition="CM4"/>
1588 <require Tcompiler="IAR"/>
1589 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1590 <condition id="CM4_LE_IAR">
1591 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1592 <require condition="CM4_IAR"/>
1593 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1594 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1595 <condition id="CM4_BE_IAR">
1596 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1597 <require condition="CM4_IAR"/>
1598 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1599 </condition>
1600
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1601 <condition id="CM4_FP_IAR">
1602 <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1603 <require condition="CM4_FP"/>
1604 <require Tcompiler="IAR"/>
1605 </condition>
1606 <condition id="CM4_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1607 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1608 <require condition="CM4_FP_IAR"/>
1609 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1610 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1611 <condition id="CM4_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1612 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1613 <require condition="CM4_FP_IAR"/>
1614 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1615 </condition>
1616
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1617 <condition id="CM7_IAR">
1618 <description>Cortex-M7 processor based device for the IAR Compiler</description>
1619 <require condition="CM7"/>
1620 <require Tcompiler="IAR"/>
1621 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1622 <condition id="CM7_LE_IAR">
1623 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1624 <require condition="CM7_IAR"/>
1625 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1626 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1627 <condition id="CM7_BE_IAR">
1628 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1629 <require condition="CM7_IAR"/>
1630 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1631 </condition>
1632
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1633 <condition id="CM7_FP_IAR">
1634 <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1635 <require condition="CM7_FP"/>
1636 <require Tcompiler="IAR"/>
1637 </condition>
1638 <condition id="CM7_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1639 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1640 <require condition="CM7_FP_IAR"/>
1641 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1642 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1643 <condition id="CM7_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1644 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1645 <require condition="CM7_FP_IAR"/>
1646 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1647 </condition>
1648
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1649 <condition id="CM7_SP_IAR">
1650 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1651 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1652 <require Tcompiler="IAR"/>
1653 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1654 <condition id="CM7_SP_LE_IAR">
1655 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1656 <require condition="CM7_SP_IAR"/>
1657 <require Dendian="Little-endian"/>
1658 </condition>
1659 <condition id="CM7_SP_BE_IAR">
1660 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1661 <require condition="CM7_SP_IAR"/>
1662 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1663 </condition>
1664
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1665 <condition id="CM7_DP_IAR">
1666 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1667 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1668 <require Tcompiler="IAR"/>
1669 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1670 <condition id="CM7_DP_LE_IAR">
1671 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1672 <require condition="CM7_DP_IAR"/>
1673 <require Dendian="Little-endian"/>
1674 </condition>
1675 <condition id="CM7_DP_BE_IAR">
1676 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1677 <require condition="CM7_DP_IAR"/>
1678 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1679 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1680
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1681 <!-- conditions selecting single devices and CMSIS Core -->
1682 <!-- used for component startup, GCC version is used for C-Startup -->
1683 <condition id="ARMCM0 CMSIS">
1684 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1685 <require Dvendor="ARM:82" Dname="ARMCM0"/>
1686 <require Cclass="CMSIS" Cgroup="CORE"/>
1687 </condition>
1688 <condition id="ARMCM0 CMSIS GCC">
1689 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1690 <require condition="ARMCM0 CMSIS"/>
1691 <require condition="GCC"/>
1692 </condition>
1693
1694 <condition id="ARMCM0+ CMSIS">
1695 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1696 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1697 <require Cclass="CMSIS" Cgroup="CORE"/>
1698 </condition>
1699 <condition id="ARMCM0+ CMSIS GCC">
1700 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1701 <require condition="ARMCM0+ CMSIS"/>
1702 <require condition="GCC"/>
1703 </condition>
1704
1705 <condition id="ARMCM3 CMSIS">
1706 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1707 <require Dvendor="ARM:82" Dname="ARMCM3"/>
1708 <require Cclass="CMSIS" Cgroup="CORE"/>
1709 </condition>
1710 <condition id="ARMCM3 CMSIS GCC">
1711 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1712 <require condition="ARMCM3 CMSIS"/>
1713 <require condition="GCC"/>
1714 </condition>
1715
1716 <condition id="ARMCM4 CMSIS">
1717 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1718 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1719 <require Cclass="CMSIS" Cgroup="CORE"/>
1720 </condition>
1721 <condition id="ARMCM4 CMSIS GCC">
1722 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1723 <require condition="ARMCM4 CMSIS"/>
1724 <require condition="GCC"/>
1725 </condition>
1726
1727 <condition id="ARMCM7 CMSIS">
1728 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1729 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1730 <require Cclass="CMSIS" Cgroup="CORE"/>
1731 </condition>
1732 <condition id="ARMCM7 CMSIS GCC">
1733 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1734 <require condition="ARMCM7 CMSIS"/>
1735 <require condition="GCC"/>
1736 </condition>
1737
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1738 <condition id="ARMCM23 CMSIS">
1739 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1740 <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1741 <require Cclass="CMSIS" Cgroup="CORE"/>
1742 </condition>
1743 <condition id="ARMCM23 CMSIS GCC">
1744 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1745 <require condition="ARMCM23 CMSIS"/>
1746 <require condition="GCC"/>
1747 </condition>
1748
1749 <condition id="ARMCM33 CMSIS">
1750 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1751 <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1752 <require Cclass="CMSIS" Cgroup="CORE"/>
1753 </condition>
1754 <condition id="ARMCM33 CMSIS GCC">
1755 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1756 <require condition="ARMCM33 CMSIS"/>
1757 <require condition="GCC"/>
1758 </condition>
1759
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1760 <condition id="ARMSC000 CMSIS">
1761 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1762 <require Dvendor="ARM:82" Dname="ARMSC000"/>
1763 <require Cclass="CMSIS" Cgroup="CORE"/>
1764 </condition>
1765 <condition id="ARMSC000 CMSIS GCC">
1766 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1767 <require condition="ARMSC000 CMSIS"/>
1768 <require condition="GCC"/>
1769 </condition>
1770
1771 <condition id="ARMSC300 CMSIS">
1772 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1773 <require Dvendor="ARM:82" Dname="ARMSC300"/>
1774 <require Cclass="CMSIS" Cgroup="CORE"/>
1775 </condition>
1776 <condition id="ARMSC300 CMSIS GCC">
1777 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1778 <require condition="ARMSC300 CMSIS"/>
1779 <require condition="GCC"/>
1780 </condition>
1781
1782 <condition id="ARMv8MBL CMSIS">
1783 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1784 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1785 <require Cclass="CMSIS" Cgroup="CORE"/>
1786 </condition>
1787 <condition id="ARMv8MBL CMSIS GCC">
1788 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1789 <require condition="ARMv8MBL CMSIS"/>
1790 <require condition="GCC"/>
1791 </condition>
1792
1793 <condition id="ARMv8MML CMSIS">
1794 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1795 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1796 <require Cclass="CMSIS" Cgroup="CORE"/>
1797 </condition>
1798 <condition id="ARMv8MML CMSIS GCC">
1799 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1800 <require condition="ARMv8MML CMSIS"/>
1801 <require condition="GCC"/>
1802 </condition>
1803
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1804 <condition id="ARMCA5 CMSIS">
1805 <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1806 <require Dvendor="ARM:82" Dname="ARMCA5"/>
1807 <require Cclass="CMSIS" Cgroup="CORE"/>
1808 </condition>
1809
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1810 <condition id="ARMCA7 CMSIS">
1811 <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1812 <require Dvendor="ARM:82" Dname="ARMCA7"/>
1813 <require Cclass="CMSIS" Cgroup="CORE"/>
1814 </condition>
1815
1816 <condition id="ARMCA9 CMSIS">
1817 <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1818 <require Dvendor="ARM:82" Dname="ARMCA9"/>
1819 <require Cclass="CMSIS" Cgroup="CORE"/>
1820 </condition>
1821
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1822 <!-- CMSIS DSP -->
1823 <condition id="CMSIS DSP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1824 <description>Components required for DSP</description>
1825 <require condition="ARMv6_7_8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1826 <require condition="ARMCC GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1827 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1828 </condition>
1829
1830 <!-- RTOS RTX -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1831 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1832 <description>Components required for RTOS RTX</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1833 <require condition="ARMv6_7-M Device"/>
1834 <require condition="ARMCC GCC IAR"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1835 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1836 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1837 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1838 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1839 <description>Components required for RTOS RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1840 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]1841 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1842 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1843 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1844 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1845 <description>Components required for RTOS2 RTX5</description>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]1846 <require condition="ARMv6_7_8-M Device"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1847 <require condition="ARMCC GCC IAR"/>
1848 <require Cclass="CMSIS" Cgroup="CORE"/>
1849 <require Cclass="Device" Cgroup="Startup"/>
1850 </condition>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]1851 <condition id="RTOS2 RTX5 v7-A">
1852 <description>Components required for RTOS2 RTX5 v7-A</description>
1853 <require condition="ARMv7-A Device"/>
1854 <require condition="ARMCC GCC IAR"/>
1855 <require Cclass="CMSIS" Cgroup="CORE"/>
1856 <require Cclass="Device" Cgroup="Startup"/>
1857 <require Cclass="Device" Cgroup="OS Tick"/>
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]1858 <require Cclass="Device" Cgroup="IRQ Controller"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]1859 </condition>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1860 <condition id="RTOS2 RTX5 Lib">
1861 <description>Components required for RTOS2 RTX5 Library</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1862 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]1863 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1864 <require Cclass="CMSIS" Cgroup="CORE"/>
1865 <require Cclass="Device" Cgroup="Startup"/>
1866 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1867 <condition id="RTOS2 RTX5 NS">
1868 <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1869 <require condition="ARMv8-M TZ Device"/>
1870 <require condition="ARMCC GCC"/>
1871 <require Cclass="CMSIS" Cgroup="CORE"/>
1872 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1873 </condition>
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]1874
1875 <!-- OS Tick -->
1876 <condition id="OS Tick PTIM">
1877 <description>Components required for OS Tick Private Timer</description>
1878 <require condition="CA5_CA9"/>
1879 <require Cclass="Device" Cgroup="IRQ Controller"/>
1880 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1881
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]1882 <condition id="OS Tick GTIM">
1883 <description>Components required for OS Tick Generic Physical Timer</description>
1884 <require condition="CA7"/>
1885 <require Cclass="Device" Cgroup="IRQ Controller"/>
1886 </condition>
1887
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1888 </conditions>
1889
1890 <components>
1891 <!-- CMSIS-Core component -->
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]1892 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2" condition="ARMv6_7_8-M Device" >
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1893 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1894 <files>
1895 <!-- CPU independent -->
1896 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1897 <file category="include" name="CMSIS/Include/"/>
Robert Rostoharb2e07162016-11-04 10:43:56 +0100[diff] [blame]1898 <file category="header" name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]1899 <!-- Code template -->
Robert Rostohar0e71e882016-11-16 19:03:44 +0100[diff] [blame]1900 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c" version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
Robert Rostohar71f4dcf2016-11-16 19:06:01 +0100[diff] [blame]1901 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1902 </files>
1903 </component>
1904
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1905 <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0" condition="ARMv7-A Device" >
1906 <description>CMSIS-CORE for Cortex-A</description>
1907 <files>
1908 <!-- CPU independent -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1909 <file category="doc" name="CMSIS/Documentation/Core_A/html/index.html"/>
brondanib6bdb2c2017-03-02 16:15:52 +0100[diff] [blame]1910 <file category="include" name="CMSIS/Core_A/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1911 </files>
1912 </component>
1913
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1914 <!-- CMSIS-Startup components -->
1915 <!-- Cortex-M0 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1916 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1917 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1918 <files>
1919 <!-- include folder / device header file -->
1920 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1921 <!-- startup / system file -->
1922 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1923 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1924 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1925 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1926 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1927 </files>
1928 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1929 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1930 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1931 <files>
1932 <!-- include folder / device header file -->
1933 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1934 <!-- startup / system file -->
1935 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1936 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1937 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1938 </files>
1939 </component>
1940
1941 <!-- Cortex-M0+ -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1942 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1943 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1944 <files>
1945 <!-- include folder / device header file -->
1946 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1947 <!-- startup / system file -->
1948 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1949 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1950 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1951 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1952 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1953 </files>
1954 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1955 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1956 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1957 <files>
1958 <!-- include folder / device header file -->
1959 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1960 <!-- startup / system file -->
1961 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1962 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1963 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1964 </files>
1965 </component>
1966
1967 <!-- Cortex-M3 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1968 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1969 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1970 <files>
1971 <!-- include folder / device header file -->
1972 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1973 <!-- startup / system file -->
1974 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1975 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1976 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1977 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1978 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1979 </files>
1980 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1981 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1982 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1983 <files>
1984 <!-- include folder / device header file -->
1985 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1986 <!-- startup / system file -->
1987 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1988 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1989 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1990 </files>
1991 </component>
1992
1993 <!-- Cortex-M4 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1994 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1995 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1996 <files>
1997 <!-- include folder / device header file -->
1998 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1999 <!-- startup / system file -->
2000 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2001 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2002 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2003 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2004 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
2005 </files>
2006 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2007 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2008 <description>System and Startup for Generic ARM Cortex-M4 device</description>
2009 <files>
2010 <!-- include folder / device header file -->
2011 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2012 <!-- startup / system file -->
2013 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2014 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2015 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
2016 </files>
2017 </component>
2018
2019 <!-- Cortex-M7 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2020 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2021 <description>System and Startup for Generic ARM Cortex-M7 device</description>
2022 <files>
2023 <!-- include folder / device header file -->
2024 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
2025 <!-- startup / system file -->
2026 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2027 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2028 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2029 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2030 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
2031 </files>
2032 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2033 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2034 <description>System and Startup for Generic ARM Cortex-M7 device</description>
2035 <files>
2036 <!-- include folder / device header file -->
2037 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
2038 <!-- startup / system file -->
2039 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2040 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2041 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
2042 </files>
2043 </component>
2044
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2045 <!-- Cortex-M23 -->
2046 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS">
2047 <description>System and Startup for Generic ARM Cortex-M23 device</description>
2048 <files>
2049 <!-- include folder / device header file -->
2050 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2051 <!-- startup / system file -->
2052 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2053 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2054 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2055 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2056 <!-- SAU configuration -->
2057 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2058 </files>
2059 </component>
2060 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2061 <description>System and Startup for Generic ARM Cortex-M23 device</description>
2062 <files>
2063 <!-- include folder / device header file -->
2064 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2065 <!-- startup / system file -->
2066 <file category="sourceC" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2067 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2068 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
2069 <!-- SAU configuration -->
2070 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2071 </files>
2072 </component>
2073
2074 <!-- Cortex-M33 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2075 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2076 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2077 <files>
2078 <!-- include folder / device header file -->
2079 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2080 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2081 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
2082 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
2083 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2084 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2085 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2086 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2087 </files>
2088 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2089 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2090 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2091 <files>
2092 <!-- include folder / device header file -->
2093 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2094 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2095 <file category="sourceC" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
2096 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2097 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2098 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2099 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2100 </files>
2101 </component>
2102
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2103 <!-- Cortex-SC000 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2104 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2105 <description>System and Startup for Generic ARM SC000 device</description>
2106 <files>
2107 <!-- include folder / device header file -->
2108 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2109 <!-- startup / system file -->
2110 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2111 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2112 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2113 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2114 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2115 </files>
2116 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2117 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2118 <description>System and Startup for Generic ARM SC000 device</description>
2119 <files>
2120 <!-- include folder / device header file -->
2121 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2122 <!-- startup / system file -->
2123 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2124 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2125 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2126 </files>
2127 </component>
2128
2129 <!-- Cortex-SC300 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2130 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2131 <description>System and Startup for Generic ARM SC300 device</description>
2132 <files>
2133 <!-- include folder / device header file -->
2134 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2135 <!-- startup / system file -->
2136 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2137 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2138 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2139 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2140 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2141 </files>
2142 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2143 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2144 <description>System and Startup for Generic ARM SC300 device</description>
2145 <files>
2146 <!-- include folder / device header file -->
2147 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2148 <!-- startup / system file -->
2149 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2150 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2151 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2152 </files>
2153 </component>
2154
2155 <!-- ARMv8MBL -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2156 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2157 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2158 <files>
2159 <!-- include folder / device header file -->
2160 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2161 <!-- startup / system file -->
2162 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2163 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2164 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2165 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2166 <!-- SAU configuration -->
2167 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2168 </files>
2169 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2170 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2171 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2172 <files>
2173 <!-- include folder / device header file -->
2174 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2175 <!-- startup / system file -->
2176 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2177 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2178 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2179 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2180 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2181 </files>
2182 </component>
2183
2184 <!-- ARMv8MML -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2185 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2186 <description>System and Startup for Generic ARM ARMv8MML device</description>
2187 <files>
2188 <!-- include folder / device header file -->
2189 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2190 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2191 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2192 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2193 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2194 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2195 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2196 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2197 </files>
2198 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2199 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2200 <description>System and Startup for Generic ARM ARMv8MML device</description>
2201 <files>
2202 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2203 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2204 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2205 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2206 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2207 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2208 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2209 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2210 </files>
2211 </component>
2212
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2213 <!-- Cortex-A5 -->
2214 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA5 CMSIS">
2215 <description>System and Startup for Generic ARM Cortex-A5 device</description>
2216 <files>
2217 <!-- include folder / device header file -->
2218 <file category="include" name="Device/ARM/ARMCA5/Include/"/>
2219 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2220 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2221 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2222 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2223 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2224 <file category="sourceC" name="Device/ARM/ARMCA5/Source/system_ARMCA5.c" version="1.0.0" attr="config"/>
2225 <file category="sourceC" name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c" version="1.0.0" attr="config"/>
2226 <file category="header" name="Device/ARM/ARMCA5/Include/system_ARMCA5.h" version="1.0.0" attr="config"/>
2227 <file category="header" name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h" version="1.0.0" attr="config"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2228
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2229 </files>
2230 </component>
2231
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2232 <!-- Cortex-A7 -->
2233 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA7 CMSIS">
2234 <description>System and Startup for Generic ARM Cortex-A7 device</description>
2235 <files>
2236 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2237 <file category="include" name="Device/ARM/ARMCA7/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2238 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2239 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2240 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2241 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2242 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2243 <file category="sourceC" name="Device/ARM/ARMCA7/Source/system_ARMCA7.c" version="1.0.0" attr="config"/>
2244 <file category="sourceC" name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2245 <file category="header" name="Device/ARM/ARMCA7/Include/system_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2246 <file category="header" name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2247 </files>
2248 </component>
2249
2250 <!-- Cortex-A9 -->
Jonatan Antonib27a4122017-08-08 13:30:19 +0200[diff] [blame]2251 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCA9 CMSIS">
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2252 <description>System and Startup for Generic ARM Cortex-A9 device</description>
2253 <files>
2254 <!-- include folder / device header file -->
2255 <file category="include" name="Device/ARM/ARMCA9/Include/"/>
2256 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2257 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2258 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2259 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2260 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antonib27a4122017-08-08 13:30:19 +0200[diff] [blame]2261 <file category="sourceC" name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2262 <file category="other" name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld" version="1.0.0" attr="config" condition="GCC"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2263 <file category="sourceC" name="Device/ARM/ARMCA9/Source/system_ARMCA9.c" version="1.0.0" attr="config"/>
2264 <file category="sourceC" name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2265 <file category="header" name="Device/ARM/ARMCA9/Include/system_ARMCA9.h" version="1.0.0" attr="config"/>
2266 <file category="header" name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2267 </files>
2268 </component>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2269
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2270 <!-- IRQ Controller -->
2271 <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2272 <description>IRQ Controller implementation using GIC</description>
2273 <files>
2274 <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2275 </files>
2276 </component>
2277
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]2278 <!-- OS Tick -->
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2279 <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]2280 <description>OS Tick implementation using Private Timer</description>
2281 <files>
2282 <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2283 </files>
2284 </component>
2285
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]2286 <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick GTIM">
2287 <description>OS Tick implementation using Generic Physical Timer</description>
2288 <files>
2289 <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2290 </files>
2291 </component>
2292
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2293 <!-- CMSIS-DSP component -->
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2294 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2295 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2296 <files>
2297 <!-- CPU independent -->
2298 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2299 <file category="header" name="CMSIS/Include/arm_math.h"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2300
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2301 <!-- CPU and Compiler dependent -->
2302 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2303 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2304 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2305 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2306 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2307 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2308 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2309 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2310 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2311 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2312 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2313 <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2314 <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2315 <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2316 <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2317
2318 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2319 <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2320 <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2321 <file category="library" condition="CM33_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2322 <file category="library" condition="CM33_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2323 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2324 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2325 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2326 <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2327 <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2328 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2329 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2330
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2331 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2332 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2333 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2334 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2335 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2336 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2337 <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2338 <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2339
2340 <file category="library" condition="CM23_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2341 <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2342 <file category="library" condition="CM33_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2343 <file category="library" condition="CM33_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2344 <file category="library" condition="CM33_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2345 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2346 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2347 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2348 <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2349 <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2350 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2351 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2352
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2353 </files>
2354 </component>
2355
2356 <!-- CMSIS-RTOS Keil RTX component -->
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2357 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2358 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2359 <RTE_Components_h>
2360 <!-- the following content goes into file 'RTE_Components.h' -->
2361 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2362 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2363 </RTE_Components_h>
2364 <files>
2365 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]2366 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2367 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2368 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2369
2370 <!-- RTX templates -->
2371 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2372 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2373 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2374 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2375 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2376 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2377 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2378 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2379 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2380 <!-- tool-chain specific template file -->
2381 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2382 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2383 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2384
2385 <!-- CPU and Compiler dependent -->
2386 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2387 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2388 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2389 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2390 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2391 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2392 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2393 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2394 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2395 <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2396 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2397 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2398 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2399 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2400 <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2401 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2402 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2403 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2404 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2405 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2406 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2407 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2408 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2409 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2410 <file category="library" condition="CM4_FP_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2411 <file category="library" condition="CM4_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2412 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2413 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2414 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2415 <file category="library" condition="CM7_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2416 <!-- IAR -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2417 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2418 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2419 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2420 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2421 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2422 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2423 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2424 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2425 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2426 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2427 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2428 <file category="library" condition="CM7_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2429 </files>
2430 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2431
2432 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostohara6351332017-08-18 11:44:41 +0200[diff] [blame]2433 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.1" Capiversion="1.0.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2434 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2435 <RTE_Components_h>
2436 <!-- the following content goes into file 'RTE_Components.h' -->
2437 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2438 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
2439 </RTE_Components_h>
2440 <files>
2441 <!-- RTX header file -->
2442 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2443 <!-- RTX compatibility module for API V1 -->
2444 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2445 </files>
2446 </component>
2447
2448 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostohara6351332017-08-18 11:44:41 +0200[diff] [blame]2449 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2450 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2451 <RTE_Components_h>
2452 <!-- the following content goes into file 'RTE_Components.h' -->
2453 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2454 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2455 </RTE_Components_h>
2456 <files>
2457 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2458 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2459
2460 <!-- RTX header files -->
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2461 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2462
2463 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2464 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2465 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2466
2467 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2468 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2469 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2470 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2471 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2472 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2473 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2474 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2475 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2476 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2477 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2478
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2479 <!-- RTX library configuration -->
2480 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2481
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2482 <!-- RTX libraries (CPU and Compiler dependent) -->
2483 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2484 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
2485 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2486 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2487 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
2488 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2489 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2490 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2491 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2492 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2493 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2494 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2495 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
2496 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2497 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2498 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2499 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2500 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2501 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2502 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2503 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2504 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2505 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2506 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2507 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2508 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2509 <!-- IAR -->
2510 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2511 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2512 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2513 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2514 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2515 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2516 </files>
2517 </component>
Robert Rostohara6351332017-08-18 11:44:41 +0200[diff] [blame]2518 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2519 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2520 <RTE_Components_h>
2521 <!-- the following content goes into file 'RTE_Components.h' -->
2522 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2523 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2524 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2525 </RTE_Components_h>
2526 <files>
2527 <!-- RTX documentation -->
2528 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2529
2530 <!-- RTX header files -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2531 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2532
2533 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2534 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2535 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2536
2537 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2538 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2539 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2540 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2541 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2542 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2543 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2544 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2545 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2546 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2547 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2548
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2549 <!-- RTX library configuration -->
2550 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2551
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2552 <!-- RTX libraries (CPU and Compiler dependent) -->
2553 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2554 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2555 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2556 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2557 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2558 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2559 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2560 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2561 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2562 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2563 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2564 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2565 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2566 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2567 </files>
2568 </component>
Robert Rostohara6351332017-08-18 11:44:41 +0200[diff] [blame]2569 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2570 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2571 <RTE_Components_h>
2572 <!-- the following content goes into file 'RTE_Components.h' -->
2573 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2574 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2575 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2576 </RTE_Components_h>
2577 <files>
2578 <!-- RTX documentation -->
2579 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2580
2581 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2582 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2583
2584 <!-- RTX configuration -->
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2585 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2586 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2587
2588 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2589 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2590 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2591 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2592 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2593 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2594 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2595 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2596 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2597 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2598 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2599
2600 <!-- RTX sources (core) -->
2601 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2602 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2603 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2604 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2605 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2606 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2607 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2608 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2609 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2610 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2611 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2612 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2613 <!-- RTX sources (library configuration) -->
2614 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2615 <!-- RTX sources (handlers ARMCC) -->
2616 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
2617 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
2618 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
2619 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
2620 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
2621 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2622 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
2623 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
2624 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2625 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
2626 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
2627 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
2628 <!-- RTX sources (handlers GCC) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2629 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S" condition="CM0_GCC"/>
2630 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM3_GCC"/>
2631 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM4_GCC"/>
2632 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM4_FP_GCC"/>
2633 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM7_GCC"/>
2634 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM7_FP_GCC"/>
2635 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
2636 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
2637 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2638 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
2639 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
2640 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2641 <!-- RTX sources (handlers IAR) -->
2642 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s" condition="CM0_IAR"/>
2643 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM3_IAR"/>
2644 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM4_IAR"/>
2645 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM4_FP_IAR"/>
2646 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM7_IAR"/>
2647 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM7_FP_IAR"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2648 <!-- OS Tick (SysTick) -->
2649 <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2650 </files>
2651 </component>
Robert Rostohara6351332017-08-18 11:44:41 +0200[diff] [blame]2652 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2653 <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2654 <RTE_Components_h>
2655 <!-- the following content goes into file 'RTE_Components.h' -->
2656 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2657 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
2658 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
2659 </RTE_Components_h>
2660 <files>
2661 <!-- RTX documentation -->
2662 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2663
2664 <!-- RTX header files -->
2665 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2666
2667 <!-- RTX configuration -->
2668 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2669 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
2670
2671 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/handlers.c" version="5.1.0"/>
2672
2673 <!-- RTX templates -->
2674 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2675 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2676 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2677 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2678 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2679 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2680 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2681 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2682 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2683 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2684
2685 <!-- RTX sources (core) -->
2686 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2687 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2688 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2689 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2690 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2691 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2692 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2693 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2694 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2695 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2696 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2697 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2698 <!-- RTX sources (library configuration) -->
2699 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2700 <!-- RTX sources (handlers ARMCC) -->
2701 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s" condition="CA_ARMCC5"/>
2702 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_ARMCC6"/>
2703 <!-- RTX sources (handlers GCC) -->
2704 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_GCC"/>
2705 <!-- RTX sources (handlers IAR) -->
2706 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s" condition="CA_IAR"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2707 </files>
2708 </component>
Robert Rostohara6351332017-08-18 11:44:41 +0200[diff] [blame]2709 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2710 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2711 <RTE_Components_h>
2712 <!-- the following content goes into file 'RTE_Components.h' -->
2713 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2714 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2715 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2716 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2717 </RTE_Components_h>
2718 <files>
2719 <!-- RTX documentation -->
2720 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2721
2722 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2723 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2724
2725 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2726 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2727 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2728
2729 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2730 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2731 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2732 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2733 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2734 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2735 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2736 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2737 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2738 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2739 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2740
2741 <!-- RTX sources (core) -->
2742 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2743 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2744 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2745 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2746 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2747 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2748 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2749 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2750 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2751 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2752 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2753 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2754 <!-- RTX sources (library configuration) -->
2755 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2756 <!-- RTX sources (ARMCC handlers) -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2757 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
2758 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
2759 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2760 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
2761 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
2762 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
2763 <!-- RTX sources (GCC handlers) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2764 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="CM23_GCC"/>
2765 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="CM33_GCC"/>
2766 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2767 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="ARMv8MBL_GCC"/>
2768 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="ARMv8MML_GCC"/>
2769 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2770 <!-- OS Tick (SysTick) -->
2771 <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2772 </files>
2773 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2774
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2775 </components>
2776
2777 <boards>
2778 <board name="uVision Simulator" vendor="Keil">
2779 <description>uVision Simulator</description>
2780 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2781 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2782 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2783 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2784 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2785 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2786 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2787 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2788 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2789 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2790 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2791 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2792 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
Joachim Krech4a03e6d2017-02-06 13:17:39 +0100[diff] [blame]2793 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2794 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2795 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2796 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2797 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
Daniel Brondanifaaa48f2017-07-31 14:00:54 +0200[diff] [blame]2798 </board>
2799
2800 <board name="Fixed Virtual Platform" vendor="ARM">
Daniel Brondani040d63b2017-08-01 16:49:57 +0200[diff] [blame]2801 <description>Fixed Virtual Platform</description>
Daniel Brondanifaaa48f2017-07-31 14:00:54 +0200[diff] [blame]2802 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
2803 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
2804 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
2805 </board>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2806 </boards>
2807
2808 <examples>
2809 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2810 <description>DSP_Lib Class Marks example</description>
2811 <board name="uVision Simulator" vendor="Keil"/>
2812 <project>
2813 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2814 </project>
2815 <attributes>
2816 <component Cclass="CMSIS" Cgroup="CORE"/>
2817 <component Cclass="CMSIS" Cgroup="DSP"/>
2818 <component Cclass="Device" Cgroup="Startup"/>
2819 <category>Getting Started</category>
2820 </attributes>
2821 </example>
2822
2823 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2824 <description>DSP_Lib Convolution example</description>
2825 <board name="uVision Simulator" vendor="Keil"/>
2826 <project>
2827 <environment name="uv" load="arm_convolution_example.uvprojx"/>
2828 </project>
2829 <attributes>
2830 <component Cclass="CMSIS" Cgroup="CORE"/>
2831 <component Cclass="CMSIS" Cgroup="DSP"/>
2832 <component Cclass="Device" Cgroup="Startup"/>
2833 <category>Getting Started</category>
2834 </attributes>
2835 </example>
2836
2837 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2838 <description>DSP_Lib Dotproduct example</description>
2839 <board name="uVision Simulator" vendor="Keil"/>
2840 <project>
2841 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2842 </project>
2843 <attributes>
2844 <component Cclass="CMSIS" Cgroup="CORE"/>
2845 <component Cclass="CMSIS" Cgroup="DSP"/>
2846 <component Cclass="Device" Cgroup="Startup"/>
2847 <category>Getting Started</category>
2848 </attributes>
2849 </example>
2850
2851 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2852 <description>DSP_Lib FFT Bin example</description>
2853 <board name="uVision Simulator" vendor="Keil"/>
2854 <project>
2855 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2856 </project>
2857 <attributes>
2858 <component Cclass="CMSIS" Cgroup="CORE"/>
2859 <component Cclass="CMSIS" Cgroup="DSP"/>
2860 <component Cclass="Device" Cgroup="Startup"/>
2861 <category>Getting Started</category>
2862 </attributes>
2863 </example>
2864
2865 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2866 <description>DSP_Lib FIR example</description>
2867 <board name="uVision Simulator" vendor="Keil"/>
2868 <project>
2869 <environment name="uv" load="arm_fir_example.uvprojx"/>
2870 </project>
2871 <attributes>
2872 <component Cclass="CMSIS" Cgroup="CORE"/>
2873 <component Cclass="CMSIS" Cgroup="DSP"/>
2874 <component Cclass="Device" Cgroup="Startup"/>
2875 <category>Getting Started</category>
2876 </attributes>
2877 </example>
2878
2879 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2880 <description>DSP_Lib Graphic Equalizer example</description>
2881 <board name="uVision Simulator" vendor="Keil"/>
2882 <project>
2883 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2884 </project>
2885 <attributes>
2886 <component Cclass="CMSIS" Cgroup="CORE"/>
2887 <component Cclass="CMSIS" Cgroup="DSP"/>
2888 <component Cclass="Device" Cgroup="Startup"/>
2889 <category>Getting Started</category>
2890 </attributes>
2891 </example>
2892
2893 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2894 <description>DSP_Lib Linear Interpolation example</description>
2895 <board name="uVision Simulator" vendor="Keil"/>
2896 <project>
2897 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2898 </project>
2899 <attributes>
2900 <component Cclass="CMSIS" Cgroup="CORE"/>
2901 <component Cclass="CMSIS" Cgroup="DSP"/>
2902 <component Cclass="Device" Cgroup="Startup"/>
2903 <category>Getting Started</category>
2904 </attributes>
2905 </example>
2906
2907 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2908 <description>DSP_Lib Matrix example</description>
2909 <board name="uVision Simulator" vendor="Keil"/>
2910 <project>
2911 <environment name="uv" load="arm_matrix_example.uvprojx"/>
2912 </project>
2913 <attributes>
2914 <component Cclass="CMSIS" Cgroup="CORE"/>
2915 <component Cclass="CMSIS" Cgroup="DSP"/>
2916 <component Cclass="Device" Cgroup="Startup"/>
2917 <category>Getting Started</category>
2918 </attributes>
2919 </example>
2920
2921 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2922 <description>DSP_Lib Signal Convergence example</description>
2923 <board name="uVision Simulator" vendor="Keil"/>
2924 <project>
2925 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2926 </project>
2927 <attributes>
2928 <component Cclass="CMSIS" Cgroup="CORE"/>
2929 <component Cclass="CMSIS" Cgroup="DSP"/>
2930 <component Cclass="Device" Cgroup="Startup"/>
2931 <category>Getting Started</category>
2932 </attributes>
2933 </example>
2934
2935 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2936 <description>DSP_Lib Sinus/Cosinus example</description>
2937 <board name="uVision Simulator" vendor="Keil"/>
2938 <project>
2939 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2940 </project>
2941 <attributes>
2942 <component Cclass="CMSIS" Cgroup="CORE"/>
2943 <component Cclass="CMSIS" Cgroup="DSP"/>
2944 <component Cclass="Device" Cgroup="Startup"/>
2945 <category>Getting Started</category>
2946 </attributes>
2947 </example>
2948
2949 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2950 <description>DSP_Lib Variance example</description>
2951 <board name="uVision Simulator" vendor="Keil"/>
2952 <project>
2953 <environment name="uv" load="arm_variance_example.uvprojx"/>
2954 </project>
2955 <attributes>
2956 <component Cclass="CMSIS" Cgroup="CORE"/>
2957 <component Cclass="CMSIS" Cgroup="DSP"/>
2958 <component Cclass="Device" Cgroup="Startup"/>
2959 <category>Getting Started</category>
2960 </attributes>
2961 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2962
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2963 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2964 <description>CMSIS-RTOS2 Blinky example</description>
2965 <board name="uVision Simulator" vendor="Keil"/>
2966 <project>
2967 <environment name="uv" load="Blinky.uvprojx"/>
2968 </project>
2969 <attributes>
2970 <component Cclass="CMSIS" Cgroup="CORE"/>
2971 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2972 <component Cclass="Device" Cgroup="Startup"/>
2973 <category>Getting Started</category>
2974 </attributes>
2975 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2976
Robert Rostohare13e4702016-11-07 15:23:44 +0100[diff] [blame]2977 <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
Matthias Hertel4b70ae42016-11-07 14:14:59 +0100[diff] [blame]2978 <description>CMSIS-RTOS2 mixed API v1 and v2</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2979 <board name="uVision Simulator" vendor="Keil"/>
2980 <project>
2981 <environment name="uv" load="Blinky.uvprojx"/>
2982 </project>
2983 <attributes>
2984 <component Cclass="CMSIS" Cgroup="CORE"/>
2985 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2986 <component Cclass="Device" Cgroup="Startup"/>
2987 <category>Getting Started</category>
2988 </attributes>
2989 </example>
2990
Jonatan Antoni401391f2017-08-30 16:52:33 +0200[diff] [blame^]2991 <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
2992 <description>CMSIS-RTOS2 Message Queue Example</description>
2993 <board name="uVision Simulator" vendor="Keil"/>
2994 <project>
2995 <environment name="uv" load="MsqQueue.uvprojx"/>
2996 </project>
2997 <attributes>
2998 <component Cclass="CMSIS" Cgroup="CORE"/>
2999 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3000 <component Cclass="Compiler" Cgroup="EventRecorder"/>
3001 <component Cclass="Device" Cgroup="Startup"/>
3002 <category>Getting Started</category>
3003 </attributes>
3004 </example>
3005
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]3006 <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]3007 <description>Bare-metal secure/non-secure example without RTOS</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3008 <board name="uVision Simulator" vendor="Keil"/>
3009 <project>
3010 <environment name="uv" load="NoRTOS.uvmpw"/>
3011 </project>
3012 <attributes>
3013 <component Cclass="CMSIS" Cgroup="CORE"/>
3014 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3015 <component Cclass="Device" Cgroup="Startup"/>
3016 <category>Getting Started</category>
3017 </attributes>
3018 </example>
3019
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]3020 <example name="TrustZone for ARMv8-M RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]3021 <description>Secure/non-secure RTOS example with thread context management</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3022 <board name="uVision Simulator" vendor="Keil"/>
3023 <project>
3024 <environment name="uv" load="RTOS.uvmpw"/>
3025 </project>
3026 <attributes>
3027 <component Cclass="CMSIS" Cgroup="CORE"/>
3028 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3029 <component Cclass="Device" Cgroup="Startup"/>
3030 <category>Getting Started</category>
3031 </attributes>
3032 </example>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3033
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]3034 <example name="TrustZone for ARMv8-M RTOS Security Tests" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3035 <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3036 <board name="uVision Simulator" vendor="Keil"/>
3037 <project>
3038 <environment name="uv" load="RTOS_Faults.uvmpw"/>
3039 </project>
3040 <attributes>
3041 <component Cclass="CMSIS" Cgroup="CORE"/>
3042 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3043 <component Cclass="Device" Cgroup="Startup"/>
3044 <category>Getting Started</category>
3045 </attributes>
3046 </example>
3047
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3048 </examples>
3049
3050</package>