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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 1434f1f3fd066087a7188af0699ebf1396803e21 / . / ARM.CMSIS.pdsc
blob: 27532c3061931da31ac51e059e997acfd2f5119a [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
Joachim Krecha33860c2016-11-09 22:25:55 +0100[diff] [blame]7 <!-- <license>license.txt</license> -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame^]11 <release version="5.2.1-dev1">
12 Active development...
13 </release>
14 <release version="5.2.0" date="2017-11-16">
Jonatan Antonide316642017-11-10 11:40:06 +0100[diff] [blame]15 CMSIS-Core(M): 5.1.0 (see revision history for details)
16 - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
17 - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
18 CMSIS-Core(A): 1.1.0 (see revision history for details)
19 - Added compiler_iccarm.h.
20 - Added additional access functions for physical timer.
21 CMSIS-DAP: 1.2.0 (see revision history for details)
22 CMSIS-DSP: 1.5.2 (see revision history for details)
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame^]23 CMSIS-Driver 2.6.0(see revision history for details):
Jonatan Antonide316642017-11-10 11:40:06 +0100[diff] [blame]24 - CAN Driver API V1.2.0
Vladimir Umekb4728092017-11-14 10:12:51 +0100[diff] [blame]25 - NAND Driver API V2.3.0
Jonatan Antonide316642017-11-10 11:40:06 +0100[diff] [blame]26 CMSIS-RTOS:
27 - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
28 CMSIS-RTOS2:
29 - API 2.1.2 (see revision history for details)
30 - RTX 5.2.3 (see revision history for details)
31 Devices:
32 - Added GCC startup and linker script for Cortex-A9.
33 - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
34 - Added IAR startup code for Cortex-A9
35 </release>
Jonatan Antoni5bfb1e62017-09-19 15:46:40 +0200[diff] [blame]36 <release version="5.1.1" date="2017-09-19">
37 CMSIS-RTOS2:
38 - RTX 5.2.1 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]39 </release>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]40 <release version="5.1.0" date="2017-08-04">
41 CMSIS-Core(M): 5.0.2 (see revision history for details)
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]42 - Changed Version Control macros to be core agnostic.
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]43 - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
44 CMSIS-Core(A): 1.0.0 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]45 - Initial release
46 - IRQ Controller API 1.0.0
47 CMSIS-Driver: 2.05 (see revision history for details)
48 - All typedefs related to status have been made volatile.
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]49 CMSIS-RTOS2:
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]50 - API 2.1.1 (see revision history for details)
51 - RTX 5.2.0 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]52 - OS Tick API 1.0.0
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]53 CMSIS-DSP: 1.5.2 (see revision history for details)
54 - Fixed GNU Compiler specific diagnostics.
Jonatan Antoni31e48e62017-08-04 11:26:18 +0200[diff] [blame]55 CMSIS-PACK: 1.5.0 (see revision history for details)
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]56 - added System Description File (*.SDF) Format
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]57 CMSIS-Zone: 0.0.1 (Preview)
58 - Initial specification draft
59 </release>
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]60 <release version="5.0.1" date="2017-02-03">
61 Package Description:
62 - added taxonomy for Cclass RTOS
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]63 CMSIS-RTOS2:
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]64 - API 2.1 (see revision history for details)
65 - RTX 5.1.0 (see revision history for details)
66 CMSIS-Core: 5.0.1 (see revision history for details)
67 - Added __PACKED_STRUCT macro
68 - Added uVisior support
69 - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
70 - Updated template for secure main function (main_s.c)
71 - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
72 CMSIS-DSP: 1.5.1 (see revision history for details)
73 - added ARMv8M DSP libraries.
74 CMSIS-PACK:1.4.9 (see revision history for details)
75 - added Pack Index File specification and schema file
Martin Güntherd1060532016-11-15 09:43:43 +0100[diff] [blame]76 </release>
Joachim Krechc45bb4a2016-11-11 11:01:22 +0100[diff] [blame]77 <release version="5.0.0" date="2016-11-11">
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]78 Changed open source license to Apache 2.0
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]79 CMSIS_Core:
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]80 - Added support for Cortex-M23 and Cortex-M33.
81 - Added ARMv8-M device configurations for mainline and baseline.
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]82 - Added CMSE support and thread context management for TrustZone for ARMv8-M
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]83 - Added cmsis_compiler.h to unify compiler behaviour.
84 - Updated function SCB_EnableICache (for Cortex-M7).
85 - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
86 CMSIS-RTOS:
87 - bug fix in RTX 4.82 (see revision history for details)
88 CMSIS-RTOS2:
89 - new API including compatibility layer to CMSIS-RTOS
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]90 - reference implementation based on RTX5
91 - supports all Cortex-M variants including TrustZone for ARMv8-M
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]92 CMSIS-SVD:
93 - reworked SVD format documentation
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]94 - removed SVD file database documentation as SVD files are distributed in packs
95 - updated SVDConv for Win32 and Linux
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]96 CMSIS-DSP:
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]97 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
98 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]99 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]100 <release version="4.5.0" date="2015-10-28">
101 - CMSIS-Core 4.30.0 (see revision history for details)
102 - CMSIS-DAP 1.1.0 (unchanged)
103 - CMSIS-Driver 2.04.0 (see revision history for details)
104 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
105 - CMSIS-PACK 1.4.1 (see revision history for details)
106 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
107 - CMSIS-SVD 1.3.1 (see revision history for details)
108 </release>
109 <release version="4.4.0" date="2015-09-11">
110 - CMSIS-Core 4.20 (see revision history for details)
111 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
112 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
113 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
114 - CMSIS-RTOS
115 -- API 1.02 (unchanged)
116 -- RTX 4.79 (see revision history for details)
117 - CMSIS-SVD 1.3.0 (see revision history for details)
118 - CMSIS-DAP 1.1.0 (extended with SWO support)
119 </release>
120 <release version="4.3.0" date="2015-03-20">
121 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
122 - CMSIS-DSP 1.4.5 (see revision history for details)
123 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
124 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
125 - CMSIS-RTOS
126 -- API 1.02 (unchanged)
127 -- RTX 4.78 (see revision history for details)
128 - CMSIS-SVD 1.2 (unchanged)
129 </release>
130 <release version="4.2.0" date="2014-09-24">
131 Adding Cortex-M7 support
132 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
133 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
134 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
135 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
136 - CMSIS-RTOS RTX 4.75 (see revision history for details)
137 </release>
138 <release version="4.1.1" date="2014-06-30">
139 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
140 </release>
141 <release version="4.1.0" date="2014-06-12">
142 - CMSIS-Driver 2.02 (incompatible update)
143 - CMSIS-Pack 1.3 (see revision history for details)
144 - CMSIS-DSP 1.4.2 (unchanged)
145 - CMSIS-Core 3.30 (unchanged)
146 - CMSIS-RTOS RTX 4.74 (unchanged)
147 - CMSIS-RTOS API 1.02 (unchanged)
148 - CMSIS-SVD 1.10 (unchanged)
149 PACK:
150 - removed G++ specific files from PACK
151 - added Component Startup variant "C Startup"
152 - added Pack Checking Utility
153 - updated conditions to reflect tool-chain dependency
154 - added Taxonomy for Graphics
155 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
156 </release>
157 <release version="4.0.0">
158 - CMSIS-Driver 2.00 Preliminary (incompatible update)
159 - CMSIS-Pack 1.1 Preliminary
160 - CMSIS-DSP 1.4.2 (see revision history for details)
161 - CMSIS-Core 3.30 (see revision history for details)
162 - CMSIS-RTOS RTX 4.74 (see revision history for details)
163 - CMSIS-RTOS API 1.02 (unchanged)
164 - CMSIS-SVD 1.10 (unchanged)
165 </release>
166 <release version="3.20.4">
167 - CMSIS-RTOS 4.74 (see revision history for details)
168 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
169 </release>
170 <release version="3.20.3">
171 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
172 - CMSIS-RTOS 4.73 (see revision history for details)
173 </release>
174 <release version="3.20.2">
175 - CMSIS-Pack documentation has been added
176 - CMSIS-Drivers header and documentation have been added to PACK
177 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
178 </release>
179 <release version="3.20.1">
180 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
181 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
182 </release>
183 <release version="3.20.0">
184 The software portions that are deployed in the application program are now under a BSD license which allows usage
185 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
186 The individual components have been update as listed below:
187 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
188 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
189 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
190 - CMSIS-SVD is unchanged.
191 </release>
192 </releases>
193
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]194 <taxonomy>
195 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
196 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
197 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
198 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
199 <description Cclass="File System">File Drive Support and File System</description>
200 <description Cclass="Graphics">Graphical User Interface</description>
201 <description Cclass="Network">Network Stack using Internet Protocols</description>
202 <description Cclass="USB">Universal Serial Bus Stack</description>
Joachim Krech2384b8a2017-02-02 15:58:30 +0100[diff] [blame]203 <description Cclass="Compiler">Compiler Software Extensions</description>
Joachim Krech62838c82017-02-02 15:54:57 +0100[diff] [blame]204 <description Cclass="RTOS">Real-time Operating System</description>
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]205 </taxonomy>
206
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]207 <devices>
208 <!-- ****************************** Cortex-M0 ****************************** -->
209 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]210 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]211 <description>
212The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
213- simple, easy-to-use programmers model
214- highly efficient ultra-low power operation
215- excellent code density
216- deterministic, high-performance interrupt handling
217- upward compatibility with the rest of the Cortex-M processor family.
218 </description>
219 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
220 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
221 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
222 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
223
224 <device Dname="ARMCM0">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]225 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]226 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
227 </device>
228 </family>
229
230 <!-- ****************************** Cortex-M0P ****************************** -->
231 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]232 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]233 <description>
234The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
235- simple, easy-to-use programmers model
236- highly efficient ultra-low power operation
237- excellent code density
238- deterministic, high-performance interrupt handling
239- upward compatibility with the rest of the Cortex-M processor family.
240 </description>
241 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
242 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
243 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
244 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
245
246 <device Dname="ARMCM0P">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]247 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]248 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
249 </device>
Jonatan Antonic4e9f462017-10-19 16:51:44 +0200[diff] [blame]250
251 <device Dname="ARMCM0P_MPU">
252 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
253 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
254 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]255 </family>
256
257 <!-- ****************************** Cortex-M3 ****************************** -->
258 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]259 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]260 <description>
261The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
262- simple, easy-to-use programmers model
263- highly efficient ultra-low power operation
264- excellent code density
265- deterministic, high-performance interrupt handling
266- upward compatibility with the rest of the Cortex-M processor family.
267 </description>
268 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
269 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
270 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
271 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
272
273 <device Dname="ARMCM3">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]274 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]275 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
276 </device>
277 </family>
278
279 <!-- ****************************** Cortex-M4 ****************************** -->
280 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]281 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]282 <description>
283The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
284- simple, easy-to-use programmers model
285- highly efficient ultra-low power operation
286- excellent code density
287- deterministic, high-performance interrupt handling
288- upward compatibility with the rest of the Cortex-M processor family.
289 </description>
290 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
291 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
292 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
293 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
294
295 <device Dname="ARMCM4">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]296 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]297 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
298 </device>
299
300 <device Dname="ARMCM4_FP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]301 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]302 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
303 </device>
304 </family>
305
306 <!-- ****************************** Cortex-M7 ****************************** -->
307 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]308 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]309 <description>
Martin Güntheraa246272016-11-15 16:01:05 +0100[diff] [blame]310The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]311- simple, easy-to-use programmers model
312- highly efficient ultra-low power operation
313- excellent code density
314- deterministic, high-performance interrupt handling
315- upward compatibility with the rest of the Cortex-M processor family.
316 </description>
317 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
318 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
319 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
320 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
321
322 <device Dname="ARMCM7">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]323 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]324 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
325 </device>
326
327 <device Dname="ARMCM7_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]328 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]329 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
330 </device>
331
332 <device Dname="ARMCM7_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]333 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]334 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
335 </device>
336 </family>
337
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]338 <!-- ****************************** Cortex-M23 ********************** -->
339 <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
340 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
341 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]342The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]343It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]344Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]345 </description>
346 <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]347 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
348 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]349 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]350 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]351 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
352
353 <device Dname="ARMCM23">
354 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
355 <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
356 </device>
357
358 <device Dname="ARMCM23_TZ">
359 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
360 <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
361 </device>
362 </family>
363
364 <!-- ****************************** Cortex-M33 ****************************** -->
365 <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
366 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
367 <description>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]368The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]369class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]370 </description>
371 <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]372 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
373 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]374 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]375 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
376 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]377
378 <device Dname="ARMCM33">
379 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]380 <description>
381 no DSP Instructions, no Floating Point Unit, no TrustZone
382 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]383 <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
384 </device>
385
386 <device Dname="ARMCM33_TZ">
387 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]388 <description>
389 no DSP Instructions, no Floating Point Unit, TrustZone
390 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]391 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
392 </device>
393
394 <device Dname="ARMCM33_DSP_FP">
395 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]396 <description>
397 DSP Instructions, Single Precision Floating Point Unit, no TrustZone
398 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]399 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
400 </device>
401
402 <device Dname="ARMCM33_DSP_FP_TZ">
403 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]404 <description>
405 DSP Instructions, Single Precision Floating Point Unit, TrustZone
406 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]407 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
408 </device>
409 </family>
410
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]411 <!-- ****************************** ARMSC000 ****************************** -->
412 <family Dfamily="ARM SC000" Dvendor="ARM:82">
413 <description>
414The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
415- simple, easy-to-use programmers model
416- highly efficient ultra-low power operation
417- excellent code density
418- deterministic, high-performance interrupt handling
419 </description>
420 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
421 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
422 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
423 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
424
425 <device Dname="ARMSC000">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]426 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]427 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
428 </device>
429 </family>
430
431 <!-- ****************************** ARMSC300 ****************************** -->
432 <family Dfamily="ARM SC300" Dvendor="ARM:82">
433 <description>
434The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
435- simple, easy-to-use programmers model
436- highly efficient ultra-low power operation
437- excellent code density
438- deterministic, high-performance interrupt handling
439 </description>
440 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
441 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
442 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
443 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
444
445 <device Dname="ARMSC300">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]446 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]447 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
448 </device>
449 </family>
450
451 <!-- ****************************** ARMv8-M Baseline ********************** -->
452 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
453 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
454 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]455ARMv8-M Baseline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]456 </description>
457 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]458 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
459 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]460 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]461 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]462 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
463
464 <device Dname="ARMv8MBL">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]465 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]466 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
467 </device>
468 </family>
469
470 <!-- ****************************** ARMv8-M Mainline ****************************** -->
471 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
472 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
473 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]474ARMv8-M Mainline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]475 </description>
476 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]477 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
478 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]479 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]480 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]481 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
482
483 <device Dname="ARMv8MML">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]484 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]485 <description>
486 no DSP Instructions, no Floating Point Unit, TrustZone
487 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]488 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
489 </device>
490
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]491 <device Dname="ARMv8MML_DSP">
492 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]493 <description>
494 DSP Instructions, no Floating Point Unit, TrustZone
495 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]496 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]497 </device>
498
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]499 <device Dname="ARMv8MML_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]500 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]501 <description>
502 no DSP Instructions, Single Precision Floating Point Unit, TrustZone
503 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]504 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
505 </device>
506
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]507 <device Dname="ARMv8MML_DSP_SP">
508 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]509 <description>
510 DSP Instructions, Single Precision Floating Point Unit, TrustZone
511 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]512 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]513 </device>
514
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]515 <device Dname="ARMv8MML_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]516 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]517 <description>
518 no DSP Instructions, Double Precision Floating Point Unit, TrustZone
519 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]520 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
521 </device>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]522
523 <device Dname="ARMv8MML_DSP_DP">
524 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]525 <description>
526 DSP Instructions, Double Precision Floating Point Unit, TrustZone
527 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]528 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]529 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]530 </family>
531
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]532 <!-- ****************************** Cortex-A5 ****************************** -->
533 <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
534 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
535 <description>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]536The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
537virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]538ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
539 </description>
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]540
541 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
542 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
543
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]544 <device Dname="ARMCA5">
545 <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
546 <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
547 </device>
548 </family>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]549
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]550 <!-- ****************************** Cortex-A7 ****************************** -->
551 <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
552 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
553 <description>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]554The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
555The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]556an optional integrated GIC, and an optional L2 cache controller.
557 </description>
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]558
559 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
560 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
561
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]562 <device Dname="ARMCA7">
563 <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
564 <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
565 </device>
566 </family>
567
568 <!-- ****************************** Cortex-A9 ****************************** -->
569 <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]570 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]571 <description>
572The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
573The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
574and 8-bit Java bytecodes in Jazelle state.
575 </description>
576
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]577 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
578 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
579
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]580 <device Dname="ARMCA9">
581 <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
582 <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
583 </device>
584 </family>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]585 </devices>
586
587
588 <apis>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]589 <!-- CMSIS Device API -->
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]590 <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
591 <description>Device interrupt controller interface</description>
592 <files>
593 <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
594 </files>
595 </api>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]596 <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
Robert Rostoharaeb6dd52017-06-09 14:17:43 +0200[diff] [blame]597 <description>RTOS Kernel system tick timer interface</description>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]598 <files>
599 <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
600 </files>
601 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]602 <!-- CMSIS-RTOS API -->
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]603 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]604 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
605 <files>
606 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
607 </files>
608 </api>
Robert Rostohar17243e62017-10-30 11:31:45 +0100[diff] [blame]609 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.2" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]610 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
611 <files>
612 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
Robert Rostohar0a364052017-01-25 12:35:54 +0100[diff] [blame]613 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]614 </files>
615 </api>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]616 <!-- CMSIS Driver API -->
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]617 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]618 <description>USART Driver API for Cortex-M</description>
619 <files>
620 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
621 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
622 </files>
623 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]624 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]625 <description>SPI Driver API for Cortex-M</description>
626 <files>
627 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
628 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
629 </files>
630 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]631 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]632 <description>SAI Driver API for Cortex-M</description>
633 <files>
634 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
635 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
636 </files>
637 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]638 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]639 <description>I2C Driver API for Cortex-M</description>
640 <files>
641 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
642 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
643 </files>
644 </api>
Robert Rostohar3bb9b772017-09-13 15:24:14 +0200[diff] [blame]645 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]646 <description>CAN Driver API for Cortex-M</description>
647 <files>
648 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
649 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
650 </files>
651 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]652 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]653 <description>Flash Driver API for Cortex-M</description>
654 <files>
655 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
656 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
657 </files>
658 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]659 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]660 <description>MCI Driver API for Cortex-M</description>
661 <files>
662 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
663 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
664 </files>
665 </api>
Vladimir Umekb4728092017-11-14 10:12:51 +0100[diff] [blame]666 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]667 <description>NAND Flash Driver API for Cortex-M</description>
668 <files>
669 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
670 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
671 </files>
672 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]673 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]674 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
675 <files>
676 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
677 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
678 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
679 </files>
680 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]681 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]682 <description>Ethernet MAC Driver API for Cortex-M</description>
683 <files>
684 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
685 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
686 </files>
687 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]688 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]689 <description>Ethernet PHY Driver API for Cortex-M</description>
690 <files>
691 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
692 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
693 </files>
694 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]695 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]696 <description>USB Device Driver API for Cortex-M</description>
697 <files>
698 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
699 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
700 </files>
701 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]702 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]703 <description>USB Host Driver API for Cortex-M</description>
704 <files>
705 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
706 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
707 </files>
708 </api>
709 </apis>
710
711 <!-- conditions are dependency rules that can apply to a component or an individual file -->
712 <conditions>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]713 <!-- compiler -->
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]714 <condition id="ARMCC6">
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]715 <accept Tcompiler="ARMCC" Toptions="AC6"/>
716 <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]717 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]718 <condition id="ARMCC5">
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]719 <require Tcompiler="ARMCC" Toptions="AC5"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]720 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]721 <condition id="ARMCC">
722 <require Tcompiler="ARMCC"/>
723 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]724 <condition id="GCC">
725 <require Tcompiler="GCC"/>
726 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]727 <condition id="IAR">
728 <require Tcompiler="IAR"/>
729 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]730 <condition id="ARMCC GCC">
731 <accept Tcompiler="ARMCC"/>
732 <accept Tcompiler="GCC"/>
733 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]734 <condition id="ARMCC GCC IAR">
735 <accept Tcompiler="ARMCC"/>
736 <accept Tcompiler="GCC"/>
737 <accept Tcompiler="IAR"/>
738 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]739
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]740 <!-- ARM architecture -->
741 <condition id="ARMv6-M Device">
742 <description>ARMv6-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]743 <accept Dcore="Cortex-M0"/>
744 <accept Dcore="Cortex-M0+"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]745 <accept Dcore="SC000"/>
746 </condition>
747 <condition id="ARMv7-M Device">
748 <description>ARMv7-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]749 <accept Dcore="Cortex-M3"/>
750 <accept Dcore="Cortex-M4"/>
751 <accept Dcore="Cortex-M7"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]752 <accept Dcore="SC300"/>
753 </condition>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]754 <condition id="ARMv8-M Device">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]755 <description>ARMv8-M architecture based device</description>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]756 <accept Dcore="ARMV8MBL"/>
757 <accept Dcore="ARMV8MML"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]758 <accept Dcore="Cortex-M23"/>
759 <accept Dcore="Cortex-M33"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]760 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]761 <condition id="ARMv8-M TZ Device">
762 <description>ARMv8-M architecture based device with TrustZone</description>
763 <require condition="ARMv8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]764 <require Dtz="TZ"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]765 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]766 <condition id="ARMv6_7-M Device">
767 <description>ARMv6_7-M architecture based device</description>
768 <accept condition="ARMv6-M Device"/>
769 <accept condition="ARMv7-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]770 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]771 <condition id="ARMv6_7_8-M Device">
772 <description>ARMv6_7_8-M architecture based device</description>
773 <accept condition="ARMv6-M Device"/>
774 <accept condition="ARMv7-M Device"/>
775 <accept condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]776 </condition>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]777 <condition id="ARMv7-A Device">
778 <description>ARMv7-A architecture based device</description>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]779 <accept Dcore="Cortex-A5"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]780 <accept Dcore="Cortex-A7"/>
781 <accept Dcore="Cortex-A9"/>
782 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]783
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]784 <!-- ARM core -->
785 <condition id="CM0">
786 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
787 <accept Dcore="Cortex-M0"/>
788 <accept Dcore="Cortex-M0+"/>
789 <accept Dcore="SC000"/>
790 </condition>
791 <condition id="CM3">
792 <description>Cortex-M3 or SC300 processor based device</description>
793 <accept Dcore="Cortex-M3"/>
794 <accept Dcore="SC300"/>
795 </condition>
796 <condition id="CM4">
797 <description>Cortex-M4 processor based device</description>
798 <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
799 </condition>
800 <condition id="CM4_FP">
801 <description>Cortex-M4 processor based device using Floating Point Unit</description>
Jonatan Antoni020309a2017-11-09 13:38:36 +0100[diff] [blame]802 <accept Dcore="Cortex-M4" Dfpu="FPU"/>
803 <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
804 <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]805 </condition>
806 <condition id="CM7">
807 <description>Cortex-M7 processor based device</description>
808 <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
809 </condition>
810 <condition id="CM7_FP">
811 <description>Cortex-M7 processor based device using Floating Point Unit</description>
812 <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
813 <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
814 </condition>
815 <condition id="CM7_SP">
816 <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
817 <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
818 </condition>
819 <condition id="CM7_DP">
820 <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
821 <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
822 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]823 <condition id="CM23">
824 <description>Cortex-M23 processor based device</description>
825 <require Dcore="Cortex-M23"/>
826 </condition>
827 <condition id="CM33">
828 <description>Cortex-M33 processor based device</description>
829 <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
830 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]831 <condition id="CM33_FP">
832 <description>Cortex-M33 processor based device using Floating Point Unit</description>
833 <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
834 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]835 <condition id="ARMv8MBL">
836 <description>ARMv8-M Baseline processor based device</description>
837 <require Dcore="ARMV8MBL"/>
838 </condition>
839 <condition id="ARMv8MML">
840 <description>ARMv8-M Mainline processor based device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]841 <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
842 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]843 <condition id="ARMv8MML_FP">
844 <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
845 <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
846 <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]847 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]848
849 <condition id="CM33_NODSP_NOFPU">
850 <description>CM33, no DSP, no FPU</description>
851 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
852 </condition>
853 <condition id="CM33_DSP_NOFPU">
854 <description>CM33, DSP, no FPU</description>
855 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
856 </condition>
857 <condition id="CM33_NODSP_SP">
858 <description>CM33, no DSP, SP FPU</description>
859 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
860 </condition>
861 <condition id="CM33_DSP_SP">
862 <description>CM33, DSP, SP FPU</description>
863 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
864 </condition>
865
866 <condition id="ARMv8MML_NODSP_NOFPU">
867 <description>ARMv8MML, no DSP, no FPU</description>
868 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
869 </condition>
870 <condition id="ARMv8MML_DSP_NOFPU">
871 <description>ARMv8MML, DSP, no FPU</description>
872 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
873 </condition>
874 <condition id="ARMv8MML_NODSP_SP">
875 <description>ARMv8MML, no DSP, SP FPU</description>
876 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]877 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]878 <condition id="ARMv8MML_DSP_SP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]879 <description>ARMv8MML, DSP, SP FPU</description>
880 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]881 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]882
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]883 <condition id="CA5_CA9">
884 <description>Cortex-A5 or Cortex-A9 processor based device</description>
885 <accept Dcore="Cortex-A5"/>
886 <accept Dcore="Cortex-A9"/>
887 </condition>
888
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]889 <condition id="CA7">
890 <description>Cortex-A7 processor based device</description>
891 <accept Dcore="Cortex-A7"/>
892 </condition>
893
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]894 <!-- ARMCC compiler -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]895 <condition id="CA_ARMCC5">
896 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]897 <require condition="ARMv7-A Device"/>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]898 <require condition="ARMCC5"/>
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]899 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]900 <condition id="CA_ARMCC6">
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]901 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
902 <require condition="ARMv7-A Device"/>
903 <require condition="ARMCC6"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]904 </condition>
905
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]906 <condition id="CM0_ARMCC">
907 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
908 <require condition="CM0"/>
909 <require Tcompiler="ARMCC"/>
910 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]911 <condition id="CM0_LE_ARMCC">
912 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]913 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]914 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]915 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]916 <condition id="CM0_BE_ARMCC">
917 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]918 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]919 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]920 </condition>
921
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]922 <condition id="CM3_ARMCC">
923 <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
924 <require condition="CM3"/>
925 <require Tcompiler="ARMCC"/>
926 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]927 <condition id="CM3_LE_ARMCC">
928 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]929 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]930 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]931 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]932 <condition id="CM3_BE_ARMCC">
933 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]934 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]935 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]936 </condition>
937
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]938 <condition id="CM4_ARMCC">
939 <description>Cortex-M4 processor based device for the ARM Compiler</description>
940 <require condition="CM4"/>
941 <require Tcompiler="ARMCC"/>
942 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]943 <condition id="CM4_LE_ARMCC">
944 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]945 <require condition="CM4_ARMCC"/>
946 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]947 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]948 <condition id="CM4_BE_ARMCC">
949 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]950 <require condition="CM4_ARMCC"/>
951 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]952 </condition>
953
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]954 <condition id="CM4_FP_ARMCC">
955 <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
956 <require condition="CM4_FP"/>
957 <require Tcompiler="ARMCC"/>
958 </condition>
959 <condition id="CM4_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]960 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]961 <require condition="CM4_FP_ARMCC"/>
962 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]963 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]964 <condition id="CM4_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]965 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]966 <require condition="CM4_FP_ARMCC"/>
967 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]968 </condition>
969
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]970 <condition id="CM7_ARMCC">
971 <description>Cortex-M7 processor based device for the ARM Compiler</description>
972 <require condition="CM7"/>
973 <require Tcompiler="ARMCC"/>
974 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]975 <condition id="CM7_LE_ARMCC">
976 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]977 <require condition="CM7_ARMCC"/>
978 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]979 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]980 <condition id="CM7_BE_ARMCC">
981 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]982 <require condition="CM7_ARMCC"/>
983 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]984 </condition>
985
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]986 <condition id="CM7_FP_ARMCC">
987 <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
988 <require condition="CM7_FP"/>
989 <require Tcompiler="ARMCC"/>
990 </condition>
991 <condition id="CM7_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]992 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]993 <require condition="CM7_FP_ARMCC"/>
994 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]995 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]996 <condition id="CM7_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]997 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]998 <require condition="CM7_FP_ARMCC"/>
999 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1000 </condition>
1001
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1002 <condition id="CM7_SP_ARMCC">
1003 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1004 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1005 <require Tcompiler="ARMCC"/>
1006 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1007 <condition id="CM7_SP_LE_ARMCC">
1008 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1009 <require condition="CM7_SP_ARMCC"/>
1010 <require Dendian="Little-endian"/>
1011 </condition>
1012 <condition id="CM7_SP_BE_ARMCC">
1013 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1014 <require condition="CM7_SP_ARMCC"/>
1015 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1016 </condition>
1017
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1018 <condition id="CM7_DP_ARMCC">
1019 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1020 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1021 <require Tcompiler="ARMCC"/>
1022 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1023 <condition id="CM7_DP_LE_ARMCC">
1024 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1025 <require condition="CM7_DP_ARMCC"/>
1026 <require Dendian="Little-endian"/>
1027 </condition>
1028 <condition id="CM7_DP_BE_ARMCC">
1029 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1030 <require condition="CM7_DP_ARMCC"/>
1031 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1032 </condition>
1033
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1034 <condition id="CM23_ARMCC">
1035 <description>Cortex-M23 processor based device for the ARM Compiler</description>
1036 <require condition="CM23"/>
1037 <require Tcompiler="ARMCC"/>
1038 </condition>
1039 <condition id="CM23_LE_ARMCC">
1040 <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1041 <require condition="CM23_ARMCC"/>
1042 <require Dendian="Little-endian"/>
1043 </condition>
1044 <condition id="CM23_BE_ARMCC">
1045 <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1046 <require condition="CM23_ARMCC"/>
1047 <require Dendian="Big-endian"/>
1048 </condition>
1049
1050 <condition id="CM33_ARMCC">
1051 <description>Cortex-M33 processor based device for the ARM Compiler</description>
1052 <require condition="CM33"/>
1053 <require Tcompiler="ARMCC"/>
1054 </condition>
1055 <condition id="CM33_LE_ARMCC">
1056 <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1057 <require condition="CM33_ARMCC"/>
1058 <require Dendian="Little-endian"/>
1059 </condition>
1060 <condition id="CM33_BE_ARMCC">
1061 <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1062 <require condition="CM33_ARMCC"/>
1063 <require Dendian="Big-endian"/>
1064 </condition>
1065
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1066 <condition id="CM33_FP_ARMCC">
1067 <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1068 <require condition="CM33_FP"/>
1069 <require Tcompiler="ARMCC"/>
1070 </condition>
1071 <condition id="CM33_FP_LE_ARMCC">
1072 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1073 <require condition="CM33_FP_ARMCC"/>
1074 <require Dendian="Little-endian"/>
1075 </condition>
1076 <condition id="CM33_FP_BE_ARMCC">
1077 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1078 <require condition="CM33_FP_ARMCC"/>
1079 <require Dendian="Big-endian"/>
1080 </condition>
1081
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1082 <condition id="CM33_NODSP_NOFPU_ARMCC">
1083 <description>CM33, no DSP, no FPU, ARM Compiler</description>
1084 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1085 <require Tcompiler="ARMCC"/>
1086 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1087 <condition id="CM33_DSP_NOFPU_ARMCC">
1088 <description>CM33, DSP, no FPU, ARM Compiler</description>
1089 <require condition="CM33_DSP_NOFPU"/>
1090 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1091 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1092 <condition id="CM33_NODSP_SP_ARMCC">
1093 <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1094 <require condition="CM33_NODSP_SP"/>
1095 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1096 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1097 <condition id="CM33_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1098 <description>CM33, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1099 <require condition="CM33_DSP_SP"/>
1100 <require Tcompiler="ARMCC"/>
1101 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1102 <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1103 <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1104 <require condition="CM33_NODSP_NOFPU_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1105 <require Dendian="Little-endian"/>
1106 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1107 <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1108 <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1109 <require condition="CM33_DSP_NOFPU_ARMCC"/>
1110 <require Dendian="Little-endian"/>
1111 </condition>
1112 <condition id="CM33_NODSP_SP_LE_ARMCC">
1113 <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1114 <require condition="CM33_NODSP_SP_ARMCC"/>
1115 <require Dendian="Little-endian"/>
1116 </condition>
1117 <condition id="CM33_DSP_SP_LE_ARMCC">
1118 <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1119 <require condition="CM33_DSP_SP_ARMCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1120 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1121 </condition>
1122
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1123 <condition id="ARMv8MBL_ARMCC">
1124 <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1125 <require condition="ARMv8MBL"/>
1126 <require Tcompiler="ARMCC"/>
1127 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1128 <condition id="ARMv8MBL_LE_ARMCC">
1129 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1130 <require condition="ARMv8MBL_ARMCC"/>
1131 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1132 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1133 <condition id="ARMv8MBL_BE_ARMCC">
1134 <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1135 <require condition="ARMv8MBL_ARMCC"/>
1136 <require Dendian="Big-endian"/>
1137 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1138
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1139 <condition id="ARMv8MML_ARMCC">
1140 <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1141 <require condition="ARMv8MML"/>
1142 <require Tcompiler="ARMCC"/>
1143 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1144 <condition id="ARMv8MML_LE_ARMCC">
1145 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1146 <require condition="ARMv8MML_ARMCC"/>
1147 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1148 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1149 <condition id="ARMv8MML_BE_ARMCC">
1150 <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1151 <require condition="ARMv8MML_ARMCC"/>
1152 <require Dendian="Big-endian"/>
1153 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1154
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1155 <condition id="ARMv8MML_FP_ARMCC">
1156 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1157 <require condition="ARMv8MML_FP"/>
1158 <require Tcompiler="ARMCC"/>
1159 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1160 <condition id="ARMv8MML_FP_LE_ARMCC">
1161 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1162 <require condition="ARMv8MML_FP_ARMCC"/>
1163 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1164 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1165 <condition id="ARMv8MML_FP_BE_ARMCC">
1166 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1167 <require condition="ARMv8MML_FP_ARMCC"/>
1168 <require Dendian="Big-endian"/>
1169 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1170
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1171 <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1172 <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1173 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1174 <require Tcompiler="ARMCC"/>
1175 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1176 <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1177 <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1178 <require condition="ARMv8MML_DSP_NOFPU"/>
1179 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1180 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1181 <condition id="ARMv8MML_NODSP_SP_ARMCC">
1182 <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1183 <require condition="ARMv8MML_NODSP_SP"/>
1184 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1185 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1186 <condition id="ARMv8MML_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1187 <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1188 <require condition="ARMv8MML_DSP_SP"/>
1189 <require Tcompiler="ARMCC"/>
1190 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1191 <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1192 <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1193 <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1194 <require Dendian="Little-endian"/>
1195 </condition>
1196 <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1197 <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1198 <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1199 <require Dendian="Little-endian"/>
1200 </condition>
1201 <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1202 <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1203 <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1204 <require Dendian="Little-endian"/>
1205 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1206 <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1207 <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1208 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1209 <require Dendian="Little-endian"/>
1210 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1211
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1212 <!-- GCC compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1213 <condition id="CA_GCC">
1214 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1215 <require condition="ARMv7-A Device"/>
1216 <require Tcompiler="GCC"/>
1217 </condition>
1218
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1219 <condition id="CM0_GCC">
1220 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1221 <require condition="CM0"/>
1222 <require Tcompiler="GCC"/>
1223 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1224 <condition id="CM0_LE_GCC">
1225 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1226 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1227 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1228 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1229 <condition id="CM0_BE_GCC">
1230 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1231 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1232 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1233 </condition>
1234
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1235 <condition id="CM3_GCC">
1236 <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1237 <require condition="CM3"/>
1238 <require Tcompiler="GCC"/>
1239 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1240 <condition id="CM3_LE_GCC">
1241 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1242 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1243 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1244 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1245 <condition id="CM3_BE_GCC">
1246 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1247 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1248 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1249 </condition>
1250
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1251 <condition id="CM4_GCC">
1252 <description>Cortex-M4 processor based device for the GCC Compiler</description>
1253 <require condition="CM4"/>
1254 <require Tcompiler="GCC"/>
1255 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1256 <condition id="CM4_LE_GCC">
1257 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1258 <require condition="CM4_GCC"/>
1259 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1260 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1261 <condition id="CM4_BE_GCC">
1262 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1263 <require condition="CM4_GCC"/>
1264 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1265 </condition>
1266
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1267 <condition id="CM4_FP_GCC">
1268 <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1269 <require condition="CM4_FP"/>
1270 <require Tcompiler="GCC"/>
1271 </condition>
1272 <condition id="CM4_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1273 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1274 <require condition="CM4_FP_GCC"/>
1275 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1276 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1277 <condition id="CM4_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1278 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1279 <require condition="CM4_FP_GCC"/>
1280 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1281 </condition>
1282
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1283 <condition id="CM7_GCC">
1284 <description>Cortex-M7 processor based device for the GCC Compiler</description>
1285 <require condition="CM7"/>
1286 <require Tcompiler="GCC"/>
1287 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1288 <condition id="CM7_LE_GCC">
1289 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1290 <require condition="CM7_GCC"/>
1291 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1292 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1293 <condition id="CM7_BE_GCC">
1294 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1295 <require condition="CM7_GCC"/>
1296 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1297 </condition>
1298
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1299 <condition id="CM7_FP_GCC">
1300 <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1301 <require condition="CM7_FP"/>
1302 <require Tcompiler="GCC"/>
1303 </condition>
1304 <condition id="CM7_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1305 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1306 <require condition="CM7_FP_GCC"/>
1307 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1308 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1309 <condition id="CM7_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1310 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1311 <require condition="CM7_FP_GCC"/>
1312 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1313 </condition>
1314
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1315 <condition id="CM7_SP_GCC">
1316 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1317 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1318 <require Tcompiler="GCC"/>
1319 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1320 <condition id="CM7_SP_LE_GCC">
1321 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1322 <require condition="CM7_SP_GCC"/>
1323 <require Dendian="Little-endian"/>
1324 </condition>
1325 <condition id="CM7_SP_BE_GCC">
1326 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1327 <require condition="CM7_SP_GCC"/>
1328 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1329 </condition>
1330
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1331 <condition id="CM7_DP_GCC">
1332 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1333 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1334 <require Tcompiler="GCC"/>
1335 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1336 <condition id="CM7_DP_LE_GCC">
1337 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1338 <require condition="CM7_DP_GCC"/>
1339 <require Dendian="Little-endian"/>
1340 </condition>
1341 <condition id="CM7_DP_BE_GCC">
1342 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1343 <require condition="CM7_DP_GCC"/>
1344 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1345 </condition>
1346
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1347 <condition id="CM23_GCC">
1348 <description>Cortex-M23 processor based device for the GCC Compiler</description>
1349 <require condition="CM23"/>
1350 <require Tcompiler="GCC"/>
1351 </condition>
1352 <condition id="CM23_LE_GCC">
1353 <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1354 <require condition="CM23_GCC"/>
1355 <require Dendian="Little-endian"/>
1356 </condition>
1357 <condition id="CM23_BE_GCC">
1358 <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1359 <require condition="CM23_GCC"/>
1360 <require Dendian="Big-endian"/>
1361 </condition>
1362
1363 <condition id="CM33_GCC">
1364 <description>Cortex-M33 processor based device for the GCC Compiler</description>
1365 <require condition="CM33"/>
1366 <require Tcompiler="GCC"/>
1367 </condition>
1368 <condition id="CM33_LE_GCC">
1369 <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1370 <require condition="CM33_GCC"/>
1371 <require Dendian="Little-endian"/>
1372 </condition>
1373 <condition id="CM33_BE_GCC">
1374 <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1375 <require condition="CM33_GCC"/>
1376 <require Dendian="Big-endian"/>
1377 </condition>
1378
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1379 <condition id="CM33_FP_GCC">
1380 <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1381 <require condition="CM33_FP"/>
1382 <require Tcompiler="GCC"/>
1383 </condition>
1384 <condition id="CM33_FP_LE_GCC">
1385 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1386 <require condition="CM33_FP_GCC"/>
1387 <require Dendian="Little-endian"/>
1388 </condition>
1389 <condition id="CM33_FP_BE_GCC">
1390 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1391 <require condition="CM33_FP_GCC"/>
1392 <require Dendian="Big-endian"/>
1393 </condition>
1394
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1395 <condition id="CM33_NODSP_NOFPU_GCC">
1396 <description>CM33, no DSP, no FPU, GCC Compiler</description>
1397 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1398 <require Tcompiler="GCC"/>
1399 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1400 <condition id="CM33_DSP_NOFPU_GCC">
1401 <description>CM33, DSP, no FPU, GCC Compiler</description>
1402 <require condition="CM33_DSP_NOFPU"/>
1403 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1404 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1405 <condition id="CM33_NODSP_SP_GCC">
1406 <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1407 <require condition="CM33_NODSP_SP"/>
1408 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1409 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1410 <condition id="CM33_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1411 <description>CM33, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1412 <require condition="CM33_DSP_SP"/>
1413 <require Tcompiler="GCC"/>
1414 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1415 <condition id="CM33_NODSP_NOFPU_LE_GCC">
1416 <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1417 <require condition="CM33_NODSP_NOFPU_GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1418 <require Dendian="Little-endian"/>
1419 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1420 <condition id="CM33_DSP_NOFPU_LE_GCC">
1421 <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1422 <require condition="CM33_DSP_NOFPU_GCC"/>
1423 <require Dendian="Little-endian"/>
1424 </condition>
1425 <condition id="CM33_NODSP_SP_LE_GCC">
1426 <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1427 <require condition="CM33_NODSP_SP_GCC"/>
1428 <require Dendian="Little-endian"/>
1429 </condition>
1430 <condition id="CM33_DSP_SP_LE_GCC">
1431 <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1432 <require condition="CM33_DSP_SP_GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1433 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1434 </condition>
1435
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1436 <condition id="ARMv8MBL_GCC">
1437 <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1438 <require condition="ARMv8MBL"/>
1439 <require Tcompiler="GCC"/>
1440 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1441 <condition id="ARMv8MBL_LE_GCC">
1442 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1443 <require condition="ARMv8MBL_GCC"/>
1444 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1445 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1446 <condition id="ARMv8MBL_BE_GCC">
1447 <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1448 <require condition="ARMv8MBL_GCC"/>
1449 <require Dendian="Big-endian"/>
1450 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1451
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1452 <condition id="ARMv8MML_GCC">
1453 <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1454 <require condition="ARMv8MML"/>
1455 <require Tcompiler="GCC"/>
1456 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1457 <condition id="ARMv8MML_LE_GCC">
1458 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1459 <require condition="ARMv8MML_GCC"/>
1460 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1461 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1462 <condition id="ARMv8MML_BE_GCC">
1463 <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1464 <require condition="ARMv8MML_GCC"/>
1465 <require Dendian="Big-endian"/>
1466 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1467
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1468 <condition id="ARMv8MML_FP_GCC">
1469 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1470 <require condition="ARMv8MML_FP"/>
1471 <require Tcompiler="GCC"/>
1472 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1473 <condition id="ARMv8MML_FP_LE_GCC">
1474 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1475 <require condition="ARMv8MML_FP_GCC"/>
1476 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1477 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1478 <condition id="ARMv8MML_FP_BE_GCC">
1479 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1480 <require condition="ARMv8MML_FP_GCC"/>
1481 <require Dendian="Big-endian"/>
1482 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1483
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1484 <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1485 <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1486 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1487 <require Tcompiler="GCC"/>
1488 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1489 <condition id="ARMv8MML_DSP_NOFPU_GCC">
1490 <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1491 <require condition="ARMv8MML_DSP_NOFPU"/>
1492 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1493 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1494 <condition id="ARMv8MML_NODSP_SP_GCC">
1495 <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1496 <require condition="ARMv8MML_NODSP_SP"/>
1497 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1498 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1499 <condition id="ARMv8MML_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1500 <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1501 <require condition="ARMv8MML_DSP_SP"/>
1502 <require Tcompiler="GCC"/>
1503 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1504 <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1505 <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1506 <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1507 <require Dendian="Little-endian"/>
1508 </condition>
1509 <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1510 <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1511 <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1512 <require Dendian="Little-endian"/>
1513 </condition>
1514 <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1515 <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1516 <require condition="ARMv8MML_NODSP_SP_GCC"/>
1517 <require Dendian="Little-endian"/>
1518 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1519 <condition id="ARMv8MML_DSP_SP_LE_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1520 <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1521 <require condition="ARMv8MML_DSP_SP_GCC"/>
1522 <require Dendian="Little-endian"/>
1523 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1524
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1525 <!-- IAR compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1526 <condition id="CA_IAR">
1527 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1528 <require condition="ARMv7-A Device"/>
1529 <require Tcompiler="IAR"/>
1530 </condition>
1531
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1532 <condition id="CM0_IAR">
1533 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1534 <require condition="CM0"/>
1535 <require Tcompiler="IAR"/>
1536 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1537 <condition id="CM0_LE_IAR">
1538 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1539 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1540 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1541 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1542 <condition id="CM0_BE_IAR">
1543 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1544 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1545 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1546 </condition>
1547
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1548 <condition id="CM3_IAR">
1549 <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1550 <require condition="CM3"/>
1551 <require Tcompiler="IAR"/>
1552 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1553 <condition id="CM3_LE_IAR">
1554 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1555 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1556 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1557 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1558 <condition id="CM3_BE_IAR">
1559 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1560 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1561 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1562 </condition>
1563
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1564 <condition id="CM4_IAR">
1565 <description>Cortex-M4 processor based device for the IAR Compiler</description>
1566 <require condition="CM4"/>
1567 <require Tcompiler="IAR"/>
1568 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1569 <condition id="CM4_LE_IAR">
1570 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1571 <require condition="CM4_IAR"/>
1572 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1573 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1574 <condition id="CM4_BE_IAR">
1575 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1576 <require condition="CM4_IAR"/>
1577 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1578 </condition>
1579
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1580 <condition id="CM4_FP_IAR">
1581 <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1582 <require condition="CM4_FP"/>
1583 <require Tcompiler="IAR"/>
1584 </condition>
1585 <condition id="CM4_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1586 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1587 <require condition="CM4_FP_IAR"/>
1588 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1589 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1590 <condition id="CM4_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1591 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1592 <require condition="CM4_FP_IAR"/>
1593 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1594 </condition>
1595
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1596 <condition id="CM7_IAR">
1597 <description>Cortex-M7 processor based device for the IAR Compiler</description>
1598 <require condition="CM7"/>
1599 <require Tcompiler="IAR"/>
1600 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1601 <condition id="CM7_LE_IAR">
1602 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1603 <require condition="CM7_IAR"/>
1604 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1605 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1606 <condition id="CM7_BE_IAR">
1607 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1608 <require condition="CM7_IAR"/>
1609 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1610 </condition>
1611
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1612 <condition id="CM7_FP_IAR">
1613 <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1614 <require condition="CM7_FP"/>
1615 <require Tcompiler="IAR"/>
1616 </condition>
1617 <condition id="CM7_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1618 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1619 <require condition="CM7_FP_IAR"/>
1620 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1621 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1622 <condition id="CM7_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1623 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1624 <require condition="CM7_FP_IAR"/>
1625 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1626 </condition>
1627
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1628 <condition id="CM7_SP_IAR">
1629 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1630 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1631 <require Tcompiler="IAR"/>
1632 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1633 <condition id="CM7_SP_LE_IAR">
1634 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1635 <require condition="CM7_SP_IAR"/>
1636 <require Dendian="Little-endian"/>
1637 </condition>
1638 <condition id="CM7_SP_BE_IAR">
1639 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1640 <require condition="CM7_SP_IAR"/>
1641 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1642 </condition>
1643
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1644 <condition id="CM7_DP_IAR">
1645 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1646 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1647 <require Tcompiler="IAR"/>
1648 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1649 <condition id="CM7_DP_LE_IAR">
1650 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1651 <require condition="CM7_DP_IAR"/>
1652 <require Dendian="Little-endian"/>
1653 </condition>
1654 <condition id="CM7_DP_BE_IAR">
1655 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1656 <require condition="CM7_DP_IAR"/>
1657 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1658 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1659
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]1660 <condition id="CM23_IAR">
1661 <description>Cortex-M23 processor based device for the IAR Compiler</description>
1662 <require condition="CM23"/>
1663 <require Tcompiler="IAR"/>
1664 </condition>
1665 <condition id="CM23_LE_IAR">
1666 <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1667 <require condition="CM23_IAR"/>
1668 <require Dendian="Little-endian"/>
1669 </condition>
1670 <condition id="CM23_BE_IAR">
1671 <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1672 <require condition="CM23_IAR"/>
1673 <require Dendian="Big-endian"/>
1674 </condition>
1675
1676 <condition id="CM33_IAR">
1677 <description>Cortex-M33 processor based device for the IAR Compiler</description>
1678 <require condition="CM33"/>
1679 <require Tcompiler="IAR"/>
1680 </condition>
1681 <condition id="CM33_LE_IAR">
1682 <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1683 <require condition="CM33_IAR"/>
1684 <require Dendian="Little-endian"/>
1685 </condition>
1686 <condition id="CM33_BE_IAR">
1687 <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1688 <require condition="CM33_IAR"/>
1689 <require Dendian="Big-endian"/>
1690 </condition>
1691
1692 <condition id="CM33_FP_IAR">
1693 <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1694 <require condition="CM33_FP"/>
1695 <require Tcompiler="IAR"/>
1696 </condition>
1697 <condition id="CM33_FP_LE_IAR">
1698 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1699 <require condition="CM33_FP_IAR"/>
1700 <require Dendian="Little-endian"/>
1701 </condition>
1702 <condition id="CM33_FP_BE_IAR">
1703 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1704 <require condition="CM33_FP_IAR"/>
1705 <require Dendian="Big-endian"/>
1706 </condition>
1707
1708 <condition id="CM33_NODSP_NOFPU_IAR">
1709 <description>CM33, no DSP, no FPU, IAR Compiler</description>
1710 <require condition="CM33_NODSP_NOFPU"/>
1711 <require Tcompiler="IAR"/>
1712 </condition>
1713 <condition id="CM33_DSP_NOFPU_IAR">
1714 <description>CM33, DSP, no FPU, IAR Compiler</description>
1715 <require condition="CM33_DSP_NOFPU"/>
1716 <require Tcompiler="IAR"/>
1717 </condition>
1718 <condition id="CM33_NODSP_SP_IAR">
1719 <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1720 <require condition="CM33_NODSP_SP"/>
1721 <require Tcompiler="IAR"/>
1722 </condition>
1723 <condition id="CM33_DSP_SP_IAR">
1724 <description>CM33, DSP, SP FPU, IAR Compiler</description>
1725 <require condition="CM33_DSP_SP"/>
1726 <require Tcompiler="IAR"/>
1727 </condition>
1728 <condition id="CM33_NODSP_NOFPU_LE_IAR">
1729 <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1730 <require condition="CM33_NODSP_NOFPU_IAR"/>
1731 <require Dendian="Little-endian"/>
1732 </condition>
1733 <condition id="CM33_DSP_NOFPU_LE_IAR">
1734 <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1735 <require condition="CM33_DSP_NOFPU_IAR"/>
1736 <require Dendian="Little-endian"/>
1737 </condition>
1738 <condition id="CM33_NODSP_SP_LE_IAR">
1739 <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1740 <require condition="CM33_NODSP_SP_IAR"/>
1741 <require Dendian="Little-endian"/>
1742 </condition>
1743 <condition id="CM33_DSP_SP_LE_IAR">
1744 <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1745 <require condition="CM33_DSP_SP_IAR"/>
1746 <require Dendian="Little-endian"/>
1747 </condition>
1748
1749 <condition id="ARMv8MBL_IAR">
1750 <description>ARMv8-M Baseline processor based device for the IAR Compiler</description>
1751 <require condition="ARMv8MBL"/>
1752 <require Tcompiler="IAR"/>
1753 </condition>
1754 <condition id="ARMv8MBL_LE_IAR">
1755 <description>ARMv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1756 <require condition="ARMv8MBL_IAR"/>
1757 <require Dendian="Little-endian"/>
1758 </condition>
1759 <condition id="ARMv8MBL_BE_IAR">
1760 <description>ARMv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1761 <require condition="ARMv8MBL_IAR"/>
1762 <require Dendian="Big-endian"/>
1763 </condition>
1764
1765 <condition id="ARMv8MML_IAR">
1766 <description>ARMv8-M Mainline processor based device for the IAR Compiler</description>
1767 <require condition="ARMv8MML"/>
1768 <require Tcompiler="IAR"/>
1769 </condition>
1770 <condition id="ARMv8MML_LE_IAR">
1771 <description>ARMv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1772 <require condition="ARMv8MML_IAR"/>
1773 <require Dendian="Little-endian"/>
1774 </condition>
1775 <condition id="ARMv8MML_BE_IAR">
1776 <description>ARMv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1777 <require condition="ARMv8MML_IAR"/>
1778 <require Dendian="Big-endian"/>
1779 </condition>
1780
1781 <condition id="ARMv8MML_FP_IAR">
1782 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1783 <require condition="ARMv8MML_FP"/>
1784 <require Tcompiler="IAR"/>
1785 </condition>
1786 <condition id="ARMv8MML_FP_LE_IAR">
1787 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1788 <require condition="ARMv8MML_FP_IAR"/>
1789 <require Dendian="Little-endian"/>
1790 </condition>
1791 <condition id="ARMv8MML_FP_BE_IAR">
1792 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1793 <require condition="ARMv8MML_FP_IAR"/>
1794 <require Dendian="Big-endian"/>
1795 </condition>
1796
1797 <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1798 <description>ARMv8MML, no DSP, no FPU, IAR Compiler</description>
1799 <require condition="ARMv8MML_NODSP_NOFPU"/>
1800 <require Tcompiler="IAR"/>
1801 </condition>
1802 <condition id="ARMv8MML_DSP_NOFPU_IAR">
1803 <description>ARMv8MML, DSP, no FPU, IAR Compiler</description>
1804 <require condition="ARMv8MML_DSP_NOFPU"/>
1805 <require Tcompiler="IAR"/>
1806 </condition>
1807 <condition id="ARMv8MML_NODSP_SP_IAR">
1808 <description>ARMv8MML, no DSP, SP FPU, IAR Compiler</description>
1809 <require condition="ARMv8MML_NODSP_SP"/>
1810 <require Tcompiler="IAR"/>
1811 </condition>
1812 <condition id="ARMv8MML_DSP_SP_IAR">
1813 <description>ARMv8MML, DSP, SP FPU, IAR Compiler</description>
1814 <require condition="ARMv8MML_DSP_SP"/>
1815 <require Tcompiler="IAR"/>
1816 </condition>
1817 <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1818 <description>ARMv8MML, little endian, no DSP, no FPU, IAR Compiler</description>
1819 <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1820 <require Dendian="Little-endian"/>
1821 </condition>
1822 <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1823 <description>ARMv8MML, little endian, DSP, no FPU, IAR Compiler</description>
1824 <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1825 <require Dendian="Little-endian"/>
1826 </condition>
1827 <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1828 <description>ARMv8MML, little endian, no DSP, SP FPU, IAR Compiler</description>
1829 <require condition="ARMv8MML_NODSP_SP_IAR"/>
1830 <require Dendian="Little-endian"/>
1831 </condition>
1832 <condition id="ARMv8MML_DSP_SP_LE_IAR">
1833 <description>ARMv8MML, little endian, DSP, SP FPU, IAR Compiler</description>
1834 <require condition="ARMv8MML_DSP_SP_IAR"/>
1835 <require Dendian="Little-endian"/>
1836 </condition>
1837
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1838 <!-- conditions selecting single devices and CMSIS Core -->
1839 <!-- used for component startup, GCC version is used for C-Startup -->
1840 <condition id="ARMCM0 CMSIS">
1841 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1842 <require Dvendor="ARM:82" Dname="ARMCM0"/>
1843 <require Cclass="CMSIS" Cgroup="CORE"/>
1844 </condition>
1845 <condition id="ARMCM0 CMSIS GCC">
1846 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1847 <require condition="ARMCM0 CMSIS"/>
1848 <require condition="GCC"/>
1849 </condition>
1850
1851 <condition id="ARMCM0+ CMSIS">
1852 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
Jonatan Antonic4e9f462017-10-19 16:51:44 +0200[diff] [blame]1853 <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1854 <require Cclass="CMSIS" Cgroup="CORE"/>
1855 </condition>
1856 <condition id="ARMCM0+ CMSIS GCC">
1857 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1858 <require condition="ARMCM0+ CMSIS"/>
1859 <require condition="GCC"/>
1860 </condition>
1861
1862 <condition id="ARMCM3 CMSIS">
1863 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1864 <require Dvendor="ARM:82" Dname="ARMCM3"/>
1865 <require Cclass="CMSIS" Cgroup="CORE"/>
1866 </condition>
1867 <condition id="ARMCM3 CMSIS GCC">
1868 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1869 <require condition="ARMCM3 CMSIS"/>
1870 <require condition="GCC"/>
1871 </condition>
1872
1873 <condition id="ARMCM4 CMSIS">
1874 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1875 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1876 <require Cclass="CMSIS" Cgroup="CORE"/>
1877 </condition>
1878 <condition id="ARMCM4 CMSIS GCC">
1879 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1880 <require condition="ARMCM4 CMSIS"/>
1881 <require condition="GCC"/>
1882 </condition>
1883
1884 <condition id="ARMCM7 CMSIS">
1885 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1886 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1887 <require Cclass="CMSIS" Cgroup="CORE"/>
1888 </condition>
1889 <condition id="ARMCM7 CMSIS GCC">
1890 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1891 <require condition="ARMCM7 CMSIS"/>
1892 <require condition="GCC"/>
1893 </condition>
1894
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1895 <condition id="ARMCM23 CMSIS">
1896 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1897 <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1898 <require Cclass="CMSIS" Cgroup="CORE"/>
1899 </condition>
1900 <condition id="ARMCM23 CMSIS GCC">
1901 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1902 <require condition="ARMCM23 CMSIS"/>
1903 <require condition="GCC"/>
1904 </condition>
1905
1906 <condition id="ARMCM33 CMSIS">
1907 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1908 <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1909 <require Cclass="CMSIS" Cgroup="CORE"/>
1910 </condition>
1911 <condition id="ARMCM33 CMSIS GCC">
1912 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1913 <require condition="ARMCM33 CMSIS"/>
1914 <require condition="GCC"/>
1915 </condition>
1916
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1917 <condition id="ARMSC000 CMSIS">
1918 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1919 <require Dvendor="ARM:82" Dname="ARMSC000"/>
1920 <require Cclass="CMSIS" Cgroup="CORE"/>
1921 </condition>
1922 <condition id="ARMSC000 CMSIS GCC">
1923 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1924 <require condition="ARMSC000 CMSIS"/>
1925 <require condition="GCC"/>
1926 </condition>
1927
1928 <condition id="ARMSC300 CMSIS">
1929 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1930 <require Dvendor="ARM:82" Dname="ARMSC300"/>
1931 <require Cclass="CMSIS" Cgroup="CORE"/>
1932 </condition>
1933 <condition id="ARMSC300 CMSIS GCC">
1934 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1935 <require condition="ARMSC300 CMSIS"/>
1936 <require condition="GCC"/>
1937 </condition>
1938
1939 <condition id="ARMv8MBL CMSIS">
1940 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1941 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1942 <require Cclass="CMSIS" Cgroup="CORE"/>
1943 </condition>
1944 <condition id="ARMv8MBL CMSIS GCC">
1945 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1946 <require condition="ARMv8MBL CMSIS"/>
1947 <require condition="GCC"/>
1948 </condition>
1949
1950 <condition id="ARMv8MML CMSIS">
1951 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1952 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1953 <require Cclass="CMSIS" Cgroup="CORE"/>
1954 </condition>
1955 <condition id="ARMv8MML CMSIS GCC">
1956 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1957 <require condition="ARMv8MML CMSIS"/>
1958 <require condition="GCC"/>
1959 </condition>
1960
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1961 <condition id="ARMCA5 CMSIS">
1962 <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1963 <require Dvendor="ARM:82" Dname="ARMCA5"/>
1964 <require Cclass="CMSIS" Cgroup="CORE"/>
1965 </condition>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]1966
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1967 <condition id="ARMCA7 CMSIS">
1968 <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1969 <require Dvendor="ARM:82" Dname="ARMCA7"/>
1970 <require Cclass="CMSIS" Cgroup="CORE"/>
1971 </condition>
1972
1973 <condition id="ARMCA9 CMSIS">
1974 <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1975 <require Dvendor="ARM:82" Dname="ARMCA9"/>
1976 <require Cclass="CMSIS" Cgroup="CORE"/>
1977 </condition>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]1978
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1979 <!-- CMSIS DSP -->
1980 <condition id="CMSIS DSP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1981 <description>Components required for DSP</description>
1982 <require condition="ARMv6_7_8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1983 <require condition="ARMCC GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1984 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1985 </condition>
1986
1987 <!-- RTOS RTX -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1988 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1989 <description>Components required for RTOS RTX</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1990 <require condition="ARMv6_7-M Device"/>
1991 <require condition="ARMCC GCC IAR"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1992 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1993 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1994 </condition>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]1995 <condition id="RTOS RTX IFX">
1996 <description>Components required for RTOS RTX IFX</description>
1997 <require condition="ARMv6_7-M Device"/>
1998 <require condition="ARMCC GCC IAR"/>
1999 <require Dvendor="Infineon:7" Dname="XMC4*"/>
2000 <require Cclass="Device" Cgroup="Startup"/>
2001 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
2002 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2003 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2004 <description>Components required for RTOS RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2005 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2006 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2007 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2008 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2009 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2010 <description>Components required for RTOS2 RTX5</description>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2011 <require condition="ARMv6_7_8-M Device"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]2012 <require condition="ARMCC GCC IAR"/>
2013 <require Cclass="CMSIS" Cgroup="CORE"/>
2014 <require Cclass="Device" Cgroup="Startup"/>
2015 </condition>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2016 <condition id="RTOS2 RTX5 v7-A">
2017 <description>Components required for RTOS2 RTX5 v7-A</description>
2018 <require condition="ARMv7-A Device"/>
2019 <require condition="ARMCC GCC IAR"/>
2020 <require Cclass="CMSIS" Cgroup="CORE"/>
2021 <require Cclass="Device" Cgroup="Startup"/>
2022 <require Cclass="Device" Cgroup="OS Tick"/>
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2023 <require Cclass="Device" Cgroup="IRQ Controller"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2024 </condition>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]2025 <condition id="RTOS2 RTX5 Lib">
2026 <description>Components required for RTOS2 RTX5 Library</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2027 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2028 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2029 <require Cclass="CMSIS" Cgroup="CORE"/>
2030 <require Cclass="Device" Cgroup="Startup"/>
2031 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2032 <condition id="RTOS2 RTX5 NS">
2033 <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2034 <require condition="ARMv8-M TZ Device"/>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]2035 <require condition="ARMCC GCC IAR"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2036 <require Cclass="CMSIS" Cgroup="CORE"/>
2037 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2038 </condition>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2039
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2040 <!-- OS Tick -->
2041 <condition id="OS Tick PTIM">
2042 <description>Components required for OS Tick Private Timer</description>
2043 <require condition="CA5_CA9"/>
2044 <require Cclass="Device" Cgroup="IRQ Controller"/>
2045 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2046
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]2047 <condition id="OS Tick GTIM">
2048 <description>Components required for OS Tick Generic Physical Timer</description>
2049 <require condition="CA7"/>
2050 <require Cclass="Device" Cgroup="IRQ Controller"/>
2051 </condition>
2052
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2053 </conditions>
2054
2055 <components>
2056 <!-- CMSIS-Core component -->
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2057 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2" condition="ARMv6_7_8-M Device" >
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2058 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2059 <files>
2060 <!-- CPU independent -->
2061 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
2062 <file category="include" name="CMSIS/Include/"/>
Robert Rostoharb2e07162016-11-04 10:43:56 +0100[diff] [blame]2063 <file category="header" name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]2064 <!-- Code template -->
Robert Rostohar0e71e882016-11-16 19:03:44 +0100[diff] [blame]2065 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c" version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
Robert Rostohar71f4dcf2016-11-16 19:06:01 +0100[diff] [blame]2066 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2067 </files>
2068 </component>
2069
Jonatan Antoni44c39182017-10-12 16:40:01 +0200[diff] [blame]2070 <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.1" condition="ARMv7-A Device" >
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2071 <description>CMSIS-CORE for Cortex-A</description>
2072 <files>
2073 <!-- CPU independent -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2074 <file category="doc" name="CMSIS/Documentation/Core_A/html/index.html"/>
brondanib6bdb2c2017-03-02 16:15:52 +0100[diff] [blame]2075 <file category="include" name="CMSIS/Core_A/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2076 </files>
2077 </component>
2078
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2079 <!-- CMSIS-Startup components -->
2080 <!-- Cortex-M0 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2081 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2082 <description>System and Startup for Generic ARM Cortex-M0 device</description>
2083 <files>
2084 <!-- include folder / device header file -->
2085 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2086 <!-- startup / system file -->
2087 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2088 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2089 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2090 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2091 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
2092 </files>
2093 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2094 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2095 <description>System and Startup for Generic ARM Cortex-M0 device</description>
2096 <files>
2097 <!-- include folder / device header file -->
2098 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2099 <!-- startup / system file -->
2100 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2101 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2102 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
2103 </files>
2104 </component>
2105
2106 <!-- Cortex-M0+ -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2107 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2108 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
2109 <files>
2110 <!-- include folder / device header file -->
2111 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2112 <!-- startup / system file -->
2113 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2114 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2115 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2116 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2117 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
2118 </files>
2119 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2120 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2121 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
2122 <files>
2123 <!-- include folder / device header file -->
2124 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2125 <!-- startup / system file -->
2126 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2127 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2128 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
2129 </files>
2130 </component>
2131
2132 <!-- Cortex-M3 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2133 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2134 <description>System and Startup for Generic ARM Cortex-M3 device</description>
2135 <files>
2136 <!-- include folder / device header file -->
2137 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2138 <!-- startup / system file -->
2139 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2140 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2141 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2142 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2143 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
2144 </files>
2145 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2146 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2147 <description>System and Startup for Generic ARM Cortex-M3 device</description>
2148 <files>
2149 <!-- include folder / device header file -->
2150 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2151 <!-- startup / system file -->
2152 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2153 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2154 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
2155 </files>
2156 </component>
2157
2158 <!-- Cortex-M4 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2159 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2160 <description>System and Startup for Generic ARM Cortex-M4 device</description>
2161 <files>
2162 <!-- include folder / device header file -->
2163 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2164 <!-- startup / system file -->
2165 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2166 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2167 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2168 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2169 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
2170 </files>
2171 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2172 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2173 <description>System and Startup for Generic ARM Cortex-M4 device</description>
2174 <files>
2175 <!-- include folder / device header file -->
2176 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2177 <!-- startup / system file -->
2178 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2179 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2180 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
2181 </files>
2182 </component>
2183
2184 <!-- Cortex-M7 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2185 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2186 <description>System and Startup for Generic ARM Cortex-M7 device</description>
2187 <files>
2188 <!-- include folder / device header file -->
2189 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
2190 <!-- startup / system file -->
2191 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2192 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2193 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2194 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2195 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
2196 </files>
2197 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2198 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2199 <description>System and Startup for Generic ARM Cortex-M7 device</description>
2200 <files>
2201 <!-- include folder / device header file -->
2202 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
2203 <!-- startup / system file -->
2204 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2205 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2206 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
2207 </files>
2208 </component>
2209
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2210 <!-- Cortex-M23 -->
2211 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS">
2212 <description>System and Startup for Generic ARM Cortex-M23 device</description>
2213 <files>
2214 <!-- include folder / device header file -->
2215 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2216 <!-- startup / system file -->
2217 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2218 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2219 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antonie1454c12017-09-11 09:23:17 +0200[diff] [blame]2220 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2221 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2222 <!-- SAU configuration -->
2223 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2224 </files>
2225 </component>
2226 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2227 <description>System and Startup for Generic ARM Cortex-M23 device</description>
2228 <files>
2229 <!-- include folder / device header file -->
2230 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2231 <!-- startup / system file -->
2232 <file category="sourceC" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2233 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2234 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
2235 <!-- SAU configuration -->
2236 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2237 </files>
2238 </component>
2239
2240 <!-- Cortex-M33 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2241 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2242 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2243 <files>
2244 <!-- include folder / device header file -->
2245 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2246 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2247 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
2248 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
2249 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antonie1454c12017-09-11 09:23:17 +0200[diff] [blame]2250 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s" version="1.0.0" attr="config" condition="IAR"/>
2251 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2252 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2253 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2254 </files>
2255 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2256 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2257 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2258 <files>
2259 <!-- include folder / device header file -->
2260 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2261 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2262 <file category="sourceC" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
2263 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2264 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2265 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2266 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2267 </files>
2268 </component>
2269
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2270 <!-- Cortex-SC000 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2271 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2272 <description>System and Startup for Generic ARM SC000 device</description>
2273 <files>
2274 <!-- include folder / device header file -->
2275 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2276 <!-- startup / system file -->
2277 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2278 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2279 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2280 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2281 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2282 </files>
2283 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2284 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2285 <description>System and Startup for Generic ARM SC000 device</description>
2286 <files>
2287 <!-- include folder / device header file -->
2288 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2289 <!-- startup / system file -->
2290 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2291 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2292 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2293 </files>
2294 </component>
2295
2296 <!-- Cortex-SC300 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2297 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2298 <description>System and Startup for Generic ARM SC300 device</description>
2299 <files>
2300 <!-- include folder / device header file -->
2301 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2302 <!-- startup / system file -->
2303 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2304 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2305 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2306 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2307 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2308 </files>
2309 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2310 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2311 <description>System and Startup for Generic ARM SC300 device</description>
2312 <files>
2313 <!-- include folder / device header file -->
2314 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2315 <!-- startup / system file -->
2316 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2317 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2318 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2319 </files>
2320 </component>
2321
2322 <!-- ARMv8MBL -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2323 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2324 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2325 <files>
2326 <!-- include folder / device header file -->
2327 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2328 <!-- startup / system file -->
2329 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2330 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2331 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2332 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2333 <!-- SAU configuration -->
2334 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2335 </files>
2336 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2337 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2338 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2339 <files>
2340 <!-- include folder / device header file -->
2341 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2342 <!-- startup / system file -->
2343 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2344 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2345 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2346 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2347 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2348 </files>
2349 </component>
2350
2351 <!-- ARMv8MML -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2352 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2353 <description>System and Startup for Generic ARM ARMv8MML device</description>
2354 <files>
2355 <!-- include folder / device header file -->
2356 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2357 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2358 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2359 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2360 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2361 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2362 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2363 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2364 </files>
2365 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2366 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2367 <description>System and Startup for Generic ARM ARMv8MML device</description>
2368 <files>
2369 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2370 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2371 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2372 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2373 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2374 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2375 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2376 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2377 </files>
2378 </component>
2379
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2380 <!-- Cortex-A5 -->
2381 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA5 CMSIS">
2382 <description>System and Startup for Generic ARM Cortex-A5 device</description>
2383 <files>
2384 <!-- include folder / device header file -->
2385 <file category="include" name="Device/ARM/ARMCA5/Include/"/>
2386 <!-- startup / system / mmu files -->
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2387 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2388 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
2389 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2390 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antoni7e5e24f2017-09-12 16:40:22 +0200[diff] [blame]2391 <file category="sourceC" name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2392 <file category="other" name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2393 <file category="sourceAsm" name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2394 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf" version="1.0.0" attr="config" condition="IAR"/>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2395 <file category="sourceC" name="Device/ARM/ARMCA5/Source/system_ARMCA5.c" version="1.0.0" attr="config"/>
2396 <file category="sourceC" name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c" version="1.0.0" attr="config"/>
2397 <file category="header" name="Device/ARM/ARMCA5/Include/system_ARMCA5.h" version="1.0.0" attr="config"/>
2398 <file category="header" name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h" version="1.0.0" attr="config"/>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2399
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2400 </files>
2401 </component>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2402
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2403 <!-- Cortex-A7 -->
2404 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA7 CMSIS">
2405 <description>System and Startup for Generic ARM Cortex-A7 device</description>
2406 <files>
2407 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2408 <file category="include" name="Device/ARM/ARMCA7/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2409 <!-- startup / system / mmu files -->
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2410 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2411 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
2412 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2413 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antoni7e5e24f2017-09-12 16:40:22 +0200[diff] [blame]2414 <file category="sourceC" name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2415 <file category="other" name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2416 <file category="sourceAsm" name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2417 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf" version="1.0.0" attr="config" condition="IAR"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2418 <file category="sourceC" name="Device/ARM/ARMCA7/Source/system_ARMCA7.c" version="1.0.0" attr="config"/>
2419 <file category="sourceC" name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2420 <file category="header" name="Device/ARM/ARMCA7/Include/system_ARMCA7.h" version="1.0.0" attr="config"/>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2421 <file category="header" name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2422 </files>
2423 </component>
2424
2425 <!-- Cortex-A9 -->
Jonatan Antonib27a4122017-08-08 13:30:19 +0200[diff] [blame]2426 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCA9 CMSIS">
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2427 <description>System and Startup for Generic ARM Cortex-A9 device</description>
2428 <files>
2429 <!-- include folder / device header file -->
2430 <file category="include" name="Device/ARM/ARMCA9/Include/"/>
2431 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2432 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2433 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2434 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2435 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antonib27a4122017-08-08 13:30:19 +0200[diff] [blame]2436 <file category="sourceC" name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]2437 <file category="other" name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld" version="1.0.0" attr="config" condition="GCC"/>
2438 <file category="sourceAsm" name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2439 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf" version="1.0.0" attr="config" condition="IAR"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2440 <file category="sourceC" name="Device/ARM/ARMCA9/Source/system_ARMCA9.c" version="1.0.0" attr="config"/>
2441 <file category="sourceC" name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2442 <file category="header" name="Device/ARM/ARMCA9/Include/system_ARMCA9.h" version="1.0.0" attr="config"/>
2443 <file category="header" name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2444 </files>
2445 </component>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2446
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2447 <!-- IRQ Controller -->
2448 <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2449 <description>IRQ Controller implementation using GIC</description>
2450 <files>
2451 <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2452 </files>
2453 </component>
2454
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]2455 <!-- OS Tick -->
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2456 <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]2457 <description>OS Tick implementation using Private Timer</description>
2458 <files>
2459 <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2460 </files>
2461 </component>
2462
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]2463 <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick GTIM">
2464 <description>OS Tick implementation using Generic Physical Timer</description>
2465 <files>
2466 <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2467 </files>
2468 </component>
2469
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2470 <!-- CMSIS-DSP component -->
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2471 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2472 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2473 <files>
2474 <!-- CPU independent -->
2475 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2476 <file category="header" name="CMSIS/Include/arm_math.h"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2477
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2478 <!-- CPU and Compiler dependent -->
2479 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2480 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2481 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2482 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2483 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2484 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2485 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2486 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2487 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2488 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2489 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2490 <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2491 <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2492 <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2493 <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2494
2495 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2496 <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2497 <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2498 <file category="library" condition="CM33_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2499 <file category="library" condition="CM33_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2500 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2501 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2502 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2503 <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2504 <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2505 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2506 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2507
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2508 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2509 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2510 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2511 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2512 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2513 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2514 <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2515 <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2516
2517 <file category="library" condition="CM23_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2518 <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2519 <file category="library" condition="CM33_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2520 <file category="library" condition="CM33_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2521 <file category="library" condition="CM33_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2522 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2523 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2524 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2525 <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2526 <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2527 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2528 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2529
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2530 </files>
2531 </component>
2532
2533 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2534 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2535 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2536 <RTE_Components_h>
2537 <!-- the following content goes into file 'RTE_Components.h' -->
2538 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2539 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2540 </RTE_Components_h>
2541 <files>
2542 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]2543 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2544 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2545 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2546
2547 <!-- RTX templates -->
2548 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2549 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2550 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2551 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2552 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2553 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2554 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2555 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2556 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2557 <!-- tool-chain specific template file -->
2558 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2559 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2560 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2561
2562 <!-- CPU and Compiler dependent -->
2563 <!-- ARMCC -->
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame^]2564 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2565 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2566 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2567 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2568 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame^]2569 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2570 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame^]2571 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2572 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2573 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2574 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2575 <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2576 <!-- GCC -->
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame^]2577 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2578 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2579 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2580 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2581 <file category="library" condition="CM4_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame^]2582 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2583 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame^]2584 <file category="library" condition="CM4_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2585 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2586 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2587 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2588 <file category="library" condition="CM7_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2589 <!-- IAR -->
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame^]2590 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2591 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2592 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2593 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2594 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2595 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2596 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2597 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2598 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2599 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2600 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2601 <file category="library" condition="CM7_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2602 </files>
2603 </component>
2604 <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2605 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2606 <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2607 <RTE_Components_h>
2608 <!-- the following content goes into file 'RTE_Components.h' -->
2609 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2610 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2611 </RTE_Components_h>
2612 <files>
2613 <!-- CPU independent -->
2614 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2615 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2616 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2617
2618 <!-- RTX templates -->
2619 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2620 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2621 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2622 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2623 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2624 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2625 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2626 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2627 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2628 <!-- tool-chain specific template file -->
2629 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2630 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2631 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2632
2633 <!-- CPU and Compiler dependent -->
2634 <!-- ARMCC -->
2635 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2636 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2637 <!-- GCC -->
2638 <file category="library" condition="CM4_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2639 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2640 <!-- IAR -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2641 </files>
2642 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2643
2644 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostohar63777bc2017-10-30 08:25:06 +0100[diff] [blame]2645 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.3" Capiversion="1.0.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2646 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2647 <RTE_Components_h>
2648 <!-- the following content goes into file 'RTE_Components.h' -->
2649 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2650 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
2651 </RTE_Components_h>
2652 <files>
2653 <!-- RTX header file -->
2654 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2655 <!-- RTX compatibility module for API V1 -->
2656 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2657 </files>
2658 </component>
2659
2660 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostoharb7396042017-11-06 10:37:15 +0100[diff] [blame]2661 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 Lib">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2662 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2663 <RTE_Components_h>
2664 <!-- the following content goes into file 'RTE_Components.h' -->
2665 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2666 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2667 </RTE_Components_h>
2668 <files>
2669 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2670 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2671
2672 <!-- RTX header files -->
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2673 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2674
2675 <!-- RTX configuration -->
Robert Rostohard20b8aa2017-11-06 16:03:14 +0100[diff] [blame]2676 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.2.0"/>
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2677 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2678
2679 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2680 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2681 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2682 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2683 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2684 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2685 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2686 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2687 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2688 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2689 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2690
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2691 <!-- RTX library configuration -->
2692 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2693
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2694 <!-- RTX libraries (CPU and Compiler dependent) -->
2695 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2696 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
2697 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2698 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2699 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2700 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2701 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2702 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2703 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2704 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2705 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2706 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2707 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
2708 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2709 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2710 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2711 <file category="library" condition="CM4_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2712 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2713 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2714 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2715 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2716 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2717 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2718 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2719 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2720 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2721 <!-- IAR -->
2722 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2723 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2724 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2725 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2726 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2727 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2728 </files>
2729 </component>
Robert Rostohar17243e62017-10-30 11:31:45 +0100[diff] [blame]2730 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2731 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2732 <RTE_Components_h>
2733 <!-- the following content goes into file 'RTE_Components.h' -->
2734 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2735 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2736 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2737 </RTE_Components_h>
2738 <files>
2739 <!-- RTX documentation -->
2740 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2741
2742 <!-- RTX header files -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2743 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2744
2745 <!-- RTX configuration -->
Robert Rostohard20b8aa2017-11-06 16:03:14 +0100[diff] [blame]2746 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.2.0"/>
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2747 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2748
2749 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2750 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2751 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2752 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2753 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2754 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2755 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2756 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2757 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame^]2758 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2759 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2760
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2761 <!-- RTX library configuration -->
2762 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2763
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2764 <!-- RTX libraries (CPU and Compiler dependent) -->
2765 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2766 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2767 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2768 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2769 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2770 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2771 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2772 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2773 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2774 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2775 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2776 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2777 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2778 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2779 </files>
2780 </component>
Robert Rostohar17243e62017-10-30 11:31:45 +0100[diff] [blame]2781 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2782 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2783 <RTE_Components_h>
2784 <!-- the following content goes into file 'RTE_Components.h' -->
2785 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2786 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2787 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2788 </RTE_Components_h>
2789 <files>
2790 <!-- RTX documentation -->
2791 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2792
2793 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2794 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2795
2796 <!-- RTX configuration -->
Robert Rostohard20b8aa2017-11-06 16:03:14 +0100[diff] [blame]2797 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.2.0"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2798 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2799
2800 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2801 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2802 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2803 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2804 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2805 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2806 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2807 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2808 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame^]2809 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2810 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2811
2812 <!-- RTX sources (core) -->
2813 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2814 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2815 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2816 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2817 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2818 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2819 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2820 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2821 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2822 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2823 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2824 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2825 <!-- RTX sources (library configuration) -->
2826 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2827 <!-- RTX sources (handlers ARMCC) -->
2828 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
2829 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
2830 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
2831 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
2832 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
2833 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2834 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
2835 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
2836 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2837 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
2838 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
2839 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
2840 <!-- RTX sources (handlers GCC) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2841 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S" condition="CM0_GCC"/>
2842 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM3_GCC"/>
2843 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM4_GCC"/>
2844 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM4_FP_GCC"/>
2845 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM7_GCC"/>
2846 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM7_FP_GCC"/>
2847 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
2848 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
2849 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2850 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
2851 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
2852 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2853 <!-- RTX sources (handlers IAR) -->
2854 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s" condition="CM0_IAR"/>
2855 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM3_IAR"/>
2856 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM4_IAR"/>
2857 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM4_FP_IAR"/>
2858 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM7_IAR"/>
2859 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM7_FP_IAR"/>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]2860 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
2861 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
2862 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
2863 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
2864 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
2865 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2866 <!-- OS Tick (SysTick) -->
2867 <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2868 </files>
2869 </component>
Robert Rostohar17243e62017-10-30 11:31:45 +0100[diff] [blame]2870 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 v7-A">
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2871 <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2872 <RTE_Components_h>
2873 <!-- the following content goes into file 'RTE_Components.h' -->
2874 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2875 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
2876 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
2877 </RTE_Components_h>
2878 <files>
2879 <!-- RTX documentation -->
2880 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2881
2882 <!-- RTX header files -->
2883 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2884
2885 <!-- RTX configuration -->
Robert Rostohard20b8aa2017-11-06 16:03:14 +0100[diff] [blame]2886 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.2.0"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2887 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
2888
2889 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/handlers.c" version="5.1.0"/>
2890
2891 <!-- RTX templates -->
2892 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2893 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2894 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2895 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2896 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2897 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2898 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2899 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame^]2900 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2901 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2902
2903 <!-- RTX sources (core) -->
2904 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2905 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2906 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2907 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2908 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2909 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2910 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2911 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2912 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2913 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2914 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2915 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2916 <!-- RTX sources (library configuration) -->
2917 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2918 <!-- RTX sources (handlers ARMCC) -->
2919 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s" condition="CA_ARMCC5"/>
2920 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_ARMCC6"/>
2921 <!-- RTX sources (handlers GCC) -->
2922 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_GCC"/>
2923 <!-- RTX sources (handlers IAR) -->
2924 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s" condition="CA_IAR"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2925 </files>
2926 </component>
Robert Rostohar17243e62017-10-30 11:31:45 +0100[diff] [blame]2927 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2928 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2929 <RTE_Components_h>
2930 <!-- the following content goes into file 'RTE_Components.h' -->
2931 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2932 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2933 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2934 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2935 </RTE_Components_h>
2936 <files>
2937 <!-- RTX documentation -->
2938 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2939
2940 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2941 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2942
2943 <!-- RTX configuration -->
Robert Rostohard20b8aa2017-11-06 16:03:14 +0100[diff] [blame]2944 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.2.0"/>
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2945 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2946
2947 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2948 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2949 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2950 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2951 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2952 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2953 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2954 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2955 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Jonatan Antoni1434f1f2017-11-16 16:55:57 +0100[diff] [blame^]2956 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2957 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2958
2959 <!-- RTX sources (core) -->
2960 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2961 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2962 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2963 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2964 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2965 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2966 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2967 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2968 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2969 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2970 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2971 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2972 <!-- RTX sources (library configuration) -->
2973 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2974 <!-- RTX sources (ARMCC handlers) -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2975 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
2976 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
2977 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2978 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
2979 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
2980 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
2981 <!-- RTX sources (GCC handlers) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2982 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="CM23_GCC"/>
2983 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="CM33_GCC"/>
2984 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2985 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="ARMv8MBL_GCC"/>
2986 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="ARMv8MML_GCC"/>
2987 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
Jonatan Antoni65d89742017-11-08 11:28:47 +0100[diff] [blame]2988 <!-- RTX sources (IAR handlers) -->
Jonatan Antoni1be0aea2017-11-10 10:01:03 +0100[diff] [blame]2989 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="CM23_IAR"/>
2990 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_IAR"/>
2991 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_FP_IAR"/>
2992 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="ARMv8MBL_IAR"/>
2993 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_IAR"/>
2994 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_FP_IAR"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2995 <!-- OS Tick (SysTick) -->
2996 <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2997 </files>
2998 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2999
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3000 </components>
3001
3002 <boards>
3003 <board name="uVision Simulator" vendor="Keil">
3004 <description>uVision Simulator</description>
3005 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3006 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
Jonatan Antonic4e9f462017-10-19 16:51:44 +0200[diff] [blame]3007 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3008 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]3009 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3010 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]3011 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]3012 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]3013 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3014 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3015 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3016 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3017 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3018 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
Joachim Krech4a03e6d2017-02-06 13:17:39 +0100[diff] [blame]3019 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]3020 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3021 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3022 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3023 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
Daniel Brondanifaaa48f2017-07-31 14:00:54 +0200[diff] [blame]3024 </board>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]3025
Daniel Brondanifaaa48f2017-07-31 14:00:54 +0200[diff] [blame]3026 <board name="Fixed Virtual Platform" vendor="ARM">
Daniel Brondani040d63b2017-08-01 16:49:57 +0200[diff] [blame]3027 <description>Fixed Virtual Platform</description>
Daniel Brondanifaaa48f2017-07-31 14:00:54 +0200[diff] [blame]3028 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3029 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3030 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3031 </board>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3032 </boards>
3033
3034 <examples>
3035 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
3036 <description>DSP_Lib Class Marks example</description>
3037 <board name="uVision Simulator" vendor="Keil"/>
3038 <project>
3039 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3040 </project>
3041 <attributes>
3042 <component Cclass="CMSIS" Cgroup="CORE"/>
3043 <component Cclass="CMSIS" Cgroup="DSP"/>
3044 <component Cclass="Device" Cgroup="Startup"/>
3045 <category>Getting Started</category>
3046 </attributes>
3047 </example>
3048
3049 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
3050 <description>DSP_Lib Convolution example</description>
3051 <board name="uVision Simulator" vendor="Keil"/>
3052 <project>
3053 <environment name="uv" load="arm_convolution_example.uvprojx"/>
3054 </project>
3055 <attributes>
3056 <component Cclass="CMSIS" Cgroup="CORE"/>
3057 <component Cclass="CMSIS" Cgroup="DSP"/>
3058 <component Cclass="Device" Cgroup="Startup"/>
3059 <category>Getting Started</category>
3060 </attributes>
3061 </example>
3062
3063 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
3064 <description>DSP_Lib Dotproduct example</description>
3065 <board name="uVision Simulator" vendor="Keil"/>
3066 <project>
3067 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3068 </project>
3069 <attributes>
3070 <component Cclass="CMSIS" Cgroup="CORE"/>
3071 <component Cclass="CMSIS" Cgroup="DSP"/>
3072 <component Cclass="Device" Cgroup="Startup"/>
3073 <category>Getting Started</category>
3074 </attributes>
3075 </example>
3076
3077 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
3078 <description>DSP_Lib FFT Bin example</description>
3079 <board name="uVision Simulator" vendor="Keil"/>
3080 <project>
3081 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3082 </project>
3083 <attributes>
3084 <component Cclass="CMSIS" Cgroup="CORE"/>
3085 <component Cclass="CMSIS" Cgroup="DSP"/>
3086 <component Cclass="Device" Cgroup="Startup"/>
3087 <category>Getting Started</category>
3088 </attributes>
3089 </example>
3090
3091 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
3092 <description>DSP_Lib FIR example</description>
3093 <board name="uVision Simulator" vendor="Keil"/>
3094 <project>
3095 <environment name="uv" load="arm_fir_example.uvprojx"/>
3096 </project>
3097 <attributes>
3098 <component Cclass="CMSIS" Cgroup="CORE"/>
3099 <component Cclass="CMSIS" Cgroup="DSP"/>
3100 <component Cclass="Device" Cgroup="Startup"/>
3101 <category>Getting Started</category>
3102 </attributes>
3103 </example>
3104
3105 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
3106 <description>DSP_Lib Graphic Equalizer example</description>
3107 <board name="uVision Simulator" vendor="Keil"/>
3108 <project>
3109 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3110 </project>
3111 <attributes>
3112 <component Cclass="CMSIS" Cgroup="CORE"/>
3113 <component Cclass="CMSIS" Cgroup="DSP"/>
3114 <component Cclass="Device" Cgroup="Startup"/>
3115 <category>Getting Started</category>
3116 </attributes>
3117 </example>
3118
3119 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
3120 <description>DSP_Lib Linear Interpolation example</description>
3121 <board name="uVision Simulator" vendor="Keil"/>
3122 <project>
3123 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3124 </project>
3125 <attributes>
3126 <component Cclass="CMSIS" Cgroup="CORE"/>
3127 <component Cclass="CMSIS" Cgroup="DSP"/>
3128 <component Cclass="Device" Cgroup="Startup"/>
3129 <category>Getting Started</category>
3130 </attributes>
3131 </example>
3132
3133 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
3134 <description>DSP_Lib Matrix example</description>
3135 <board name="uVision Simulator" vendor="Keil"/>
3136 <project>
3137 <environment name="uv" load="arm_matrix_example.uvprojx"/>
3138 </project>
3139 <attributes>
3140 <component Cclass="CMSIS" Cgroup="CORE"/>
3141 <component Cclass="CMSIS" Cgroup="DSP"/>
3142 <component Cclass="Device" Cgroup="Startup"/>
3143 <category>Getting Started</category>
3144 </attributes>
3145 </example>
3146
3147 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
3148 <description>DSP_Lib Signal Convergence example</description>
3149 <board name="uVision Simulator" vendor="Keil"/>
3150 <project>
3151 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3152 </project>
3153 <attributes>
3154 <component Cclass="CMSIS" Cgroup="CORE"/>
3155 <component Cclass="CMSIS" Cgroup="DSP"/>
3156 <component Cclass="Device" Cgroup="Startup"/>
3157 <category>Getting Started</category>
3158 </attributes>
3159 </example>
3160
3161 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
3162 <description>DSP_Lib Sinus/Cosinus example</description>
3163 <board name="uVision Simulator" vendor="Keil"/>
3164 <project>
3165 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3166 </project>
3167 <attributes>
3168 <component Cclass="CMSIS" Cgroup="CORE"/>
3169 <component Cclass="CMSIS" Cgroup="DSP"/>
3170 <component Cclass="Device" Cgroup="Startup"/>
3171 <category>Getting Started</category>
3172 </attributes>
3173 </example>
3174
3175 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
3176 <description>DSP_Lib Variance example</description>
3177 <board name="uVision Simulator" vendor="Keil"/>
3178 <project>
3179 <environment name="uv" load="arm_variance_example.uvprojx"/>
3180 </project>
3181 <attributes>
3182 <component Cclass="CMSIS" Cgroup="CORE"/>
3183 <component Cclass="CMSIS" Cgroup="DSP"/>
3184 <component Cclass="Device" Cgroup="Startup"/>
3185 <category>Getting Started</category>
3186 </attributes>
3187 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]3188
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3189 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]3190 <description>CMSIS-RTOS2 Blinky example</description>
3191 <board name="uVision Simulator" vendor="Keil"/>
3192 <project>
3193 <environment name="uv" load="Blinky.uvprojx"/>
3194 </project>
3195 <attributes>
3196 <component Cclass="CMSIS" Cgroup="CORE"/>
3197 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3198 <component Cclass="Device" Cgroup="Startup"/>
3199 <category>Getting Started</category>
3200 </attributes>
3201 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]3202
Robert Rostohare13e4702016-11-07 15:23:44 +0100[diff] [blame]3203 <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
Matthias Hertel4b70ae42016-11-07 14:14:59 +0100[diff] [blame]3204 <description>CMSIS-RTOS2 mixed API v1 and v2</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3205 <board name="uVision Simulator" vendor="Keil"/>
3206 <project>
3207 <environment name="uv" load="Blinky.uvprojx"/>
3208 </project>
3209 <attributes>
3210 <component Cclass="CMSIS" Cgroup="CORE"/>
3211 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3212 <component Cclass="Device" Cgroup="Startup"/>
3213 <category>Getting Started</category>
3214 </attributes>
3215 </example>
3216
Jonatan Antoni401391f2017-08-30 16:52:33 +0200[diff] [blame]3217 <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3218 <description>CMSIS-RTOS2 Message Queue Example</description>
3219 <board name="uVision Simulator" vendor="Keil"/>
3220 <project>
3221 <environment name="uv" load="MsqQueue.uvprojx"/>
3222 </project>
3223 <attributes>
3224 <component Cclass="CMSIS" Cgroup="CORE"/>
3225 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3226 <component Cclass="Compiler" Cgroup="EventRecorder"/>
3227 <component Cclass="Device" Cgroup="Startup"/>
3228 <category>Getting Started</category>
3229 </attributes>
3230 </example>
Jonatan Antoni6c160d42017-09-01 10:48:45 +0200[diff] [blame]3231
3232 <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3233 <description>CMSIS-RTOS2 Memory Pool Example</description>
3234 <board name="Fixed Virtual Platform" vendor="ARM"/>
3235 <project>
3236 <environment name="uv" load="MemPool.uvprojx"/>
3237 </project>
3238 <attributes>
3239 <component Cclass="CMSIS" Cgroup="CORE"/>
3240 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3241 <component Cclass="Compiler" Cgroup="EventRecorder"/>
3242 <component Cclass="Device" Cgroup="Startup"/>
3243 <category>Getting Started</category>
3244 </attributes>
3245 </example>
Jonatan Antoni90e5beb2017-11-06 16:30:23 +0100[diff] [blame]3246
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]3247 <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]3248 <description>Bare-metal secure/non-secure example without RTOS</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3249 <board name="uVision Simulator" vendor="Keil"/>
3250 <project>
3251 <environment name="uv" load="NoRTOS.uvmpw"/>
3252 </project>
3253 <attributes>
3254 <component Cclass="CMSIS" Cgroup="CORE"/>
3255 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3256 <component Cclass="Device" Cgroup="Startup"/>
3257 <category>Getting Started</category>
3258 </attributes>
3259 </example>
3260
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]3261 <example name="TrustZone for ARMv8-M RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]3262 <description>Secure/non-secure RTOS example with thread context management</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3263 <board name="uVision Simulator" vendor="Keil"/>
3264 <project>
3265 <environment name="uv" load="RTOS.uvmpw"/>
3266 </project>
3267 <attributes>
3268 <component Cclass="CMSIS" Cgroup="CORE"/>
3269 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3270 <component Cclass="Device" Cgroup="Startup"/>
3271 <category>Getting Started</category>
3272 </attributes>
3273 </example>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3274
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]3275 <example name="TrustZone for ARMv8-M RTOS Security Tests" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3276 <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3277 <board name="uVision Simulator" vendor="Keil"/>
3278 <project>
3279 <environment name="uv" load="RTOS_Faults.uvmpw"/>
3280 </project>
3281 <attributes>
3282 <component Cclass="CMSIS" Cgroup="CORE"/>
3283 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3284 <component Cclass="Device" Cgroup="Startup"/>
3285 <category>Getting Started</category>
3286 </attributes>
3287 </example>
3288
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3289 </examples>
3290
3291</package>