DoxyGen: Added Armv8.1-MML and CM55 to template lists.
- Removed implemented extensions from device name for ARMCM55
as adding all those becomes unmaintainable.
Change-Id: Idc07ac2977087a63d16cb9bbacfc74ba03f35670
diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc
index 57bd449..8fd4f5e 100644
--- a/ARM.CMSIS.pdsc
+++ b/ARM.CMSIS.pdsc
@@ -622,12 +622,12 @@
<memory id="IRAM2" start="0x20000000" size="0x00020000" init ="0" default="0"/>
<!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
- <device Dname="ARMCM55_DSP_DP_MVE_FP_TZARMCM55_DSP_DP_MVE_FP_TZ">
+ <device Dname="ARMCM55">
<processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
<description>
- Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
+ Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
</description>
- <compile header="Device/ARM/ARMCM55/Include/ARMCM55_DSP_DP_MVE_FP_TZ.h" define="ARMCM55_DSP_DP_MVE_FP_TZ"/>
+ <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
</device>
</family>
diff --git a/CMSIS/DoxyGen/Core/src/Template.txt b/CMSIS/DoxyGen/Core/src/Template.txt
index 335f783..94d969f 100644
--- a/CMSIS/DoxyGen/Core/src/Template.txt
+++ b/CMSIS/DoxyGen/Core/src/Template.txt
@@ -32,6 +32,7 @@
core_cm23.h | for the Cortex-M23 processor
core_cm33.h | for the Cortex-M33 processor
core_cm35p.h | for the Cortex-M35P processor
+core_cm55.h | for the Cortex-M55 processor
\endif
\if ARMSC
core_sc000.h | for the SecurCore SC000 processor
@@ -40,47 +41,50 @@
\if ARMv8M
core_armv8mbl.h | for the Armv8-M Baseline processor
core_armv8mml.h | for the Armv8-M Mainline processor
+core_armv81mml.h | for the Armv8.1-M Mainline processor
\endif
\section device_examples Device Examples
The CMSIS Software Pack defines several devices that are based on the various processors. The device related CMSIS-Core files are in the directory .\\Device\\ARM
and include CMSIS-Core processor file explained before. The following sample devices are defined in the CMSIS-Pack description file <b>ARM.CMSIS.pdsc</b>:
-Family | Device | Description
-:------------------|:-------------------|:---------------------------------
-ARM Cortex-M0 | ARMCM0 | Cortex-M0 based device
-ARM Cortex-M0 plus | ARMCM0P | Cortex-M0+ based device
-ARM Cortex-M3 | ARMCM3 | Cortex-M3 based device
-ARM Cortex-M4 | ARMCM4 | Cortex-M4 based device without floating-point hardware
-ARM Cortex-M4 | ARMCM4_FP | Cortex-M4 based device with floating-point hardware
-ARM Cortex-M7 | ARMCM7 | Cortex-M4 based device without floating-point hardware
-ARM Cortex-M7 | ARMCM7_FP | Cortex-M7 based device with single precision floating-point unit (FPU)
-ARM Cortex-M7 | ARMCM7_DP | Cortex-M7 based device with double precision floating-point unit
-ARM Cortex-M7 | ARMCM7 | Cortex-M7 based device without floating-point hardware
-\if ARMv8M
-ARM Cortex-M23 | ARMCM23 | Cortex-M23 based device without TrustZone
-ARM Cortex-M23 | ARMCM23_TZ | Cortex-M23 based device with TrustZone
-ARM Cortex-M33 | ARMCM33 | Cortex-M33 based device without TrustZone, SIMD, FPU
-ARM Cortex-M33 | ARMCM33_TZ | Cortex-M33 based device with TrustZone, no SIMD, no FPU
-ARM Cortex-M33 | ARMCM33_DSP_FP | Cortex-M33 based device with SIMD, FPU, no TrustZone
-ARM Cortex-M33 | ARMCM33_DSP_FP_TZ | Cortex-M33 based device with TrustZone, SIMD, FPU
-ARM Cortex-M35P | ARMCM35P | Cortex-M35P based device without TrustZone, SIMD, FPU
-ARM Cortex-M35P | ARMCM35P_TZ | Cortex-M35P based device with TrustZone, no SIMD, no FPU
-ARM Cortex-M35P | ARMCM35P_DSP_FP | Cortex-M35P based device with SIMD, FPU, no TrustZone
-ARM Cortex-M35P | ARMCM35P_DSP_FP_TZ | Cortex-M35P based device with TrustZone, SIMD, FPU
-\endif
-\if ARMSC
-ARM SC000 | ARM SC000 | SC000 based device
-ARM SC300 | ARM SC300 | SC300 based device
-\endif
-\if ARMv8M
-ARMv8-M Baseline | ARMv8MBL | Armv8-M Baseline based device with TrustZone
-ARMv8-M Mainline | ARMv8MML | Armv8-M Mainline based device with TrustZone
-ARMv8-M Mainline | ARMv8MML_DP | Armv8-M Mainline based device with TrustZone and double precision FPU
-ARMv8-M Mainline | ARMv8MML_SP | Armv8-M Mainline based device with TrustZone and single precision FPU
-ARMv8-M Mainline | ARMv8MML_DSP | Armv8-M Mainline based device with TrustZone and SIMD
-ARMv8-M Mainline | ARMv8MML_DSP_DP | Armv8-M Mainline based device with TrustZone, SIMD, and double precision FPU
-ARMv8-M Mainline | ARMv8MML_DSP_SP | Armv8-M Mainline based device with TrustZone, SIMD, and single precision FPU
+Family | Device | Description
+:------------------|:------------------------|:---------------------------------
+ARM Cortex-M0 | ARMCM0 | Cortex-M0 based device
+ARM Cortex-M0 plus | ARMCM0P | Cortex-M0+ based device
+ARM Cortex-M3 | ARMCM3 | Cortex-M3 based device
+ARM Cortex-M4 | ARMCM4 | Cortex-M4 based device without floating-point hardware
+ARM Cortex-M4 | ARMCM4_FP | Cortex-M4 based device with floating-point hardware
+ARM Cortex-M7 | ARMCM7 | Cortex-M4 based device without floating-point hardware
+ARM Cortex-M7 | ARMCM7_FP | Cortex-M7 based device with single precision floating-point unit (FPU)
+ARM Cortex-M7 | ARMCM7_DP | Cortex-M7 based device with double precision floating-point unit
+ARM Cortex-M7 | ARMCM7 | Cortex-M7 based device without floating-point hardware
+\if ARMv8M
+ARM Cortex-M23 | ARMCM23 | Cortex-M23 based device without TrustZone
+ARM Cortex-M23 | ARMCM23_TZ | Cortex-M23 based device with TrustZone
+ARM Cortex-M33 | ARMCM33 | Cortex-M33 based device without TrustZone, SIMD, FPU
+ARM Cortex-M33 | ARMCM33_TZ | Cortex-M33 based device with TrustZone, no SIMD, no FPU
+ARM Cortex-M33 | ARMCM33_DSP_FP | Cortex-M33 based device with SIMD, FPU, no TrustZone
+ARM Cortex-M33 | ARMCM33_DSP_FP_TZ | Cortex-M33 based device with TrustZone, SIMD, FPU
+ARM Cortex-M35P | ARMCM35P | Cortex-M35P based device without TrustZone, SIMD, FPU
+ARM Cortex-M35P | ARMCM35P_TZ | Cortex-M35P based device with TrustZone, no SIMD, no FPU
+ARM Cortex-M35P | ARMCM35P_DSP_FP | Cortex-M35P based device with SIMD, FPU, no TrustZone
+ARM Cortex-M35P | ARMCM35P_DSP_FP_TZ | Cortex-M35P based device with TrustZone, SIMD, FPU
+ARM Cortex-M55 | ARMCM55 | Cortex-M55 based device with TrustZone, SIMD, double precision FPU, and floating-point MVE
+\endif
+\if ARMSC
+ARM SC000 | ARM SC000 | SC000 based device
+ARM SC300 | ARM SC300 | SC300 based device
+\endif
+\if ARMv8M
+ARMv8-M Baseline | ARMv8MBL | Armv8-M Baseline based device with TrustZone
+ARMv8-M Mainline | ARMv8MML | Armv8-M Mainline based device with TrustZone
+ARMv8-M Mainline | ARMv8MML_DP | Armv8-M Mainline based device with TrustZone and double precision FPU
+ARMv8-M Mainline | ARMv8MML_SP | Armv8-M Mainline based device with TrustZone and single precision FPU
+ARMv8-M Mainline | ARMv8MML_DSP | Armv8-M Mainline based device with TrustZone and SIMD
+ARMv8-M Mainline | ARMv8MML_DSP_DP | Armv8-M Mainline based device with TrustZone, SIMD, and double precision FPU
+ARMv8-M Mainline | ARMv8MML_DSP_SP | Armv8-M Mainline based device with TrustZone, SIMD, and single precision FPU
+ARMv8.1-M Mainline | ARMv81MML_DSP_DP_MVE_FP | Armv8.1-M Mainline based device with TrustZone, SIMD, double precision FPU, and floating-point MVE
\endif
\section template_files_sec Template Files
diff --git a/Device/ARM/ARMCM55/Include/ARMCM55_DSP_DP_MVE_FP_TZ.h b/Device/ARM/ARMCM55/Include/ARMCM55.h
similarity index 96%
rename from Device/ARM/ARMCM55/Include/ARMCM55_DSP_DP_MVE_FP_TZ.h
rename to Device/ARM/ARMCM55/Include/ARMCM55.h
index 11c04fa..c2e7eed 100644
--- a/Device/ARM/ARMCM55/Include/ARMCM55_DSP_DP_MVE_FP_TZ.h
+++ b/Device/ARM/ARMCM55/Include/ARMCM55.h
@@ -1,5 +1,5 @@
/**************************************************************************//**
- * @file ARMCM55_DSP_DP_MVE_FP_TZP.h
+ * @file ARMCM55.h
* @brief CMSIS Core Peripheral Access Layer Header File for
* ARMCM55 Device Series (configured for ARMCM55 with double precision FPU,
* DSP extension, MVE, TrustZone)
@@ -24,8 +24,8 @@
* limitations under the License.
*/
-#ifndef ARMCM55_DSP_DP_MVE_FP_TZ_H
-#define ARMCM55_DSP_DP_MVE_FP_TZ_H
+#ifndef ARMCM55_H
+#define ARMCM55_H
#ifdef __cplusplus
extern "C" {
@@ -133,4 +133,4 @@
}
#endif
-#endif /* ARMCM55_DSP_DP_MVE_FP_TZ_H */
+#endif /* ARMCM55_H */
diff --git a/Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h b/Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h
index 31c5815..a97d7db 100644
--- a/Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h
+++ b/Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h
@@ -1,5 +1,5 @@
/**************************************************************************//**
- * @file ARMv81MML_DP.h
+ * @file ARMv81MML_DSP_DP_MVE_FP.h
* @brief CMSIS Core Peripheral Access Layer Header File for
* Armv8.1-M Mainline Device Series (configured for Armv8.1-M Mainline with double precision FPU, with DSP extension, with TrustZone)
* @version V1.1.0
@@ -23,8 +23,8 @@
* limitations under the License.
*/
-#ifndef ARMv81MML_DSP_DP_H
-#define ARMv81MML_DSP_DP_H
+#ifndef ARMv81MML_DSP_DP_MVE_FP_H
+#define ARMv81MML_DSP_DP_MVE_FP_H
#ifdef __cplusplus
extern "C" {
@@ -100,8 +100,6 @@
#define __FPU_PRESENT 1U /* FPU present */
#define __FPU_DP 1U /* double precision FPU */
#define __DSP_PRESENT 1U /* DSP extension present */
-#define __MVE_PRESENT 1U /* MVE extensions present */
-#define __MVE_FP 1U /* MVE floating point present */
#define __ICACHE_PRESENT 1U
#define __DCACHE_PRESENT 1U
@@ -133,4 +131,4 @@
}
#endif
-#endif /* ARMv81MML_DSP_DP_H */
+#endif /* ARMv81MML_DSP_DP_MVE_FP_H */