CoreValidation: Fixed/enhanced test cases.
- TC_CoreFunc_IRQVect needs to place ram vector table 512-byte aligned due to a limitation on Cortex-M23 FVP.
- TC_CoreFunc_FPUType preprocessor switch __FPU_PRESENT was not evaluated properly.
- TC_CoreFunc_FPSCR now ensures RAZ/WI behaviour if FPU not used/available.
Change-Id: Ic37c84c3c09c37742af8042b9b2383aacda86636
diff --git a/CMSIS/CoreValidation/Include/cmsis_cv.h b/CMSIS/CoreValidation/Include/cmsis_cv.h
index 9c80bfb..218b6d4 100644
--- a/CMSIS/CoreValidation/Include/cmsis_cv.h
+++ b/CMSIS/CoreValidation/Include/cmsis_cv.h
@@ -73,13 +73,8 @@
#endif
extern void TC_CoreFunc_FPUType (void);
-
- #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
-
extern void TC_CoreFunc_FPSCR (void);
- #endif
#elif defined(__CORTEX_A)
extern void TC_CoreAFunc_IRQ (void);
extern void TC_CoreAFunc_FPSCR (void);
diff --git a/CMSIS/CoreValidation/Source/CV_CoreFunc.c b/CMSIS/CoreValidation/Source/CV_CoreFunc.c
index 6793d33..febeb6d 100644
--- a/CMSIS/CoreValidation/Source/CV_CoreFunc.c
+++ b/CMSIS/CoreValidation/Source/CV_CoreFunc.c
@@ -195,13 +195,17 @@
#if defined(__VTOR_PRESENT) && __VTOR_PRESENT
/* relocate vector table */
extern uint32_t __Vectors[];
- static uint32_t vectors[32] __attribute__((aligned(128)));
+ static uint32_t vectors[32] __ALIGNED(512);
+
for(uint32_t i=0U; i<32U; i++) {
vectors[i] = __Vectors[i];
}
- uint32_t orig_vtor = SCB->VTOR;
- SCB->VTOR = ((uint32_t)vectors) & SCB_VTOR_TBLOFF_Msk;
+ const uint32_t orig_vtor = SCB->VTOR;
+ const uint32_t vtor = ((uint32_t)vectors) & SCB_VTOR_TBLOFF_Msk;
+ SCB->VTOR = vtor;
+
+ ASSERT_TRUE(vtor == SCB->VTOR);
/* check exception vectors */
extern void HardFault_Handler(void);
@@ -217,7 +221,7 @@
/* reconfigure WDT IRQ vector */
extern void WDT_IRQHandler(void);
- uint32_t wdtvec = NVIC_GetVector(WDT_IRQn);
+ const uint32_t wdtvec = NVIC_GetVector(WDT_IRQn);
ASSERT_TRUE(wdtvec == (uint32_t)WDT_IRQHandler);
NVIC_SetVector(WDT_IRQn, wdtvec + 32U);
@@ -654,7 +658,7 @@
*/
void TC_CoreFunc_FPUType(void) {
uint32_t fpuType = SCB_GetFPUType();
-#if defined(__FPU_PRESENT)
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT != 0)
ASSERT_TRUE(fpuType > 0U);
#else
ASSERT_TRUE(fpuType == 0U);
@@ -662,11 +666,8 @@
}
/*=======0=========1=========2=========3=========4=========5=========6=========7=========8=========9=========0=========1====*/
-#if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
-
/**
-\brief Test case: TC_CoreFunc_BASEPRI
+\brief Test case: TC_CoreFunc_FPSCR
\details
- Check if __get_FPSCR and __set_FPSCR intrinsics can be used
*/
@@ -686,7 +687,6 @@
#if (defined (__FPU_USED ) && (__FPU_USED == 1U))
ASSERT_TRUE(result != fpscr);
#else
- (void)result;
+ ASSERT_TRUE(result == 0U);
#endif
}
-#endif
diff --git a/CMSIS/CoreValidation/Source/cmsis_cv.c b/CMSIS/CoreValidation/Source/cmsis_cv.c
index 8acffa6..fcaefc8 100644
--- a/CMSIS/CoreValidation/Source/cmsis_cv.c
+++ b/CMSIS/CoreValidation/Source/cmsis_cv.c
@@ -96,13 +96,8 @@
#endif
TCD ( TC_CoreFunc_FPUType, TC_COREFUNC_FPUTYPE_EN ),
+ TCD ( TC_CoreFunc_FPSCR, TC_COREFUNC_FPSCR_EN ),
- #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
-
- TCD ( TC_CoreFunc_FPSCR, TC_COREFUNC_FPSCR_EN ),
-
- #endif
#elif defined(__CORTEX_A)
TCD ( TC_CoreAFunc_IRQ, TC_COREAFUNC_IRQ ),
TCD ( TC_CoreAFunc_FPSCR, TC_COREAFUNC_FPSCR ),
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M0/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M0/AC6/CMSIS_CV.uvprojx
index b03b43f..9ad3c3a 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M0/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M0/AC6/CMSIS_CV.uvprojx
@@ -371,7 +371,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M0plus/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M0plus/AC6/CMSIS_CV.uvprojx
index 69a25df..3899661 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M0plus/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M0plus/AC6/CMSIS_CV.uvprojx
@@ -370,7 +370,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
@@ -794,7 +794,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M23/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M23/AC6/CMSIS_CV.uvprojx
index 537898d..a1e40a3 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M23/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M23/AC6/CMSIS_CV.uvprojx
@@ -371,7 +371,7 @@
<ScatterFile>.\Objects\CMSIS_CV.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M23NS/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M23NS/AC6/CMSIS_CV.uvprojx
index 08f52c9..b02ea3e 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M23NS/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M23NS/AC6/CMSIS_CV.uvprojx
@@ -370,7 +370,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M23S/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M23S/AC6/CMSIS_CV.uvprojx
index 8d693de..1f52099 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M23S/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M23S/AC6/CMSIS_CV.uvprojx
@@ -370,7 +370,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M3/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M3/AC6/CMSIS_CV.uvprojx
index b5c376e..bcce813 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M3/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M3/AC6/CMSIS_CV.uvprojx
@@ -371,7 +371,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
@@ -868,7 +868,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M33/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M33/AC6/CMSIS_CV.uvprojx
index 8b0bfe9..7b08d1a 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M33/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M33/AC6/CMSIS_CV.uvprojx
@@ -371,7 +371,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M33NS/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M33NS/AC6/CMSIS_CV.uvprojx
index 3c7ea06..260931f 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M33NS/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M33NS/AC6/CMSIS_CV.uvprojx
@@ -370,7 +370,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M33S/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M33S/AC6/CMSIS_CV.uvprojx
index c19700c..7922abc 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M33S/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M33S/AC6/CMSIS_CV.uvprojx
@@ -370,7 +370,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M4/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M4/AC6/CMSIS_CV.uvprojx
index 5c7f9cb..ec7ac60 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M4/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M4/AC6/CMSIS_CV.uvprojx
@@ -370,7 +370,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M4FP/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M4FP/AC6/CMSIS_CV.uvprojx
index dd09563..60adbf9 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M4FP/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M4FP/AC6/CMSIS_CV.uvprojx
@@ -370,7 +370,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M7/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M7/AC6/CMSIS_CV.uvprojx
index 7692fd3..354fa2c 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M7/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M7/AC6/CMSIS_CV.uvprojx
@@ -370,7 +370,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M7DP/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M7DP/AC6/CMSIS_CV.uvprojx
index 95458cb..9177ee7 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M7DP/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M7DP/AC6/CMSIS_CV.uvprojx
@@ -370,7 +370,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
diff --git a/CMSIS/CoreValidation/Tests/Cortex-M7SP/AC6/CMSIS_CV.uvprojx b/CMSIS/CoreValidation/Tests/Cortex-M7SP/AC6/CMSIS_CV.uvprojx
index 6ec8f9f..f577836 100644
--- a/CMSIS/CoreValidation/Tests/Cortex-M7SP/AC6/CMSIS_CV.uvprojx
+++ b/CMSIS/CoreValidation/Tests/Cortex-M7SP/AC6/CMSIS_CV.uvprojx
@@ -370,7 +370,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
- <Misc>--entry=Reset_Handler</Misc>
+ <Misc>--entry=Reset_Handler --datacompressor=off</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>