Core(M): Added support for generic Armv8.1-M Mainline devices.
Change-Id: I6d21e148014dc7c0c0c553ba001e654d5482baf6
diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc
index 95aa55d..f15f333 100644
--- a/ARM.CMSIS.pdsc
+++ b/ARM.CMSIS.pdsc
@@ -8,8 +8,12 @@
<url>http://www.keil.com/pack/</url>
<releases>
- <release version="5.5.0-dev3">
+ <release version="5.5.0-dev4">
Active development ...
+ CMSIS-Core(M):
+ - Added generic Armv8.1-M Mainline device support.
+ </release>
+ <release version="5.5.0-dev3">
CMSIS-Driver:
- Added WiFi Driver API 1.0.0-beta
</release>
@@ -639,6 +643,29 @@
<compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
</device>
</family>
+
+ <!-- ****************************** ARMv8.1-M Mainline ****************************** -->
+ <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
+ <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
+ <description>
+Armv8.1-M Mainline based device with TrustZone and MVE
+ </description>
+ <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
+ <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
+ <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
+ <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
+ <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
+ <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
+
+
+ <device Dname="ARMv81MML_DSP_DP_MVE_FP">
+ <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
+ <description>
+ Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
+ </description>
+ <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
+ </device>
+ </family>
<!-- ****************************** Cortex-A5 ****************************** -->
<family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
@@ -873,6 +900,7 @@
<description>Armv8-M architecture based device</description>
<accept Dcore="ARMV8MBL"/>
<accept Dcore="ARMV8MML"/>
+ <accept Dcore="ARMV81MML"/>
<accept Dcore="Cortex-M23"/>
<accept Dcore="Cortex-M33"/>
<accept Dcore="Cortex-M35P"/>
@@ -1028,6 +1056,11 @@
<require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
</condition>
+ <condition id="ARMv81MML">
+ <description>Armv8.1-M Mainline</description>
+ <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
+ </condition>
+
<condition id="CA5_CA9">
<description>Cortex-A5 or Cortex-A9 processor based device</description>
<accept Dcore="Cortex-A5"/>
@@ -1445,7 +1478,7 @@
<require condition="ARMv8MML_DSP_SP_ARMCC"/>
<require Dendian="Little-endian"/>
</condition>
-
+
<!-- GCC compiler -->
<condition id="CA_GCC">
<description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
@@ -2395,6 +2428,12 @@
<require condition="GCC"/>
</condition>
+ <condition id="ARMv81MML CMSIS">
+ <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
+ <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
+ <require Cclass="CMSIS" Cgroup="CORE"/>
+ </condition>
+
<condition id="ARMCA5 CMSIS">
<description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
<require Dvendor="ARM:82" Dname="ARMCA5"/>
@@ -2497,8 +2536,8 @@
<components>
<!-- CMSIS-Core component -->
- <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.2" condition="ARMv6_7_8-M Device" >
- <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
+ <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.3" condition="ARMv6_7_8-M Device" >
+ <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
<files>
<!-- CPU independent -->
<file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
@@ -2509,7 +2548,7 @@
<file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
</files>
</component>
-
+
<component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.2" condition="ARMv7-A Device" >
<description>CMSIS-CORE for Cortex-A</description>
<files>
@@ -2876,6 +2915,41 @@
</files>
</component>
+ <!-- ARMv81MML -->
+ <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv81MML CMSIS">
+ <description>System and Startup for Generic Armv8.1-M Mainline device</description>
+ <files>
+ <!-- include folder / device header file -->
+ <file category="include" name="Device/ARM/ARMv81MML/Include/"/>
+ <file category="header" name="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h"/>
+ <!-- startup / system file -->
+ <file category="sourceAsm" name="Device/ARM/ARMv81MML/Source/ARM/startup_ARMv81MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
+ <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML.sct" version="1.0.0" attr="config" condition="ARMCC"/>
+ <file category="sourceAsm" name="Device/ARM/ARMv81MML/Source/GCC/startup_ARMv81MML.S" version="1.0.0" attr="config" condition="GCC"/>
+ <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
+ <file category="sourceAsm" name="Device/ARM/ARMv81MML/Source/IAR/startup_ARMv81MML.S" version="1.0.0" attr="config" condition="IAR"/>
+ <file category="sourceC" name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c" version="1.0.0" attr="config"/>
+ <!-- SAU configuration -->
+ <file category="header" name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
+ </files>
+ </component>
+ <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv81MML CMSIS">
+ <description>System and Startup for Generic Armv8.1-M Mainline device</description>
+ <files>
+ <!-- include folder / device header file -->
+ <file category="include" name="Device/ARM/ARMv81MML/Include/"/>
+ <!-- startup / system file -->
+ <file category="sourceC" name="Device/ARM/ARMv81MML/Source/ARM/startup_ARMv81MML.c" version="1.0.0" attr="config" condition="ARMCC"/>
+ <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML.sct" version="1.0.0" attr="config" condition="ARMCC"/>
+ <file category="sourceC" name="Device/ARM/ARMv81MML/Source/GCC/startup_ARMv81MML.c" version="1.0.0" attr="config" condition="GCC"/>
+ <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
+ <file category="sourceC" name="Device/ARM/ARMv81MML/Source/IAR/startup_ARMv81MML.c" version="1.0.0" attr="config" condition="IAR"/>
+ <file category="sourceC" name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c" version="1.0.0" attr="config"/>
+ <!-- SAU configuration -->
+ <file category="header" name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
+ </files>
+ </component>
+
<!-- Cortex-A5 -->
<component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA5 CMSIS">
<description>System and Startup for Generic Arm Cortex-A5 device</description>