RTX5: Add de-allocation of Arm C library thread data (libspace) when thread is terminated
diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc
index 5511c3e..32e3a82 100644
--- a/ARM.CMSIS.pdsc
+++ b/ARM.CMSIS.pdsc
@@ -14,6 +14,8 @@
- Added new compiler macros.
CMSIS-DSP: Moved into separate pack!
CMSIS-NN: Moved into separate pack!
+ CMSIS-RTOS2: 2.1.3 (unchanged)
+ - RTX 5.5.5 (see revision history for details)
CMSIS-DAP: 2.1.2 (see revision history for details)
- Fix DAP_Transfer handling when transfer fails
</release>
@@ -2314,7 +2316,7 @@
</component>
<!-- CMSIS-RTOS Keil RTX5 component -->
- <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.4" Capiversion="1.0.0" condition="RTOS RTX5">
+ <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.5" Capiversion="1.0.0" condition="RTOS RTX5">
<description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
<RTE_Components_h>
<!-- the following content goes into file 'RTE_Components.h' -->
@@ -2330,7 +2332,7 @@
</component>
<!-- CMSIS-RTOS2 Keil RTX5 component -->
- <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5">
+ <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.5" Capiversion="2.1.3" condition="RTOS2 RTX5">
<description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
<RTE_Components_h>
<!-- the following content goes into file 'RTE_Components.h' -->
@@ -2389,7 +2391,7 @@
<file category="library" condition="IARCC ARMv81-MML FP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
</files>
</component>
- <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
+ <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.5" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
<description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
<RTE_Components_h>
<!-- the following content goes into file 'RTE_Components.h' -->
@@ -2440,7 +2442,7 @@
<file category="library" condition="IARCC ARMv81-MML FP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
</files>
</component>
- <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5">
+ <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.5" Capiversion="2.1.3" condition="RTOS2 RTX5">
<description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
<RTE_Components_h>
<!-- the following content goes into file 'RTE_Components.h' -->
@@ -2503,7 +2505,7 @@
<file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
</files>
</component>
- <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
+ <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.5" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
<description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
<RTE_Components_h>
<!-- the following content goes into file 'RTE_Components.h' -->
@@ -2559,7 +2561,7 @@
<file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7a.s" condition="IARASM ARMv7-A"/>
</files>
</component>
- <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
+ <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.5" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
<description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
<RTE_Components_h>
<!-- the following content goes into file 'RTE_Components.h' -->