commit a75597abce826554c83c4c6ba0a18de017bbbd01
author Martin Günther <martin.guenther@arm.com> Fri May 13 10:17:34 2016 +0200
committer Martin Günther <martin.guenther@arm.com> Fri May 13 10:17:34 2016 +0200
tree 319d051c8582978b4046ce1b3bebde606f605c35
parent e90ecc47e2532451f1d49f2d2d6e5df9f56926e9
parent 7d7aa3149623cbeddb139c51f147c62908397ee1

Merge branch 'develop' of https://github.com/ARM-software/CMSIS_5 into Device_ARMv8M

Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h

diff --git a/Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h b/Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h
index ef7628b..76084cf 100644
--- a/Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h
+++ b/Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h
@@ -2,7 +2,7 @@
  * @file     partition_ARMv8MBL.h
  * @brief    CMSIS-CORE Initial Setup for Secure / Non-Secure Zones for ARMv8M
  * @version  V5.00
- * @date     22. April 2016
+ * @date     13. May 2016
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
@@ -1144,7 +1144,8 @@
     SCB->SCR   = (SCB->SCR   & ~(SCB_SCR_SLEEPDEEPS_Msk    )) |
                    ((SCB_CSR_DEEPSLEEPS_VAL     << SCB_SCR_SLEEPDEEPS_Pos)     & SCB_SCR_SLEEPDEEPS_Msk);
 
-    SCB->AIRCR = (SCB->AIRCR & ~(SCB_AIRCR_SYSRESETREQS_Msk | SCB_AIRCR_BFHFNMINS_Pos |  SCB_AIRCR_PRIS_Msk)) |
+    SCB->AIRCR = (SCB->AIRCR & ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_SYSRESETREQS_Msk | SCB_AIRCR_BFHFNMINS_Pos |  SCB_AIRCR_PRIS_Msk)) |
+                   ((0x05FAU                    << SCB_AIRCR_VECTKEY_Pos)      & SCB_AIRCR_VECTKEY_Msk)      |
                    ((SCB_AIRCR_SYSRESETREQS_VAL << SCB_AIRCR_SYSRESETREQS_Pos) & SCB_AIRCR_SYSRESETREQS_Msk) |
                    ((SCB_AIRCR_PRIS_VAL         << SCB_AIRCR_BFHFNMINS_Pos)    & SCB_AIRCR_BFHFNMINS_Msk)    |
                    ((SCB_AIRCR_BFHFNMINS_VAL    << SCB_AIRCR_PRIS_Pos)         & SCB_AIRCR_PRIS_Msk);

Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h

diff --git a/Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h b/Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h
index def249b..6b8a5f1 100644
--- a/Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h
+++ b/Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h
@@ -2,7 +2,7 @@
  * @file     partition_ARMv8MML.h
  * @brief    CMSIS-CORE Initial Setup for Secure / Non-Secure Zones for ARMv8M
  * @version  V5.00
- * @date     22. April 2016
+ * @date     13. May 2016
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
@@ -1125,7 +1125,8 @@
     SCB->SCR   = (SCB->SCR   & ~(SCB_SCR_SLEEPDEEPS_Msk    )) |
                    ((SCB_CSR_DEEPSLEEPS_VAL     << SCB_SCR_SLEEPDEEPS_Pos)     & SCB_SCR_SLEEPDEEPS_Msk);
 
-    SCB->AIRCR = (SCB->AIRCR & ~(SCB_AIRCR_SYSRESETREQS_Msk | SCB_AIRCR_BFHFNMINS_Pos |  SCB_AIRCR_PRIS_Msk)) |
+    SCB->AIRCR = (SCB->AIRCR & ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_SYSRESETREQS_Msk | SCB_AIRCR_BFHFNMINS_Pos |  SCB_AIRCR_PRIS_Msk)) |
+                   ((0x05FAU                    << SCB_AIRCR_VECTKEY_Pos)      & SCB_AIRCR_VECTKEY_Msk)      |
                    ((SCB_AIRCR_SYSRESETREQS_VAL << SCB_AIRCR_SYSRESETREQS_Pos) & SCB_AIRCR_SYSRESETREQS_Msk) |
                    ((SCB_AIRCR_PRIS_VAL         << SCB_AIRCR_BFHFNMINS_Pos)    & SCB_AIRCR_BFHFNMINS_Msk)    |
                    ((SCB_AIRCR_BFHFNMINS_VAL    << SCB_AIRCR_PRIS_Pos)         & SCB_AIRCR_PRIS_Msk);