CMSIS-NN: Initial import of the CMSIS Neural Network Lib
diff --git a/CMSIS/DoxyGen/Doxygen_Templates/printComponentTabs.js b/CMSIS/DoxyGen/Doxygen_Templates/printComponentTabs.js
index 96fba82..8afdb6b 100644
--- a/CMSIS/DoxyGen/Doxygen_Templates/printComponentTabs.js
+++ b/CMSIS/DoxyGen/Doxygen_Templates/printComponentTabs.js
@@ -18,6 +18,7 @@
arr.push( new tabElement( "CORE_M", "/Core/html/", "CMSIS-Core(M)") );
arr.push( new tabElement( "DRV", "/Driver/html/", "Driver") );
arr.push( new tabElement( "DSP", "/DSP/html/", "DSP") );
+ arr.push( new tabElement( "NN", "/NN/html/", "NN") );
arr.push( new tabElement( "RTOSv1", "/RTOS/html/", "RTOS v1") );
arr.push( new tabElement( "RTOSv2", "/RTOS2/html/", "RTOS v2") );
arr.push( new tabElement( "PACK", "/Pack/html/", "Pack") );
diff --git a/CMSIS/DoxyGen/General/src/introduction.txt b/CMSIS/DoxyGen/General/src/introduction.txt
index 59f530e..6639dc0 100644
--- a/CMSIS/DoxyGen/General/src/introduction.txt
+++ b/CMSIS/DoxyGen/General/src/introduction.txt
@@ -30,8 +30,9 @@
- <a href="../../DSP/html/index.html"><b>CMSIS-DSP</b></a>: DSP Library Collection with over 60 Functions for various data types: fixed-point (fractional q7, q15, q31) and single precision floating-point (32-bit).
The library is available for all Cortex-M cores. Implementations that are optimized for the SIMD instruction set are available for Cortex-M4, Cortex-M7, and Cortex-M33.
+
+ - <a href="../../NN/html/index.html"><b>CMSIS-NN</b></a>: CMSIS-NN is a collection of efficient neural network kernels developed to maximize the performance and minimize the memory footprint of DNNs on Cortex-M processor cores.
-
- <a href="../../RTOS/html/index.html"><b>CMSIS-RTOS v1</b></a>: Common API for Real-Time Operating Systems along with reference implementation based on RTX.
It provides a standardized programming interface that is portable to many RTOS and enables software components that can work across multiple RTOS systems.
@@ -155,6 +156,7 @@
\b DAP |<a href="../../DAP/html/index.html"><b>CMSIS-DAP</b></a> Debug Access Port source code and reference implementations
\b Driver |Header files for the <a href="../../Driver/html/index.html"><b>CMSIS-Driver</b></a> peripheral interface API
\b DSP_Lib |<a href="../../DSP/html/index.html"><b>CMSIS-DSP</b></a> software library source code
+\b NN |<a href="../../NN/html/index.html"><b>CMSIS-NN</b></a> software library source code
\b Include |Include files for <a href="../../Core/html/index.html"><b>CMSIS-Core (Cortex-M)</b></a> and <a href="../../DSP/html/index.html"><b>CMSIS-DSP</b></a>
\b Lib |<a href="../../DSP/html/index.html"><b>CMSIS-DSP</b></a> generated libraries for ARMCC and GCC
\b Pack |<a href="../../Pack/html/pack_Example.html"><b>CMSIS-Pack</b></a> example
@@ -178,6 +180,7 @@
- <a href="../../Core/html/rev_histCoreA.html"><b>CMSIS-Core (Cortex-A) Revision History</b></a>
- <a href="../../Driver/html/driver_revisionHistory.html"><b>Driver Revision History</b></a>
- <a href="../../DSP/html/ChangeLog_pg.html"><b>DSP Revision History (Change Log)</b></a>
+- <a href="../../NN/html/ChangeLog_pg.html"><b>NN Revision History (Change Log)</b></a>
- <a href="../../RTOS/html/rtos_revisionHistory.html"><b>RTOS v1 Revision History</b></a>
- <a href="../../RTOS2/html/rtos_revisionHistory.html"><b>RTOS v2 Revision History</b></a>
- <a href="../../Pack/html/pack_revisionHistory.html"><b>Pack Revision History</b></a>
diff --git a/CMSIS/DoxyGen/NN/doxygen_nn.bat b/CMSIS/DoxyGen/NN/doxygen_nn.bat
new file mode 100644
index 0000000..9b1b66e
--- /dev/null
+++ b/CMSIS/DoxyGen/NN/doxygen_nn.bat
@@ -0,0 +1 @@
+doxygen nn.dxy
diff --git a/CMSIS/DoxyGen/NN/nn.dxy b/CMSIS/DoxyGen/NN/nn.dxy
new file mode 100644
index 0000000..705e56e
--- /dev/null
+++ b/CMSIS/DoxyGen/NN/nn.dxy
@@ -0,0 +1,2366 @@
+# Doxyfile 1.8.6
+
+# This file describes the settings to be used by the documentation system
+# doxygen (www.doxygen.org) for a project.
+#
+# All text after a double hash (##) is considered a comment and is placed in
+# front of the TAG it is preceding.
+#
+# All text after a single hash (#) is considered a comment and will be ignored.
+# The format is:
+# TAG = value [value, ...]
+# For lists, items can also be appended using:
+# TAG += value [value, ...]
+# Values that contain spaces should be placed between quotes (\" \").
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+
+# This tag specifies the encoding used for all characters in the config file
+# that follow. The default is UTF-8 which is also the encoding used for all text
+# before the first occurrence of this tag. Doxygen uses libiconv (or the iconv
+# built into libc) for the transcoding. See http://www.gnu.org/software/libiconv
+# for the list of possible encodings.
+# The default value is: UTF-8.
+
+DOXYFILE_ENCODING = UTF-8
+
+# The PROJECT_NAME tag is a single word (or a sequence of words surrounded by
+# double-quotes, unless you are using Doxywizard) that should identify the
+# project for which the documentation is generated. This name is used in the
+# title of most generated pages and in a few other places.
+# The default value is: My Project.
+
+PROJECT_NAME = CMSIS-NN
+
+# The PROJECT_NUMBER tag can be used to enter a project or revision number. This
+# could be handy for archiving the generated documentation or if some version
+# control system is used.
+
+PROJECT_NUMBER = "Version 1.0.0"
+
+# Using the PROJECT_BRIEF tag one can provide an optional one line description
+# for a project that appears at the top of each page and should give viewer a
+# quick idea about the purpose of the project. Keep the description short.
+
+PROJECT_BRIEF = "CMSIS NN Software Library"
+
+# With the PROJECT_LOGO tag one can specify an logo or icon that is included in
+# the documentation. The maximum height of the logo should not exceed 55 pixels
+# and the maximum width should not exceed 200 pixels. Doxygen will copy the logo
+# to the output directory.
+
+PROJECT_LOGO = ../Doxygen_Templates/CMSIS_Logo_Final.png
+
+# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) path
+# into which the generated documentation will be written. If a relative path is
+# entered, it will be relative to the location where doxygen was started. If
+# left blank the current directory will be used.
+
+OUTPUT_DIRECTORY = ../../Documentation/NN
+
+# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create 4096 sub-
+# directories (in 2 levels) under the output directory of each output format and
+# will distribute the generated files over these directories. Enabling this
+# option can be useful when feeding doxygen a huge amount of source files, where
+# putting all generated files in the same directory would otherwise causes
+# performance problems for the file system.
+# The default value is: NO.
+
+CREATE_SUBDIRS = NO
+
+# The OUTPUT_LANGUAGE tag is used to specify the language in which all
+# documentation generated by doxygen is written. Doxygen will use this
+# information to generate all constant output in the proper language.
+# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Catalan, Chinese,
+# Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States),
+# Esperanto, Farsi (Persian), Finnish, French, German, Greek, Hungarian,
+# Indonesian, Italian, Japanese, Japanese-en (Japanese with English messages),
+# Korean, Korean-en (Korean with English messages), Latvian, Lithuanian,
+# Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, Romanian, Russian,
+# Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, Swedish, Turkish,
+# Ukrainian and Vietnamese.
+# The default value is: English.
+
+OUTPUT_LANGUAGE = English
+
+# If the BRIEF_MEMBER_DESC tag is set to YES doxygen will include brief member
+# descriptions after the members that are listed in the file and class
+# documentation (similar to Javadoc). Set to NO to disable this.
+# The default value is: YES.
+
+BRIEF_MEMBER_DESC = YES
+
+# If the REPEAT_BRIEF tag is set to YES doxygen will prepend the brief
+# description of a member or function before the detailed description
+#
+# Note: If both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the
+# brief descriptions will be completely suppressed.
+# The default value is: YES.
+
+REPEAT_BRIEF = NO
+
+# This tag implements a quasi-intelligent brief description abbreviator that is
+# used to form the text in various listings. Each string in this list, if found
+# as the leading text of the brief description, will be stripped from the text
+# and the result, after processing the whole list, is used as the annotated
+# text. Otherwise, the brief description is used as-is. If left blank, the
+# following values are used ($name is automatically replaced with the name of
+# the entity):The $name class, The $name widget, The $name file, is, provides,
+# specifies, contains, represents, a, an and the.
+
+ABBREVIATE_BRIEF = "The $name class" \
+ "The $name widget" \
+ "The $name file" \
+ is \
+ provides \
+ specifies \
+ contains \
+ represents \
+ a \
+ an \
+ the
+
+# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
+# doxygen will generate a detailed section even if there is only a brief
+# description.
+# The default value is: NO.
+
+ALWAYS_DETAILED_SEC = NO
+
+# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all
+# inherited members of a class in the documentation of that class as if those
+# members were ordinary class members. Constructors, destructors and assignment
+# operators of the base classes will not be shown.
+# The default value is: NO.
+
+INLINE_INHERITED_MEMB = NO
+
+# If the FULL_PATH_NAMES tag is set to YES doxygen will prepend the full path
+# before files name in the file list and in the header files. If set to NO the
+# shortest path that makes the file name unique will be used
+# The default value is: YES.
+
+FULL_PATH_NAMES = NO
+
+# The STRIP_FROM_PATH tag can be used to strip a user-defined part of the path.
+# Stripping is only done if one of the specified strings matches the left-hand
+# part of the path. The tag can be used to show relative paths in the file list.
+# If left blank the directory from which doxygen is run is used as the path to
+# strip.
+#
+# Note that you can specify absolute paths here, but also relative paths, which
+# will be relative from the directory where doxygen is started.
+# This tag requires that the tag FULL_PATH_NAMES is set to YES.
+
+STRIP_FROM_PATH =
+
+# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of the
+# path mentioned in the documentation of a class, which tells the reader which
+# header file to include in order to use a class. If left blank only the name of
+# the header file containing the class definition is used. Otherwise one should
+# specify the list of include paths that are normally passed to the compiler
+# using the -I flag.
+
+STRIP_FROM_INC_PATH =
+
+# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter (but
+# less readable) file names. This can be useful is your file systems doesn't
+# support long names like on DOS, Mac, or CD-ROM.
+# The default value is: NO.
+
+SHORT_NAMES = NO
+
+# If the JAVADOC_AUTOBRIEF tag is set to YES then doxygen will interpret the
+# first line (until the first dot) of a Javadoc-style comment as the brief
+# description. If set to NO, the Javadoc-style will behave just like regular Qt-
+# style comments (thus requiring an explicit @brief command for a brief
+# description.)
+# The default value is: NO.
+
+JAVADOC_AUTOBRIEF = NO
+
+# If the QT_AUTOBRIEF tag is set to YES then doxygen will interpret the first
+# line (until the first dot) of a Qt-style comment as the brief description. If
+# set to NO, the Qt-style will behave just like regular Qt-style comments (thus
+# requiring an explicit \brief command for a brief description.)
+# The default value is: NO.
+
+QT_AUTOBRIEF = NO
+
+# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make doxygen treat a
+# multi-line C++ special comment block (i.e. a block of //! or /// comments) as
+# a brief description. This used to be the default behavior. The new default is
+# to treat a multi-line C++ comment block as a detailed description. Set this
+# tag to YES if you prefer the old behavior instead.
+#
+# Note that setting this tag to YES also means that rational rose comments are
+# not recognized any more.
+# The default value is: NO.
+
+MULTILINE_CPP_IS_BRIEF = YES
+
+# If the INHERIT_DOCS tag is set to YES then an undocumented member inherits the
+# documentation from any documented member that it re-implements.
+# The default value is: YES.
+
+INHERIT_DOCS = NO
+
+# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce a
+# new page for each member. If set to NO, the documentation of a member will be
+# part of the file/class/namespace that contains it.
+# The default value is: NO.
+
+SEPARATE_MEMBER_PAGES = NO
+
+# The TAB_SIZE tag can be used to set the number of spaces in a tab. Doxygen
+# uses this value to replace tabs by spaces in code fragments.
+# Minimum value: 1, maximum value: 16, default value: 4.
+
+TAB_SIZE = 8
+
+# This tag can be used to specify a number of aliases that act as commands in
+# the documentation. An alias has the form:
+# name=value
+# For example adding
+# "sideeffect=@par Side Effects:\n"
+# will allow you to put the command \sideeffect (or @sideeffect) in the
+# documentation, which will result in a user-defined paragraph with heading
+# "Side Effects:". You can put \n's in the value part of an alias to insert
+# newlines.
+
+ALIASES =
+
+# This tag can be used to specify a number of word-keyword mappings (TCL only).
+# A mapping has the form "name=value". For example adding "class=itcl::class"
+# will allow you to use the command class in the itcl::class meaning.
+
+TCL_SUBST =
+
+# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources
+# only. Doxygen will then generate output that is more tailored for C. For
+# instance, some of the names that are used will be different. The list of all
+# members will be omitted, etc.
+# The default value is: NO.
+
+OPTIMIZE_OUTPUT_FOR_C = YES
+
+# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java or
+# Python sources only. Doxygen will then generate output that is more tailored
+# for that language. For instance, namespaces will be presented as packages,
+# qualified scopes will look different, etc.
+# The default value is: NO.
+
+OPTIMIZE_OUTPUT_JAVA = NO
+
+# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran
+# sources. Doxygen will then generate output that is tailored for Fortran.
+# The default value is: NO.
+
+OPTIMIZE_FOR_FORTRAN = NO
+
+# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL
+# sources. Doxygen will then generate output that is tailored for VHDL.
+# The default value is: NO.
+
+OPTIMIZE_OUTPUT_VHDL = NO
+
+# Doxygen selects the parser to use depending on the extension of the files it
+# parses. With this tag you can assign which parser to use for a given
+# extension. Doxygen has a built-in mapping, but you can override or extend it
+# using this tag. The format is ext=language, where ext is a file extension, and
+# language is one of the parsers supported by doxygen: IDL, Java, Javascript,
+# C#, C, C++, D, PHP, Objective-C, Python, Fortran, VHDL. For instance to make
+# doxygen treat .inc files as Fortran files (default is PHP), and .f files as C
+# (default is Fortran), use: inc=Fortran f=C.
+#
+# Note For files without extension you can use no_extension as a placeholder.
+#
+# Note that for custom extensions you also need to set FILE_PATTERNS otherwise
+# the files are not read by doxygen.
+
+EXTENSION_MAPPING =
+
+# If the MARKDOWN_SUPPORT tag is enabled then doxygen pre-processes all comments
+# according to the Markdown format, which allows for more readable
+# documentation. See http://daringfireball.net/projects/markdown/ for details.
+# The output of markdown processing is further processed by doxygen, so you can
+# mix doxygen, HTML, and XML commands with Markdown formatting. Disable only in
+# case of backward compatibilities issues.
+# The default value is: YES.
+
+MARKDOWN_SUPPORT = YES
+
+# When enabled doxygen tries to link words that correspond to documented
+# classes, or namespaces to their corresponding documentation. Such a link can
+# be prevented in individual cases by by putting a % sign in front of the word
+# or globally by setting AUTOLINK_SUPPORT to NO.
+# The default value is: YES.
+
+AUTOLINK_SUPPORT = YES
+
+# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want
+# to include (a tag file for) the STL sources as input, then you should set this
+# tag to YES in order to let doxygen match functions declarations and
+# definitions whose arguments contain STL classes (e.g. func(std::string);
+# versus func(std::string) {}). This also make the inheritance and collaboration
+# diagrams that involve STL classes more complete and accurate.
+# The default value is: NO.
+
+BUILTIN_STL_SUPPORT = NO
+
+# If you use Microsoft's C++/CLI language, you should set this option to YES to
+# enable parsing support.
+# The default value is: NO.
+
+CPP_CLI_SUPPORT = NO
+
+# Set the SIP_SUPPORT tag to YES if your project consists of sip (see:
+# http://www.riverbankcomputing.co.uk/software/sip/intro) sources only. Doxygen
+# will parse them like normal C++ but will assume all classes use public instead
+# of private inheritance when no explicit protection keyword is present.
+# The default value is: NO.
+
+SIP_SUPPORT = NO
+
+# For Microsoft's IDL there are propget and propput attributes to indicate
+# getter and setter methods for a property. Setting this option to YES will make
+# doxygen to replace the get and set methods by a property in the documentation.
+# This will only work if the methods are indeed getting or setting a simple
+# type. If this is not the case, or you want to show the methods anyway, you
+# should set this option to NO.
+# The default value is: YES.
+
+IDL_PROPERTY_SUPPORT = YES
+
+# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
+# tag is set to YES, then doxygen will reuse the documentation of the first
+# member in the group (if any) for the other members of the group. By default
+# all members of a group must be documented explicitly.
+# The default value is: NO.
+
+DISTRIBUTE_GROUP_DOC = NO
+
+# Set the SUBGROUPING tag to YES to allow class member groups of the same type
+# (for instance a group of public functions) to be put as a subgroup of that
+# type (e.g. under the Public Functions section). Set it to NO to prevent
+# subgrouping. Alternatively, this can be done per class using the
+# \nosubgrouping command.
+# The default value is: YES.
+
+SUBGROUPING = YES
+
+# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and unions
+# are shown inside the group in which they are included (e.g. using \ingroup)
+# instead of on a separate page (for HTML and Man pages) or section (for LaTeX
+# and RTF).
+#
+# Note that this feature does not work in combination with
+# SEPARATE_MEMBER_PAGES.
+# The default value is: NO.
+
+INLINE_GROUPED_CLASSES = NO
+
+# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and unions
+# with only public data fields or simple typedef fields will be shown inline in
+# the documentation of the scope in which they are defined (i.e. file,
+# namespace, or group documentation), provided this scope is documented. If set
+# to NO, structs, classes, and unions are shown on a separate page (for HTML and
+# Man pages) or section (for LaTeX and RTF).
+# The default value is: NO.
+
+INLINE_SIMPLE_STRUCTS = NO
+
+# When TYPEDEF_HIDES_STRUCT tag is enabled, a typedef of a struct, union, or
+# enum is documented as struct, union, or enum with the name of the typedef. So
+# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
+# with name TypeT. When disabled the typedef will appear as a member of a file,
+# namespace, or class. And the struct will be named TypeS. This can typically be
+# useful for C code in case the coding convention dictates that all compound
+# types are typedef'ed and only the typedef is referenced, never the tag name.
+# The default value is: NO.
+
+TYPEDEF_HIDES_STRUCT = YES
+
+# The size of the symbol lookup cache can be set using LOOKUP_CACHE_SIZE. This
+# cache is used to resolve symbols given their name and scope. Since this can be
+# an expensive process and often the same symbol appears multiple times in the
+# code, doxygen keeps a cache of pre-resolved symbols. If the cache is too small
+# doxygen will become slower. If the cache is too large, memory is wasted. The
+# cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range
+# is 0..9, the default is 0, corresponding to a cache size of 2^16=65536
+# symbols. At the end of a run doxygen will report the cache usage and suggest
+# the optimal cache size from a speed point of view.
+# Minimum value: 0, maximum value: 9, default value: 0.
+
+LOOKUP_CACHE_SIZE = 0
+
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+
+# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in
+# documentation are documented, even if no documentation was available. Private
+# class members and static file members will be hidden unless the
+# EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES.
+# Note: This will also disable the warnings about undocumented members that are
+# normally produced when WARNINGS is set to YES.
+# The default value is: NO.
+
+EXTRACT_ALL = YES
+
+# If the EXTRACT_PRIVATE tag is set to YES all private members of a class will
+# be included in the documentation.
+# The default value is: NO.
+
+EXTRACT_PRIVATE = YES
+
+# If the EXTRACT_PACKAGE tag is set to YES all members with package or internal
+# scope will be included in the documentation.
+# The default value is: NO.
+
+EXTRACT_PACKAGE = NO
+
+# If the EXTRACT_STATIC tag is set to YES all static members of a file will be
+# included in the documentation.
+# The default value is: NO.
+
+EXTRACT_STATIC = YES
+
+# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) defined
+# locally in source files will be included in the documentation. If set to NO
+# only classes defined in header files are included. Does not have any effect
+# for Java sources.
+# The default value is: YES.
+
+EXTRACT_LOCAL_CLASSES = YES
+
+# This flag is only useful for Objective-C code. When set to YES local methods,
+# which are defined in the implementation section but not in the interface are
+# included in the documentation. If set to NO only methods in the interface are
+# included.
+# The default value is: NO.
+
+EXTRACT_LOCAL_METHODS = NO
+
+# If this flag is set to YES, the members of anonymous namespaces will be
+# extracted and appear in the documentation as a namespace called
+# 'anonymous_namespace{file}', where file will be replaced with the base name of
+# the file that contains the anonymous namespace. By default anonymous namespace
+# are hidden.
+# The default value is: NO.
+
+EXTRACT_ANON_NSPACES = NO
+
+# If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all
+# undocumented members inside documented classes or files. If set to NO these
+# members will be included in the various overviews, but no documentation
+# section is generated. This option has no effect if EXTRACT_ALL is enabled.
+# The default value is: NO.
+
+HIDE_UNDOC_MEMBERS = NO
+
+# If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all
+# undocumented classes that are normally visible in the class hierarchy. If set
+# to NO these classes will be included in the various overviews. This option has
+# no effect if EXTRACT_ALL is enabled.
+# The default value is: NO.
+
+HIDE_UNDOC_CLASSES = NO
+
+# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend
+# (class|struct|union) declarations. If set to NO these declarations will be
+# included in the documentation.
+# The default value is: NO.
+
+HIDE_FRIEND_COMPOUNDS = NO
+
+# If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any
+# documentation blocks found inside the body of a function. If set to NO these
+# blocks will be appended to the function's detailed documentation block.
+# The default value is: NO.
+
+HIDE_IN_BODY_DOCS = NO
+
+# The INTERNAL_DOCS tag determines if documentation that is typed after a
+# \internal command is included. If the tag is set to NO then the documentation
+# will be excluded. Set it to YES to include the internal documentation.
+# The default value is: NO.
+
+INTERNAL_DOCS = NO
+
+# If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file
+# names in lower-case letters. If set to YES upper-case letters are also
+# allowed. This is useful if you have classes or files whose names only differ
+# in case and if your file system supports case sensitive file names. Windows
+# and Mac users are advised to set this option to NO.
+# The default value is: system dependent.
+
+CASE_SENSE_NAMES = YES
+
+# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with
+# their full class and namespace scopes in the documentation. If set to YES the
+# scope will be hidden.
+# The default value is: NO.
+
+HIDE_SCOPE_NAMES = NO
+
+# If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of
+# the files that are included by a file in the documentation of that file.
+# The default value is: YES.
+
+SHOW_INCLUDE_FILES = NO
+
+
+SHOW_GROUPED_MEMB_INC = NO
+
+# If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include
+# files with double quotes in the documentation rather than with sharp brackets.
+# The default value is: NO.
+
+FORCE_LOCAL_INCLUDES = NO
+
+# If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the
+# documentation for inline members.
+# The default value is: YES.
+
+INLINE_INFO = YES
+
+# If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the
+# (detailed) documentation of file and class members alphabetically by member
+# name. If set to NO the members will appear in declaration order.
+# The default value is: YES.
+
+SORT_MEMBER_DOCS = YES
+
+# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief
+# descriptions of file, namespace and class members alphabetically by member
+# name. If set to NO the members will appear in declaration order. Note that
+# this will also influence the order of the classes in the class list.
+# The default value is: NO.
+
+SORT_BRIEF_DOCS = NO
+
+# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the
+# (brief and detailed) documentation of class members so that constructors and
+# destructors are listed first. If set to NO the constructors will appear in the
+# respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS.
+# Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief
+# member documentation.
+# Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting
+# detailed member documentation.
+# The default value is: NO.
+
+SORT_MEMBERS_CTORS_1ST = NO
+
+# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy
+# of group names into alphabetical order. If set to NO the group names will
+# appear in their defined order.
+# The default value is: NO.
+
+SORT_GROUP_NAMES = NO
+
+# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by
+# fully-qualified names, including namespaces. If set to NO, the class list will
+# be sorted only by class name, not including the namespace part.
+# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
+# Note: This option applies only to the class list, not to the alphabetical
+# list.
+# The default value is: NO.
+
+SORT_BY_SCOPE_NAME = NO
+
+# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper
+# type resolution of all parameters of a function it will reject a match between
+# the prototype and the implementation of a member function even if there is
+# only one candidate or it is obvious which candidate to choose by doing a
+# simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still
+# accept a match between prototype and implementation in such cases.
+# The default value is: NO.
+
+STRICT_PROTO_MATCHING = NO
+
+# The GENERATE_TODOLIST tag can be used to enable ( YES) or disable ( NO) the
+# todo list. This list is created by putting \todo commands in the
+# documentation.
+# The default value is: YES.
+
+GENERATE_TODOLIST = YES
+
+# The GENERATE_TESTLIST tag can be used to enable ( YES) or disable ( NO) the
+# test list. This list is created by putting \test commands in the
+# documentation.
+# The default value is: YES.
+
+GENERATE_TESTLIST = YES
+
+# The GENERATE_BUGLIST tag can be used to enable ( YES) or disable ( NO) the bug
+# list. This list is created by putting \bug commands in the documentation.
+# The default value is: YES.
+
+GENERATE_BUGLIST = YES
+
+# The GENERATE_DEPRECATEDLIST tag can be used to enable ( YES) or disable ( NO)
+# the deprecated list. This list is created by putting \deprecated commands in
+# the documentation.
+# The default value is: YES.
+
+GENERATE_DEPRECATEDLIST= YES
+
+# The ENABLED_SECTIONS tag can be used to enable conditional documentation
+# sections, marked by \if <section_label> ... \endif and \cond <section_label>
+# ... \endcond blocks.
+
+ENABLED_SECTIONS =
+
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the
+# initial value of a variable or macro / define can have for it to appear in the
+# documentation. If the initializer consists of more lines than specified here
+# it will be hidden. Use a value of 0 to hide initializers completely. The
+# appearance of the value of individual variables and macros / defines can be
+# controlled using \showinitializer or \hideinitializer command in the
+# documentation regardless of this setting.
+# Minimum value: 0, maximum value: 10000, default value: 30.
+
+MAX_INITIALIZER_LINES = 0
+
+# Set the SHOW_USED_FILES tag to NO to disable the list of files generated at
+# the bottom of the documentation of classes and structs. If set to YES the list
+# will mention the files that were used to generate the documentation.
+# The default value is: YES.
+
+SHOW_USED_FILES = NO
+
+# Set the SHOW_FILES tag to NO to disable the generation of the Files page. This
+# will remove the Files entry from the Quick Index and from the Folder Tree View
+# (if specified).
+# The default value is: YES.
+
+SHOW_FILES = YES
+
+# Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces
+# page. This will remove the Namespaces entry from the Quick Index and from the
+# Folder Tree View (if specified).
+# The default value is: YES.
+
+SHOW_NAMESPACES = YES
+
+# The FILE_VERSION_FILTER tag can be used to specify a program or script that
+# doxygen should invoke to get the current version for each file (typically from
+# the version control system). Doxygen will invoke the program by executing (via
+# popen()) the command command input-file, where command is the value of the
+# FILE_VERSION_FILTER tag, and input-file is the name of an input file provided
+# by doxygen. Whatever the program writes to standard output is used as the file
+# version. For an example see the documentation.
+
+FILE_VERSION_FILTER =
+
+# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed
+# by doxygen. The layout file controls the global structure of the generated
+# output files in an output format independent way. To create the layout file
+# that represents doxygen's defaults, run doxygen with the -l option. You can
+# optionally specify a file name after the option, if omitted DoxygenLayout.xml
+# will be used as the name of the layout file.
+#
+# Note that if you run doxygen from a directory containing a file called
+# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE
+# tag is left empty.
+
+LAYOUT_FILE = ../Doxygen_Templates/DoxygenLayout_forUser.xml
+
+# The CITE_BIB_FILES tag can be used to specify one or more bib files containing
+# the reference definitions. This must be a list of .bib files. The .bib
+# extension is automatically appended if omitted. This requires the bibtex tool
+# to be installed. See also http://en.wikipedia.org/wiki/BibTeX for more info.
+# For LaTeX the style of the bibliography can be controlled using
+# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the
+# search path. Do not use file names with spaces, bibtex cannot handle them. See
+# also \cite for info how to create references.
+
+CITE_BIB_FILES =
+
+#---------------------------------------------------------------------------
+# Configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+
+# The QUIET tag can be used to turn on/off the messages that are generated to
+# standard output by doxygen. If QUIET is set to YES this implies that the
+# messages are off.
+# The default value is: NO.
+
+QUIET = YES
+
+# The WARNINGS tag can be used to turn on/off the warning messages that are
+# generated to standard error ( stderr) by doxygen. If WARNINGS is set to YES
+# this implies that the warnings are on.
+#
+# Tip: Turn warnings on while writing the documentation.
+# The default value is: YES.
+
+WARNINGS = YES
+
+# If the WARN_IF_UNDOCUMENTED tag is set to YES, then doxygen will generate
+# warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag
+# will automatically be disabled.
+# The default value is: YES.
+
+WARN_IF_UNDOCUMENTED = YES
+
+# If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for
+# potential errors in the documentation, such as not documenting some parameters
+# in a documented function, or documenting parameters that don't exist or using
+# markup commands wrongly.
+# The default value is: YES.
+
+WARN_IF_DOC_ERROR = YES
+
+# This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that
+# are documented, but have no documentation for their parameters or return
+# value. If set to NO doxygen will only warn about wrong or incomplete parameter
+# documentation, but not about the absence of documentation.
+# The default value is: NO.
+
+WARN_NO_PARAMDOC = YES
+
+# The WARN_FORMAT tag determines the format of the warning messages that doxygen
+# can produce. The string should contain the $file, $line, and $text tags, which
+# will be replaced by the file and line number from which the warning originated
+# and the warning text. Optionally the format may contain $version, which will
+# be replaced by the version of the file (if it could be obtained via
+# FILE_VERSION_FILTER)
+# The default value is: $file:$line: $text.
+
+WARN_FORMAT = "$file:$line: $text"
+
+# The WARN_LOGFILE tag can be used to specify a file to which warning and error
+# messages should be written. If left blank the output is written to standard
+# error (stderr).
+
+WARN_LOGFILE =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the input files
+#---------------------------------------------------------------------------
+
+# The INPUT tag is used to specify the files and/or directories that contain
+# documented source files. You may enter file names like myfile.cpp or
+# directories like /usr/src/myproject. Separate the files or directories with
+# spaces.
+# Note: If this tag is empty the current directory is searched.
+
+INPUT = "src/Change Log.txt" \
+ . \
+ ../../NN/Examples/ARM \
+ ../../NN/Include/ \
+ ../../NN/Source/
+
+# This tag can be used to specify the character encoding of the source files
+# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
+# libiconv (or the iconv built into libc) for the transcoding. See the libiconv
+# documentation (see: http://www.gnu.org/software/libiconv) for the list of
+# possible encodings.
+# The default value is: UTF-8.
+
+INPUT_ENCODING = UTF-8
+
+# If the value of the INPUT tag contains directories, you can use the
+# FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and
+# *.h) to filter out the source-files in the directories. If left blank the
+# following patterns are tested:*.c, *.cc, *.cxx, *.cpp, *.c++, *.java, *.ii,
+# *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h, *.hh, *.hxx, *.hpp,
+# *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc, *.m, *.markdown,
+# *.md, *.mm, *.dox, *.py, *.f90, *.f, *.for, *.tcl, *.vhd, *.vhdl, *.ucf,
+# *.qsf, *.as and *.js.
+
+FILE_PATTERNS = *.c \
+ *.cc \
+ *.cxx \
+ *.cpp \
+ *.c++ \
+ *.d \
+ *.java \
+ *.ii \
+ *.ixx \
+ *.ipp \
+ *.i++ \
+ *.inl \
+ *.h \
+ *.hh \
+ *.hxx \
+ *.hpp \
+ *.h++ \
+ *.idl \
+ *.odl \
+ *.cs \
+ *.php \
+ *.php3 \
+ *.inc \
+ *.m \
+ *.mm \
+ *.dox \
+ *.py \
+ *.f90 \
+ *.f \
+ *.for \
+ *.vhd \
+ *.vhdl \
+ *.txt
+
+# The RECURSIVE tag can be used to specify whether or not subdirectories should
+# be searched for input files as well.
+# The default value is: NO.
+
+RECURSIVE = YES
+
+# The EXCLUDE tag can be used to specify files and/or directories that should be
+# excluded from the INPUT source files. This way you can easily exclude a
+# subdirectory from a directory tree whose root is specified with the INPUT tag.
+#
+# Note that relative paths are relative to the directory from which doxygen is
+# run.
+
+EXCLUDE = math_helper.*
+
+# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or
+# directories that are symbolic links (a Unix file system feature) are excluded
+# from the input.
+# The default value is: NO.
+
+EXCLUDE_SYMLINKS = NO
+
+# If the value of the INPUT tag contains directories, you can use the
+# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
+# certain files from those directories.
+#
+# Note that the wildcards are matched against the file with absolute path, so to
+# exclude all test directories for example use the pattern */test/*
+
+EXCLUDE_PATTERNS = */RTE/*
+
+# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
+# (namespaces, classes, functions, etc.) that should be excluded from the
+# output. The symbol name can be a fully qualified name, a word, or if the
+# wildcard * is used, a substring. Examples: ANamespace, AClass,
+# AClass::ANamespace, ANamespace::*Test
+#
+# Note that the wildcards are matched against the file with absolute path, so to
+# exclude all test directories use the pattern */test/*
+
+EXCLUDE_SYMBOLS =
+
+# The EXAMPLE_PATH tag can be used to specify one or more files or directories
+# that contain example code fragments that are included (see the \include
+# command).
+
+EXAMPLE_PATH = ../../NN/Examples/ARM
+
+# If the value of the EXAMPLE_PATH tag contains directories, you can use the
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
+# *.h) to filter out the source-files in the directories. If left blank all
+# files are included.
+
+EXAMPLE_PATTERNS = *
+
+# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
+# searched for input files to be used with the \include or \dontinclude commands
+# irrespective of the value of the RECURSIVE tag.
+# The default value is: NO.
+
+EXAMPLE_RECURSIVE = NO
+
+# The IMAGE_PATH tag can be used to specify one or more files or directories
+# that contain images that are to be included in the documentation (see the
+# \image command).
+
+IMAGE_PATH = src/images
+
+# The INPUT_FILTER tag can be used to specify a program that doxygen should
+# invoke to filter for each input file. Doxygen will invoke the filter program
+# by executing (via popen()) the command:
+#
+# <filter> <input-file>
+#
+# where <filter> is the value of the INPUT_FILTER tag, and <input-file> is the
+# name of an input file. Doxygen will then use the output that the filter
+# program writes to standard output. If FILTER_PATTERNS is specified, this tag
+# will be ignored.
+#
+# Note that the filter must not add or remove lines; it is applied before the
+# code is scanned, but not when the output code is generated. If lines are added
+# or removed, the anchors will not be placed correctly.
+
+INPUT_FILTER =
+
+# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
+# basis. Doxygen will compare the file name with each pattern and apply the
+# filter if there is a match. The filters are a list of the form: pattern=filter
+# (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how
+# filters are used. If the FILTER_PATTERNS tag is empty or if none of the
+# patterns match the file name, INPUT_FILTER is applied.
+
+FILTER_PATTERNS =
+
+# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
+# INPUT_FILTER ) will also be used to filter the input files that are used for
+# producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES).
+# The default value is: NO.
+
+FILTER_SOURCE_FILES = NO
+
+# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file
+# pattern. A pattern will override the setting for FILTER_PATTERN (if any) and
+# it is also possible to disable source filtering for a specific pattern using
+# *.ext= (so without naming a filter).
+# This tag requires that the tag FILTER_SOURCE_FILES is set to YES.
+
+FILTER_SOURCE_PATTERNS =
+
+# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that
+# is part of the input, its contents will be placed on the main page
+# (index.html). This can be useful if you have a project on for instance GitHub
+# and want to reuse the introduction page also for the doxygen output.
+
+USE_MDFILE_AS_MAINPAGE =
+
+#---------------------------------------------------------------------------
+# Configuration options related to source browsing
+#---------------------------------------------------------------------------
+
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will be
+# generated. Documented entities will be cross-referenced with these sources.
+#
+# Note: To get rid of all source code in the generated output, make sure that
+# also VERBATIM_HEADERS is set to NO.
+# The default value is: NO.
+
+SOURCE_BROWSER = NO
+
+# Setting the INLINE_SOURCES tag to YES will include the body of functions,
+# classes and enums directly into the documentation.
+# The default value is: NO.
+
+INLINE_SOURCES = NO
+
+# Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any
+# special comment blocks from generated source code fragments. Normal C, C++ and
+# Fortran comments will always remain visible.
+# The default value is: YES.
+
+STRIP_CODE_COMMENTS = YES
+
+# If the REFERENCED_BY_RELATION tag is set to YES then for each documented
+# function all documented functions referencing it will be listed.
+# The default value is: NO.
+
+REFERENCED_BY_RELATION = YES
+
+# If the REFERENCES_RELATION tag is set to YES then for each documented function
+# all documented entities called/used by that function will be listed.
+# The default value is: NO.
+
+REFERENCES_RELATION = YES
+
+# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set
+# to YES, then the hyperlinks from functions in REFERENCES_RELATION and
+# REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will
+# link to the documentation.
+# The default value is: YES.
+
+REFERENCES_LINK_SOURCE = NO
+
+# If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the
+# source code will show a tooltip with additional information such as prototype,
+# brief description and links to the definition and documentation. Since this
+# will make the HTML file larger and loading of large files a bit slower, you
+# can opt to disable this feature.
+# The default value is: YES.
+# This tag requires that the tag SOURCE_BROWSER is set to YES.
+
+SOURCE_TOOLTIPS = YES
+
+# If the USE_HTAGS tag is set to YES then the references to source code will
+# point to the HTML generated by the htags(1) tool instead of doxygen built-in
+# source browser. The htags tool is part of GNU's global source tagging system
+# (see http://www.gnu.org/software/global/global.html). You will need version
+# 4.8.6 or higher.
+#
+# To use it do the following:
+# - Install the latest version of global
+# - Enable SOURCE_BROWSER and USE_HTAGS in the config file
+# - Make sure the INPUT points to the root of the source tree
+# - Run doxygen as normal
+#
+# Doxygen will invoke htags (and that will in turn invoke gtags), so these
+# tools must be available from the command line (i.e. in the search path).
+#
+# The result: instead of the source browser generated by doxygen, the links to
+# source code will now point to the output of htags.
+# The default value is: NO.
+# This tag requires that the tag SOURCE_BROWSER is set to YES.
+
+USE_HTAGS = NO
+
+# If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a
+# verbatim copy of the header file for each class for which an include is
+# specified. Set to NO to disable this.
+# See also: Section \class.
+# The default value is: YES.
+
+VERBATIM_HEADERS = NO
+
+# If the CLANG_ASSISTED_PARSING tag is set to YES, then doxygen will use the
+# clang parser (see: http://clang.llvm.org/) for more acurate parsing at the
+# cost of reduced performance. This can be particularly helpful with template
+# rich C++ code for which doxygen's built-in parser lacks the necessary type
+# information.
+# Note: The availability of this option depends on whether or not doxygen was
+# compiled with the --with-libclang option.
+# The default value is: NO.
+
+CLANG_ASSISTED_PARSING = NO
+
+# If clang assisted parsing is enabled you can provide the compiler with command
+# line options that you would normally use when invoking the compiler. Note that
+# the include paths will already be set by doxygen for the files and directories
+# specified with INPUT and INCLUDE_PATH.
+# This tag requires that the tag CLANG_ASSISTED_PARSING is set to YES.
+
+CLANG_OPTIONS =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all
+# compounds will be generated. Enable this if the project contains a lot of
+# classes, structs, unions or interfaces.
+# The default value is: YES.
+
+ALPHABETICAL_INDEX = NO
+
+# The COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns in
+# which the alphabetical index list will be split.
+# Minimum value: 1, maximum value: 20, default value: 5.
+# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
+
+COLS_IN_ALPHA_INDEX = 5
+
+# In case all classes in a project start with a common prefix, all classes will
+# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag
+# can be used to specify a prefix (or a list of prefixes) that should be ignored
+# while generating the index headers.
+# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
+
+IGNORE_PREFIX = arm_
+
+#---------------------------------------------------------------------------
+# Configuration options related to the HTML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_HTML tag is set to YES doxygen will generate HTML output
+# The default value is: YES.
+
+GENERATE_HTML = YES
+
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: html.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_OUTPUT = html
+
+# The HTML_FILE_EXTENSION tag can be used to specify the file extension for each
+# generated HTML page (for example: .htm, .php, .asp).
+# The default value is: .html.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_FILE_EXTENSION = .html
+
+# The HTML_HEADER tag can be used to specify a user-defined HTML header file for
+# each generated HTML page. If the tag is left blank doxygen will generate a
+# standard header.
+#
+# To get valid HTML the header file that includes any scripts and style sheets
+# that doxygen needs, which is dependent on the configuration options used (e.g.
+# the setting GENERATE_TREEVIEW). It is highly recommended to start with a
+# default header using
+# doxygen -w html new_header.html new_footer.html new_stylesheet.css
+# YourConfigFile
+# and then modify the file new_header.html. See also section "Doxygen usage"
+# for information on how to generate the default header that doxygen normally
+# uses.
+# Note: The header is subject to change so you typically have to regenerate the
+# default header when upgrading to a newer version of doxygen. For a description
+# of the possible markers and block names see the documentation.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_HEADER = ../Doxygen_Templates/cmsis_header.html
+
+# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each
+# generated HTML page. If the tag is left blank doxygen will generate a standard
+# footer. See HTML_HEADER for more information on how to generate a default
+# footer and what special commands can be used inside the footer. See also
+# section "Doxygen usage" for information on how to generate the default footer
+# that doxygen normally uses.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_FOOTER = ../Doxygen_Templates/cmsis_footer.html
+
+# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style
+# sheet that is used by each HTML page. It can be used to fine-tune the look of
+# the HTML output. If left blank doxygen will generate a default style sheet.
+# See also section "Doxygen usage" for information on how to generate the style
+# sheet that doxygen normally uses.
+# Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as
+# it is more robust and this tag (HTML_STYLESHEET) will in the future become
+# obsolete.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_STYLESHEET =
+
+# The HTML_EXTRA_STYLESHEET tag can be used to specify an additional user-
+# defined cascading style sheet that is included after the standard style sheets
+# created by doxygen. Using this option one can overrule certain style aspects.
+# This is preferred over using HTML_STYLESHEET since it does not replace the
+# standard style sheet and is therefor more robust against future updates.
+# Doxygen will copy the style sheet file to the output directory. For an example
+# see the documentation.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_EXTRA_STYLESHEET = ../Doxygen_Templates/cmsis.css
+
+# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or
+# other source files which should be copied to the HTML output directory. Note
+# that these files will be copied to the base HTML output directory. Use the
+# $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these
+# files. In the HTML_STYLESHEET file, use the file name only. Also note that the
+# files will be copied as-is; there are no commands or markers available.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_EXTRA_FILES = ../Doxygen_Templates/tabs.css \
+ ../Doxygen_Templates/tab_topnav.png \
+ ../Doxygen_Templates/printComponentTabs.js
+
+# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen
+# will adjust the colors in the stylesheet and background images according to
+# this color. Hue is specified as an angle on a colorwheel, see
+# http://en.wikipedia.org/wiki/Hue for more information. For instance the value
+# 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300
+# purple, and 360 is red again.
+# Minimum value: 0, maximum value: 359, default value: 220.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_HUE = 220
+
+# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors
+# in the HTML output. For a value of 0 the output will use grayscales only. A
+# value of 255 will produce the most vivid colors.
+# Minimum value: 0, maximum value: 255, default value: 100.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_SAT = 100
+
+# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the
+# luminance component of the colors in the HTML output. Values below 100
+# gradually make the output lighter, whereas values above 100 make the output
+# darker. The value divided by 100 is the actual gamma applied, so 80 represents
+# a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not
+# change the gamma.
+# Minimum value: 40, maximum value: 240, default value: 80.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_GAMMA = 80
+
+# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML
+# page will contain the date and time when the page was generated. Setting this
+# to NO can help when comparing the output of multiple runs.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_TIMESTAMP = YES
+
+# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
+# documentation will contain sections that can be hidden and shown after the
+# page has loaded.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_DYNAMIC_SECTIONS = NO
+
+# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries
+# shown in the various tree structured indices initially; the user can expand
+# and collapse entries dynamically later on. Doxygen will expand the tree to
+# such a level that at most the specified number of entries are visible (unless
+# a fully collapsed tree already exceeds this amount). So setting the number of
+# entries 1 will produce a full collapsed tree by default. 0 is a special value
+# representing an infinite number of entries and will result in a full expanded
+# tree by default.
+# Minimum value: 0, maximum value: 9999, default value: 100.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_INDEX_NUM_ENTRIES = 100
+
+# If the GENERATE_DOCSET tag is set to YES, additional index files will be
+# generated that can be used as input for Apple's Xcode 3 integrated development
+# environment (see: http://developer.apple.com/tools/xcode/), introduced with
+# OSX 10.5 (Leopard). To create a documentation set, doxygen will generate a
+# Makefile in the HTML output directory. Running make will produce the docset in
+# that directory and running make install will install the docset in
+# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at
+# startup. See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html
+# for more information.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_DOCSET = NO
+
+# This tag determines the name of the docset feed. A documentation feed provides
+# an umbrella under which multiple documentation sets from a single provider
+# (such as a company or product suite) can be grouped.
+# The default value is: Doxygen generated docs.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_FEEDNAME = "Doxygen generated docs"
+
+# This tag specifies a string that should uniquely identify the documentation
+# set bundle. This should be a reverse domain-name style string, e.g.
+# com.mycompany.MyDocSet. Doxygen will append .docset to the name.
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_BUNDLE_ID = org.doxygen.Project
+
+# The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify
+# the documentation publisher. This should be a reverse domain-name style
+# string, e.g. com.mycompany.MyDocSet.documentation.
+# The default value is: org.doxygen.Publisher.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_PUBLISHER_ID = org.doxygen.Publisher
+
+# The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher.
+# The default value is: Publisher.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_PUBLISHER_NAME = Publisher
+
+# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three
+# additional HTML index files: index.hhp, index.hhc, and index.hhk. The
+# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop
+# (see: http://www.microsoft.com/en-us/download/details.aspx?id=21138) on
+# Windows.
+#
+# The HTML Help Workshop contains a compiler that can convert all HTML output
+# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML
+# files are now used as the Windows 98 help format, and will replace the old
+# Windows help format (.hlp) on all Windows platforms in the future. Compressed
+# HTML files also contain an index, a table of contents, and you can search for
+# words in the documentation. The HTML workshop also contains a viewer for
+# compressed HTML files.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_HTMLHELP = NO
+
+# The CHM_FILE tag can be used to specify the file name of the resulting .chm
+# file. You can add a path in front of the file if the result should not be
+# written to the html output directory.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+CHM_FILE =
+
+# The HHC_LOCATION tag can be used to specify the location (absolute path
+# including file name) of the HTML help compiler ( hhc.exe). If non-empty
+# doxygen will try to run the HTML help compiler on the generated index.hhp.
+# The file has to be specified with full path.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+HHC_LOCATION =
+
+# The GENERATE_CHI flag controls if a separate .chi index file is generated (
+# YES) or that it should be included in the master .chm file ( NO).
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+GENERATE_CHI = NO
+
+# The CHM_INDEX_ENCODING is used to encode HtmlHelp index ( hhk), content ( hhc)
+# and project file content.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+CHM_INDEX_ENCODING =
+
+# The BINARY_TOC flag controls whether a binary table of contents is generated (
+# YES) or a normal table of contents ( NO) in the .chm file.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+BINARY_TOC = NO
+
+# The TOC_EXPAND flag can be set to YES to add extra items for group members to
+# the table of contents of the HTML help documentation and to the tree view.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+TOC_EXPAND = NO
+
+# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and
+# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that
+# can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help
+# (.qch) of the generated HTML documentation.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_QHP = NO
+
+# If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify
+# the file name of the resulting .qch file. The path specified is relative to
+# the HTML output folder.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QCH_FILE =
+
+# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help
+# Project output. For more information please see Qt Help Project / Namespace
+# (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#namespace).
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_NAMESPACE = org.doxygen.Project
+
+# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt
+# Help Project output. For more information please see Qt Help Project / Virtual
+# Folders (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#virtual-
+# folders).
+# The default value is: doc.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_VIRTUAL_FOLDER = doc
+
+# If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom
+# filter to add. For more information please see Qt Help Project / Custom
+# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom-
+# filters).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_CUST_FILTER_NAME =
+
+# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the
+# custom filter to add. For more information please see Qt Help Project / Custom
+# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom-
+# filters).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_CUST_FILTER_ATTRS =
+
+# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this
+# project's filter section matches. Qt Help Project / Filter Attributes (see:
+# http://qt-project.org/doc/qt-4.8/qthelpproject.html#filter-attributes).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_SECT_FILTER_ATTRS =
+
+# The QHG_LOCATION tag can be used to specify the location of Qt's
+# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the
+# generated .qhp file.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHG_LOCATION =
+
+# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be
+# generated, together with the HTML files, they form an Eclipse help plugin. To
+# install this plugin and make it available under the help contents menu in
+# Eclipse, the contents of the directory containing the HTML and XML files needs
+# to be copied into the plugins directory of eclipse. The name of the directory
+# within the plugins directory should be the same as the ECLIPSE_DOC_ID value.
+# After copying Eclipse needs to be restarted before the help appears.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_ECLIPSEHELP = NO
+
+# A unique identifier for the Eclipse help plugin. When installing the plugin
+# the directory name containing the HTML and XML files should also have this
+# name. Each documentation set should have its own identifier.
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES.
+
+ECLIPSE_DOC_ID = org.doxygen.Project
+
+# If you want full control over the layout of the generated HTML pages it might
+# be necessary to disable the index and replace it with your own. The
+# DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top
+# of each HTML page. A value of NO enables the index and the value YES disables
+# it. Since the tabs in the index contain the same information as the navigation
+# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+DISABLE_INDEX = NO
+
+# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
+# structure should be generated to display hierarchical information. If the tag
+# value is set to YES, a side panel will be generated containing a tree-like
+# index structure (just like the one that is generated for HTML Help). For this
+# to work a browser that supports JavaScript, DHTML, CSS and frames is required
+# (i.e. any modern browser). Windows users are probably better off using the
+# HTML help feature. Via custom stylesheets (see HTML_EXTRA_STYLESHEET) one can
+# further fine-tune the look of the index. As an example, the default style
+# sheet generated by doxygen has an example that shows how to put an image at
+# the root of the tree instead of the PROJECT_NAME. Since the tree basically has
+# the same information as the tab index, you could consider setting
+# DISABLE_INDEX to YES when enabling this option.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_TREEVIEW = YES
+
+# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that
+# doxygen will group on one line in the generated HTML documentation.
+#
+# Note that a value of 0 will completely suppress the enum values from appearing
+# in the overview section.
+# Minimum value: 0, maximum value: 20, default value: 4.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+ENUM_VALUES_PER_LINE = 0
+
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used
+# to set the initial width (in pixels) of the frame in which the tree is shown.
+# Minimum value: 0, maximum value: 1500, default value: 250.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+TREEVIEW_WIDTH = 250
+
+# When the EXT_LINKS_IN_WINDOW option is set to YES doxygen will open links to
+# external symbols imported via tag files in a separate window.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+EXT_LINKS_IN_WINDOW = NO
+
+# Use this tag to change the font size of LaTeX formulas included as images in
+# the HTML documentation. When you change the font size after a successful
+# doxygen run you need to manually remove any form_*.png images from the HTML
+# output directory to force them to be regenerated.
+# Minimum value: 8, maximum value: 50, default value: 10.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+FORMULA_FONTSIZE = 10
+
+# Use the FORMULA_TRANPARENT tag to determine whether or not the images
+# generated for formulas are transparent PNGs. Transparent PNGs are not
+# supported properly for IE 6.0, but are supported on all modern browsers.
+#
+# Note that when changing this option you need to delete any form_*.png files in
+# the HTML output directory before the changes have effect.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+FORMULA_TRANSPARENT = YES
+
+# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see
+# http://www.mathjax.org) which uses client side Javascript for the rendering
+# instead of using prerendered bitmaps. Use this if you do not have LaTeX
+# installed or if you want to formulas look prettier in the HTML output. When
+# enabled you may also need to install MathJax separately and configure the path
+# to it using the MATHJAX_RELPATH option.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+USE_MATHJAX = NO
+
+# When MathJax is enabled you can set the default output format to be used for
+# the MathJax output. See the MathJax site (see:
+# http://docs.mathjax.org/en/latest/output.html) for more details.
+# Possible values are: HTML-CSS (which is slower, but has the best
+# compatibility), NativeMML (i.e. MathML) and SVG.
+# The default value is: HTML-CSS.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_FORMAT = HTML-CSS
+
+# When MathJax is enabled you need to specify the location relative to the HTML
+# output directory using the MATHJAX_RELPATH option. The destination directory
+# should contain the MathJax.js script. For instance, if the mathjax directory
+# is located at the same level as the HTML output directory, then
+# MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax
+# Content Delivery Network so you can quickly see the result without installing
+# MathJax. However, it is strongly recommended to install a local copy of
+# MathJax from http://www.mathjax.org before deployment.
+# The default value is: http://cdn.mathjax.org/mathjax/latest.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_RELPATH = http://www.mathjax.org/mathjax
+
+# The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax
+# extension names that should be enabled during MathJax rendering. For example
+# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_EXTENSIONS =
+
+# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces
+# of code that will be used on startup of the MathJax code. See the MathJax site
+# (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an
+# example see the documentation.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_CODEFILE =
+
+# When the SEARCHENGINE tag is enabled doxygen will generate a search box for
+# the HTML output. The underlying search engine uses javascript and DHTML and
+# should work on any modern browser. Note that when using HTML help
+# (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET)
+# there is already a search function so this one should typically be disabled.
+# For large projects the javascript based search engine can be slow, then
+# enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to
+# search using the keyboard; to jump to the search box use <access key> + S
+# (what the <access key> is depends on the OS and browser, but it is typically
+# <CTRL>, <ALT>/<option>, or both). Inside the search box use the <cursor down
+# key> to jump into the search results window, the results can be navigated
+# using the <cursor keys>. Press <Enter> to select an item or <escape> to cancel
+# the search. The filter options can be selected when the cursor is inside the
+# search box by pressing <Shift>+<cursor down>. Also here use the <cursor keys>
+# to select a filter and <Enter> or <escape> to activate or cancel the filter
+# option.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+SEARCHENGINE = YES
+
+# When the SERVER_BASED_SEARCH tag is enabled the search engine will be
+# implemented using a web server instead of a web client using Javascript. There
+# are two flavours of web server based searching depending on the
+# EXTERNAL_SEARCH setting. When disabled, doxygen will generate a PHP script for
+# searching and an index file used by the script. When EXTERNAL_SEARCH is
+# enabled the indexing and searching needs to be provided by external tools. See
+# the section "External Indexing and Searching" for details.
+# The default value is: NO.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SERVER_BASED_SEARCH = NO
+
+# When EXTERNAL_SEARCH tag is enabled doxygen will no longer generate the PHP
+# script for searching. Instead the search results are written to an XML file
+# which needs to be processed by an external indexer. Doxygen will invoke an
+# external search engine pointed to by the SEARCHENGINE_URL option to obtain the
+# search results.
+#
+# Doxygen ships with an example indexer ( doxyindexer) and search engine
+# (doxysearch.cgi) which are based on the open source search engine library
+# Xapian (see: http://xapian.org/).
+#
+# See the section "External Indexing and Searching" for details.
+# The default value is: NO.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTERNAL_SEARCH = NO
+
+# The SEARCHENGINE_URL should point to a search engine hosted by a web server
+# which will return the search results when EXTERNAL_SEARCH is enabled.
+#
+# Doxygen ships with an example indexer ( doxyindexer) and search engine
+# (doxysearch.cgi) which are based on the open source search engine library
+# Xapian (see: http://xapian.org/). See the section "External Indexing and
+# Searching" for details.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SEARCHENGINE_URL =
+
+# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the unindexed
+# search data is written to a file for indexing by an external tool. With the
+# SEARCHDATA_FILE tag the name of this file can be specified.
+# The default file is: searchdata.xml.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SEARCHDATA_FILE = searchdata.xml
+
+# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the
+# EXTERNAL_SEARCH_ID tag can be used as an identifier for the project. This is
+# useful in combination with EXTRA_SEARCH_MAPPINGS to search through multiple
+# projects and redirect the results back to the right project.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTERNAL_SEARCH_ID =
+
+# The EXTRA_SEARCH_MAPPINGS tag can be used to enable searching through doxygen
+# projects other than the one defined by this configuration file, but that are
+# all added to the same external search index. Each project needs to have a
+# unique id set via EXTERNAL_SEARCH_ID. The search mapping then maps the id of
+# to a relative location where the documentation can be found. The format is:
+# EXTRA_SEARCH_MAPPINGS = tagname1=loc1 tagname2=loc2 ...
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTRA_SEARCH_MAPPINGS =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_LATEX tag is set to YES doxygen will generate LaTeX output.
+# The default value is: YES.
+
+GENERATE_LATEX = NO
+
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: latex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_OUTPUT = latex
+
+# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
+# invoked.
+#
+# Note that when enabling USE_PDFLATEX this option is only used for generating
+# bitmaps for formulas in the HTML output, but not in the Makefile that is
+# written to the output directory.
+# The default file is: latex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_CMD_NAME = latex
+
+# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to generate
+# index for LaTeX.
+# The default file is: makeindex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+MAKEINDEX_CMD_NAME = makeindex
+
+# If the COMPACT_LATEX tag is set to YES doxygen generates more compact LaTeX
+# documents. This may be useful for small projects and may help to save some
+# trees in general.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+COMPACT_LATEX = NO
+
+# The PAPER_TYPE tag can be used to set the paper type that is used by the
+# printer.
+# Possible values are: a4 (210 x 297 mm), letter (8.5 x 11 inches), legal (8.5 x
+# 14 inches) and executive (7.25 x 10.5 inches).
+# The default value is: a4.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+PAPER_TYPE = a4
+
+# The EXTRA_PACKAGES tag can be used to specify one or more LaTeX package names
+# that should be included in the LaTeX output. To get the times font for
+# instance you can specify
+# EXTRA_PACKAGES=times
+# If left blank no extra packages will be included.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+EXTRA_PACKAGES =
+
+# The LATEX_HEADER tag can be used to specify a personal LaTeX header for the
+# generated LaTeX document. The header should contain everything until the first
+# chapter. If it is left blank doxygen will generate a standard header. See
+# section "Doxygen usage" for information on how to let doxygen write the
+# default header to a separate file.
+#
+# Note: Only use a user-defined header if you know what you are doing! The
+# following commands have a special meaning inside the header: $title,
+# $datetime, $date, $doxygenversion, $projectname, $projectnumber. Doxygen will
+# replace them by respectively the title of the page, the current date and time,
+# only the current date, the version number of doxygen, the project name (see
+# PROJECT_NAME), or the project number (see PROJECT_NUMBER).
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_HEADER =
+
+# The LATEX_FOOTER tag can be used to specify a personal LaTeX footer for the
+# generated LaTeX document. The footer should contain everything after the last
+# chapter. If it is left blank doxygen will generate a standard footer.
+#
+# Note: Only use a user-defined footer if you know what you are doing!
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_FOOTER =
+
+# The LATEX_EXTRA_FILES tag can be used to specify one or more extra images or
+# other source files which should be copied to the LATEX_OUTPUT output
+# directory. Note that the files will be copied as-is; there are no commands or
+# markers available.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_EXTRA_FILES =
+
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated is
+# prepared for conversion to PDF (using ps2pdf or pdflatex). The PDF file will
+# contain links (just like the HTML output) instead of page references. This
+# makes the output suitable for online browsing using a PDF viewer.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+PDF_HYPERLINKS = YES
+
+# If the LATEX_PDFLATEX tag is set to YES, doxygen will use pdflatex to generate
+# the PDF file directly from the LaTeX files. Set this option to YES to get a
+# higher quality PDF documentation.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+USE_PDFLATEX = YES
+
+# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \batchmode
+# command to the generated LaTeX files. This will instruct LaTeX to keep running
+# if errors occur, instead of asking the user for help. This option is also used
+# when generating formulas in HTML.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_BATCHMODE = NO
+
+# If the LATEX_HIDE_INDICES tag is set to YES then doxygen will not include the
+# index chapters (such as File Index, Compound Index, etc.) in the output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_HIDE_INDICES = NO
+
+# If the LATEX_SOURCE_CODE tag is set to YES then doxygen will include source
+# code with syntax highlighting in the LaTeX output.
+#
+# Note that which sources are shown also depends on other settings such as
+# SOURCE_BROWSER.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_SOURCE_CODE = NO
+
+# The LATEX_BIB_STYLE tag can be used to specify the style to use for the
+# bibliography, e.g. plainnat, or ieeetr. See
+# http://en.wikipedia.org/wiki/BibTeX and \cite for more info.
+# The default value is: plain.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_BIB_STYLE = plain
+
+#---------------------------------------------------------------------------
+# Configuration options related to the RTF output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_RTF tag is set to YES doxygen will generate RTF output. The
+# RTF output is optimized for Word 97 and may not look too pretty with other RTF
+# readers/editors.
+# The default value is: NO.
+
+GENERATE_RTF = NO
+
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: rtf.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_OUTPUT = rtf
+
+# If the COMPACT_RTF tag is set to YES doxygen generates more compact RTF
+# documents. This may be useful for small projects and may help to save some
+# trees in general.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+COMPACT_RTF = NO
+
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated will
+# contain hyperlink fields. The RTF file will contain links (just like the HTML
+# output) instead of page references. This makes the output suitable for online
+# browsing using Word or some other Word compatible readers that support those
+# fields.
+#
+# Note: WordPad (write) and others do not support links.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_HYPERLINKS = NO
+
+# Load stylesheet definitions from file. Syntax is similar to doxygen's config
+# file, i.e. a series of assignments. You only have to provide replacements,
+# missing definitions are set to their default value.
+#
+# See also section "Doxygen usage" for information on how to generate the
+# default style sheet that doxygen normally uses.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_STYLESHEET_FILE =
+
+# Set optional variables used in the generation of an RTF document. Syntax is
+# similar to doxygen's config file. A template extensions file can be generated
+# using doxygen -e rtf extensionFile.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_EXTENSIONS_FILE =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the man page output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_MAN tag is set to YES doxygen will generate man pages for
+# classes and files.
+# The default value is: NO.
+
+GENERATE_MAN = NO
+
+# The MAN_OUTPUT tag is used to specify where the man pages will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it. A directory man3 will be created inside the directory specified by
+# MAN_OUTPUT.
+# The default directory is: man.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_OUTPUT = man
+
+# The MAN_EXTENSION tag determines the extension that is added to the generated
+# man pages. In case the manual section does not start with a number, the number
+# 3 is prepended. The dot (.) at the beginning of the MAN_EXTENSION tag is
+# optional.
+# The default value is: .3.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_EXTENSION = .3
+
+# If the MAN_LINKS tag is set to YES and doxygen generates man output, then it
+# will generate one additional man file for each entity documented in the real
+# man page(s). These additional files only source the real man page, but without
+# them the man command would be unable to find the correct page.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_LINKS = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to the XML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_XML tag is set to YES doxygen will generate an XML file that
+# captures the structure of the code including all documentation.
+# The default value is: NO.
+
+GENERATE_XML = NO
+
+# The XML_OUTPUT tag is used to specify where the XML pages will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: xml.
+# This tag requires that the tag GENERATE_XML is set to YES.
+
+XML_OUTPUT = xml
+
+# The XML_SCHEMA tag can be used to specify a XML schema, which can be used by a
+# validating XML parser to check the syntax of the XML files.
+# This tag requires that the tag GENERATE_XML is set to YES.
+
+XML_SCHEMA =
+
+# The XML_DTD tag can be used to specify a XML DTD, which can be used by a
+# validating XML parser to check the syntax of the XML files.
+# This tag requires that the tag GENERATE_XML is set to YES.
+
+XML_DTD =
+
+# If the XML_PROGRAMLISTING tag is set to YES doxygen will dump the program
+# listings (including syntax highlighting and cross-referencing information) to
+# the XML output. Note that enabling this will significantly increase the size
+# of the XML output.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_XML is set to YES.
+
+XML_PROGRAMLISTING = YES
+
+#---------------------------------------------------------------------------
+# Configuration options related to the DOCBOOK output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_DOCBOOK tag is set to YES doxygen will generate Docbook files
+# that can be used to generate PDF.
+# The default value is: NO.
+
+GENERATE_DOCBOOK = NO
+
+# The DOCBOOK_OUTPUT tag is used to specify where the Docbook pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be put in
+# front of it.
+# The default directory is: docbook.
+# This tag requires that the tag GENERATE_DOCBOOK is set to YES.
+
+DOCBOOK_OUTPUT = docbook
+
+#---------------------------------------------------------------------------
+# Configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_AUTOGEN_DEF tag is set to YES doxygen will generate an AutoGen
+# Definitions (see http://autogen.sf.net) file that captures the structure of
+# the code including all documentation. Note that this feature is still
+# experimental and incomplete at the moment.
+# The default value is: NO.
+
+GENERATE_AUTOGEN_DEF = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_PERLMOD tag is set to YES doxygen will generate a Perl module
+# file that captures the structure of the code including all documentation.
+#
+# Note that this feature is still experimental and incomplete at the moment.
+# The default value is: NO.
+
+GENERATE_PERLMOD = NO
+
+# If the PERLMOD_LATEX tag is set to YES doxygen will generate the necessary
+# Makefile rules, Perl scripts and LaTeX code to be able to generate PDF and DVI
+# output from the Perl module output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
+
+PERLMOD_LATEX = NO
+
+# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be nicely
+# formatted so it can be parsed by a human reader. This is useful if you want to
+# understand what is going on. On the other hand, if this tag is set to NO the
+# size of the Perl module output will be much smaller and Perl will parse it
+# just the same.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
+
+PERLMOD_PRETTY = YES
+
+# The names of the make variables in the generated doxyrules.make file are
+# prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. This is useful
+# so different doxyrules.make files included by the same Makefile don't
+# overwrite each other's variables.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
+
+PERLMOD_MAKEVAR_PREFIX =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor
+#---------------------------------------------------------------------------
+
+# If the ENABLE_PREPROCESSING tag is set to YES doxygen will evaluate all
+# C-preprocessor directives found in the sources and include files.
+# The default value is: YES.
+
+ENABLE_PREPROCESSING = YES
+
+# If the MACRO_EXPANSION tag is set to YES doxygen will expand all macro names
+# in the source code. If set to NO only conditional compilation will be
+# performed. Macro expansion can be done in a controlled way by setting
+# EXPAND_ONLY_PREDEF to YES.
+# The default value is: NO.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+MACRO_EXPANSION = NO
+
+# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES then
+# the macro expansion is limited to the macros specified with the PREDEFINED and
+# EXPAND_AS_DEFINED tags.
+# The default value is: NO.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+EXPAND_ONLY_PREDEF = NO
+
+# If the SEARCH_INCLUDES tag is set to YES the includes files in the
+# INCLUDE_PATH will be searched if a #include is found.
+# The default value is: YES.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+SEARCH_INCLUDES = YES
+
+# The INCLUDE_PATH tag can be used to specify one or more directories that
+# contain include files that are not input files but should be processed by the
+# preprocessor.
+# This tag requires that the tag SEARCH_INCLUDES is set to YES.
+
+INCLUDE_PATH =
+
+# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
+# patterns (like *.h and *.hpp) to filter out the header-files in the
+# directories. If left blank, the patterns specified with FILE_PATTERNS will be
+# used.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+INCLUDE_FILE_PATTERNS =
+
+# The PREDEFINED tag can be used to specify one or more macro names that are
+# defined before the preprocessor is started (similar to the -D option of e.g.
+# gcc). The argument of the tag is a list of macros of the form: name or
+# name=definition (no spaces). If the definition and the "=" are omitted, "=1"
+# is assumed. To prevent a macro definition from being undefined via #undef or
+# recursively expanded use the := operator instead of the = operator.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+PREDEFINED =
+
+# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then this
+# tag can be used to specify a list of macro names that should be expanded. The
+# macro definition that is found in the sources will be used. Use the PREDEFINED
+# tag if you want to use a different macro definition that overrules the
+# definition found in the source code.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+EXPAND_AS_DEFINED =
+
+# If the SKIP_FUNCTION_MACROS tag is set to YES then doxygen's preprocessor will
+# remove all refrences to function-like macros that are alone on a line, have an
+# all uppercase name, and do not end with a semicolon. Such function macros are
+# typically used for boiler-plate code, and will confuse the parser if not
+# removed.
+# The default value is: YES.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+SKIP_FUNCTION_MACROS = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to external references
+#---------------------------------------------------------------------------
+
+# The TAGFILES tag can be used to specify one or more tag files. For each tag
+# file the location of the external documentation should be added. The format of
+# a tag file without this location is as follows:
+# TAGFILES = file1 file2 ...
+# Adding location for the tag files is done as follows:
+# TAGFILES = file1=loc1 "file2 = loc2" ...
+# where loc1 and loc2 can be relative or absolute paths or URLs. See the
+# section "Linking to external documentation" for more information about the use
+# of tag files.
+# Note: Each tag file must have an unique name (where the name does NOT include
+# the path). If a tag file is not located in the directory in which doxygen is
+# run, you must also specify the path to the tagfile here.
+
+TAGFILES =
+
+# When a file name is specified after GENERATE_TAGFILE, doxygen will create a
+# tag file that is based on the input files it reads. See section "Linking to
+# external documentation" for more information about the usage of tag files.
+
+GENERATE_TAGFILE =
+
+# If the ALLEXTERNALS tag is set to YES all external class will be listed in the
+# class index. If set to NO only the inherited external classes will be listed.
+# The default value is: NO.
+
+ALLEXTERNALS = NO
+
+# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed in
+# the modules index. If set to NO, only the current project's groups will be
+# listed.
+# The default value is: YES.
+
+EXTERNAL_GROUPS = YES
+
+# If the EXTERNAL_PAGES tag is set to YES all external pages will be listed in
+# the related pages index. If set to NO, only the current project's pages will
+# be listed.
+# The default value is: YES.
+
+EXTERNAL_PAGES = YES
+
+# The PERL_PATH should be the absolute path and name of the perl script
+# interpreter (i.e. the result of 'which perl').
+# The default file (with absolute path) is: /usr/bin/perl.
+
+PERL_PATH = /usr/bin/perl
+
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool
+#---------------------------------------------------------------------------
+
+# If the CLASS_DIAGRAMS tag is set to YES doxygen will generate a class diagram
+# (in HTML and LaTeX) for classes with base or super classes. Setting the tag to
+# NO turns the diagrams off. Note that this option also works with HAVE_DOT
+# disabled, but it is recommended to install and use dot, since it yields more
+# powerful graphs.
+# The default value is: YES.
+
+CLASS_DIAGRAMS = YES
+
+# You can define message sequence charts within doxygen comments using the \msc
+# command. Doxygen will then run the mscgen tool (see:
+# http://www.mcternan.me.uk/mscgen/)) to produce the chart and insert it in the
+# documentation. The MSCGEN_PATH tag allows you to specify the directory where
+# the mscgen tool resides. If left empty the tool is assumed to be found in the
+# default search path.
+
+MSCGEN_PATH =
+
+# You can include diagrams made with dia in doxygen documentation. Doxygen will
+# then run dia to produce the diagram and insert it in the documentation. The
+# DIA_PATH tag allows you to specify the directory where the dia binary resides.
+# If left empty dia is assumed to be found in the default search path.
+
+DIA_PATH =
+
+# If set to YES, the inheritance and collaboration graphs will hide inheritance
+# and usage relations if the target is undocumented or is not a class.
+# The default value is: YES.
+
+HIDE_UNDOC_RELATIONS = YES
+
+# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
+# available from the path. This tool is part of Graphviz (see:
+# http://www.graphviz.org/), a graph visualization toolkit from AT&T and Lucent
+# Bell Labs. The other options in this section have no effect if this option is
+# set to NO
+# The default value is: NO.
+
+HAVE_DOT = NO
+
+# The DOT_NUM_THREADS specifies the number of dot invocations doxygen is allowed
+# to run in parallel. When set to 0 doxygen will base this on the number of
+# processors available in the system. You can set it explicitly to a value
+# larger than 0 to get control over the balance between CPU load and processing
+# speed.
+# Minimum value: 0, maximum value: 32, default value: 0.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_NUM_THREADS = 0
+
+# When you want a differently looking font n the dot files that doxygen
+# generates you can specify the font name using DOT_FONTNAME. You need to make
+# sure dot is able to find the font, which can be done by putting it in a
+# standard location or by setting the DOTFONTPATH environment variable or by
+# setting DOT_FONTPATH to the directory containing the font.
+# The default value is: Helvetica.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_FONTNAME = Helvetica
+
+# The DOT_FONTSIZE tag can be used to set the size (in points) of the font of
+# dot graphs.
+# Minimum value: 4, maximum value: 24, default value: 10.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_FONTSIZE = 10
+
+# By default doxygen will tell dot to use the default font as specified with
+# DOT_FONTNAME. If you specify a different font using DOT_FONTNAME you can set
+# the path where dot can find it using this tag.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_FONTPATH =
+
+# If the CLASS_GRAPH tag is set to YES then doxygen will generate a graph for
+# each documented class showing the direct and indirect inheritance relations.
+# Setting this tag to YES will force the CLASS_DIAGRAMS tag to NO.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+CLASS_GRAPH = YES
+
+# If the COLLABORATION_GRAPH tag is set to YES then doxygen will generate a
+# graph for each documented class showing the direct and indirect implementation
+# dependencies (inheritance, containment, and class references variables) of the
+# class with other documented classes.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+COLLABORATION_GRAPH = YES
+
+# If the GROUP_GRAPHS tag is set to YES then doxygen will generate a graph for
+# groups, showing the direct groups dependencies.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+GROUP_GRAPHS = YES
+
+# If the UML_LOOK tag is set to YES doxygen will generate inheritance and
+# collaboration diagrams in a style similar to the OMG's Unified Modeling
+# Language.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+UML_LOOK = NO
+
+# If the UML_LOOK tag is enabled, the fields and methods are shown inside the
+# class node. If there are many fields or methods and many nodes the graph may
+# become too big to be useful. The UML_LIMIT_NUM_FIELDS threshold limits the
+# number of items for each type to make the size more manageable. Set this to 0
+# for no limit. Note that the threshold may be exceeded by 50% before the limit
+# is enforced. So when you set the threshold to 10, up to 15 fields may appear,
+# but if the number exceeds 15, the total amount of fields shown is limited to
+# 10.
+# Minimum value: 0, maximum value: 100, default value: 10.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+UML_LIMIT_NUM_FIELDS = 10
+
+# If the TEMPLATE_RELATIONS tag is set to YES then the inheritance and
+# collaboration graphs will show the relations between templates and their
+# instances.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+TEMPLATE_RELATIONS = NO
+
+# If the INCLUDE_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are set to
+# YES then doxygen will generate a graph for each documented file showing the
+# direct and indirect include dependencies of the file with other documented
+# files.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+INCLUDE_GRAPH = YES
+
+# If the INCLUDED_BY_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are
+# set to YES then doxygen will generate a graph for each documented file showing
+# the direct and indirect include dependencies of the file with other documented
+# files.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+INCLUDED_BY_GRAPH = YES
+
+# If the CALL_GRAPH tag is set to YES then doxygen will generate a call
+# dependency graph for every global function or class method.
+#
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable call graphs for selected
+# functions only using the \callgraph command.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+CALL_GRAPH = NO
+
+# If the CALLER_GRAPH tag is set to YES then doxygen will generate a caller
+# dependency graph for every global function or class method.
+#
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable caller graphs for selected
+# functions only using the \callergraph command.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+CALLER_GRAPH = NO
+
+# If the GRAPHICAL_HIERARCHY tag is set to YES then doxygen will graphical
+# hierarchy of all classes instead of a textual one.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+GRAPHICAL_HIERARCHY = YES
+
+# If the DIRECTORY_GRAPH tag is set to YES then doxygen will show the
+# dependencies a directory has on other directories in a graphical way. The
+# dependency relations are determined by the #include relations between the
+# files in the directories.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DIRECTORY_GRAPH = YES
+
+# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
+# generated by dot.
+# Note: If you choose svg you need to set HTML_FILE_EXTENSION to xhtml in order
+# to make the SVG files visible in IE 9+ (other browsers do not have this
+# requirement).
+# Possible values are: png, jpg, gif and svg.
+# The default value is: png.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_IMAGE_FORMAT = png
+
+# If DOT_IMAGE_FORMAT is set to svg, then this option can be set to YES to
+# enable generation of interactive SVG images that allow zooming and panning.
+#
+# Note that this requires a modern browser other than Internet Explorer. Tested
+# and working are Firefox, Chrome, Safari, and Opera.
+# Note: For IE 9+ you need to set HTML_FILE_EXTENSION to xhtml in order to make
+# the SVG files visible. Older versions of IE do not have SVG support.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+INTERACTIVE_SVG = NO
+
+# The DOT_PATH tag can be used to specify the path where the dot tool can be
+# found. If left blank, it is assumed the dot tool can be found in the path.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_PATH =
+
+# The DOTFILE_DIRS tag can be used to specify one or more directories that
+# contain dot files that are included in the documentation (see the \dotfile
+# command).
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOTFILE_DIRS =
+
+# The MSCFILE_DIRS tag can be used to specify one or more directories that
+# contain msc files that are included in the documentation (see the \mscfile
+# command).
+
+MSCFILE_DIRS =
+
+# The DIAFILE_DIRS tag can be used to specify one or more directories that
+# contain dia files that are included in the documentation (see the \diafile
+# command).
+
+DIAFILE_DIRS =
+
+# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of nodes
+# that will be shown in the graph. If the number of nodes in a graph becomes
+# larger than this value, doxygen will truncate the graph, which is visualized
+# by representing a node as a red box. Note that doxygen if the number of direct
+# children of the root node in a graph is already larger than
+# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note that
+# the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
+# Minimum value: 0, maximum value: 10000, default value: 50.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_GRAPH_MAX_NODES = 50
+
+# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the graphs
+# generated by dot. A depth value of 3 means that only nodes reachable from the
+# root by following a path via at most 3 edges will be shown. Nodes that lay
+# further from the root node will be omitted. Note that setting this option to 1
+# or 2 may greatly reduce the computation time needed for large code bases. Also
+# note that the size of a graph can be further restricted by
+# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
+# Minimum value: 0, maximum value: 1000, default value: 0.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+MAX_DOT_GRAPH_DEPTH = 0
+
+# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent
+# background. This is disabled by default, because dot on Windows does not seem
+# to support this out of the box.
+#
+# Warning: Depending on the platform used, enabling this option may lead to
+# badly anti-aliased labels on the edges of a graph (i.e. they become hard to
+# read).
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_TRANSPARENT = NO
+
+# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output
+# files in one run (i.e. multiple -o and -T options on the command line). This
+# makes dot run faster, but since only newer versions of dot (>1.8.10) support
+# this, this feature is disabled by default.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_MULTI_TARGETS = NO
+
+# If the GENERATE_LEGEND tag is set to YES doxygen will generate a legend page
+# explaining the meaning of the various boxes and arrows in the dot generated
+# graphs.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+GENERATE_LEGEND = YES
+
+# If the DOT_CLEANUP tag is set to YES doxygen will remove the intermediate dot
+# files that are used to generate the various graphs.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_CLEANUP = YES
diff --git a/CMSIS/DoxyGen/NN/src/Change Log.txt b/CMSIS/DoxyGen/NN/src/Change Log.txt
new file mode 100644
index 0000000..63dcaa8
--- /dev/null
+++ b/CMSIS/DoxyGen/NN/src/Change Log.txt
@@ -0,0 +1,9 @@
+/**
+\page ChangeLog_pg Change Log
+
+<hr>
+<b>Version 1.0.0</b>
+
+ Initial version
+
+*/
diff --git a/CMSIS/DoxyGen/NN/src/images/CIFAR10_CNN.gif b/CMSIS/DoxyGen/NN/src/images/CIFAR10_CNN.gif
new file mode 100644
index 0000000..410114f
--- /dev/null
+++ b/CMSIS/DoxyGen/NN/src/images/CIFAR10_CNN.gif
Binary files differ
diff --git a/CMSIS/DoxyGen/NN/src/images/CMSIS-NN-OVERVIEW.GIF b/CMSIS/DoxyGen/NN/src/images/CMSIS-NN-OVERVIEW.GIF
new file mode 100644
index 0000000..b082873
--- /dev/null
+++ b/CMSIS/DoxyGen/NN/src/images/CMSIS-NN-OVERVIEW.GIF
Binary files differ
diff --git a/CMSIS/DoxyGen/NN/src/images/GRU.gif b/CMSIS/DoxyGen/NN/src/images/GRU.gif
new file mode 100644
index 0000000..c5cfb4f
--- /dev/null
+++ b/CMSIS/DoxyGen/NN/src/images/GRU.gif
Binary files differ
diff --git a/CMSIS/DoxyGen/genDoc.bat b/CMSIS/DoxyGen/genDoc.bat
index f3acb97..af178ab 100644
--- a/CMSIS/DoxyGen/genDoc.bat
+++ b/CMSIS/DoxyGen/genDoc.bat
@@ -22,7 +22,7 @@
REM -- Remove generated doxygen files ---------------------
PUSHD ..\Documentation
-FOR %%A IN (Core, Core_A, DAP, Driver, DSP, General, Pack, RTOS, RTOS2, SVD, Zone) DO IF EXIST %%A (RMDIR /S /Q %%A)
+FOR %%A IN (Core, Core_A, DAP, Driver, DSP, NN, General, Pack, RTOS, RTOS2, SVD, Zone) DO IF EXIST %%A (RMDIR /S /Q %%A)
POPD
REM -- Generate New HTML Files ---------------------
@@ -49,6 +49,10 @@
CALL doxygen_dsp.bat
popd
+pushd NN
+CALL doxygen_nn.bat
+popd
+
pushd General
CALL doxygen_general.bat
popd
@@ -83,6 +87,7 @@
copy /Y Doxygen_Templates\search.css ..\Documentation\Pack\html\search\.
REM copy /Y Doxygen_Templates\search.css ..\Documentation\SVD\html\search\.
copy /Y Doxygen_Templates\search.css ..\Documentation\DSP\html\search\.
+copy /Y Doxygen_Templates\search.css ..\Documentation\NN\html\search\.
copy /Y Doxygen_Templates\search.css ..\Documentation\DAP\html\search\.
copy /Y Doxygen_Templates\search.css ..\Documentation\RTOS\html\search\.
copy /Y Doxygen_Templates\search.css ..\Documentation\RTOS2\html\search\.
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/startup_ARMCM0.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..9fc447d
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,242 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM0.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM0 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000C00
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/system_ARMCM0.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66829ad
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file system_ARMCM0.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM0 Device Series
+ * @version V5.00
+ * @date 08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000U) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/startup_ARMCM3.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..16e56b0
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM3.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM3 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000C00
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/system_ARMCM3.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f08df7a
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file system_ARMCM3.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM3 Device Series
+ * @version V5.00
+ * @date 08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000U) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4/startup_ARMCM4.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4/startup_ARMCM4.s
new file mode 100644
index 0000000..dae6439
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4/startup_ARMCM4.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM4.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM4 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000C00
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4/system_ARMCM4.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4/system_ARMCM4.c
new file mode 100644
index 0000000..af23005
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file system_ARMCM4.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM4 Device Series
+ * @version V5.00
+ * @date 07. September 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+ #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+ #include "ARMCM4_FP.h"
+#else
+ #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000UL) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5U * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+ extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+ SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+ SCB->CPACR |= ((3U << 10U*2U) | /* set CP10 Full Access */
+ (3U << 11U*2U) ); /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+ SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..d29bd2f
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM4.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM4 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000800
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00080000
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..070fa1e
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file system_ARMCM4.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM4 Device Series
+ * @version V5.00
+ * @date 08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+ #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+ #include "ARMCM4_FP.h"
+#else
+ #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000U) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3U << 10*2) | /* set CP10 Full Access */
+ (3U << 11*2) ); /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+ SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/gcc_arm.ld b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/gcc_arm.ld
new file mode 100644
index 0000000..b987fd1
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/gcc_arm.ld
@@ -0,0 +1,196 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K
+ RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ * Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ * __exidx_start
+ * __exidx_end
+ * __copy_table_start__
+ * __copy_table_end__
+ * __zero_table_start__
+ * __zero_table_end__
+ * __etext
+ * __data_start__
+ * __preinit_array_start
+ * __preinit_array_end
+ * __init_array_start
+ * __init_array_end
+ * __fini_array_start
+ * __fini_array_end
+ * __data_end__
+ * __bss_start__
+ * __bss_end__
+ * __end__
+ * end
+ * __HeapBase
+ * __HeapLimit
+ * __StackLimit
+ * __StackTop
+ * __stack
+ * __Vectors_End
+ * __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.vectors))
+ __Vectors_End = .;
+ __Vectors_Size = __Vectors_End - __Vectors;
+ __end__ = .;
+
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ /* To copy multiple ROM to RAM sections,
+ * uncomment .copy.table section and,
+ * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .copy.table :
+ {
+ . = ALIGN(4);
+ __copy_table_start__ = .;
+ LONG (__etext)
+ LONG (__data_start__)
+ LONG (__data_end__ - __data_start__)
+ LONG (__etext2)
+ LONG (__data2_start__)
+ LONG (__data2_end__ - __data2_start__)
+ __copy_table_end__ = .;
+ } > FLASH
+ */
+
+ /* To clear multiple BSS sections,
+ * uncomment .zero.table section and,
+ * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .zero.table :
+ {
+ . = ALIGN(4);
+ __zero_table_start__ = .;
+ LONG (__bss_start__)
+ LONG (__bss_end__ - __bss_start__)
+ LONG (__bss2_start__)
+ LONG (__bss2_end__ - __bss2_start__)
+ __zero_table_end__ = .;
+ } > FLASH
+ */
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ end = __end__;
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
new file mode 100644
index 0000000..26edb9f
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
@@ -0,0 +1,295 @@
+/**************************************************************************//**
+ * @file startup_ARMCM7.s
+ * @brief CMSIS Core Device Startup File for
+ * ARMCM7 Device Series
+ * @version V5.00
+ * @date 26. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdint.h>
+
+
+/*----------------------------------------------------------------------------
+ Linker generated Symbols
+ *----------------------------------------------------------------------------*/
+extern uint32_t __etext;
+extern uint32_t __data_start__;
+extern uint32_t __data_end__;
+extern uint32_t __copy_table_start__;
+extern uint32_t __copy_table_end__;
+extern uint32_t __zero_table_start__;
+extern uint32_t __zero_table_end__;
+extern uint32_t __bss_start__;
+extern uint32_t __bss_end__;
+extern uint32_t __StackTop;
+
+/*----------------------------------------------------------------------------
+ Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+
+/*----------------------------------------------------------------------------
+ External References
+ *----------------------------------------------------------------------------*/
+#ifndef __START
+extern void _start(void) __attribute__((noreturn)); /* PreeMain (C library entry point) */
+#else
+extern int __START(void) __attribute__((noreturn)); /* main entry point */
+#endif
+
+#ifndef __NO_SYSTEM_INIT
+extern void SystemInit (void); /* CMSIS System Initialization */
+#endif
+
+
+/*----------------------------------------------------------------------------
+ Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void); /* Default empty handler */
+void Reset_Handler(void); /* Reset Handler */
+
+
+/*----------------------------------------------------------------------------
+ User Initial Stack & Heap
+ *----------------------------------------------------------------------------*/
+#ifndef __STACK_SIZE
+ #define __STACK_SIZE 0x00000400
+#endif
+static uint8_t stack[__STACK_SIZE] __attribute__ ((aligned(8), used, section(".stack")));
+
+#ifndef __HEAP_SIZE
+ #define __HEAP_SIZE 0x00000C00
+#endif
+#if __HEAP_SIZE > 0
+static uint8_t heap[__HEAP_SIZE] __attribute__ ((aligned(8), used, section(".heap")));
+#endif
+
+
+/*----------------------------------------------------------------------------
+ Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Cortex-M7 Processor Exceptions */
+void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+/* ARMCM7 Specific Interrupts */
+void WDT_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIM0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIM2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void MCIA_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void MCIB_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART4_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void AACI_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void ENET_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBDC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBHC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CHLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void FLEXRAY_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CAN_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void LIN_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void I2C_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CPU_CLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPI_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+ Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+const pFunc __Vectors[] __attribute__ ((section(".vectors"))) = {
+ /* Cortex-M7 Exceptions Handler */
+ (pFunc)((uint32_t)&__StackTop), /* Initial Stack Pointer */
+ Reset_Handler, /* Reset Handler */
+ NMI_Handler, /* NMI Handler */
+ HardFault_Handler, /* Hard Fault Handler */
+ MemManage_Handler, /* MPU Fault Handler */
+ BusFault_Handler, /* Bus Fault Handler */
+ UsageFault_Handler, /* Usage Fault Handler */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ SVC_Handler, /* SVCall Handler */
+ DebugMon_Handler, /* Debug Monitor Handler */
+ 0, /* Reserved */
+ PendSV_Handler, /* PendSV Handler */
+ SysTick_Handler, /* SysTick Handler */
+
+ /* External interrupts */
+ WDT_IRQHandler, /* 0: Watchdog Timer */
+ RTC_IRQHandler, /* 1: Real Time Clock */
+ TIM0_IRQHandler, /* 2: Timer0 / Timer1 */
+ TIM2_IRQHandler, /* 3: Timer2 / Timer3 */
+ MCIA_IRQHandler, /* 4: MCIa */
+ MCIB_IRQHandler, /* 5: MCIb */
+ UART0_IRQHandler, /* 6: UART0 - DUT FPGA */
+ UART1_IRQHandler, /* 7: UART1 - DUT FPGA */
+ UART2_IRQHandler, /* 8: UART2 - DUT FPGA */
+ UART4_IRQHandler, /* 9: UART4 - not connected */
+ AACI_IRQHandler, /* 10: AACI / AC97 */
+ CLCD_IRQHandler, /* 11: CLCD Combined Interrupt */
+ ENET_IRQHandler, /* 12: Ethernet */
+ USBDC_IRQHandler, /* 13: USB Device */
+ USBHC_IRQHandler, /* 14: USB Host Controller */
+ CHLCD_IRQHandler, /* 15: Character LCD */
+ FLEXRAY_IRQHandler, /* 16: Flexray */
+ CAN_IRQHandler, /* 17: CAN */
+ LIN_IRQHandler, /* 18: LIN */
+ I2C_IRQHandler, /* 19: I2C ADC/DAC */
+ 0, /* 20: Reserved */
+ 0, /* 21: Reserved */
+ 0, /* 22: Reserved */
+ 0, /* 23: Reserved */
+ 0, /* 24: Reserved */
+ 0, /* 25: Reserved */
+ 0, /* 26: Reserved */
+ 0, /* 27: Reserved */
+ CPU_CLCD_IRQHandler, /* 28: Reserved - CPU FPGA CLCD */
+ 0, /* 29: Reserved - CPU FPGA */
+ UART3_IRQHandler, /* 30: UART3 - CPU FPGA */
+ SPI_IRQHandler /* 31: SPI Touchscreen - CPU FPGA */
+};
+
+
+/*----------------------------------------------------------------------------
+ Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void) {
+ uint32_t *pSrc, *pDest;
+ uint32_t *pTable __attribute__((unused));
+
+/* Firstly it copies data from read only memory to RAM. There are two schemes
+ * to copy. One can copy more than one sections. Another can only copy
+ * one section. The former scheme needs more instructions and read-only
+ * data to implement than the latter.
+ * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */
+
+#ifdef __STARTUP_COPY_MULTIPLE
+/* Multiple sections scheme.
+ *
+ * Between symbol address __copy_table_start__ and __copy_table_end__,
+ * there are array of triplets, each of which specify:
+ * offset 0: LMA of start of a section to copy from
+ * offset 4: VMA of start of a section to copy to
+ * offset 8: size of the section to copy. Must be multiply of 4
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+ pTable = &__copy_table_start__;
+
+ for (; pTable < &__copy_table_end__; pTable = pTable + 3) {
+ pSrc = (uint32_t*)*(pTable + 0);
+ pDest = (uint32_t*)*(pTable + 1);
+ for (; pDest < (uint32_t*)(*(pTable + 1) + *(pTable + 2)) ; ) {
+ *pDest++ = *pSrc++;
+ }
+ }
+#else
+/* Single section scheme.
+ *
+ * The ranges of copy from/to are specified by following symbols
+ * __etext: LMA of start of the section to copy from. Usually end of text
+ * __data_start__: VMA of start of the section to copy to
+ * __data_end__: VMA of end of the section to copy to
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+ pSrc = &__etext;
+ pDest = &__data_start__;
+
+ for ( ; pDest < &__data_end__ ; ) {
+ *pDest++ = *pSrc++;
+ }
+#endif /*__STARTUP_COPY_MULTIPLE */
+
+/* This part of work usually is done in C library startup code. Otherwise,
+ * define this macro to enable it in this startup.
+ *
+ * There are two schemes too. One can clear multiple BSS sections. Another
+ * can only clear one section. The former is more size expensive than the
+ * latter.
+ *
+ * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
+ * Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
+ */
+#ifdef __STARTUP_CLEAR_BSS_MULTIPLE
+/* Multiple sections scheme.
+ *
+ * Between symbol address __copy_table_start__ and __copy_table_end__,
+ * there are array of tuples specifying:
+ * offset 0: Start of a BSS section
+ * offset 4: Size of this BSS section. Must be multiply of 4
+ */
+ pTable = &__zero_table_start__;
+
+ for (; pTable < &__zero_table_end__; pTable = pTable + 2) {
+ pDest = (uint32_t*)*(pTable + 0);
+ for (; pDest < (uint32_t*)(*(pTable + 0) + *(pTable + 1)) ; ) {
+ *pDest++ = 0;
+ }
+ }
+#elif defined (__STARTUP_CLEAR_BSS)
+/* Single BSS section scheme.
+ *
+ * The BSS section is specified by following symbols
+ * __bss_start__: start of the BSS section.
+ * __bss_end__: end of the BSS section.
+ *
+ * Both addresses must be aligned to 4 bytes boundary.
+ */
+ pDest = &__bss_start__;
+
+ for ( ; pDest < &__bss_end__ ; ) {
+ *pDest++ = 0UL;
+ }
+#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
+
+#ifndef __NO_SYSTEM_INIT
+ SystemInit();
+#endif
+
+#ifndef __START
+#define __START _start
+#endif
+ __START();
+
+}
+
+
+/*----------------------------------------------------------------------------
+ Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) {
+
+ while(1);
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..b69f038
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM7.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM7 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000C00
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..65bfaca
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file system_ARMCM7.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM7 Device Series
+ * @version V5.00
+ * @date 08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+ #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+ #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+ #include "ARMCM7_DP.h"
+#else
+ #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000U) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3U << 10*2) | /* set CP10 Full Access */
+ (3U << 11*2) ); /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+ SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/STM32F411RETx/startup_stm32f411xe.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/STM32F411RETx/startup_stm32f411xe.s
new file mode 100644
index 0000000..9b70614
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/STM32F411RETx/startup_stm32f411xe.s
@@ -0,0 +1,395 @@
+;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
+;* File Name : startup_stm32f411xe.s
+;* Author : MCD Application Team
+;* Version : V2.6.0
+;* Date : 04-November-2016
+;* Description : STM32F411xExx devices vector table for MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the CortexM4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>
+;*******************************************************************************
+;
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;* 1. Redistributions of source code must retain the above copyright notice,
+;* this list of conditions and the following disclaimer.
+;* 2. Redistributions in binary form must reproduce the above copyright notice,
+;* this list of conditions and the following disclaimer in the documentation
+;* and/or other materials provided with the distribution.
+;* 3. Neither the name of STMicroelectronics nor the names of its contributors
+;* may be used to endorse or promote products derived from this software
+;* without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;
+;*******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_IRQHandler ; PVD through EXTI Line detection
+ DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
+ DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
+ DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
+ DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
+ DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
+ DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
+ DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
+ DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
+ DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
+ DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD 0 ; Reserved
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]s
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
+ DCD 0 ; Reserved
+ DCD SDIO_IRQHandler ; SDIO
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
+ DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
+ DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
+ DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
+ DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD OTG_FS_IRQHandler ; USB OTG FS
+ DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
+ DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
+ DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
+ DCD USART6_IRQHandler ; USART6
+ DCD I2C3_EV_IRQHandler ; I2C3 event
+ DCD I2C3_ER_IRQHandler ; I2C3 error
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD FPU_IRQHandler ; FPU
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SPI4_IRQHandler ; SPI4
+ DCD SPI5_IRQHandler ; SPI5
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_IRQHandler [WEAK]
+ EXPORT TAMP_STAMP_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Stream0_IRQHandler [WEAK]
+ EXPORT DMA1_Stream1_IRQHandler [WEAK]
+ EXPORT DMA1_Stream2_IRQHandler [WEAK]
+ EXPORT DMA1_Stream3_IRQHandler [WEAK]
+ EXPORT DMA1_Stream4_IRQHandler [WEAK]
+ EXPORT DMA1_Stream5_IRQHandler [WEAK]
+ EXPORT DMA1_Stream6_IRQHandler [WEAK]
+ EXPORT ADC_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
+ EXPORT DMA1_Stream7_IRQHandler [WEAK]
+ EXPORT SDIO_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT DMA2_Stream0_IRQHandler [WEAK]
+ EXPORT DMA2_Stream1_IRQHandler [WEAK]
+ EXPORT DMA2_Stream2_IRQHandler [WEAK]
+ EXPORT DMA2_Stream3_IRQHandler [WEAK]
+ EXPORT DMA2_Stream4_IRQHandler [WEAK]
+ EXPORT OTG_FS_IRQHandler [WEAK]
+ EXPORT DMA2_Stream5_IRQHandler [WEAK]
+ EXPORT DMA2_Stream6_IRQHandler [WEAK]
+ EXPORT DMA2_Stream7_IRQHandler [WEAK]
+ EXPORT USART6_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT SPI5_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_IRQHandler
+TAMP_STAMP_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Stream0_IRQHandler
+DMA1_Stream1_IRQHandler
+DMA1_Stream2_IRQHandler
+DMA1_Stream3_IRQHandler
+DMA1_Stream4_IRQHandler
+DMA1_Stream5_IRQHandler
+DMA1_Stream6_IRQHandler
+ADC_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM9_IRQHandler
+TIM1_UP_TIM10_IRQHandler
+TIM1_TRG_COM_TIM11_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+OTG_FS_WKUP_IRQHandler
+DMA1_Stream7_IRQHandler
+SDIO_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+DMA2_Stream0_IRQHandler
+DMA2_Stream1_IRQHandler
+DMA2_Stream2_IRQHandler
+DMA2_Stream3_IRQHandler
+DMA2_Stream4_IRQHandler
+OTG_FS_IRQHandler
+DMA2_Stream5_IRQHandler
+DMA2_Stream6_IRQHandler
+DMA2_Stream7_IRQHandler
+USART6_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+FPU_IRQHandler
+SPI4_IRQHandler
+SPI5_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/STM32F411RETx/system_stm32f4xx.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/STM32F411RETx/system_stm32f4xx.c
new file mode 100644
index 0000000..bca0633
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/STM32F411RETx/system_stm32f4xx.c
@@ -0,0 +1,763 @@
+/**
+ ******************************************************************************
+ * @file system_stm32f4xx.c
+ * @author MCD Application Team
+ * @version V2.6.0
+ * @date 04-November-2016
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32f4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32f4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Includes
+ * @{
+ */
+
+
+#include "stm32f4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+ || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+/* #define DATA_IN_ExtSRAM */
+#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
+ STM32F412Zx || STM32F412Vx */
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+/* #define DATA_IN_ExtSDRAM */
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
+ STM32F479xx */
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Variables
+ * @{
+ */
+ /* This variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+uint32_t SystemCoreClock = 16000000;
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+ static void SystemInit_ExtMemCtl(void);
+#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system
+ * Initialize the FPU setting, vector table location and External memory
+ * configuration.
+ * @param None
+ * @retval None
+ */
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
+ #endif
+ /* Reset the RCC clock configuration to the default reset state ------------*/
+ /* Set HSION bit */
+ RCC->CR |= (uint32_t)0x00000001;
+
+ /* Reset CFGR register */
+ RCC->CFGR = 0x00000000;
+
+ /* Reset HSEON, CSSON and PLLON bits */
+ RCC->CR &= (uint32_t)0xFEF6FFFF;
+
+ /* Reset PLLCFGR register */
+ RCC->PLLCFGR = 0x24003010;
+
+ /* Reset HSEBYP bit */
+ RCC->CR &= (uint32_t)0xFFFBFFFF;
+
+ /* Disable all interrupts */
+ RCC->CIR = 0x00000000;
+
+#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+ SystemInit_ExtMemCtl();
+#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
+ * depends on the application requirements), user has to ensure that HSE_VALUE
+ * is same as the real frequency of the crystal used. Otherwise, this function
+ * may have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+ switch (tmp)
+ {
+ case 0x00: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+ case 0x04: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+ case 0x08: /* PLL used as system clock source */
+
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+ SYSCLK = PLL_VCO / PLL_P
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+
+ if (pllsource != 0)
+ {
+ /* HSE used as PLL clock source */
+ pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+ }
+ else
+ {
+ /* HSI used as PLL clock source */
+ pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+ }
+
+ pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+ SystemCoreClock = pllvco/pllp;
+ break;
+ default:
+ SystemCoreClock = HSI_VALUE;
+ break;
+ }
+ /* Compute HCLK frequency --------------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK frequency */
+ SystemCoreClock >>= tmp;
+}
+
+#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx)
+/**
+ * @brief Setup the external memory controller.
+ * Called in startup_stm32f4xx.s before jump to main.
+ * This function configures the external memories (SRAM/SDRAM)
+ * This SRAM/SDRAM will be used as program data memory (including heap and stack).
+ * @param None
+ * @retval None
+ */
+void SystemInit_ExtMemCtl(void)
+{
+ __IO uint32_t tmp = 0x00;
+
+ register uint32_t tmpreg = 0, timeout = 0xFFFF;
+ register __IO uint32_t index;
+
+ /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
+ RCC->AHB1ENR |= 0x000001F8;
+
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
+
+ /* Connect PDx pins to FMC Alternate function */
+ GPIOD->AFR[0] = 0x00CCC0CC;
+ GPIOD->AFR[1] = 0xCCCCCCCC;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOD->MODER = 0xAAAA0A8A;
+ /* Configure PDx pins speed to 100 MHz */
+ GPIOD->OSPEEDR = 0xFFFF0FCF;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOD->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOD->PUPDR = 0x00000000;
+
+ /* Connect PEx pins to FMC Alternate function */
+ GPIOE->AFR[0] = 0xC00CC0CC;
+ GPIOE->AFR[1] = 0xCCCCCCCC;
+ /* Configure PEx pins in Alternate function mode */
+ GPIOE->MODER = 0xAAAA828A;
+ /* Configure PEx pins speed to 100 MHz */
+ GPIOE->OSPEEDR = 0xFFFFC3CF;
+ /* Configure PEx pins Output type to push-pull */
+ GPIOE->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PEx pins */
+ GPIOE->PUPDR = 0x00000000;
+
+ /* Connect PFx pins to FMC Alternate function */
+ GPIOF->AFR[0] = 0xCCCCCCCC;
+ GPIOF->AFR[1] = 0xCCCCCCCC;
+ /* Configure PFx pins in Alternate function mode */
+ GPIOF->MODER = 0xAA800AAA;
+ /* Configure PFx pins speed to 50 MHz */
+ GPIOF->OSPEEDR = 0xAA800AAA;
+ /* Configure PFx pins Output type to push-pull */
+ GPIOF->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PFx pins */
+ GPIOF->PUPDR = 0x00000000;
+
+ /* Connect PGx pins to FMC Alternate function */
+ GPIOG->AFR[0] = 0xCCCCCCCC;
+ GPIOG->AFR[1] = 0xCCCCCCCC;
+ /* Configure PGx pins in Alternate function mode */
+ GPIOG->MODER = 0xAAAAAAAA;
+ /* Configure PGx pins speed to 50 MHz */
+ GPIOG->OSPEEDR = 0xAAAAAAAA;
+ /* Configure PGx pins Output type to push-pull */
+ GPIOG->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PGx pins */
+ GPIOG->PUPDR = 0x00000000;
+
+ /* Connect PHx pins to FMC Alternate function */
+ GPIOH->AFR[0] = 0x00C0CC00;
+ GPIOH->AFR[1] = 0xCCCCCCCC;
+ /* Configure PHx pins in Alternate function mode */
+ GPIOH->MODER = 0xAAAA08A0;
+ /* Configure PHx pins speed to 50 MHz */
+ GPIOH->OSPEEDR = 0xAAAA08A0;
+ /* Configure PHx pins Output type to push-pull */
+ GPIOH->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PHx pins */
+ GPIOH->PUPDR = 0x00000000;
+
+ /* Connect PIx pins to FMC Alternate function */
+ GPIOI->AFR[0] = 0xCCCCCCCC;
+ GPIOI->AFR[1] = 0x00000CC0;
+ /* Configure PIx pins in Alternate function mode */
+ GPIOI->MODER = 0x0028AAAA;
+ /* Configure PIx pins speed to 50 MHz */
+ GPIOI->OSPEEDR = 0x0028AAAA;
+ /* Configure PIx pins Output type to push-pull */
+ GPIOI->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PIx pins */
+ GPIOI->PUPDR = 0x00000000;
+
+/*-- FMC Configuration -------------------------------------------------------*/
+ /* Enable the FMC interface clock */
+ RCC->AHB3ENR |= 0x00000001;
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+
+ FMC_Bank5_6->SDCR[0] = 0x000019E4;
+ FMC_Bank5_6->SDTR[0] = 0x01115351;
+
+ /* SDRAM initialization sequence */
+ /* Clock enable command */
+ FMC_Bank5_6->SDCMR = 0x00000011;
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Delay */
+ for (index = 0; index<1000; index++);
+
+ /* PALL command */
+ FMC_Bank5_6->SDCMR = 0x00000012;
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Auto refresh command */
+ FMC_Bank5_6->SDCMR = 0x00000073;
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* MRD register program */
+ FMC_Bank5_6->SDCMR = 0x00046014;
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Set refresh count */
+ tmpreg = FMC_Bank5_6->SDRTR;
+ FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
+
+ /* Disable write protection */
+ tmpreg = FMC_Bank5_6->SDCR[0];
+ FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
+ /* Configure and enable Bank1_SRAM2 */
+ FMC_Bank1->BTCR[2] = 0x00001011;
+ FMC_Bank1->BTCR[3] = 0x00000201;
+ FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
+#if defined(STM32F469xx) || defined(STM32F479xx)
+ /* Configure and enable Bank1_SRAM2 */
+ FMC_Bank1->BTCR[2] = 0x00001091;
+ FMC_Bank1->BTCR[3] = 0x00110212;
+ FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F469xx || STM32F479xx */
+
+ (void)(tmp);
+}
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
+#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+/**
+ * @brief Setup the external memory controller.
+ * Called in startup_stm32f4xx.s before jump to main.
+ * This function configures the external memories (SRAM/SDRAM)
+ * This SRAM/SDRAM will be used as program data memory (including heap and stack).
+ * @param None
+ * @retval None
+ */
+void SystemInit_ExtMemCtl(void)
+{
+ __IO uint32_t tmp = 0x00;
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+#if defined (DATA_IN_ExtSDRAM)
+ register uint32_t tmpreg = 0, timeout = 0xFFFF;
+ register __IO uint32_t index;
+
+#if defined(STM32F446xx)
+ /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
+ clock */
+ RCC->AHB1ENR |= 0x0000007D;
+#else
+ /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
+ clock */
+ RCC->AHB1ENR |= 0x000001F8;
+#endif /* STM32F446xx */
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
+
+#if defined(STM32F446xx)
+ /* Connect PAx pins to FMC Alternate function */
+ GPIOA->AFR[0] |= 0xC0000000;
+ GPIOA->AFR[1] |= 0x00000000;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOA->MODER |= 0x00008000;
+ /* Configure PDx pins speed to 50 MHz */
+ GPIOA->OSPEEDR |= 0x00008000;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOA->OTYPER |= 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOA->PUPDR |= 0x00000000;
+
+ /* Connect PCx pins to FMC Alternate function */
+ GPIOC->AFR[0] |= 0x00CC0000;
+ GPIOC->AFR[1] |= 0x00000000;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOC->MODER |= 0x00000A00;
+ /* Configure PDx pins speed to 50 MHz */
+ GPIOC->OSPEEDR |= 0x00000A00;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOC->OTYPER |= 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOC->PUPDR |= 0x00000000;
+#endif /* STM32F446xx */
+
+ /* Connect PDx pins to FMC Alternate function */
+ GPIOD->AFR[0] = 0x000000CC;
+ GPIOD->AFR[1] = 0xCC000CCC;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOD->MODER = 0xA02A000A;
+ /* Configure PDx pins speed to 50 MHz */
+ GPIOD->OSPEEDR = 0xA02A000A;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOD->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOD->PUPDR = 0x00000000;
+
+ /* Connect PEx pins to FMC Alternate function */
+ GPIOE->AFR[0] = 0xC00000CC;
+ GPIOE->AFR[1] = 0xCCCCCCCC;
+ /* Configure PEx pins in Alternate function mode */
+ GPIOE->MODER = 0xAAAA800A;
+ /* Configure PEx pins speed to 50 MHz */
+ GPIOE->OSPEEDR = 0xAAAA800A;
+ /* Configure PEx pins Output type to push-pull */
+ GPIOE->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PEx pins */
+ GPIOE->PUPDR = 0x00000000;
+
+ /* Connect PFx pins to FMC Alternate function */
+ GPIOF->AFR[0] = 0xCCCCCCCC;
+ GPIOF->AFR[1] = 0xCCCCCCCC;
+ /* Configure PFx pins in Alternate function mode */
+ GPIOF->MODER = 0xAA800AAA;
+ /* Configure PFx pins speed to 50 MHz */
+ GPIOF->OSPEEDR = 0xAA800AAA;
+ /* Configure PFx pins Output type to push-pull */
+ GPIOF->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PFx pins */
+ GPIOF->PUPDR = 0x00000000;
+
+ /* Connect PGx pins to FMC Alternate function */
+ GPIOG->AFR[0] = 0xCCCCCCCC;
+ GPIOG->AFR[1] = 0xCCCCCCCC;
+ /* Configure PGx pins in Alternate function mode */
+ GPIOG->MODER = 0xAAAAAAAA;
+ /* Configure PGx pins speed to 50 MHz */
+ GPIOG->OSPEEDR = 0xAAAAAAAA;
+ /* Configure PGx pins Output type to push-pull */
+ GPIOG->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PGx pins */
+ GPIOG->PUPDR = 0x00000000;
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx)
+ /* Connect PHx pins to FMC Alternate function */
+ GPIOH->AFR[0] = 0x00C0CC00;
+ GPIOH->AFR[1] = 0xCCCCCCCC;
+ /* Configure PHx pins in Alternate function mode */
+ GPIOH->MODER = 0xAAAA08A0;
+ /* Configure PHx pins speed to 50 MHz */
+ GPIOH->OSPEEDR = 0xAAAA08A0;
+ /* Configure PHx pins Output type to push-pull */
+ GPIOH->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PHx pins */
+ GPIOH->PUPDR = 0x00000000;
+
+ /* Connect PIx pins to FMC Alternate function */
+ GPIOI->AFR[0] = 0xCCCCCCCC;
+ GPIOI->AFR[1] = 0x00000CC0;
+ /* Configure PIx pins in Alternate function mode */
+ GPIOI->MODER = 0x0028AAAA;
+ /* Configure PIx pins speed to 50 MHz */
+ GPIOI->OSPEEDR = 0x0028AAAA;
+ /* Configure PIx pins Output type to push-pull */
+ GPIOI->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PIx pins */
+ GPIOI->PUPDR = 0x00000000;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
+
+/*-- FMC Configuration -------------------------------------------------------*/
+ /* Enable the FMC interface clock */
+ RCC->AHB3ENR |= 0x00000001;
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+
+ /* Configure and enable SDRAM bank1 */
+#if defined(STM32F446xx)
+ FMC_Bank5_6->SDCR[0] = 0x00001954;
+#else
+ FMC_Bank5_6->SDCR[0] = 0x000019E4;
+#endif /* STM32F446xx */
+ FMC_Bank5_6->SDTR[0] = 0x01115351;
+
+ /* SDRAM initialization sequence */
+ /* Clock enable command */
+ FMC_Bank5_6->SDCMR = 0x00000011;
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Delay */
+ for (index = 0; index<1000; index++);
+
+ /* PALL command */
+ FMC_Bank5_6->SDCMR = 0x00000012;
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Auto refresh command */
+#if defined(STM32F446xx)
+ FMC_Bank5_6->SDCMR = 0x000000F3;
+#else
+ FMC_Bank5_6->SDCMR = 0x00000073;
+#endif /* STM32F446xx */
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* MRD register program */
+#if defined(STM32F446xx)
+ FMC_Bank5_6->SDCMR = 0x00044014;
+#else
+ FMC_Bank5_6->SDCMR = 0x00046014;
+#endif /* STM32F446xx */
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Set refresh count */
+ tmpreg = FMC_Bank5_6->SDRTR;
+#if defined(STM32F446xx)
+ FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
+#else
+ FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
+#endif /* STM32F446xx */
+
+ /* Disable write protection */
+ tmpreg = FMC_Bank5_6->SDCR[0];
+ FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
+#endif /* DATA_IN_ExtSDRAM */
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
+
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+ || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+
+#if defined(DATA_IN_ExtSRAM)
+/*-- GPIOs Configuration -----------------------------------------------------*/
+ /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+ RCC->AHB1ENR |= 0x00000078;
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
+
+ /* Connect PDx pins to FMC Alternate function */
+ GPIOD->AFR[0] = 0x00CCC0CC;
+ GPIOD->AFR[1] = 0xCCCCCCCC;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOD->MODER = 0xAAAA0A8A;
+ /* Configure PDx pins speed to 100 MHz */
+ GPIOD->OSPEEDR = 0xFFFF0FCF;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOD->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOD->PUPDR = 0x00000000;
+
+ /* Connect PEx pins to FMC Alternate function */
+ GPIOE->AFR[0] = 0xC00CC0CC;
+ GPIOE->AFR[1] = 0xCCCCCCCC;
+ /* Configure PEx pins in Alternate function mode */
+ GPIOE->MODER = 0xAAAA828A;
+ /* Configure PEx pins speed to 100 MHz */
+ GPIOE->OSPEEDR = 0xFFFFC3CF;
+ /* Configure PEx pins Output type to push-pull */
+ GPIOE->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PEx pins */
+ GPIOE->PUPDR = 0x00000000;
+
+ /* Connect PFx pins to FMC Alternate function */
+ GPIOF->AFR[0] = 0x00CCCCCC;
+ GPIOF->AFR[1] = 0xCCCC0000;
+ /* Configure PFx pins in Alternate function mode */
+ GPIOF->MODER = 0xAA000AAA;
+ /* Configure PFx pins speed to 100 MHz */
+ GPIOF->OSPEEDR = 0xFF000FFF;
+ /* Configure PFx pins Output type to push-pull */
+ GPIOF->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PFx pins */
+ GPIOF->PUPDR = 0x00000000;
+
+ /* Connect PGx pins to FMC Alternate function */
+ GPIOG->AFR[0] = 0x00CCCCCC;
+ GPIOG->AFR[1] = 0x000000C0;
+ /* Configure PGx pins in Alternate function mode */
+ GPIOG->MODER = 0x00085AAA;
+ /* Configure PGx pins speed to 100 MHz */
+ GPIOG->OSPEEDR = 0x000CAFFF;
+ /* Configure PGx pins Output type to push-pull */
+ GPIOG->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PGx pins */
+ GPIOG->PUPDR = 0x00000000;
+
+/*-- FMC/FSMC Configuration --------------------------------------------------*/
+ /* Enable the FMC/FSMC interface clock */
+ RCC->AHB3ENR |= 0x00000001;
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+ /* Configure and enable Bank1_SRAM2 */
+ FMC_Bank1->BTCR[2] = 0x00001011;
+ FMC_Bank1->BTCR[3] = 0x00000201;
+ FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
+#if defined(STM32F469xx) || defined(STM32F479xx)
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+ /* Configure and enable Bank1_SRAM2 */
+ FMC_Bank1->BTCR[2] = 0x00001091;
+ FMC_Bank1->BTCR[3] = 0x00110212;
+ FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F469xx || STM32F479xx */
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
+ || defined(STM32F412Zx) || defined(STM32F412Vx)
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
+ /* Configure and enable Bank1_SRAM2 */
+ FSMC_Bank1->BTCR[2] = 0x00001011;
+ FSMC_Bank1->BTCR[3] = 0x00000201;
+ FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
+#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
+
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
+ STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */
+ (void)(tmp);
+}
+#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM0/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM0/RTE_Components.h
new file mode 100644
index 0000000..4459a74
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM0/RTE_Components.h
@@ -0,0 +1,20 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ * *** Do not modify ! ***
+ *
+ * Project: 'arm_nnexamples_cifar10'
+ * Target: 'ARMCM0'
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File:
+ */
+#define CMSIS_device_header "ARMCM0.h"
+
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM4_FP/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM4_FP/RTE_Components.h
new file mode 100644
index 0000000..b9250b0
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM4_FP/RTE_Components.h
@@ -0,0 +1,28 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ * *** Do not modify ! ***
+ *
+ * Project: 'arm_nnexamples_cifar10'
+ * Target: 'ARMCM4_FP'
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File:
+ */
+#define CMSIS_device_header "ARMCM4_FP.h"
+
+#define RTE_Compiler_IO_STDERR /* Compiler I/O: STDERR */
+ #define RTE_Compiler_IO_STDERR_ITM /* Compiler I/O: STDERR ITM */
+#define RTE_Compiler_IO_STDIN /* Compiler I/O: STDIN */
+ #define RTE_Compiler_IO_STDIN_ITM /* Compiler I/O: STDIN ITM */
+#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
+ #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
+#define RTE_Compiler_IO_TTY /* Compiler I/O: TTY */
+ #define RTE_Compiler_IO_TTY_ITM /* Compiler I/O: TTY ITM */
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM7_SP/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM7_SP/RTE_Components.h
new file mode 100644
index 0000000..42d550b
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM7_SP/RTE_Components.h
@@ -0,0 +1,28 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ * *** Do not modify ! ***
+ *
+ * Project: 'arm_nnexamples_cifar10'
+ * Target: 'ARMCM7_SP'
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File:
+ */
+#define CMSIS_device_header "ARMCM7_SP.h"
+
+#define RTE_Compiler_IO_STDERR /* Compiler I/O: STDERR */
+ #define RTE_Compiler_IO_STDERR_ITM /* Compiler I/O: STDERR ITM */
+#define RTE_Compiler_IO_STDIN /* Compiler I/O: STDIN */
+ #define RTE_Compiler_IO_STDIN_ITM /* Compiler I/O: STDIN ITM */
+#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
+ #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
+#define RTE_Compiler_IO_TTY /* Compiler I/O: TTY */
+ #define RTE_Compiler_IO_TTY_ITM /* Compiler I/O: TTY ITM */
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.cpp b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.cpp
new file mode 100644
index 0000000..c69c60c
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.cpp
@@ -0,0 +1,179 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
+*
+*
+* Project: CMSIS NN Library
+* Title: arm_nnexamples_cifar10.cpp
+*
+* Description: Convolutional Neural Network Example
+*
+* Target Processor: Cortex-M4/Cortex-M7
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in
+* the documentation and/or other materials provided with the
+* distribution.
+* - Neither the name of Arm LIMITED nor the names of its contributors
+* may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup CNNExample Convolutional Neural Network Example
+ *
+ * \par Description:
+ * \par
+ * Demonstrates a convolutional neural network (CNN) example with the use of convolution,
+ * ReLU activation, pooling and fully-connected functions.
+ *
+ * \par Model definition:
+ * \par
+ * The CNN used in this example is based on CIFAR-10 example from Caffe [1].
+ * The neural network consists
+ * of 3 convolution layers interspersed by ReLU activation and max pooling layers, followed by a
+ * fully-connected layer at the end. The input to the network is a 32x32 pixel color image, which will
+ * be classified into one of the 10 output classes.
+ * This example model implementation needs 32.3 KB to store weights, 40 KB for activations and
+ * 3.1 KB for storing the \c im2col data.
+ *
+ * \image html CIFAR10_CNN.gif "Neural Network model definition"
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c conv1_wt, \c conv2_wt, \c conv3_wt are convolution layer weight matrices
+ * \li \c conv1_bias, \c conv2_bias, \c conv3_bias are convolution layer bias arrays
+ * \li \c ip1_wt, ip1_bias point to fully-connected layer weights and biases
+ * \li \c input_data points to the input image data
+ * \li \c output_data points to the classification output
+ * \li \c col_buffer is a buffer to store the \c im2col output
+ * \li \c scratch_buffer is used to store the activation data (intermediate layer outputs)
+ *
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_convolve_HWC_q7_RGB()
+ * - arm_convolve_HWC_q7_fast()
+ * - arm_relu_q7()
+ * - arm_maxpool_q7_HWC()
+ * - arm_avepool_q7_HWC()
+ * - arm_fully_connected_q7_opt()
+ * - arm_fully_connected_q7()
+ *
+ * <b> Refer </b>
+ * \link arm_nnexamples_cifar10.cpp \endlink
+ *
+ * \par [1] https://github.com/BVLC/caffe
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include "arm_math.h"
+#include "arm_nnexamples_cifar10_parameter.h"
+#include "arm_nnexamples_cifar10_shift.h"
+#include "arm_nnexamples_cifar10_weights.h"
+
+#include "arm_nnfunctions.h"
+#include "arm_nnexamples_cifar10_inputs.h"
+
+// include the input and weights
+
+static q7_t conv1_wt[CONV1_IM_CH * CONV1_KER_DIM * CONV1_KER_DIM * CONV1_OUT_CH] = CONV1_WT;
+static q7_t conv1_bias[CONV1_OUT_CH] = CONV1_BIAS;
+
+static q7_t conv2_wt[CONV2_IM_CH * CONV2_KER_DIM * CONV2_KER_DIM * CONV2_OUT_CH] = CONV2_WT;
+static q7_t conv2_bias[CONV2_OUT_CH] = CONV2_BIAS;
+
+static q7_t conv3_wt[CONV3_IM_CH * CONV3_KER_DIM * CONV3_KER_DIM * CONV3_OUT_CH] = CONV3_WT;
+static q7_t conv3_bias[CONV3_OUT_CH] = CONV3_BIAS;
+
+static q7_t ip1_wt[IP1_DIM * IP1_OUT] = IP1_WT;
+static q7_t ip1_bias[IP1_OUT] = IP1_BIAS;
+
+q7_t input_data[CONV1_IM_CH * CONV1_IM_DIM * CONV1_IM_DIM] = IMG_DATA;
+q7_t output_data[IP1_OUT];
+
+//vector buffer: max(im2col buffer,average pool buffer, fully connected buffer)
+q7_t col_buffer[2 * 5 * 5 * 32 * 2];
+
+q7_t scratch_buffer[32 * 32 * 10 * 4];
+
+int main()
+{
+
+ printf("start execution\n");
+ /* start the execution */
+
+ q7_t *img_buffer1 = scratch_buffer;
+ q7_t *img_buffer2 = img_buffer1 + 32 * 32 * 32;
+
+ // conv1 input_data -> img_buffer1
+ arm_convolve_HWC_q7_RGB(input_data, CONV1_IM_DIM, CONV1_IM_CH, conv1_wt, CONV1_OUT_CH, CONV1_KER_DIM, CONV1_PADDING,
+ CONV1_STRIDE, conv1_bias, CONV1_BIAS_LSHIFT, CONV1_OUT_RSHIFT, img_buffer1, CONV1_OUT_DIM,
+ (q15_t *) col_buffer, NULL);
+
+ arm_relu_q7(img_buffer1, CONV1_OUT_DIM * CONV1_OUT_DIM * CONV1_OUT_CH);
+
+ // pool1 img_buffer1 -> img_buffer2
+ arm_maxpool_q7_HWC(img_buffer1, CONV1_OUT_DIM, CONV1_OUT_CH, POOL1_KER_DIM,
+ POOL1_PADDING, POOL1_STRIDE, POOL1_OUT_DIM, NULL, img_buffer2);
+
+ // conv2 img_buffer2 -> img_buffer1
+ arm_convolve_HWC_q7_fast(img_buffer2, CONV2_IM_DIM, CONV2_IM_CH, conv2_wt, CONV2_OUT_CH, CONV2_KER_DIM,
+ CONV2_PADDING, CONV2_STRIDE, conv2_bias, CONV2_BIAS_LSHIFT, CONV2_OUT_RSHIFT, img_buffer1,
+ CONV2_OUT_DIM, (q15_t *) col_buffer, NULL);
+
+ arm_relu_q7(img_buffer1, CONV2_OUT_DIM * CONV2_OUT_DIM * CONV2_OUT_CH);
+
+ // pool2 img_buffer1 -> img_buffer2
+ arm_avepool_q7_HWC(img_buffer1, CONV2_OUT_DIM, CONV2_OUT_CH, POOL2_KER_DIM,
+ POOL2_PADDING, POOL2_STRIDE, POOL2_OUT_DIM, col_buffer, img_buffer2);
+
+// conv3 img_buffer2 -> img_buffer1
+ arm_convolve_HWC_q7_fast(img_buffer2, CONV3_IM_DIM, CONV3_IM_CH, conv3_wt, CONV3_OUT_CH, CONV3_KER_DIM,
+ CONV3_PADDING, CONV3_STRIDE, conv3_bias, CONV3_BIAS_LSHIFT, CONV3_OUT_RSHIFT, img_buffer1,
+ CONV3_OUT_DIM, (q15_t *) col_buffer, NULL);
+
+ arm_relu_q7(img_buffer1, CONV3_OUT_DIM * CONV3_OUT_DIM * CONV3_OUT_CH);
+
+ // pool3 img_buffer-> img_buffer2
+ arm_avepool_q7_HWC(img_buffer1, CONV3_OUT_DIM, CONV3_OUT_CH, POOL3_KER_DIM,
+ POOL3_PADDING, POOL3_STRIDE, POOL3_OUT_DIM, col_buffer, img_buffer2);
+
+#ifdef IP_X4
+ arm_fully_connected_q7_opt(img_buffer2, ip1_wt, IP1_DIM, IP1_OUT, IP1_BIAS_LSHIFT, IP1_OUT_RSHIFT, ip1_bias,
+ output_data, (q15_t *) img_buffer1);
+#else
+ arm_fully_connected_q7(img_buffer2, ip1_wt, IP1_DIM, IP1_OUT, IP1_BIAS_LSHIFT, IP1_OUT_RSHIFT, ip1_bias,
+ output_data, (q15_t *) img_buffer1);
+#endif
+
+ arm_softmax_q7(output_data, 10, output_data);
+
+ for (int i = 0; i < 10; i++)
+ {
+ printf("%d: %d\n", i, output_data[i]);
+ }
+
+ return 0;
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.uvoptx b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.uvoptx
new file mode 100644
index 0000000..16f2138
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.uvoptx
@@ -0,0 +1,1155 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj; *.o</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>ARMCM0</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>10000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\ARMCM0_debug\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>.\arm_convolution_example.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>241</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>1722</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>1</BreakIfRCount>
+ <Filename>C:\Users\lialai01\OneDrive - ARM\Documents\uVision\CMSIS\CMSIS_5_with_NN-master-afefd8a43b134ea754b0ae06f1ab1deb64ba5917\CMSIS\DSP\Examples\ARM\arm_nn_examples\cifar10_M4\arm_convolution_example_f32.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression>\\arm_convolution_example\arm_convolution_example_f32.c\241</Expression>
+ </Bp>
+ <Bp>
+ <Number>1</Number>
+ <Type>0</Type>
+ <LineNumber>244</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>1726</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>1</BreakIfRCount>
+ <Filename>C:\Users\lialai01\OneDrive - ARM\Documents\uVision\CMSIS\CMSIS_5_with_NN-master-afefd8a43b134ea754b0ae06f1ab1deb64ba5917\CMSIS\DSP\Examples\ARM\arm_nn_examples\cifar10_M4\arm_convolution_example_f32.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression>\\arm_convolution_example\arm_convolution_example_f32.c\244</Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMCM3</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>10000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\ARMCM3_debug\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>.\arm_convolution_example.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM3$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>244</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>1696</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>1</BreakIfRCount>
+ <Filename>C:\Users\lialai01\OneDrive - ARM\Documents\uVision\CMSIS\CMSIS_5_with_NN-master-afefd8a43b134ea754b0ae06f1ab1deb64ba5917\CMSIS\DSP\Examples\ARM\arm_nn_examples\cifar10_M4\arm_convolution_example_f32.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression>\\arm_convolution_example\arm_convolution_example_f32.c\244</Expression>
+ </Bp>
+ <Bp>
+ <Number>1</Number>
+ <Type>0</Type>
+ <LineNumber>241</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>1692</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>1</BreakIfRCount>
+ <Filename>C:\Users\lialai01\OneDrive - ARM\Documents\uVision\CMSIS\CMSIS_5_with_NN-master-afefd8a43b134ea754b0ae06f1ab1deb64ba5917\CMSIS\DSP\Examples\ARM\arm_nn_examples\cifar10_M4\arm_convolution_example_f32.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression>\\arm_convolution_example\arm_convolution_example_f32.c\241</Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMCM4_FP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\ARMCM4_debug\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>1</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>1</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMCM7_SP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\ARMCM7_debug\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>.\arm_convolution_example.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM7_SP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>241</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>2028</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>1</BreakIfRCount>
+ <Filename>C:\Users\lialai01\OneDrive - ARM\Documents\uVision\CMSIS\CMSIS_5_with_NN-master-afefd8a43b134ea754b0ae06f1ab1deb64ba5917\CMSIS\DSP\Examples\ARM\arm_nn_examples\cifar10_M4\arm_convolution_example_f32.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression>\\arm_convolution_example\arm_convolution_example_f32.c\241</Expression>
+ </Bp>
+ <Bp>
+ <Number>1</Number>
+ <Type>0</Type>
+ <LineNumber>244</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>2032</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>1</BreakIfRCount>
+ <Filename>C:\Users\lialai01\OneDrive - ARM\Documents\uVision\CMSIS\CMSIS_5_with_NN-master-afefd8a43b134ea754b0ae06f1ab1deb64ba5917\CMSIS\DSP\Examples\ARM\arm_nn_examples\cifar10_M4\arm_convolution_example_f32.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression>\\arm_convolution_example\arm_convolution_example_f32.c\244</Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>1</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nn_activations_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>2</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nn_activations_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>3</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ActivationFunctions\arm_relu_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_relu_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>4</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ActivationFunctions\arm_relu_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_relu_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>5</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>6</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_basic.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>7</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_fast.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>8</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_fast_nonsquare.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>9</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_RGB.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>10</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q15_basic.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>11</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q15_fast.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>12</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_depthwise_separable_conv_HWC_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>13</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</PathWithFileName>
+ <FilenameWithoutPath>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>14</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nn_mat_mult_kernel_q7_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>15</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>16</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_mat_q7_vec_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>17</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_mat_q7_vec_q15_opt.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>18</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>19</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q7_opt.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>20</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>21</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q15_opt.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>22</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\NNSupportFunctions\arm_nntables.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nntables.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>23</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</PathWithFileName>
+ <FilenameWithoutPath>arm_pool_q7_HWC.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>24</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</PathWithFileName>
+ <FilenameWithoutPath>arm_q7_to_q15_no_shift.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>25</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</PathWithFileName>
+ <FilenameWithoutPath>arm_q7_to_q15_reordered_no_shift.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>26</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_softmax_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>27</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_softmax_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>28</FileNumber>
+ <FileType>8</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\arm_nnexamples_cifar10.cpp</PathWithFileName>
+ <FilenameWithoutPath>arm_nnexamples_cifar10.cpp</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>29</FileNumber>
+ <FileType>5</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\readme.txt</PathWithFileName>
+ <FilenameWithoutPath>readme.txt</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>1</RteFlg>
+ </Group>
+
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>1</RteFlg>
+ </Group>
+
+ <Group>
+ <GroupName>::Device</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>1</RteFlg>
+ </Group>
+
+</ProjectOpt>
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.uvprojx b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.uvprojx
new file mode 100644
index 0000000..22352f8
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.uvprojx
@@ -0,0 +1,2409 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+ <SchemaVersion>2.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Targets>
+ <Target>
+ <TargetName>ARMCM0</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060300::V5.06 update 3 (build 300)::ARMCC</pCCUsed>
+ <uAC6>0</uAC6>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM0</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.2.0</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(10000000) ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Flash\NEW_DEVICE.flm))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM0$Device\Include\ARMCM0.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM0$SVD\ARMCM0.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\ARMCM0_debug\</OutputDirectory>
+ <OutputName>arm_convolution_example</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\ARMCM0_debug\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> </SimDllArguments>
+ <SimDlgDll>DARMCM1.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM0</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments> </TargetDllArguments>
+ <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3>"" ()</Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M0"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>0</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>0</EndSel>
+ <uLtcg>0</uLtcg>
+ <nSecure>0</nSecure>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>1</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>0</uC99>
+ <useXO>0</useXO>
+ <v6Lang>1</v6Lang>
+ <v6LangP>1</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_CM0</Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <uClangAs>0</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <Files>
+ <File>
+ <FileName>arm_nn_activations_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_RGB.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nntables.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_nntables.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_q7_HWC.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_reordered_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nnexamples_cifar10.cpp</FileName>
+ <FileType>8</FileType>
+ <FilePath>.\arm_nnexamples_cifar10.cpp</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ <GroupOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>2</AlwaysBuild>
+ <GenerateAssemblyFile>2</GenerateAssemblyFile>
+ <AssembleAssemblyFile>2</AssembleAssemblyFile>
+ <PublicsOnly>2</PublicsOnly>
+ <StopOnExitCode>11</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <GroupArmAds>
+ <Cads>
+ <interw>2</interw>
+ <Optim>0</Optim>
+ <oTime>2</oTime>
+ <SplitLS>2</SplitLS>
+ <OneElfS>2</OneElfS>
+ <Strict>2</Strict>
+ <EnumInt>2</EnumInt>
+ <PlainCh>2</PlainCh>
+ <Ropi>2</Ropi>
+ <Rwpi>2</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>2</uThumb>
+ <uSurpInc>2</uSurpInc>
+ <uC99>2</uC99>
+ <useXO>2</useXO>
+ <v6Lang>0</v6Lang>
+ <v6LangP>0</v6LangP>
+ <vShortEn>2</vShortEn>
+ <vShortWch>2</vShortWch>
+ <v6Lto>2</v6Lto>
+ <v6WtE>2</v6WtE>
+ <v6Rtti>2</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>2</interw>
+ <Ropi>2</Ropi>
+ <Rwpi>2</Rwpi>
+ <thumb>2</thumb>
+ <SplitLS>2</SplitLS>
+ <SwStkChk>2</SwStkChk>
+ <NoWarn>2</NoWarn>
+ <uSurpInc>2</uSurpInc>
+ <useXO>2</useXO>
+ <uClangAs>2</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ </GroupArmAds>
+ </GroupOption>
+ </Group>
+ <Group>
+ <GroupName>::Device</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ <Target>
+ <TargetName>ARMCM3</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060300::V5.06 update 3 (build 300)::ARMCC</pCCUsed>
+ <uAC6>0</uAC6>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM3</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.2.0</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(10000000) ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM3$Flash\NEW_DEVICE.flm))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM3$Device\Include\ARMCM3.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM3$SVD\ARMCM3.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\ARMCM3_debug\</OutputDirectory>
+ <OutputName>arm_convolution_example</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\ARMCM3_debug\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> </SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments></TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3>"" ()</Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M3"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>0</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>0</EndSel>
+ <uLtcg>0</uLtcg>
+ <nSecure>0</nSecure>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>1</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>0</uC99>
+ <useXO>0</useXO>
+ <v6Lang>1</v6Lang>
+ <v6LangP>1</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_CM3</Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <uClangAs>0</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <Files>
+ <File>
+ <FileName>arm_nn_activations_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_RGB.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nntables.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_nntables.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_q7_HWC.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_reordered_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nnexamples_cifar10.cpp</FileName>
+ <FileType>8</FileType>
+ <FilePath>.\arm_nnexamples_cifar10.cpp</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Device</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ <Target>
+ <TargetName>ARMCM4_FP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
+ <uAC6>0</uAC6>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM4_FP</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.2.0</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM4_FP$Device\ARM\ARMCM4\Include\ARMCM4_FP.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM4_FP$Device\ARM\SVD\ARMCM4.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\ARMCM4_debug\</OutputDirectory>
+ <OutputName>arm_nnexample_cifar10</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\ARMCM4_debug\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> -MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments> -MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3>"" ()</Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M4"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>1</EndSel>
+ <uLtcg>0</uLtcg>
+ <nSecure>0</nSecure>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>4</Optim>
+ <oTime>1</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>0</uC99>
+ <useXO>0</useXO>
+ <v6Lang>1</v6Lang>
+ <v6LangP>1</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_CM4 __FPU_PRESENT=1U</Define>
+ <Undefine></Undefine>
+ <IncludePath>..\..\..\..\Include;..\..\..\..\..\Core\Include;..\..\..\..\..\DSP\Include;..\cifar10</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <uClangAs>0</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <Files>
+ <File>
+ <FileName>arm_nn_activations_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_RGB.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nntables.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_nntables.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_q7_HWC.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_reordered_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nnexamples_cifar10.cpp</FileName>
+ <FileType>8</FileType>
+ <FilePath>.\arm_nnexamples_cifar10.cpp</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Device</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ <Target>
+ <TargetName>ARMCM7_SP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
+ <uAC6>0</uAC6>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM7_SP</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.2.0</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM7_SP$Device\ARM\Flash\NEW_DEVICE.FLM))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM7_SP$Device\ARM\ARMCM7\Include\ARMCM7_SP.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM7_SP$Device\ARM\SVD\ARMCM7.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\ARMCM7_debug\</OutputDirectory>
+ <OutputName>arm_convolution_example</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\ARMCM7_debug\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> -MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM7</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments> -MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM7</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3></Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M7"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>1</EndSel>
+ <uLtcg>0</uLtcg>
+ <nSecure>0</nSecure>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>1</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>1</uC99>
+ <useXO>0</useXO>
+ <v6Lang>1</v6Lang>
+ <v6LangP>1</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
+ <Undefine></Undefine>
+ <IncludePath>..\..\..\..\Include;..\..\..\..\..\Core\Include;..\..\..\..\..\DSP\Include;..\cifar10</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <uClangAs>0</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <Files>
+ <File>
+ <FileName>arm_nn_activations_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_RGB.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nntables.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_nntables.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_q7_HWC.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_reordered_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nnexamples_cifar10.cpp</FileName>
+ <FileType>8</FileType>
+ <FilePath>.\arm_nnexamples_cifar10.cpp</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Device</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+ <RTE>
+ <apis/>
+ <components>
+ <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.2" condition="ARMv6_7_8-M Device">
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ <component Cclass="CMSIS" Cgroup="DSP" Cvendor="ARM" Cversion="1.5.2" condition="CMSIS DSP">
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM0 CMSIS">
+ <package name="CMSIS" schemaVersion="1.2" url="http://www.keil.com/pack/" vendor="ARM" version="4.0.11"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ </targetInfos>
+ </component>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS">
+ <package name="CMSIS" schemaVersion="1.2" url="http://www.keil.com/pack/" vendor="ARM" version="4.0.11"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ </targetInfos>
+ </component>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS">
+ <package name="CMSIS" schemaVersion="1.2" url="http://www.keil.com/pack/" vendor="ARM" version="4.0.11"/>
+ <targetInfos>
+ <targetInfo name="ARMCM4_FP"/>
+ </targetInfos>
+ </component>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM7 CMSIS">
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.1.10"/>
+ <targetInfos>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDERR" Cvariant="ITM" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M with ITM">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDERR" Cvariant="User" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDIN" Cvariant="ITM" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M with ITM">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDIN" Cvariant="User" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="ITM" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M with ITM">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="User" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="TTY" Cvariant="ITM" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M with ITM">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="TTY" Cvariant="User" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ </targetInfos>
+ </component>
+ </components>
+ <files>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM0\Source\ARM\startup_ARMCM0.s" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM0\startup_ARMCM0.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM0 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM0\Source\system_ARMCM0.c" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM0\system_ARMCM0.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM0 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM3\system_ARMCM3.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM4\Source\ARM\startup_ARMCM4.s" version="1.0.0">
+ <instance index="0" removed="1">RTE\Device\ARMCM4\startup_ARMCM4.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.2.0"/>
+ <targetInfos/>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM4\Source\system_ARMCM4.c" version="1.0.0">
+ <instance index="0" removed="1">RTE\Device\ARMCM4\system_ARMCM4.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.2.0"/>
+ <targetInfos/>
+ </file>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM4\Source\ARM\startup_ARMCM4.s" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM4_FP\startup_ARMCM4.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM4_FP"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM4\Source\system_ARMCM4.c" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM4_FP\system_ARMCM4.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM4_FP"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM7\Source\ARM\startup_ARMCM7.s" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM7_SP\startup_ARMCM7.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM7 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM7\Source\system_ARMCM7.c" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM7_SP\system_ARMCM7.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM7 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </file>
+ </files>
+ </RTE>
+
+</Project>
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_inputs.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_inputs.h
new file mode 100644
index 0000000..91ee1e2
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_inputs.h
@@ -0,0 +1 @@
+#define IMG_DATA {13,14,16,17,13,11,14,12,11,12,12,12,12,15,16,17,15,13,12,12,10,7,7,6,7,4,3,4,5,2,-3,-8,10,10,14,17,15,14,15,14,14,11,10,12,14,17,18,18,17,12,9,8,5,2,3,3,8,7,6,5,6,2,-3,-6,10,11,14,18,14,16,16,16,15,14,12,11,13,16,16,17,18,12,5,-7,-12,-18,-17,-10,-7,1,5,4,6,4,0,-5,12,13,15,22,18,18,19,18,16,16,16,28,21,11,14,15,12,7,-15,-15,-18,-21,-27,-29,-23,-24,-9,1,5,5,3,-1,12,13,16,20,19,16,19,17,16,16,20,56,31,9,6,4,-11,-28,-24,-10,-10,-13,-18,-19,-29,-24,-23,-13,-1,4,2,0,9,2,0,9,16,17,18,18,16,17,15,24,12,-2,-18,-33,-32,-33,-22,-7,-5,-6,-9,-19,-16,-20,-36,-31,-11,6,5,3,-1,-10,-41,-20,12,20,19,20,19,17,16,8,-1,-2,-16,-32,-27,-30,-24,0,7,-4,-13,-12,-8,-23,-33,-42,-25,2,6,3,1,-14,-43,-29,7,19,18,19,21,15,5,-5,0,7,-7,-21,-20,-23,-27,-3,16,3,-14,-12,-15,-22,-38,-40,-36,-10,5,4,21,-12,-37,-2,13,17,17,19,18,22,-8,-2,14,13,-5,-22,-24,-23,-25,-25,4,8,-8,-21,-23,-21,-29,-36,-44,-27,3,5,26,4,-16,14,23,15,14,13,39,54,39,13,22,9,-3,-19,-22,-28,-36,-27,4,7,2,-12,-21,-21,-22,-26,-39,-43,-16,2,28,-9,8,19,25,14,16,-3,42,54,46,17,27,13,-3,-5,-26,-25,-43,-20,23,14,13,-11,-21,-13,-20,-25,-34,-43,-34,-11,30,-13,4,22,30,19,23,3,-5,33,35,20,28,30,2,-7,-14,-23,-46,-3,40,15,9,-18,-23,-17,-12,-21,-27,-35,-32,-25,31,-18,1,25,24,20,25,16,-15,20,20,4,28,43,15,-4,-5,-8,-40,10,32,13,-3,-19,-22,-22,-16,-20,-21,-26,-23,-27,31,-16,13,30,-3,5,23,20,-12,9,8,18,29,48,25,5,-3,-7,-30,12,28,10,-8,-21,-24,-28,-24,-14,-13,-18,-14,-16,34,-8,22,30,-10,-14,15,20,-14,-7,4,34,30,21,7,12,8,-14,-30,11,24,4,0,-9,-21,-18,-16,-8,-5,-12,-14,-4,35,4,24,30,2,-24,7,14,-6,1,7,50,56,7,2,0,-5,-11,-18,7,19,11,-8,-20,-28,-20,-10,-6,-2,-11,-2,5,38,11,22,33,22,-24,0,6,6,-16,13,22,16,5,-8,-8,-14,-12,-8,21,14,10,4,-9,-24,-23,-15,-11,-8,1,14,9,44,20,20,30,26,-15,-14,15,11,-10,1,-5,-7,-6,-13,-6,-21,-13,9,-4,-29,1,4,-25,-32,-33,-26,-10,-3,10,13,8,43,27,22,25,27,1,-19,8,14,5,-11,-24,4,-1,2,11,-20,-17,12,3,-4,-9,-25,-30,-40,-29,-18,6,17,19,16,13,36,32,25,26,28,11,-18,-2,-1,7,10,-27,2,-8,10,30,-4,-25,4,7,5,-17,-36,-35,-37,-16,0,21,25,21,18,12,19,36,29,28,30,16,-11,5,25,-9,-14,-21,-15,0,28,34,14,-11,-17,-17,-31,-38,-42,-48,-37,-30,-6,12,12,4,2,-2,-5,36,28,29,31,9,-18,15,62,49,6,7,14,27,35,37,24,2,-5,-30,-43,-43,-36,-31,-29,-31,-25,-23,-21,-26,-32,-35,-24,26,27,28,29,11,-5,46,67,66,44,2,-3,2,-2,1,-8,-26,-26,-30,-34,-35,-34,-32,-31,-34,-38,-34,-30,-36,-40,-41,-43,-13,11,24,29,23,23,64,67,54,-4,-29,-33,-35,-35,-35,-37,-38,-37,-38,-40,-36,-36,-38,-38,-36,-36,-34,-32,-34,-36,-40,-49,-47,-31,6,24,7,38,68,61,11,-29,-34,-34,-34,-35,-34,-36,-38,-40,-42,-42,-40,-40,-38,-37,-31,-28,-30,-32,-35,-38,-37,-39,-47,-44,-24,4,5,48,68,34,-26,-32,-34,-33,-33,-36,-36,-37,-38,-41,-40,-39,-39,-38,-36,-30,-28,-27,-30,-33,-36,-27,-21,-37,-44,-46,-40,-27,4,53,61,3,-30,-35,-31,-32,-37,-37,-36,-36,-38,-38,-37,-37,-37,-33,-31,-33,-37,-38,-42,-35,-25,-19,-25,-38,-45,-47,-43,-38,-21,41,46,-11,-27,-33,-36,-30,-35,-39,-37,-36,-35,-36,-37,-34,-40,-41,-36,-37,-41,-46,-41,-28,-28,-39,-37,-39,-45,-46,-45,-41,-38,-9,24,-29,-34,-35,-34,-30,-31,-33,-37,-39,-40,-37,-36,-37,-40,-41,-41,-42,-41,-39,-30,-38,-47,-55,-38,-30,-42,-47,-43,-43,-40,-41,-26,-37,-46,-48,-42,-37,-33,-32,-35,-33,-31,-33,-35,-37,-39,-42,-45,-41,-31,-23,-26,-34,-44,-56,-43,-34,-39,-46,-41,-43,-42,-41,-43,-42,-49,-51,-48,-49,-48,-45,-39,-35,-32,-30,-25,-28,-39,-42,-42,-33,-21,-9,-17,-33,-50,-49,-53,-37,-36,-41,-42,-44,-44,-44,-45,-46,-51,-53,-50,-52,-50,-55,-55,-48,-41,-34,-27,-32,-38,-39,-42,-31,-20,-12,-20,-40,-52,-47,-53,-13,-13,-11,-10,-13,-15,-12,-13,-15,-14,-12,-15,-15,-12,-12,-11,-12,-14,-15,-14,-16,-17,-17,-17,-16,-19,-21,-21,-20,-21,-23,-26,-12,-13,-11,-10,-12,-12,-10,-12,-11,-15,-14,-15,-13,-10,-11,-12,-12,-14,-14,-12,-15,-18,-19,-19,-17,-18,-18,-20,-19,-21,-22,-24,-13,-13,-12,-12,-15,-11,-10,-10,-11,-11,-12,-15,-14,-12,-12,-12,-11,-12,-13,-21,-24,-30,-30,-26,-25,-20,-17,-18,-18,-18,-20,-23,-14,-12,-13,-11,-12,-9,-7,-8,-11,-10,-7,5,-3,-13,-11,-11,-12,-13,-28,-25,-23,-23,-30,-36,-33,-37,-25,-18,-16,-17,-17,-20,-14,-10,-9,-10,-10,-10,-7,-9,-11,-9,-4,39,10,-11,-12,-13,-27,-41,-33,-16,-12,-10,-16,-20,-31,-28,-30,-25,-19,-16,-20,-20,-12,-14,-16,-10,-9,-10,-8,-9,-11,-8,-8,2,-6,-16,-29,-41,-37,-39,-25,-10,-6,-5,-8,-18,-16,-21,-37,-37,-24,-14,-17,-19,-17,-18,-47,-29,-7,-6,-8,-6,-7,-8,-6,-12,-17,-12,-22,-32,-24,-28,-24,-1,5,-6,-16,-14,-10,-24,-30,-42,-35,-17,-16,-19,-9,-17,-44,-33,-9,-6,-8,-7,-5,-8,-10,-18,-10,1,-12,-21,-17,-21,-26,-6,12,-3,-18,-16,-18,-24,-35,-39,-42,-24,-14,-17,15,-12,-36,-4,-2,-8,-5,-3,-3,4,-19,-11,7,8,-8,-24,-23,-21,-25,-28,-1,4,-12,-25,-26,-23,-28,-36,-47,-35,-12,-14,23,5,-14,13,11,-6,-5,-4,27,44,27,3,14,3,-8,-20,-21,-26,-35,-29,-1,3,-1,-14,-23,-21,-21,-26,-40,-49,-27,-13,26,-6,12,21,15,-7,-4,-18,36,50,33,5,17,6,-8,-7,-24,-22,-41,-20,20,11,11,-13,-22,-12,-19,-24,-34,-46,-41,-24,31,-10,9,24,21,-3,-1,-16,-14,29,24,9,19,24,-2,-8,-13,-20,-43,-2,38,14,7,-18,-22,-16,-11,-20,-26,-37,-36,-36,33,-15,4,27,16,-1,-1,-7,-27,16,11,-4,22,40,13,-5,-4,-4,-36,12,32,13,-3,-18,-21,-20,-15,-19,-19,-26,-26,-36,32,-15,15,32,-7,-9,0,-3,-25,5,1,13,26,47,25,5,-2,-4,-25,15,29,11,-6,-19,-22,-25,-22,-12,-12,-18,-18,-27,34,-9,21,31,-7,-17,-2,0,-24,-8,1,32,29,22,10,11,8,-10,-25,15,27,6,3,-6,-18,-15,-13,-6,-3,-14,-20,-16,35,2,22,28,7,-19,-1,2,-13,0,6,51,58,9,5,1,-4,-8,-16,7,20,14,-6,-18,-24,-16,-9,-6,-6,-18,-14,-11,38,11,21,30,24,-17,2,3,1,-19,12,22,17,7,-6,-6,-8,-8,-14,13,10,11,6,-7,-21,-20,-13,-15,-19,-17,-7,-11,44,21,23,32,31,-9,-11,15,9,-12,-1,-6,-7,-6,-13,-3,-12,-6,6,-10,-30,2,5,-24,-31,-31,-24,-13,-13,-4,-3,-7,42,31,27,31,33,7,-15,11,15,6,-13,-26,3,-2,1,14,-11,-9,12,1,-3,-8,-24,-28,-38,-27,-24,-6,0,0,-3,-7,33,33,28,30,32,16,-13,2,4,10,10,-28,2,-9,10,31,2,-19,3,5,8,-14,-33,-32,-33,-13,-12,1,2,-3,-5,-9,15,36,29,28,32,21,-6,10,30,-5,-12,-18,-12,2,30,35,18,-6,-17,-18,-26,-31,-34,-41,-29,-22,-8,5,3,-5,-4,-10,-3,39,29,26,31,15,-14,19,66,54,13,14,22,35,42,40,30,10,-2,-25,-32,-30,-22,-16,-14,-15,-8,-7,-6,-11,-15,-17,-10,38,32,27,31,16,-1,49,69,70,55,15,10,14,11,11,6,-9,-12,-15,-14,-14,-14,-10,-10,-11,-9,-6,-4,-11,-12,-15,-18,8,24,28,33,28,26,66,69,59,11,-12,-16,-18,-18,-20,-16,-15,-16,-15,-13,-11,-12,-13,-12,-10,-10,-10,-10,-12,-13,-17,-17,-18,-9,18,31,10,37,68,66,23,-10,-14,-14,-14,-15,-14,-13,-14,-15,-17,-15,-14,-14,-12,-11,-6,-6,-7,-8,-10,-14,-11,-8,-14,-18,-6,16,10,49,69,42,-11,-11,-13,-12,-11,-15,-15,-15,-16,-16,-15,-14,-12,-11,-10,-3,-3,-3,-4,-5,-8,0,6,-6,-12,-17,-18,-11,14,57,65,14,-11,-14,-10,-11,-16,-16,-15,-15,-15,-14,-13,-12,-9,-5,-3,-5,-10,-11,-13,-6,4,8,0,-8,-13,-16,-17,-18,-6,51,55,5,-6,-11,-14,-9,-14,-17,-16,-15,-14,-13,-13,-9,-12,-12,-8,-8,-12,-17,-9,4,2,-13,-15,-9,-13,-15,-17,-16,-18,7,39,-9,-11,-12,-11,-7,-8,-10,-17,-19,-18,-14,-13,-13,-12,-13,-14,-15,-13,-9,2,-6,-16,-32,-16,-1,-12,-18,-16,-18,-16,-21,-7,-16,-22,-25,-19,-13,-10,-9,-14,-13,-10,-10,-11,-13,-13,-17,-19,-15,-5,5,4,-4,-14,-30,-20,-6,-12,-20,-17,-17,-16,-18,-21,-19,-26,-28,-24,-26,-25,-21,-18,-14,-11,-7,-2,-5,-14,-18,-18,-10,3,16,10,-5,-22,-22,-31,-10,-11,-19,-20,-19,-17,-20,-23,-24,-29,-30,-27,-29,-27,-32,-34,-28,-20,-11,-4,-8,-15,-16,-20,-9,2,9,4,-14,-25,-21,-30,-42,-43,-41,-40,-44,-47,-44,-45,-46,-48,-48,-42,-44,-48,-46,-46,-48,-49,-49,-47,-46,-46,-46,-46,-46,-48,-46,-47,-48,-49,-49,-50,-41,-46,-44,-38,-42,-45,-43,-44,-44,-48,-47,-40,-42,-47,-47,-51,-52,-51,-47,-42,-41,-40,-41,-43,-42,-44,-44,-47,-49,-50,-50,-49,-42,-49,-47,-41,-44,-44,-43,-43,-45,-45,-42,-38,-41,-48,-48,-49,-47,-43,-39,-42,-40,-41,-43,-41,-42,-38,-40,-46,-48,-48,-48,-49,-45,-48,-49,-43,-43,-42,-41,-41,-43,-43,-37,-18,-28,-45,-42,-38,-36,-32,-42,-33,-27,-23,-32,-40,-39,-45,-42,-42,-43,-45,-45,-47,-44,-40,-39,-40,-42,-44,-40,-42,-44,-43,-35,17,-11,-37,-35,-29,-39,-49,-36,-15,-9,-5,-12,-18,-30,-29,-40,-41,-40,-41,-46,-46,-37,-31,-35,-37,-41,-43,-43,-43,-45,-44,-42,-21,-24,-34,-42,-48,-42,-41,-25,-8,-3,-2,-5,-15,-15,-20,-40,-45,-39,-34,-41,-43,-35,-23,-54,-48,-38,-41,-42,-41,-41,-44,-43,-36,-33,-25,-27,-34,-26,-30,-25,-2,4,-8,-17,-15,-11,-24,-28,-43,-44,-33,-39,-43,-18,-16,-43,-41,-33,-40,-43,-42,-37,-36,-36,-37,-23,-8,-15,-22,-17,-20,-27,-8,9,-5,-21,-17,-19,-24,-33,-37,-46,-37,-36,-43,10,-9,-32,-4,-20,-39,-40,-35,-27,-13,-31,-21,0,4,-10,-23,-22,-19,-24,-30,-4,1,-14,-25,-26,-23,-27,-34,-47,-43,-32,-39,20,11,-8,14,-4,-34,-36,-29,14,40,24,0,13,3,-6,-20,-20,-24,-33,-31,-4,2,-2,-15,-23,-21,-21,-25,-39,-53,-39,-33,26,1,19,25,2,-34,-33,-35,31,55,36,7,19,8,-7,-7,-24,-20,-39,-20,18,10,10,-13,-21,-11,-20,-23,-30,-43,-44,-38,34,-1,17,30,9,-29,-31,-36,-18,36,24,9,18,22,-5,-10,-13,-19,-41,-2,38,13,7,-17,-21,-15,-12,-18,-20,-32,-35,-47,37,-6,14,34,9,-24,-31,-34,-35,19,6,-10,17,34,7,-8,-5,-3,-34,12,32,13,-2,-16,-18,-18,-15,-18,-14,-22,-27,-47,37,-7,24,38,-8,-24,-28,-32,-37,3,-5,7,21,43,22,2,-3,-2,-23,17,30,11,-5,-17,-19,-22,-21,-10,-8,-17,-24,-42,39,-2,29,37,-2,-23,-26,-29,-39,-12,-5,28,28,23,14,11,6,-9,-21,18,29,7,5,-4,-15,-11,-12,-5,-1,-17,-31,-35,40,11,30,34,15,-18,-12,-17,-30,-9,3,50,60,13,10,1,-5,-8,-18,4,18,14,-5,-15,-22,-12,-6,-6,-10,-29,-33,-34,44,23,33,38,30,-10,8,1,-14,-36,12,23,16,4,-10,-9,-8,-11,-25,-2,0,9,5,-6,-19,-16,-8,-14,-28,-33,-29,-34,50,34,36,42,38,-2,-3,18,1,-23,-1,-6,-9,-9,-17,-4,-9,-6,-2,-21,-37,-1,4,-23,-28,-27,-22,-15,-23,-21,-24,-30,45,40,39,42,40,13,-6,18,17,2,-13,-25,1,-5,-3,14,-6,-6,8,-6,-6,-10,-24,-27,-34,-23,-33,-24,-23,-28,-33,-34,33,38,36,39,39,23,-3,13,12,15,11,-27,2,-9,10,32,7,-15,0,1,7,-13,-30,-27,-26,-6,-23,-19,-22,-28,-30,-34,16,38,33,33,37,28,3,21,40,4,-8,-15,-9,7,35,37,23,-1,-18,-20,-23,-25,-26,-31,-17,-11,-15,-12,-15,-23,-21,-25,5,45,34,31,37,21,-6,28,73,61,21,22,31,45,53,48,40,21,4,-20,-22,-17,-8,0,3,4,9,7,7,2,1,1,9,52,42,35,39,23,5,53,72,75,65,28,24,30,27,25,24,9,1,0,5,4,6,11,14,13,16,19,18,12,14,10,10,29,40,41,44,35,31,67,69,63,26,5,2,2,3,0,7,9,6,7,12,12,12,13,15,18,17,17,15,13,15,10,13,10,13,35,43,17,39,70,71,36,13,8,9,10,9,7,8,8,7,6,9,12,12,14,16,21,19,19,20,18,15,18,24,15,8,15,31,19,53,73,51,8,13,11,13,13,10,7,6,5,6,8,11,15,16,18,23,24,22,22,24,22,28,35,25,18,10,7,10,30,65,72,25,5,10,14,13,8,9,9,9,9,10,12,14,19,23,25,23,18,18,16,25,34,35,28,24,19,14,12,10,16,64,65,18,11,12,10,15,10,7,8,10,12,13,14,18,17,17,22,21,17,13,23,37,33,15,13,23,17,16,16,15,9,26,52,6,7,11,12,17,15,13,8,7,8,13,15,15,16,16,15,14,15,22,35,27,15,-5,11,31,18,13,18,14,11,2,12,3,-2,-1,5,10,14,15,11,12,15,16,15,15,14,11,8,12,22,35,35,28,17,-2,6,26,17,9,15,13,11,7,0,2,-3,-4,-1,-2,-1,2,5,9,12,17,23,21,11,8,8,16,29,42,39,26,8,6,-4,22,17,9,10,10,9,4,0,0,-5,-7,-3,-5,-3,-8,-12,-7,2,12,19,15,8,8,4,15,26,34,30,15,5,7,-3}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_parameter.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_parameter.h
new file mode 100644
index 0000000..09d0ca3
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_parameter.h
@@ -0,0 +1,43 @@
+#define CONV1_IM_DIM 32
+#define CONV1_IM_CH 3
+#define CONV1_KER_DIM 5
+#define CONV1_PADDING 2
+#define CONV1_STRIDE 1
+#define CONV1_OUT_CH 32
+#define CONV1_OUT_DIM 32
+
+#define POOL1_KER_DIM 3
+#define POOL1_STRIDE 2
+#define POOL1_PADDING 0
+#define POOL1_OUT_DIM 16
+
+#define CONV2_IM_DIM 16
+#define CONV2_IM_CH 32
+#define CONV2_KER_DIM 5
+#define CONV2_PADDING 2
+#define CONV2_STRIDE 1
+#define CONV2_OUT_CH 16
+#define CONV2_OUT_DIM 16
+
+#define POOL2_KER_DIM 3
+#define POOL2_STRIDE 2
+#define POOL2_PADDING 0
+#define POOL2_OUT_DIM 8
+
+#define CONV3_IM_DIM 8
+#define CONV3_IM_CH 16
+#define CONV3_KER_DIM 5
+#define CONV3_PADDING 2
+#define CONV3_STRIDE 1
+#define CONV3_OUT_CH 32
+#define CONV3_OUT_DIM 8
+
+#define POOL3_KER_DIM 3
+#define POOL3_STRIDE 2
+#define POOL3_PADDING 0
+#define POOL3_OUT_DIM 4
+
+#define IP1_DIM 4*4*32
+#define IP1_IM_DIM 4
+#define IP1_IM_CH 32
+#define IP1_OUT 10
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_shift.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_shift.h
new file mode 100644
index 0000000..e503eb1
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_shift.h
@@ -0,0 +1,8 @@
+#define CONV1_BIAS_LSHIFT 0
+#define CONV1_OUT_RSHIFT 11
+#define CONV2_BIAS_LSHIFT 0
+#define CONV2_OUT_RSHIFT 8
+#define CONV3_BIAS_LSHIFT 0
+#define CONV3_OUT_RSHIFT 8
+#define IP1_BIAS_LSHIFT 5
+#define IP1_OUT_RSHIFT 7
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_weights.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_weights.h
new file mode 100644
index 0000000..4bbb9d9
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_weights.h
@@ -0,0 +1,15 @@
+#define CONV1_WT {36,16,20,27,11,21,30,18,32,14,2,23,-4,-14,6,11,-4,11,-26,-33,-9,-31,-34,-18,-41,-46,-34,-22,-27,-19,-29,-31,-28,-41,-33,-30,-15,-1,-12,4,13,-2,22,29,16,-10,1,-6,15,35,24,22,43,19,14,31,5,3,18,4,2,15,4,3,21,5,-8,5,-15,-4,4,-13,-4,3,1,-10,-4,-12,-13,-5,-16,-18,-9,-19,-19,-11,-15,-8,-6,-4,-14,-5,-16,-17,-5,-20,-14,2,-12,-14,1,-8,-13,1,1,-3,0,-13,2,8,-10,2,9,-11,4,12,-4,-4,7,-2,8,11,-11,9,14,-10,3,11,-14,5,15,-8,-2,10,-8,3,9,-8,4,11,-9,-3,6,-13,-4,7,-10,-7,4,-11,14,9,10,9,3,15,-33,-29,-21,-14,-2,-8,4,22,13,-8,-18,-27,19,6,17,51,45,62,-35,-30,-28,-17,-3,-8,-9,-8,-15,-45,-55,-53,46,33,43,28,22,30,-15,-10,-8,31,36,34,-3,-3,-8,-53,-58,-57,24,16,22,10,0,5,-5,-12,-17,32,30,23,-3,-11,-13,0,-13,-6,8,-5,7,-23,-12,-12,-27,-23,-23,-32,-26,-32,-24,-25,-35,-9,-15,-23,-7,-1,-17,-13,-13,-31,-15,-16,-38,-1,-4,-28,8,8,-11,11,16,9,20,21,11,21,20,7,21,22,8,10,19,7,7,16,20,10,16,19,7,12,11,6,15,14,-8,9,9,7,13,18,6,9,13,1,4,7,5,13,16,-1,12,16,-3,2,9,-28,-7,2,-30,3,13,-22,7,13,-13,0,-8,3,10,15,-8,20,21,-20,20,19,-19,16,15,-21,-1,-9,-19,-11,-5,-1,28,26,-3,36,26,-14,27,13,-25,5,-10,-38,-31,-22,-11,12,13,7,42,28,-8,30,10,-26,5,-16,-23,-20,-12,-22,-8,-3,6,28,21,-5,25,12,-22,4,-11,-31,12,29,-7,0,-3,31,-4,-28,45,-7,-43,24,-2,-32,-54,16,52,-29,2,20,18,-7,-15,52,-11,-39,36,-10,-37,-61,17,59,-36,12,40,2,-4,-10,47,-11,-43,42,-7,-40,-56,16,54,-46,11,40,-12,1,9,31,-8,-32,37,-1,-36,-43,12,46,-38,7,39,-22,-4,11,17,-3,-19,29,4,-26,-31,-13,16,-19,1,25,-24,0,22,-18,2,19,-13,1,16,-39,-8,15,-50,-14,7,-56,-11,10,-39,2,17,-26,4,15,-17,-1,10,-22,-2,0,-28,-2,0,-29,-2,0,-23,-1,3,30,6,-1,55,26,6,58,32,6,41,19,-3,20,4,-5,35,-5,-18,37,-7,-33,42,-1,-35,46,6,-28,39,-2,-22,-12,-5,-7,20,14,14,17,21,20,-34,-23,-38,-2,22,4,-13,-12,-5,-39,-43,-31,63,54,58,18,12,0,-21,-9,-28,33,31,35,-72,-69,-54,-53,-52,-34,67,61,59,7,5,-8,30,22,14,47,47,43,-73,-65,-55,-16,-12,-6,6,7,6,-23,-31,-37,44,31,30,25,12,15,-9,-18,-15,2,2,2,-3,7,-17,3,19,-2,9,24,-2,1,12,-23,7,14,-23,5,13,-9,15,25,11,17,27,13,-4,8,-17,0,9,-22,-4,3,-15,10,16,7,10,18,8,-4,6,-17,-12,-6,-34,-7,-4,-21,13,14,8,12,17,10,-7,0,-23,-13,-13,-36,-12,-8,-20,7,8,4,1,5,-1,-12,-7,-28,-5,-8,-26,26,12,-27,40,18,-12,10,3,-11,-10,-4,-5,-3,9,4,29,10,-29,41,25,1,-19,-16,-16,-34,-13,1,-11,11,20,30,3,-26,39,22,16,-45,-37,-15,-42,-16,15,-9,13,32,26,4,-10,19,7,16,-54,-43,-15,-21,0,27,-4,10,21,12,2,1,-2,-5,9,-30,-19,0,-10,6,25,-11,1,8,-24,23,4,-41,22,19,-43,18,42,-33,-5,35,-1,-10,17,-40,26,33,-42,23,34,-36,3,30,-6,-20,12,27,-22,-10,-56,8,36,-39,6,26,-6,-7,17,33,-26,-5,49,-26,-26,-29,1,22,6,-3,9,39,-21,-16,60,-32,-34,55,-24,-40,8,-2,-10,35,-14,-28,57,-26,-44,59,-23,-42,43,-3,-32,14,7,17,46,35,37,35,24,22,31,15,18,16,-2,6,-32,-32,-23,11,0,-3,30,12,2,37,14,5,33,7,3,-46,-31,-23,-32,-26,-23,-10,-15,-18,14,-3,-4,32,11,13,-25,-4,4,-33,-11,1,-33,-18,-10,-21,-23,-11,6,-7,11,-17,9,2,-20,8,7,-13,10,8,-22,-14,-12,-5,-10,-3,-8,13,-8,4,37,15,-6,34,18,-10,17,3,-14,-1,-17,-25,-12,-31,1,27,5,7,50,28,-9,27,7,-21,4,-16,-25,-16,-24,-28,-4,-13,1,41,24,-3,36,16,-20,13,-7,-9,-14,-16,-28,-19,-19,-7,15,8,10,36,22,-4,21,5,1,-21,-28,-14,-24,-25,-8,-7,-12,8,15,-1,5,14,-4,-14,23,-14,-16,35,-15,-21,29,-23,-13,30,-8,-9,14,-8,-21,37,-27,-20,58,-30,-30,48,-42,-18,51,-20,-16,26,-18,-20,41,-21,-23,60,-30,-30,58,-40,-23,56,-21,-19,31,-20,-19,26,-18,-16,44,-22,-24,41,-34,-19,42,-19,-11,22,-19,-6,11,-7,-2,21,-7,-12,15,-15,-7,21,-1,-1,6,-6,9,15,32,-2,3,27,-11,-14,3,-1,-14,-3,-12,-31,-18,8,10,25,-3,2,23,-9,-14,5,0,-21,-5,-15,-42,-25,19,17,29,9,14,36,2,-3,19,14,-11,10,5,-29,-4,14,7,9,6,5,19,0,-9,9,1,-24,-3,3,-24,1,15,6,-7,12,9,5,0,-11,-3,-3,-21,-6,2,-15,4,-4,-3,-18,32,21,29,34,17,39,-20,-30,-8,-12,-19,-14,29,27,26,32,25,44,-55,-60,-37,-48,-47,-36,18,19,4,8,14,27,-52,-47,-27,-57,-55,-50,37,36,23,36,30,10,-21,-16,-1,-34,-32,-17,30,19,17,45,37,25,-4,-12,-17,-5,-14,0,13,-3,5,35,11,17,4,-6,-5,-7,-9,-4,-31,-16,-34,-12,6,-13,1,15,-4,15,27,6,14,29,16,-28,-13,-30,-7,6,-8,8,17,4,20,28,14,6,14,9,-7,2,-13,2,11,-1,-2,4,-4,8,12,6,-5,-2,2,20,26,20,16,18,13,2,1,-2,-16,-16,-19,-32,-29,-20,25,26,23,17,11,11,0,-5,-7,-14,-15,-20,-31,-26,-23,27,-3,-9,17,-27,-43,11,-49,-70,27,-14,-32,20,-10,-29,5,-5,11,42,28,23,42,19,-3,11,-1,-18,3,-10,-23,-34,-25,19,-11,5,40,22,49,66,15,48,62,-11,-3,14,-6,-1,25,-36,-28,10,-70,-49,-16,-38,-9,18,-8,-5,22,4,-7,5,1,-9,14,-6,-15,12,-5,-5,23,-2,-9,25,-10,-17,1,-37,-38,-8,-37,-32,4,-6,0,27,1,7,16,0,-4,20,-16,-9,24,-24,-9,27,-11,1,31,-3,1,12,-2,-6,25,-7,-1,35,-13,2,39,-16,-5,26,-4,-8,1,2,-5,23,-2,0,31,-5,3,37,-19,-13,17,-4,-13,-3,-14,-20,-3,0,-1,20,-4,-3,18,-15,-19,0,3,-9,-7,-7,-14,-13,-16,-24,-16,-17,-22,-18,-2,6,-4,15,30,3,-36,-39,-37,-25,-34,-20,12,7,20,22,31,28,21,37,19,-58,-63,-66,3,-8,0,40,29,39,14,18,13,4,17,-5,-48,-55,-59,32,22,28,30,24,33,2,13,7,2,26,-2,-17,-19,-17,23,19,33,5,7,24,-11,5,7,-12,20,0,31,-7,-25,36,-12,-22,42,-17,-18,34,-18,-11,18,-14,-4,26,-7,-23,33,-18,-25,43,-26,-26,39,-27,-21,24,-21,-9,13,1,-20,20,-9,-22,29,-15,-21,29,-18,-19,14,-17,-7,1,12,-2,5,2,-4,12,-6,-4,12,-12,-3,2,-10,9,-15,12,-1,-9,6,1,-4,-2,5,-1,-8,8,-2,-3,20,0,-17,-14,11,-13,1,17,-10,15,25,7,24,7,0,0,-2,-24,-13,27,2,27,30,3,34,14,-2,16,-6,-11,-14,10,-11,9,29,4,33,27,3,32,8,-4,8,-3,-6,-16,8,-3,28,11,-3,27,9,-4,17,6,2,2,-3,2,-12,-1,-6,13,-3,-10,2,-11,-14,-18,-1,3,-15,-8,4,-18,-24,-4,-20,-18,1,-7,-18,-1,5,-16,-4,13,3,6,23,-21,-1,-16,-16,3,-2,-23,-3,3,-15,0,16,8,13,27,-19,-2,-11,-16,0,1,-24,-7,4,-14,-1,15,3,6,17,-25,-11,-12,-18,-3,5,-21,-8,11,-12,-3,17,1,0,13,-6,2,1,-1,9,16,-4,2,16,1,3,16,17,10,17,-7,1,-10,-11,0,-12,-8,5,-9,-5,8,-5,2,10,2,-2,8,1,-5,6,-3,1,11,-1,1,11,0,1,9,4,-17,6,5,-23,0,-2,-14,4,-2,-7,8,1,4,12,11,-36,-12,-4,-45,-20,-16,-36,-14,-13,-37,-18,-18,-27,-18,-14,9,21,29,12,24,20,28,38,30,21,28,21,26,25,25,-8,3,11,-28,-7,-19,-20,0,-18,-16,5,-6,-3,21,27,6,15,33,39,54,51,53,71,62,33,52,49,-8,21,27,-26,-35,-20,-30,-46,-37,-42,-56,-50,-47,-58,-50,-26,-17,-11,15,-1,-1,17,-6,-13,20,-8,-15,19,-6,-12,7,7,1,4,-3,-3,12,0,-3,11,2,-1,7,1,2,-12,2,7,-1,9,1,-9,8,-2,-10,11,0,0,20,9,5,18,1,-14,13,17,-20,13,15,-23,14,12,-21,14,10,-14,10,2,-23,11,24,-32,7,21,-32,7,16,-30,6,9,-18,8,3,-27,6,21,-33,5,20,-29,9,21,-24,9,14,-14,9,6,-14,8,17,-25,0,7,-16,8,13,-16,5,7,-5,7,2,-4,8,1,-30,-27,-31,43,39,32,4,1,3,-9,-17,-6,-11,-6,0,-31,-38,-36,47,36,37,0,-8,8,-19,-33,-10,-4,-1,-1,-22,-35,-38,62,44,41,6,-3,8,-17,-27,-10,-6,7,-7,-15,-21,-36,54,45,35,-7,-2,-4,-23,-16,-6,-5,3,-5,-12,-18,-26,41,46,41,-16,8,7,-29,-8,4,0,5,9,14,20,8,15,26,-2,5,22,0,2,15,2,-24,-15,-6,-7,2,3,1,13,3,-2,14,10,-12,0,0,-23,-17,-12,-33,-26,-26,-38,-29,-38,-38,-25,-33,-34,-28,-29,22,20,22,31,29,24,37,40,23,32,38,21,21,22,12,-8,-11,-6,-9,-7,-10,-3,5,-13,-2,8,-10,0,5,-8,17,26,10,-10,-13,-14,-42,-49,-39,-15,-8,1,10,30,29,48,45,37,40,22,26,-24,-44,-34,-58,-62,-52,6,16,16,15,23,16,32,21,32,33,16,22,-51,-59,-55,-34,-28,-26,2,16,6,12,4,16,57,39,46,-2,-5,-8,-32,-28,-27,-22,3,-9,-9,-8,-3,22,8,17,20,14,18,-12,-10,-10,19,4,6,26,15,11,30,20,1,37,35,12,29,24,-2,30,7,-2,32,15,3,19,8,-9,8,5,-8,-4,-8,-21,40,31,26,16,15,12,-7,1,1,-17,-3,3,-28,-14,-14,-3,4,10,-30,-14,-4,-36,-12,-6,-34,-10,-4,-32,-14,-18,-17,-3,13,-42,-19,-4,-40,-11,-3,-36,-7,-4,-25,-2,-7,-38,-19,-31,15,32,16,24,24,3,-5,-15,-27,1,2,7,-2,19,3,62,72,56,-74,-65,-83,2,-3,-13,13,7,20,16,47,23,-67,-52,-73,-35,-36,-54,91,76,73,-16,-22,4,-13,10,-18,-25,-28,-43,93,60,62,9,-14,2,-46,-39,-8,5,4,-9,15,3,1,21,-3,25,-51,-55,-20,-1,19,50,-18,-2,0,32,-2,15,-11,-53,-34,21,24,24,-23,-7,-7,-26,4,-5,56,29,40,-59,-98,-80,64,78,68,-38,-17,-20,-32,0,-17,79,63,63,-100,-122,-115,86,110,92,-43,-10,-28,-14,-3,-7,54,29,43,-62,-92,-76,56,68,62,-30,-5,-23,-4,-2,0,17,-3,20,-22,-39,-26,20,24,17,-6,13,-7}
+
+#define CONV1_BIAS {-4,2,2,1,-3,-6,-4,0,4,-2,-6,-5,-3,3,-2,-3,-3,-3,0,0,-3,3,-1,0,-4,1,1,1,-1,-2,4,-4}
+
+#define CONV2_WT {2,7,-10,21,-22,33,-9,1,6,11,-19,7,-13,5,-10,12,23,-3,-9,-8,17,-14,-19,-25,9,3,1,0,-52,23,15,10,-7,4,19,2,-3,38,-10,41,9,28,-19,1,3,4,-14,30,27,-10,0,-6,11,9,-15,-17,12,-3,-2,-2,-16,16,33,21,-7,-9,32,2,8,32,-20,54,-14,26,-36,-23,1,4,-7,35,16,-14,17,23,-2,-7,-1,-13,5,-6,-23,-9,-30,4,43,50,0,-19,12,-3,25,12,-22,32,2,6,-30,-24,4,15,-16,14,26,-7,46,8,-7,-4,-4,2,1,11,-23,9,-27,-11,24,8,8,-17,-4,1,24,13,-18,18,3,-9,-5,-23,-14,13,-11,3,31,-26,59,-43,7,-26,-3,2,-3,21,-13,19,-4,-2,37,-20,-17,31,-11,9,-21,26,-18,-5,0,-3,-38,-2,-29,-11,10,-14,27,2,0,-19,2,-7,-9,-36,-10,-14,0,-11,20,-6,-15,-8,-35,24,43,-7,-4,47,-5,68,-5,-4,-33,22,5,-18,6,-19,29,13,-5,-37,-7,0,-7,-28,0,-28,-4,-4,74,-20,-26,-3,-38,6,59,-7,13,45,5,97,-26,0,-45,23,17,-20,3,-20,19,12,7,-15,-18,-12,3,-16,0,-31,-18,-3,51,-23,-29,22,-30,-7,51,-14,25,33,17,77,-1,-4,-25,22,26,-10,-2,-14,24,32,23,-4,-19,-8,5,5,6,-20,-13,12,22,-14,-9,21,-3,-7,13,4,23,26,13,26,8,6,7,-4,-2,-12,-2,17,25,27,39,-22,-2,-24,1,10,0,-5,-3,10,-5,-3,26,-6,-28,25,-24,-43,-22,8,-36,-22,4,-10,-41,-25,-21,-10,22,-13,9,-19,-5,-36,3,-2,-3,-16,-35,-10,-8,-21,50,-35,-37,-32,-38,33,37,-21,-13,38,-8,59,-10,-28,-45,29,13,-16,26,-29,15,4,-23,-42,-3,-6,2,-15,-20,-30,-11,-12,123,-39,-52,-45,-48,19,72,-5,-2,43,20,103,-28,-27,-47,61,30,-21,22,-36,22,30,-21,-32,-15,-10,11,-12,-12,-38,-12,-7,110,-33,-60,-36,-33,10,63,7,16,29,48,82,-6,-21,-15,67,36,-15,14,-14,30,44,-6,-14,-18,-13,11,-3,12,-35,-2,20,72,-29,-19,-15,-8,2,19,18,9,16,45,15,0,3,19,43,16,-19,7,14,32,39,12,-10,-6,-18,8,-2,15,-20,-2,19,-21,-15,13,-43,-5,13,-18,-51,-4,-16,-14,-26,10,-13,-13,-43,-6,13,16,-4,-7,-34,7,-13,14,-8,12,3,-32,10,-20,-11,-21,-41,-16,-23,-18,25,10,-15,-5,-2,3,13,-2,-32,-29,-1,0,6,27,-21,2,-10,-4,-5,10,-4,13,-3,-27,-4,-30,-17,30,-25,-36,-70,-33,20,35,11,-7,12,19,35,-20,-44,-38,44,7,-5,31,-22,15,18,-2,-17,3,10,21,-11,-28,-11,-14,-21,45,-18,-45,-61,-23,20,44,19,5,16,37,38,1,-31,-19,58,17,-6,22,1,35,40,1,-4,12,10,11,-13,0,-19,14,-6,28,-11,-6,-29,-13,9,15,15,-1,4,27,-16,1,-4,17,56,1,-11,16,13,33,27,4,-3,25,-2,12,-8,25,-15,9,-9,-34,-6,5,-45,-3,-21,2,-39,8,-18,3,-2,18,2,27,-16,1,18,8,19,11,-17,15,22,31,11,11,22,6,21,-34,-4,-47,2,12,-6,-8,-6,9,-10,3,-26,8,0,9,-18,5,-8,3,18,13,13,18,-5,9,36,26,24,13,15,-4,15,-46,-22,-60,19,0,-57,-19,-7,24,3,2,-20,15,-3,-2,-30,-1,3,0,10,22,15,16,16,16,14,17,39,24,12,-27,13,-23,-39,-45,28,2,-55,-11,-5,18,9,8,-5,35,-1,9,-29,1,-4,2,7,22,22,14,19,8,5,26,38,12,19,-25,-1,14,-24,-20,9,13,-35,-14,-11,5,7,-8,-2,32,-29,-14,-7,11,4,-16,-1,17,12,10,0,3,-3,41,17,17,26,-22,-10,13,-19,-33,-28,5,-23,24,32,-21,20,22,12,6,-14,6,-13,15,-29,18,95,6,4,10,-15,18,2,-52,5,23,23,1,34,0,24,30,-1,-20,-10,16,20,-17,12,-8,20,-12,-2,14,-21,0,2,11,60,-3,10,10,-28,-10,25,-34,-7,5,1,-7,6,17,13,35,-4,-19,-33,21,1,-9,5,-41,20,-20,1,7,-11,-2,23,-6,-3,-12,21,8,-40,-29,37,-6,-22,-27,-27,0,-27,2,5,51,-12,-11,-38,9,-7,5,11,-55,-8,-20,20,12,-11,-14,23,-19,-56,-14,15,11,-32,-23,34,18,-12,-33,-47,10,-40,-2,-8,33,-9,1,-48,-8,-13,12,2,-25,-33,-28,3,10,2,-17,12,-7,-62,-14,6,15,-23,0,42,15,2,-30,-41,6,-19,0,-10,33,-7,2,-87,-2,7,-24,28,15,13,1,-18,1,-16,9,-36,4,44,3,-16,-5,-14,17,-19,-35,11,8,26,8,28,-6,13,1,-15,-29,-24,1,2,-18,22,-22,29,-18,-8,-2,-22,-8,-20,-17,8,0,5,-4,-17,-8,12,-25,3,-4,6,-3,1,1,-5,19,-18,-23,-34,3,-13,-12,15,-61,34,-31,-7,-2,-11,-21,11,-35,-54,-7,24,-2,-13,-37,43,-5,-6,-29,-16,-8,-37,5,-17,49,-25,-2,-20,3,-18,-1,1,-82,1,-35,5,2,3,-41,2,-59,-101,3,36,10,-8,-40,53,16,6,-29,-29,-17,-51,-3,-28,38,-10,19,-16,-2,-17,0,-14,-46,-35,-34,-8,-4,13,-42,-3,-41,-100,-8,31,12,-5,-9,72,10,25,-18,-19,-29,-27,11,-22,23,-7,25,-59,-1,13,-9,10,18,14,8,4,8,-5,14,-7,3,22,3,-12,4,-9,6,-17,-10,15,-1,7,8,25,-9,1,6,6,-22,-28,6,13,-8,8,-20,38,-18,7,2,-16,-3,5,-12,4,3,9,3,-17,-18,16,-9,8,-8,-5,7,1,-7,-8,25,5,-8,-30,16,9,-6,18,-59,40,-33,15,4,-1,-25,22,-33,-34,4,31,6,-19,-48,37,3,-4,-25,-13,4,-29,6,-8,53,-2,21,3,30,9,6,12,-82,13,-36,22,10,19,-49,15,-58,-60,15,38,14,-12,-48,47,18,12,-20,-15,-4,-37,-14,-11,48,7,37,16,26,11,2,0,-46,-24,-27,8,-7,18,-48,4,-47,-58,-3,21,7,-8,-17,67,8,28,-3,-3,-16,-16,3,-4,15,1,30,-32,-2,17,-5,-12,24,2,0,8,1,-7,25,14,9,10,-3,3,4,-4,16,-21,-5,17,-4,-9,21,26,-15,-2,5,32,-6,-36,3,20,-1,-10,-8,27,-18,4,-4,-17,10,17,-8,12,-9,17,3,-6,-7,-3,-15,7,-9,-15,11,7,-16,-4,-13,21,-6,-29,5,16,-2,20,-34,27,-30,13,-2,1,-13,22,-10,5,-3,19,1,13,-22,20,-7,-7,-17,-14,-8,-13,6,2,13,4,24,9,17,18,16,20,-51,15,-37,26,-5,16,-27,8,-30,-3,11,15,2,25,-23,22,3,2,-7,-8,-6,-9,-22,-1,6,14,26,28,15,23,8,20,-17,-13,-32,18,-17,5,-24,-1,-23,1,-3,-2,-3,23,12,33,-11,17,4,-1,-6,13,-9,3,-21,-3,18,-17,-3,27,12,-23,22,-1,19,19,-3,-26,52,2,8,10,8,6,4,-19,18,-31,-1,33,-6,5,5,20,-2,-2,30,6,-5,-18,-3,33,8,-15,10,11,2,19,-1,-26,35,10,14,29,-7,-1,9,-18,-2,-19,-11,22,-8,0,2,10,-6,0,6,9,-6,-7,-6,31,10,9,2,9,-8,26,7,1,16,20,31,42,0,-6,0,-2,-15,4,-4,6,-7,5,-4,5,21,8,9,-1,4,16,11,36,20,25,-6,12,-14,34,-7,9,8,10,23,45,7,-17,-8,8,-4,20,-1,9,1,8,-3,17,-16,13,18,3,1,35,8,36,11,24,15,-2,-13,28,-14,-16,11,2,15,50,4,-33,-11,-1,33,-5,-14,22,7,12,0,36,-10,14,-8,-16,-6,-6,12,17,-1,-6,-20,9,9,-5,23,56,3,48,9,5,10,-13,-6,1,-20,2,16,13,24,-29,39,-14,23,4,3,47,3,32,12,11,-25,-3,4,0,-12,-43,17,37,-18,18,15,23,-1,-16,-25,-6,-8,-5,7,0,3,-22,23,6,32,3,-12,21,-7,5,15,11,-41,22,6,24,-20,-39,14,21,-10,19,2,27,4,-9,-29,10,-2,-15,8,-17,13,3,19,21,10,4,-3,22,-9,23,5,8,-40,20,1,11,-21,-35,20,-4,-20,-12,-10,35,-27,-13,-27,7,-19,-12,3,-15,-3,9,12,6,40,14,-25,11,-5,16,4,8,-30,17,-16,-7,-17,-27,19,21,-16,-1,-20,40,-30,-2,-8,13,-35,15,1,-10,-2,10,14,-12,31,17,-20,8,19,48,-9,22,6,-3,-8,17,-24,-10,-2,49,-10,12,1,18,10,-12,-6,-1,2,14,28,10,40,-20,-39,2,16,-37,1,11,-3,36,-20,8,-11,-10,20,-6,-32,-33,-14,22,-29,-20,20,31,-8,-32,-29,-16,25,6,6,-9,29,-7,-54,28,29,-41,-11,-11,-9,-2,-20,0,-24,1,17,17,-29,-33,-14,7,-12,-25,12,30,-4,-27,-32,-2,34,-1,-9,-21,33,19,-50,47,12,-31,-8,-11,0,9,-29,-8,-26,-3,6,17,-28,-30,-2,-17,-8,-44,-4,32,-22,-21,-27,-6,7,-4,-22,-15,12,22,-38,26,37,-10,-21,-14,3,9,-17,-6,-21,-8,-16,10,-31,-23,8,5,-7,-20,-15,37,-16,0,-8,-2,-24,14,-22,-4,10,21,-13,5,33,4,3,-5,31,45,-12,20,29,-18,-3,24,-3,17,-13,40,13,8,7,17,16,-19,-10,2,17,20,44,6,45,3,-25,10,7,-25,22,-5,-1,30,-24,1,20,-16,25,-11,3,6,-28,6,7,-18,22,25,-5,-26,-15,-9,42,2,19,-11,32,12,-38,32,15,-22,-6,-28,-3,-7,-22,-10,9,-2,20,7,16,3,-26,-3,41,-32,2,23,1,-8,-10,-4,48,-5,-2,-10,29,31,-28,46,2,-14,-1,-17,10,-12,-23,-12,6,0,4,11,17,2,-11,-18,46,-45,-5,21,-10,6,-6,-8,20,-12,-15,3,6,26,-25,26,23,-4,-19,-10,26,21,-15,-5,2,7,-13,14,12,-3,1,-1,41,-32,-10,27,-5,15,2,-2,-17,0,-15,19,4,21,-15,2,24,6,15,-6,39,54,-8,-6,27,-35,-1,21,-21,21,-15,18,5,-8,0,-3,7,-30,-10,4,14,10,40,0,20,-15,-28,4,-7,-14,11,-27,-15,22,-13,-25,27,-31,17,-15,-9,13,-24,-14,9,-20,9,5,-13,-34,-10,-4,28,-14,21,-8,8,-4,-31,21,-6,-11,-21,-21,-15,-21,-10,-36,23,-14,16,-4,4,13,-19,-12,39,-20,-12,9,3,-7,-6,5,34,-20,9,6,1,16,-12,28,-14,-4,-12,2,0,-27,-10,-30,9,-13,1,1,1,1,-5,-17,45,-31,-24,9,4,9,10,6,12,-10,3,24,-12,13,-3,12,0,4,-24,8,19,15,-10,-17,0,-6,-16,12,-13,-10,8,-8,45,-26,-25,18,1,17,10,3,-18,-1,2,48,-8,11,0,-2,8,11,6,5,40,35,-4,-15,26,-8,-1,14,-5,32,-8,12,5,-9,-1,-22,0,-18,-8,9,-4,34,35,0,8,-7,-20,-9,4,-16,28,-20,-8,23,-6,-26,30,-2,14,-19,13,29,-12,-14,8,-17,-2,-8,-4,-23,0,9,13,12,25,2,-6,3,-16,6,-8,-14,4,-5,-3,-12,-1,-25,25,17,10,-15,28,12,0,-11,33,-11,-22,2,18,-6,5,22,24,-3,22,26,-6,13,8,15,-11,-2,-4,27,3,-27,1,-10,-2,15,-2,-12,24,-10,8,-11,37,-14,-27,11,20,3,14,20,11,2,18,40,-7,13,16,10,1,10,-12,44,13,16,5,1,-10,15,-11,1,9,-14,23,-3,37,-11,-20,26,10,13,8,15,-13,10,17,52,-4,17,20,5,19,25,5,42,32,32,-34,-11,5,8,23,-10,12,5,14,-12,3,17,17,0,13,-7,17,14,6,16,-25,20,-30,0,-15,-5,-2,-2,8,10,6,-35,-20,-9,14,27,19,-15,9,16,16,-10,-2,-6,-6,7,15,19,20,28,12,-29,-16,19,-39,1,-6,-9,-11,-3,16,18,20,-26,-7,-11,15,32,9,-19,1,13,5,3,3,-17,-10,7,16,36,20,33,19,-8,-8,18,-26,3,0,-11,-8,-5,-6,8,34,-37,3,-19,2,24,0,-25,-8,-10,1,-2,10,-38,-32,-6,15,24,16,20,16,-19,-6,13,-20,1,-17,-11,-15,-18,-33,7,24,-29,0,-33,-5,9,-3,-9,-10,-16,2,14,20,-46,-34,-19,22,12,12,10,16,-12,-4,15,-13,-7,-22,-13,-4,-11,-19,1,9,-7,-26,-9,10,-8,19,-22,-3,9,-2,-5,1,-14,6,-11,2,-5,21,-8,3,22,2,19,-25,-10,-21,1,1,-12,-15,-2,3,-8,-10,-10,21,9,21,-30,0,25,-1,-10,0,-20,-6,-9,8,7,13,12,8,-20,8,18,-34,-9,-10,-4,-6,-5,10,1,9,-5,3,-17,27,28,17,-23,6,29,-6,-4,6,-15,-8,-8,15,15,10,23,22,-5,9,18,-20,2,3,-2,0,3,-5,-4,13,-11,9,-27,21,26,4,-22,6,12,-3,-8,23,-32,-30,-13,17,5,12,13,22,-11,1,22,-18,-1,-9,-6,-15,-4,-20,9,5,-16,7,-46,15,10,-5,-11,2,9,-4,9,29,-39,-29,-17,22,13,10,-1,15,-5,-3,25,-12,-4,-20,-10,-11,-10,-15,8,0,-5,-22,5,5,-15,27,-10,-14,11,0,5,-12,6,22,-17,10,-6,19,18,23,16,19,32,-13,-11,-25,19,-1,-28,3,23,0,17,-18,6,20,3,35,-22,-5,25,8,-8,-5,4,11,-18,10,-15,4,32,30,-23,26,29,-24,-6,-20,14,-2,-15,26,25,-1,13,-11,-8,30,22,27,-16,8,32,11,7,11,16,13,-18,21,-12,11,46,44,-13,28,39,-17,7,-7,13,4,-3,20,31,8,12,0,-23,25,19,17,-11,13,21,14,6,31,-3,-6,-13,25,0,9,37,39,-10,18,45,-16,8,-12,7,-8,-4,10,47,1,10,8,-40,27,8,7,-3,7,18,11,21,30,-16,-13,-10,28,16,10,19,28,13,9,48,-5,14,-20,0,-6,-11,4,41,10,20,-11,14,-6,-52,16,-6,-13,5,2,-6,-16,11,10,-5,-2,-14,2,-23,-2,-21,6,1,1,6,-5,21,1,-16,4,5,-22,16,-11,10,3,-35,25,-16,-6,12,8,-22,-10,14,13,-7,-11,-27,-8,-7,0,-45,15,1,-11,3,-10,15,6,-4,-8,7,-26,-2,-8,0,8,-20,10,-17,7,10,11,1,-3,17,4,-8,0,-15,-6,3,9,-32,25,8,-14,11,-2,16,-5,6,3,22,-14,-6,2,-11,8,-11,4,-8,14,8,11,5,9,3,-6,-5,2,5,-7,0,9,-16,15,23,-15,17,-5,8,-6,4,-2,33,-6,10,14,-27,7,-17,-3,-6,10,3,12,26,0,-11,-16,3,9,19,7,-15,5,12,3,34,-8,24,-9,1,4,0,2,31,7,25,-17,22,-26,2,12,0,-7,-8,18,-1,-26,12,9,13,0,-32,0,-35,-8,-36,-14,-23,-9,-6,-4,13,10,-13,9,11,-34,29,-9,18,-26,5,20,-3,-4,-14,14,-17,-23,23,19,14,-23,-38,-17,-29,-13,-43,-3,-29,-16,-7,-3,13,9,4,-17,2,-36,-6,3,10,-26,12,11,-7,6,-18,10,0,-18,16,5,10,-18,-25,-22,-24,-6,-32,9,-28,-17,-2,-4,12,-15,13,-15,9,-26,-12,5,0,-14,10,0,-7,2,-8,4,4,-14,2,-3,10,-20,-16,-20,-23,-9,-18,3,-9,-22,-3,-11,3,-9,7,-22,10,-26,11,7,-16,-11,-6,-2,-11,-11,-17,17,24,-24,-15,-10,17,-3,-5,-4,-28,-11,-5,-5,15,-23,-2,-15,-2,9,-4,-7,12,-17,28,14,10,-36,1,-17,-12,21,-48,1,5,28,14,0,7,-22,13,3,-14,-12,35,21,-4,0,-2,-14,1,7,-5,-43,8,20,-13,-2,7,-24,9,-5,-17,18,-21,-9,-5,23,24,-3,-12,-20,-21,-4,-5,-4,-4,20,-4,-6,-7,-17,9,-3,-3,-29,15,-5,-16,-10,5,-6,1,1,-18,10,8,6,-12,24,19,10,-24,-2,-29,-6,-2,-12,-42,15,6,-17,-8,-10,2,4,6,9,21,-33,-6,-23,15,5,-7,16,-6,6,20,10,0,27,-8,23,-3,7,-23,-10,-11,-18,-27,13,5,-17,-6,-23,-5,14,-3,44,-4,-32,4,-38,9,12,-24,18,3,-1,22,-4,10,33,-19,22,17,0,-6,-2,-1,-8,4,8,-8,-4,4,-34,3,9,-18,35,-20,-16,17,-1,6,-31,-32,-29,-11,3,-22,1,23,23,18,-11,-27,-17,-1,10,-25,9,10,8,1,9,1,-5,-4,-1,-4,-10,29,23,1,3,-7,-13,-45,-16,-12,-3,6,-10,19,18,29,-4,-45,-24,-13,-3,-2,12,1,5,6,10,12,10,7,-8,12,-11,43,12,13,8,-12,-2,-40,-13,-13,-7,24,-4,2,8,26,-2,-44,-10,1,-19,-3,-3,-12,2,-1,6,19,8,1,3,19,-1,30,-8,1,-4,-2,2,-30,3,-8,-5,14,7,-2,9,2,12,-9,-7,-7,-18,-15,-13,13,4,1,5,15,-17,-6,14,13,17,6,-19,-22,-20,-8,4,-37,-2,-6,-2,14,0,12,15,-18,9,18,-11,-5,-5,-20,-9,26,4,-8,12,14,-29,3,11,1,11,-2,-17,-18,9,-2,-18,-42,-25,-9,18,0,-8,25,37,-5,-22,-46,-2,11,-10,-25,19,-11,-3,-7,12,-15,10,-7,-10,8,39,11,29,26,30,-12,-1,-23,-10,-1,34,36,-18,29,36,29,-13,-61,-20,31,-10,2,29,18,-15,-7,17,1,29,5,-5,31,22,23,36,46,33,-12,10,-5,-8,-9,44,34,-16,11,18,21,-12,-48,-16,27,-15,4,15,35,-18,-18,13,9,22,2,6,38,-3,14,14,21,10,-6,8,-11,11,-9,33,20,-7,-10,5,-7,-9,-5,-14,2,-1,-4,1,36,-11,-16,5,0,-9,-1,14,23,-10,-1,-18,-19,-5,-11,6,-11,9,-13,26,9,-8,5,0,-32,-9,24,-14,-3,1,-12,4,37,-6,-25,10,-1,-36,10,-3,4,1,-6,-23,-24,17,22,-17,14,-35,-3,35,-4,-21,13,41,-6,-28,-40,-2,24,-26,-39,11,-7,-3,-32,8,-18,16,-8,3,-4,51,-17,18,25,40,13,6,45,-26,5,54,27,-23,11,35,24,-19,-43,-20,37,-10,-10,22,21,-19,-26,17,-4,31,-1,10,17,18,-17,22,33,36,8,4,55,-17,-9,48,16,-8,4,12,0,-23,-21,-19,25,1,-6,13,42,-21,-28,9,-2,14,2,15,19,-8,-17,8,12,9,7,6,32,0,-12,29,7,-2,-10,-9,-18,-21,21,-18,-4,6,-8,-3,32,-13,-19,2,-15,-7,4,18,12,-13,-12,-21,3,0,-1,18,22,6,-25,14,17,-8,1,-21,-28,-10,43,-22,-10,9,-10,4,40,-3,-26,10,-17,-20,15,-5,-3,2,-18,-23,0,9,38,-20,64,-18,10,49,-23,-21,-15,26,-22,-28,-15,-5,0,-24,-43,0,-12,21,-26,10,-14,-37,-15,22,-21,28,-53,-8,3,17,29,-9,83,-11,19,57,6,-18,-8,19,-18,-30,-10,-8,-3,6,-19,19,3,2,-19,10,-10,-26,-8,21,-6,17,-38,-4,2,9,21,-9,64,-7,2,38,-3,-2,6,-1,-24,-27,8,-7,-3,15,-4,17,2,-12,-18,4,-13,-23,4,10,-8,-3,-12,-7,-11,-8,14,-12,30,10,-7,10,-4,6,3,-17,-23,-19,41,-14,-18,18,-4,5,6,-10,-13,7,-18,-22,11,9,-8,-5,9,-18,11,-22,2,3,10,19,-28,-7,5,4,5,-26,-13,-1,55,-20,-38,16,1,20,22,-6,-24,16,-15,-17,26,-6,-12,9,2,-23,4,-10,-16,-13,-3,-9,23,-10,-32,-15,13,20,38,-16,-11,-9,16,-1,5,-16,8,-1,-1,-2,2,-2,0,-1,-26,-9,-7,12,-24,16,-4,3,22,-12,6,8,-1,-20,14,-10,47,-24,-26,-21,16,-7,28,4,13,17,1,0,5,23,10,-2,-6,12,8,17,-12,1,-6,29,23,4,-10,15,47,-23,2,-38,55,0,-38,-35,-15,-19,30,22,-5,12,-4,-8,0,29,27,-7,3,13,-15,-12,-24,-9,1,24,11,9,8,6,44,-6,-6,-50,39,3,-30,-12,-30,-24,14,24,-30,7,-6,-26,-18,9,33,-26,-5,28,-38,-32,-25,-25,25,7,25,2,29,1,26,14,-16,-46,16,1,1,2,-20,-19,-8,11,-57,8,-5,-44,-29,-19,23,-5,-11,29,-47,-19,-11,0,-12,-15,22,-8,28,-3,-15,-24,8,12,-8,-23,33,-8,-5,-2,-5,2,13,12,-13,-1,22,0,-1,-5,-11,-11,-19,14,5,31,-2,10,26,-13,21,8,19,-34,21,-3,4,-29,11,-22,13,0,24,9,14,24,-14,-3,27,38,5,11,8,6,2,34,19,34,-8,42,11,-7,8,12,65,-32,14,-25,20,-10,-9,-39,1,-15,35,13,-1,11,-23,-7,19,50,12,3,15,19,-7,24,18,19,-2,37,-8,1,19,2,67,-15,1,-37,21,-2,-10,-26,-20,-17,10,10,-13,1,-30,-24,-8,22,12,-9,5,16,-17,0,20,2,17,20,-1,-5,34,-6,41,13,-14,-38,17,6,9,-15,-20,-14,-20,-4,-18,5,-22,-39,-29,-8,0,2,-1,17,-14,-1,13,-22,-18,-8,-13,15,29,-12,-9,-17,19,1,-15,1,47,-5,-10,3,27,10,-1,16,-14,-2,21,3,9,-12,6,18,12,24,48,14,-7,8,-13,14,32,-2,34,-20,38,-1,-5,-8,24,-27,19,6,38,11,16,22,-14,-1,26,42,14,17,19,37,31,49,54,34,-12,41,-25,9,27,5,78,-21,41,-14,5,-6,1,-39,29,1,38,-1,31,3,-20,-8,21,59,11,19,26,22,18,53,73,23,-6,41,-35,12,32,3,66,-9,23,-23,15,6,-10,-29,-3,-6,18,-16,37,-11,-28,-26,-7,25,3,12,15,19,11,36,51,9,11,25,-24,-2,33,0,38,12,7,-32,26,13,-7,-19,-4,-3,-9,-32,33,-3,-13,-39,-25,-9,-8,7,12,24,17,25,32,-33,-29,-20,-25,13,-3,8,-4,-22,-1,-6,-18,15,39,2,-43,-7,25,19,-22,3,-17,2,13,-5,9,-33,-1,-2,-7,-26,40,5,-19,-9,-17,14,4,24,13,-12,14,0,-23,5,21,-20,-9,6,26,21,-18,4,-9,-3,21,16,11,0,8,2,12,-2,6,24,-19,8,-22,-9,16,29,34,-12,26,-3,-24,-19,-4,-25,10,11,17,4,-2,-8,-5,-12,19,22,2,10,16,-2,16,24,24,26,-13,11,-40,-15,17,19,28,-7,18,-12,-14,-8,-16,-27,16,12,-6,-22,13,-21,-10,-22,-1,-4,-9,7,4,-4,21,29,-4,24,8,2,-22,-19,16,11,5,3,9,-19,4,-5,-28,-20,20,3,-19,-41,41,-8,4,-19,-14,-22,-23,4,-1,-3,34,34,-11,-18,-18,-31,0,7,-33,13,-21,-30,-17,3,9,5,39,-7,-61,-17,25,26,-29,1,-37,11,-13,-3,2,-47,1,-55,-11,-52,0,0,-11,-20,13,2,-19,36,-20,-14,-17,16,5,-3,34,-22,-38,9,35,35,-38,11,-9,8,-8,8,3,-25,6,-54,12,-38,-64,5,-10,-13,17,-17,4,46,-10,-1,0,22,-7,-33,18,-12,-18,22,36,25,-37,11,-1,-9,-9,21,-6,-14,15,-32,24,-15,-35,17,-7,-9,12,-28,9,44,-9,3,9,20,0,-25,8,-8,3,22,13,-2,-19,1,-1,-8,-14,9,-20,-21,9,-14,29,0,-48,32,11,-1,33,-23,2,45,-14,2,4,14,18,-7,-7,-3,30,25,1,-12,40,6,12,-2,-14,-3,-32,-3,9,-6,27,26,-26,21,-5,9,11,15,-15,11,14,-11,-7,2,18,0,29,-6,9,1,0,28,24,-10,5,1,-14,3,36,1,6,29,17,-32,37,18,0,5,12,14,-22,17,16,-16,-19,10,36,1,28,-15,-10,5,-29,21,-25,-17,-17,-14,-19,16,37,-10,12,16,20,-47,27,36,19,7,20,8,-32,34,4,-19,-16,25,56,10,28,-6,8,18,-24,13,-38,-14,-17,-18,-18,39,31,-18,32,1,18,-16,10,39,8,-14,-11,1,-34,30,-14,-31,-16,30,48,-7,-11,-12,27,10,-33,13,-31,-13,8,-6,-10,34,22,-13,23,-60,16,13,-22,35,-8,-17,-38,6,-18,5,-31,-33,1,36,43,-10,-49,7,47,-1,-36,20,-7,-11,38,9,-11,36,11,4,6,-62,1,26,-1,-3,-5,11,-21,-2,-4,0,11,-3,-15,-5,-4,-4,24,-14,20,-16,-14,-6,2,-39,-25,-6,-14,19,2,3,0,-7,-8,0,47,4,-1,10,-4,-11,-17,3,11,-10,-17,-9,-11,-4,33,-21,16,-13,-29,-24,-28,-39,-47,-24,-18,15,-1,-5,9,-11,-21,-1,37,31,21,5,17,-15,-30,14,-6,-17,-19,-4,0,-5,46,-15,23,-2,-21,-35,-24,-27,-58,-22,-15,32,-5,-15,25,-20,-22,23,12,32,15,-6,11,-9,-34,15,-19,-31,-29,-8,-2,-15,19,-17,14,1,-37,-22,-13,-20,-43,-7,-14,27,-6,0,20,-41,-37,30,-19,18,-3,-8,-25,6,-18,-12,-22,-28,-14,-3,3,-13,-18,4,10,-4,-37,-1,-17,-13,-11,6,-15,11,-9,6,3,-28,-50,19,11,-2,-9,40,-24,1,0,-2,48,2,-1,-13,-22,1,0,-11,33,-6,6,-22,18,-44,1,-6,-1,-15,-6,15,11,5,-24,35,69,-2,-10,34,1,-9,-17,-2,44,11,8,-29,-36,-6,19,-19,27,-10,-5,-38,12,-40,-18,-27,6,-14,-11,5,8,16,-26,40,78,13,13,32,31,-12,-26,7,36,8,2,-32,-28,13,43,-11,21,0,-2,-48,7,-21,-38,-25,16,1,-12,5,18,31,-20,56,56,-3,5,23,14,-4,-30,2,10,-4,-14,-37,-21,4,28,-3,-15,1,-13,-33,2,-10,-28,-9,18,0,-10,11,-1,11,-40,55,9,-28,-9,15,-21,16,-10,-19,8,-1,-3,-35,-18,8,-1,23,-21,-10,-20,-12,-10,-8,-10,6,18,-12,-4,20,-13,35,-46,36,33,-7,-15,45,-30,-5,-18,-12,51,8,-1,-5,-14,-9,-29,-3,28,5,23,-21,21,-29,21,6,-1,20,-1,7,15,6,-10,29,50,-2,-14,37,2,-21,-29,-11,39,20,8,-17,-24,-10,0,-9,17,-16,15,-39,4,-14,9,-16,3,28,-6,-1,17,-1,-4,34,70,10,4,25,33,-27,-35,0,30,24,-2,-19,-12,14,33,-4,2,-3,16,-45,-16,6,-6,-22,14,35,-7,8,32,19,-11,45,61,7,-2,18,21,-9,-39,1,15,16,-13,-27,-3,12,28,8,-9,-5,-4,-35,-25,14,-3,-8,11,25,-3,7,18,19,-24,50,15,-15,-4,16,-5,12,-18,-4,16,6,2,-24,-6,24,9,28,-15,-15,-10,-16,-25,8,0,7,8,-5,7,25,1,34,-32,34,37,4,-16,36,-14,5,-33,0,40,-4,-12,-11,7,-26,-52,2,20,12,22,1,11,-22,20,9,3,26,6,-8,13,14,-23,24,22,6,-20,22,3,-13,-38,-4,19,6,-13,-16,7,-29,-14,-9,-4,7,19,-17,-17,-4,14,-13,2,36,1,-26,12,-16,1,18,32,13,-14,10,31,-29,-39,2,7,22,-18,-8,27,-11,27,-12,-7,8,15,-25,-34,20,1,-24,3,42,2,-19,24,-18,7,30,38,7,-18,5,19,-2,-50,-3,-9,19,-19,-13,19,2,26,-6,-12,1,-3,-20,-24,27,10,-14,-5,35,8,-4,0,-42,6,35,-5,-14,-21,12,2,16,-36,-7,1,5,3,-11,6,20,12,15,-9,-9,-10,-6,-4,19,5,-3,-13,4,21,15,-23,-1,-9,28,15,24,0,-2,-26,-10,-11,6,6,3,-20,31,-23,-30,0,-7,29,9,12,-17,-7,-47,13,-8,9,28,1,9,35,-3,27,46,37,31,-8,-10,-11,-14,19,15,-9,-2,17,38,-16,-16,8,2,34,-2,23,-34,2,-37,-7,-15,20,28,-2,49,42,15,24,36,63,40,-14,-18,3,-24,1,25,-38,-11,18,16,-6,0,22,-7,28,-23,25,-38,25,-26,-30,4,37,25,-6,26,45,-14,10,34,30,25,-21,-21,-1,-14,-12,34,-38,-21,3,-6,-20,-10,22,-7,1,-27,17,-18,20,-21,-19,16,40,-11,4,21,22,-39,9,12,-3,4,-24,-14,-11,2,-21,27,-34,-11,-5,-19,-27,-4,26,8,-4,-28,4,-7,-23,-20,-14,15,30,-47,11,10,-6,-12,3,-15,16,18,-28,3,-20,-2,2,1,10,-6,-12,45,-26,-31,-4,-1,40,15,-13,-9,36,-22,-6,0,-2,38,-12,13,10,16,-3,22,47,30,-34,-11,-4,-2,34,8,-13,-6,14,63,-11,-10,7,7,40,3,2,-12,46,-9,-15,-11,5,42,-11,56,19,32,-10,5,56,39,-26,-18,-3,-15,15,19,-37,-3,15,64,0,-1,24,1,23,-9,11,-16,45,1,-26,0,16,50,-12,38,27,5,-7,-3,12,22,-22,-21,-14,-8,-16,28,-43,-9,14,42,-4,-11,23,1,3,-17,10,-5,19,4,-11,7,10,31,-1,25,9,-29,10,-14,-6,2,-19,-27,-18,7,-31,21,-45,-5,3,20,-5,5,22,22,-4,-30,-10,-4,-5,-4,-4,10,2,-3,8,6,-10,-9,15,-29,26,-2,-14,-2,-2,-12,17,-25,4,-16,-14,12,-29,-23,-6,7,10,12,-18,-4,22,8,-7,-1,-16,18,-21,9,-12,21,-18,-7,27,1,-19,-23,4,-15,48,-26,-14,-12,-3,38,-11,-10,0,13,-11,5,-4,-8,13,27,-16,-11,-8,30,-18,41,-1,38,-19,-43,23,19,-13,-30,8,-21,30,-25,-42,-7,2,56,-2,-10,17,9,-22,-10,-3,-12,-6,46,-18,-6,-2,59,-14,23,8,5,-1,-51,-15,17,-1,-38,0,-11,-5,-20,-45,-15,8,43,5,-16,16,6,-8,-16,-8,-9,-11,45,-5,-1,-5,56,1,21,-9,-30,14,-41,-3,9,10,-38,-4,3,-28,-18,-51,-8,4,26,15,-5,15,20,1,-21,-24,-10,-1,28,-2,2,-18,33,11,11,-21,-11,26,-38,42,-1,-10,2,2,0,19,-32,11,-24,-2,-30,4,-14,-4,16,-23,12,32,5,-10,6,5,-6,-8,12,-6,2,-8,26,-24,-25,4,1,-20,-29,0,-4,48,-27,-24,-11,1,9,15,-4,-6,13,-49,1,46,2,-31,27,-4,-21,-6,25,0,28,3,9,-14,-58,2,18,-12,-42,9,-5,33,-19,-41,-4,4,35,13,-9,7,11,-27,-16,46,-5,-45,47,4,-19,-4,52,0,18,19,-19,11,-68,-32,22,5,-49,10,6,1,-13,-43,-9,2,25,11,-15,9,10,-18,-16,33,-2,-9,46,11,-9,-8,48,8,16,9,-32,27,-62,-3,12,22,-44,-1,17,-18,-23,-44,0,7,11,10,-8,13,25,-5,-9,14,-7,4,26,26,-8,-22,28,11,14,-5,-29,34,-56,52,14,8,0,0,11,-2,-6,13,-15,3,-51,12,2,-10,6,-8,2,27,7,-20,-22,-1,6,16,19,3,14,24,36,-30,-8,6,29,-7,-24,-2,-3,28,4,-13,-8,7,-9,21,-7,-23,12,-12,-3,37,-1,-28,4,-6,-9,15,34,2,32,35,-8,-9,-32,12,44,-1,-28,15,-4,21,11,-31,-12,-1,15,19,-22,-20,3,-10,-14,38,-10,-35,25,2,-11,4,54,-1,18,37,-18,4,-48,-3,42,13,-30,16,16,-1,12,-23,-21,-6,7,23,-13,-18,10,-22,-6,34,-6,8,28,6,-6,-3,48,5,23,22,-12,16,-57,12,26,29,-20,1,25,-9,-10,-25,0,5,-2,15,-12,-9,20,-6,-3,15,-7,12,7,17,-6,-11,36,5,34,8,13,24,-47,67,-12,-32,-14,-30,-16,-38,-13,-17,18,-15,-24,38,6,-8,-11,-32,-1,-14,-10,-1,17,-32,-15,12,-16,-8,-25,5,-35,-1,-38,-101,-22,-31,-14,-26,-12,-50,3,-27,3,-36,-15,27,1,-11,7,-66,9,-11,1,-34,4,-22,-20,21,-15,-1,-24,12,-16,2,-67,-122,-27,-35,-6,-30,-8,-34,-3,-16,-1,-16,0,12,-5,-12,9,-68,0,-8,18,-97,-11,-20,-26,13,-18,7,-28,0,8,-5,-69,-111,-35,-32,4,-34,-4,-14,-16,-2,-4,-1,15,-2,2,-20,1,-28,-4,-8,17,-53,-8,-12,-8,7,-23,-2,-18,-17,-18,-12,-12,-31,-32,-34,18,-35,18,-1,-18,1,22,20,16,-2,16,-29,33,-4,8,0,28,11,-10,23,14,3,-29,4,-16,-24,3,-5,13,-7,11,5,-12,30,-27,-7,9,-23,4,-22,-42,20,-13,1,1,-33,3,0,-12,11,33,-37,-8,39,-17,-17,-21,28,-2,-24,-39,-97,6,2,-13,27,-25,-26,25,-32,-5,-46,-25,18,-20,2,15,-56,11,-4,-10,-36,17,-28,-18,45,-5,-15,-26,43,6,-9,-50,-117,-1,-8,1,12,-19,-8,20,-16,0,-20,-4,6,-19,4,24,-42,6,0,3,-85,-6,-28,-24,35,-8,-12,-15,39,49,-23,-37,-97,-7,-8,14,5,-18,14,-1,10,3,-6,9,-15,-12,-6,18,-8,0,-2,7,-23,-8,-6,-8,20,-10,-22,0,16,19,-33,3,-8,-7,-12,14,-5,3,18,-4,-4,22,19,-1,-13,2,-6,31,12,2,-2,15,62,-18,27,15,14,-11,-15,-9,-3,-5,-20,14,2,25,27,-10,56,-26,11,31,-31,10,-11,-10,-7,-15,5,12,-4,3,20,-5,24,31,-20,-5,27,-9,-3,-15,34,-16,10,-7,-71,41,26,-8,51,-22,-3,37,-25,3,-29,8,-4,-18,16,20,-18,10,20,-3,-10,23,-25,-14,31,23,-1,-17,60,-2,9,0,-78,37,14,14,39,-13,20,24,3,8,-5,23,-6,-17,18,32,-10,10,31,7,-53,1,-22,-21,22,40,1,1,58,67,-14,14,-42,24,15,20,29,-10,46,4,34,8,-4,25,-4,-3,2,25,14,7,24,12,8,0,-6,-12,10,28,-8,7,35,61,-28,30,33,-1,20,25,21,-4,39,-3,31,11,-3,5,-3,4,7,22,-5,-7,16,17,77,-17,11,9,7,5,-5,-19,17,-2,-16,3,3,15,10,-8,24,-17,17,27,-21,25,1,1,5,-6,-6,9,36,4,22,5,33,15,5,2,12,12,6,-11,12,-23,34,30,-28,24,17,-7,35,-9,2,38,-20,22,-8,12,15,-13,6,15,13,4,17,6,22,18,-1,0,17,28,8,-4,32,-9,24,37,-36,21,15,16,25,4,23,30,-2,27,20,19,-8,-4,8,27,0,8,24,16,-21,2,-7,-3,12,34,16,15,28,69,3,31,2,9,15,28,15,6,58,12,33,13,19,20,-12,11,-6,20,-2,-5,21,21,14,2,-6,1,3,19,8,19,17,86,-14,28,60,-16,25,30,1,-3,47,-2,45,4,-8,0,-16,1,-3,5,-39,-6,8,25,45,-11,-6,12,3,-8,10,-22,4,14,-20,-16,11,10,-4,-12,-20,-28,-2,9,-21,20,10,-14,13,1,-27,-10,37,-6,-17,1,41,-25,-11,4,5,3,-4,1,5,-26,7,37,4,8,-3,-11,-4,-12,-13,17,-23,29,7,-11,-2,-15,-16,-13,8,-2,-16,4,34,-19,-9,9,18,12,1,14,11,-37,2,34,-7,-5,-6,3,-15,4,1,12,-8,40,33,-6,-28,-12,-15,5,-16,10,-6,15,-23,-25,-18,3,14,5,15,34,4,20,3,19,25,-19,-11,20,-34,9,36,-3,27,25,40,3,-15,3,-23,-2,-18,-2,-2,20,-8,-19,-24,-3,2,-3,17,40,-11,43,6,13,63,-43,-3,21,-51,1,35,-15,40,21,20,-6,-12,1,-16,-13,-37,-2,-9,27,15,-20,-18,-1,3,-30,16,-2,-28,4,12,-11,36,-6,3,-2,-30,-22,40,-24,-1,19,13,52,2,33,-31,11,23,8,-28,-34,39,42,-36,7,-24,21,-39,-17,-12,31,-8,26,8,-6,-10,-5,-28,-4,30,-29,-1,9,9,19,-11,21,-69,-23,7,6,-18,-19,34,44,-23,-2,-27,12,-22,19,-10,-6,-18,12,3,-7,-9,-15,-20,9,13,-28,-22,-1,18,-16,-15,19,-63,-20,-4,25,-17,-4,36,20,-11,-12,-31,-1,-11,27,-15,-14,-9,-4,-15,1,10,-27,-8,4,6,-24,-35,32,7,-22,-38,1,-33,-2,-5,41,-34,-8,19,-7,-8,-8,-35,-17,-6,22,-15,-4,1,-35,-30,2,41,-24,2,-2,18,-13,-29,24,19,-17,-37,8,11,-3,-5,23,-32,-20,-8,-14,-27,-7,-27,-15,-2,-4,-4,35,11,-40,-23,5,19,5,22,-13,37,15,2,7,13,41,-2,32,-25,14,17,16,7,-31,57,34,-12,21,-3,6,-28,-34,-9,50,-13,27,-17,6,2,-7,9,10,33,7,-5,2,9,19,-7,31,-61,-10,12,18,19,0,60,31,8,16,-4,13,-4,4,-7,-4,-5,22,-28,-4,-3,-16,-6,24,25,-6,-31,6,21,3,-1,34,-55,1,1,31,10,14,56,3,21,7,-11,0,8,14,-9,6,14,4,-27,-12,10,-28,-19,20,19,-14,-43,33,10,-4,-24,12,-31,11,-12,39,-16,6,32,-21,11,0,-22,-19,5,13,-11,15,15,-28,-35,-11,34,-20,-11,1,23,-9,-22,20,14,-5,-15,23,5,2,-2,23,-16,-18,-2,-26,-25,-10,-24,-20,-2,-24,-8,39,5,-34,-16,8,24,3,40,-7,31,16,3,6,12,44,-4,28,-16,23,20,28,25,-12,60,18,16,22,-1,8,-11,-53,-8,50,-8,14,-38,11,9,-6,17,18,27,17,0,-2,10,37,9,35,-46,3,25,31,32,21,65,4,28,24,8,25,14,-20,-4,-3,10,17,-51,-3,-4,-15,-18,33,29,-3,-17,7,19,35,20,48,-41,22,17,33,22,40,56,-25,22,20,1,11,28,-5,-5,27,19,8,-27,-11,4,-22,-32,22,32,-13,-29,33,10,29,-10,21,-23,21,9,35,-11,23,29,-41,8,8,-10,-17,17,-3,-3,43,13,-21,-39,-11,25,-23,-26,-6,22,-9,-19,22,5,17,-13,20,2,5,11,16,-17,-9,10,-37,-22,-1,-11,-21,-1,-34,-1,51,-4,-30,-28,6,19,-6,26,-8,24,-2,-8,1,-2,27,-23,10,-3,19,5,3,12,-16,15,16,22,4,3,4,-6,-61,-7,18,-13,-4,-50,16,5,-4,6,9,13,4,-3,-7,7,20,-13,16,-26,-5,16,12,19,18,24,-2,22,4,9,15,10,-36,5,-15,-6,0,-63,11,-10,-3,-38,15,20,-7,3,-3,21,23,-4,35,-20,12,18,12,8,33,21,-27,2,5,3,5,20,-12,12,4,-4,-8,-27,16,-9,-11,-41,1,30,-14,-14,20,4,22,-20,10,-9,11,19,10,-11,16,7,-34,-11,-10,-5,-19,11,-15,11,27,0,-23,-52,7,11,-19,-16,-21,21,-9,-13,15,-6,16,-19,5,7,6,20,11,-18,-7,11,-27,-22,-15,-8,-22,-7,-39,7,28,-10,-25,-57,8,12,-4,35,-10,25,-15,2,-5,-19,-11,-24,5,4,-4,-9,-5,17,-26,-5,14,23,-7,24,-14,-6,-50,0,-18,-10,-11,-45,6,-3,-4,19,-7,5,-12,1,-10,2,-16,-16,1,-12,-17,-6,7,17,-1,-8,-3,19,-13,16,-9,-1,-45,5,-29,4,-17,-60,2,-16,-5,-18,-14,11,-24,10,-3,10,-8,-17,6,-10,-4,-1,11,7,8,-9,-22,-3,-16,2,-19,7,-23,11,-24,10,-15,-21,9,-21,-1,-24,-22,25,-31,3,21,1,3,-23,-4,-5,3,-5,19,5,-5,-14,-24,-3,-26,-7,-27,0,-21,12,-5,18,-25,-49,6,-4,-8,-7,-25,20,-29,-4,32,-6,-1,-5,1,7,5,-1,26,11,-20,7,-12,0,-30,-9,-16,-13,-28,13,7,31,-20,-52,-6,-27,0,3,-21,-15,-6,-7,-9,12,20,-12,-21,-4,-7,19,4,-14,5,-15,-19,-9,-4,-25,2,-19,6,-26,-21,1,51,17,-1,-28,-8,2,-25,-9,-18,-21,-4,12,38,-10,-28,4,1,19,9,-20,5,6,-14,-7,1,-30,9,-15,-2,-31,-25,5,55,-11,17,-17,-3,14,-35,-2,-21,-14,2,20,53,-9,-21,16,5,36,22,-5,-4,17,2,-5,2,-23,20,-10,-5,-26,-17,23,56,-7,15,-20,-6,11,-13,-5,-28,-23,5,23,50,-20,-19,14,5,8,4,-2,-6,15,13,-12,-7,-16,22,3,2,-17,-11,25,29,3,7,-13,-14,13,-4,-1,-29,-23,8,-2,37,-33,-17,20,-12,-11,-7,-11,-13,-13,7,-16,-20,-6,22,12,0,-4,-34,5,3,19,20,-6,-8,17,-26,-31,22,-23,-11,21,48,-21,-24,3,-2,39,25,0,0,10,-19,14,8,-10,-12,-4,-13,-22,-19,31,60,0,29,-1,-28,11,-38,-33,7,-54,-2,16,62,-44,-38,19,-1,54,33,-23,0,32,-16,15,2,-20,-15,1,-25,-36,-45,43,75,-49,36,6,-32,27,-44,-32,4,-58,2,20,70,-44,-42,28,5,61,34,-13,-8,50,-6,13,10,-7,-10,4,-24,-33,-44,51,78,-40,24,-6,-32,24,-14,-28,-4,-60,6,12,59,-40,-36,19,1,45,11,-9,-11,33,5,-5,1,4,-2,13,-8,-19,-40,44,65,-26,2,-10,-23,17,2,-16,-7,-42,9,-1,38,-30,-23,16,-10,10,-1,0,-14,-2,4,-10,-11,15,10,17,-7,-5,-40,24,31,-1,43,10,-16,4,-23,-38,30,-37,-11,12,45,-21,-30,14,-8,55,36,6,3,27,-13,27,2,-18,-9,7,-36,-15,-36,51,52,-40,44,15,-37,3,-32,-45,17,-76,2,13,62,-53,-37,29,-1,70,41,-29,-2,45,-11,26,-2,-20,-13,11,-40,-29,-65,69,79,-89,51,14,-40,18,-31,-44,19,-76,5,15,66,-60,-49,29,2,78,35,-32,-8,47,-6,20,9,-2,-11,11,-39,-31,-67,61,85,-58,23,-6,-31,11,-2,-36,19,-70,5,2,51,-51,-39,11,3,49,12,-25,-6,29,1,9,2,12,-5,16,-12,-17,-61,46,69,-48,4,-17,-13,16,5,-21,17,-24,5,-12,26,-22,-29,-2,0,22,4,5,-8,-18,3,7,-2,29,12,17,-11,-3,-36,24,34,-31,34,12,-8,-9,-5,-21,-2,-28,-22,9,20,-16,-22,14,-7,34,21,4,7,22,-18,8,-1,-1,2,10,-23,-11,-20,22,33,-21,31,20,-20,-11,-3,-28,-5,-46,-11,2,37,-30,-24,26,7,47,22,-20,4,47,-12,5,-2,-3,-2,13,-20,-13,-36,30,56,-68,27,20,-16,-5,-6,-25,3,-36,-1,7,42,-32,-34,19,9,44,19,-19,5,35,-6,13,6,5,4,16,-31,-15,-39,29,57,-23,5,6,-3,-6,16,-21,10,-21,5,-9,28,-24,-26,-3,3,21,1,-18,4,4,2,14,2,10,11,18,-5,-8,-35,27,43,-24,-7,1,11,8,19,-15,13,13,4,-14,5,0,-15,-18,0,-1,-7,-6,8,-32,8,14,0,23,16,21,-11,-5,-7,19,15,-11,6,9,18,-23,9,2,-21,4,-20,14,-15,-22,-11,-5,-2,19,15,9,13,22,-30,-7,5,9,-19,9,-2,7,8,-5,31,22,-11,15,13,-24,17,9,-24,1,-9,7,-6,-11,-5,1,15,8,16,-7,12,45,-22,-1,3,7,-6,11,14,5,18,6,29,-9,-5,13,20,-26,9,12,-24,24,-3,10,-2,-6,-16,-7,16,6,12,-6,7,29,-9,3,6,13,5,14,-9,3,28,4,27,33,-5,6,31,-37,27,10,-13,40,1,-13,-6,-3,-7,-20,-2,0,-9,-3,2,-3,0,15,5,14,9,15,12,3,17,0,24,23,-2,6,32,-23,25,8,-6,56,6,-15,-18,0,-4,-25,-7,-7,-10,-1,5,-27,8,22,-3,18,1,17,2,-3,22,-8,8,20,21,-15,-17,22,-4,6,2,-49,4,9,3,22,1,43,31,13,14,5,26,5,11,0,-1,13,-21,35,4,1,-18,-19,1,-31,20,-9,-16,12,-29,17,-2,-37,-6,20,24,7,-17,21,17,42,24,-13,17,12,25,-1,-6,-8,-24,40,-25,-16,3,-2,40,-41,7,-7,13,5,-24,35,-12,10,-30,22,24,8,-9,3,3,56,13,-11,11,6,25,22,-23,-16,-20,32,-43,-22,20,6,44,-20,6,-15,22,13,-4,29,5,29,-36,7,16,12,3,-20,13,46,9,13,-2,42,-15,32,-25,-2,-20,22,-47,0,29,10,13,-31,12,-5,25,38,-10,0,34,38,-18,-28,-1,-4,1,9,-5,13,8,24,-6,9,-48,40,-19,18,-3,3,-37,32,9,-13,-14,9,11,7,-35,-5,-19,-2,26,-56,13,6,8,15,-31,48,13,-7,9,-23,21,-35,18,-17,-9,3,-13,15,-17,0,-48,7,-13,-25,9,9,-27,-23,-29,20,-7,-45,4,21,22,7,-38,13,3,41,9,-47,20,9,33,0,4,-16,-24,17,-8,-36,1,9,36,27,-16,11,1,-19,-16,43,-27,20,-20,35,6,16,-35,-11,2,43,-2,-57,29,18,25,5,-13,-25,-24,8,-12,-52,49,-2,38,72,-17,-1,20,-14,1,39,-14,44,-37,6,-9,30,-2,-36,6,9,-7,-38,14,33,-13,16,-18,-12,-19,1,-28,-25,48,-9,-12,-2,-7,8,11,9,-4,2,26,37,-12,-33,-30,17,4,0,-6,-34,0,-13,-1,-27,-36,22,-20,16,2,-7,-29,15,12,-8,-51,-12,11,14,-35,-18,-10,-6,28,-37,42,15,-1,4,-31,43,13,-22,13,-31,11,-23,20,-2,12,33,11,-4,-3,13,-14,9,-29,7,-16,4,-28,-50,-5,26,-28,-40,36,30,7,-1,-39,-1,25,11,-6,-69,16,56,30,0,26,10,-30,-7,50,-27,24,-10,10,99,-35,4,-9,-55,1,48,-55,-3,6,57,-14,-17,-34,-28,21,2,-19,-96,23,51,25,-6,-1,-10,-38,-15,52,-45,65,-27,7,127,-29,-6,1,-53,12,49,-37,25,-10,30,-34,9,-6,-52,21,-18,-20,-70,10,62,-7,-2,-11,2,-21,-11,23,-5,49,-10,-36,38,2,14,-9,-17,10,14,16,23,7,-8,-46,18,-3,-15,20,-44,-12,-22,-9,-11,-25,8,-15,32,27,-16,-6,42,26,15,-55,-15,16,21,-27,12,-4,-22,36,-13,35,7,4,20,-7,36,-4,-49,-18,-35,8,-31,5,-14,21,36,-11,-7,-3,14,3,-1,-41,-4,-28,-1,-21,-41,6,14,-14,-16,40,17,11,-17,-4,-6,21,-26,-16,-89,16,45,7,-10,26,16,-69,-16,69,-31,8,-28,-18,75,-49,-6,-17,-60,12,31,-40,-5,15,54,-8,-40,1,-25,20,-27,-30,-109,3,31,3,-18,-4,-6,-82,-23,62,-49,31,-40,-16,117,-30,-12,-9,-56,25,40,-21,-1,3,42,-18,-20,19,-52,24,-17,-33,-70,3,56,-23,-19,-10,2,-52,-15,31,-10,17,-11,-29,16,16,12,-25,-4,28,19,28,-8,12,9,-31,4,4,-24,37,-18,-15,-9,-5,14,-30,1,-11,24,7,-11,-9,46,24,23,-27,-29,26,33,5,42,3,-21,36,16,16,-2,8,9,3,36,-9,-43,-15,20,13,-43,0,-10,5,19,36,-9,-19,20,8,9,-34,-20,-9,2,17,-9,12,15,-8,30,30,13,15,-13,8,0,15,-26,-22,-32,17,2,-3,-5,4,5,-12,-15,49,-7,13,-3,-7,17,-19,-8,17,-30,11,28,-20,31,11,39,9,-28,11,-10,13,12,-33,-56,-1,7,-5,-12,-16,-10,-35,-23,39,-16,7,-11,24,36,-4,-11,9,-27,15,28,-10,22,1,42,0,-2,24,-37,18,18,-34,-23,-3,43,-23,-7,-21,-8,-23,-17,22,15,-14,3,13,-31,27,16,-18,16,36,24,19,-12,19,25,-2,6,12,-20,41,11,-15,21,2,14,-23,18,-17,3,5,-5,-10,47,-16,38,10,-41,30,1,-15,-4,13,19,-2,0,28,8,38,-2,0,29,-18,51,49,-17,24,26,60,-11,-4,1,24,10,20,0,3,-32,80,-12,42,15,2,19,9,24,1,23,15,33,46,4,-5,22,-11,70,47,-5,21,45,60,10,-1,-9,14,16,-1,-9,30,25,89,18,45,26,17,29,8,37,8,31,0,17,44,13,-11,23,-13,54,29,-11,7,33,45,2,0,-19,1,6,-11,-15,42,24,35,14,33,20,-4,24,5,21,15,10,-4,-15,32,23,-11,39,-6,12,26,-14,-10,20,38,-5,8,-6,-8,-3,-22,-8,9,11,-26,-8,20,-8,-10,6,7,-8,31,-7,-30,-7,25,15,8,34,-4,4,21,-10,-10,25,9,-7,-2,15,9,-3,-6,0,-35,-4,-36,-61,39,-7,-19,-25,5,-4,-24,-8,10,21,10,2,-6,15,-30,46,40,-8,6,-24,33,-27,-11,-1,31,-7,4,12,-12,7,74,-17,49,-2,6,-5,5,5,-29,11,-11,43,12,5,-11,0,-27,76,31,9,11,21,16,-17,-7,-1,18,0,-15,-6,14,36,99,25,36,2,24,4,16,26,-36,34,-15,19,8,2,-14,2,-23,56,17,11,0,14,-4,-18,-12,-15,-11,-5,-17,-26,38,17,45,17,6,5,12,3,13,21,-32,11,-15,-24,3,5,-13,15,-4,-1,8,4,-18,8,-2,-12,-4,-11,-34,-17,-30,-24,26,3,-19,3,-5,-7,7,-2,9,-15,-7,9,-29,-22,-7,2,1,10,11,-20,13,6,-21,-2,-8,4,-11,0,-21,-23,-20,-11,11,-14,-44,-32,28,-29,-13,-37,13,-25,-18,-10,-11,21,9,-11,6,-9,-15,49,28,0,-14,-32,-2,-18,-8,-1,27,-10,6,-9,0,3,54,-7,35,-26,14,-17,19,-17,-19,1,-33,34,8,-11,1,-28,-8,75,20,16,7,-8,-31,-16,-6,5,6,-2,-9,-20,11,12,74,32,16,-22,16,-21,30,8,-26,15,-23,13,11,-23,-6,-21,-9,54,7,2,7,-9,-59,-15,-9,-14,-30,0,-6,-39,24,-10,47,9,-11,-4,13,-15,21,14,-32,7,-14,-33,11,-11,-7,-6,5,9,8,-10,-5,5,-46,-4,-4,-18,-52,-13,-18,-40,4,-13,-3,-3,-16,3,16,7,18,-16,-8,9,-22,-27,-4,-15,0,-11,20,-6,0,-4,-13,9,-27,9,-5,-6,-41,-23,-26,-24,14,-20,-17,-8,15,-15,-6,3,0,-30,6,-11,-3,13,12,2,9,-15,-3,20,18,0,-17,-19,15,10,10,12,19,-15,25,-9,-3,2,15,-8,24,-17,11,12,11,-24,3,-11,-17,19,9,-3,7,-27,1,41,2,1,9,-16,-16,-2,4,13,3,-1,11,-15,-10,7,43,6,9,-14,10,-5,25,6,-8,-11,-6,0,17,-37,3,-10,-2,38,-6,-5,19,-27,-42,-6,-2,-2,-30,6,7,-25,5,-17,28,-18,-4,7,7,-9,16,18,-14,-9,7,-32,17,-35,-4,8,11,23,-6,-20,9,-9,-21,6,4,0,-53,-5,-8,-20,-12,-23,11,-9,-3,21,18,14,20,-7,4,5,-4,-17,6,-32,-4,0,25,9,-6,-13,4,12,9,18,4,10,-50,-15,-15,-5,11,-27,5,6,12,1,-9,8,-27,-25,15,-26,-2,-4,-3,9,-1,-7,11,-14,-16,6,-21,-28,34,15,7,7,6,-24,22,-2,0,-1,-17,-24,16,-1,2,11,-7,-13,8,-13,-9,1,-1,3,0,1,12,7,-25,13,2,-33,8,2,4,8,-3,-6,11,-7,2,0,8,-25,1,-3,-6,-3,9,17,-7,-21,2,-14,8,-22,3,26,16,14,-30,2,18,-45,-12,-1,8,4,-29,5,-1,-10,9,-22,6,-32,-9,5,-12,-4,13,29,-22,-15,20,-25,6,-20,-14,41,20,16,-24,-9,15,-35,10,4,12,11,-46,-1,-10,-10,-2,-33,8,-6,-10,9,0,7,20,10,-25,-2,9,-7,-5,-19,-12,30,24,-1,-22,-7,11,-7,40,6,11,19,-43,-7,-20,-4,15,-38,7,3,-6,-12,9,-15,-8,3,23,0,-1,-13,6,-18,8,29,7,-12,13,-17,-21,7,11,-13,3,-6,-40,8,-6,-1,1,-15,-8,-5,-9,-2,30,0,21,27,24,18,5,9,16,-3,27,11,27,-5,25,-4,-13,5,10,8,-1,-8,-25,11,32,3,45,36,-7,18,-3,-2,19,-8,20,22,15,10,2,20,14,3,-1,-20,39,11,17,-13,-8,10,2,26,4,-17,-11,5,27,7,30,44,-21,-5,3,0,-2,-9,-38,15,20,1,-27,-6,4,-2,-44,-35,28,13,-4,-7,-14,-20,-17,-3,-1,-19,-1,-16,-16,6,14,25,-15,2,0,0,11,-19,-47,-7,18,12,-26,-16,-20,13,-31,-29,-9,-2,-3,16,-25,-17,-19,-29,-6,-23,22,-34,-10,5,-11,11,-2,2,-5,-6,22,12,7,17,25,13,-15,-17,15,20,26,48,12,-14,2,41,-3,0,29,-10,-2,-18,-11,19,-18,-2,-4,-22,-12,-35,-13,5,54,24,26,42,25,56,-19,-10,17,41,53,41,40,-23,6,46,-1,-33,26,5,-6,-13,2,21,7,6,60,-2,-33,-5,-23,4,45,16,30,39,10,40,-26,-3,8,34,35,18,49,-24,-12,34,2,-23,16,8,-2,-11,-1,16,-6,2,82,-6,-52,-23,-18,4,4,21,-19,26,5,7,-50,-21,-13,-2,-26,-3,39,-17,-25,20,-6,-59,-5,-27,-2,-2,-8,-5,-45,-4,43,-26,-48,-26,-24,1,-3,10,-51,-2,-10,-2,-41,-44,-38,-7,-40,-5,10,-35,-10,15,-19,-61,-6,-48,-7,-6,-1,-26,-36,-5,8,-29,-33,-38,-6,-3,30,-2,10,33,-22,21,-14,-16,2,68,40,45,-5,1,2,15,5,1,27,-23,3,-19,6,31,-23,-21,-27,10,-9,-41,-14,11,56,7,18,46,-11,50,-21,-14,10,77,63,52,25,-21,-3,34,5,-27,17,-11,1,-10,9,33,-15,-13,26,4,-37,-18,-25,10,56,2,33,38,-10,52,-31,-11,6,69,66,40,42,-24,-12,28,-1,-17,-1,-3,11,7,3,29,-27,-7,62,-31,-50,-19,-24,7,25,11,7,23,-3,15,-46,-24,-13,17,16,11,44,-23,-24,25,-2,-38,-21,-25,7,16,-16,11,-48,-8,58,-49,-43,-26,-29,5,3,1,-29,1,-19,3,-31,-54,-35,-12,-28,-1,24,-38,-8,25,-9,-55,-15,-29,0,19,-17,-6,-49,-10,19,-42,-34,-46,-29,-2,5,7,-1,51,-2,7,-18,-13,-17,34,11,17,-22,3,2,-12,4,20,22,-20,1,-28,-39,18,-12,-33,-16,-18,-9,1,-17,9,28,3,-8,55,7,34,-20,-10,-7,46,22,34,-3,-1,8,-9,-2,-8,17,-9,2,-12,-27,16,-23,-21,15,-22,-14,12,-15,10,40,-8,6,34,17,42,-22,-13,-3,47,33,33,16,-10,5,-7,-8,8,5,3,18,19,-4,12,-29,-14,25,-30,-15,4,-17,-2,35,-18,-3,11,10,23,-33,-20,-10,26,17,9,23,-18,2,6,-16,-8,-18,-8,12,31,8,6,-30,-4,37,-43,-18,-8,-8,-10,23,-30,-25,-4,-3,19,-21,-45,-25,9,-16,-10,18,-22,6,16,-21,-22,-20,-8,5,42,29,0,-39,14,2,-33,-17,-29,-28,-8,0,-9,0,58,-18,4,-3,-7,-30,11,2,-14,-13,-4,5,-2,3,15,17,-14,-3,-31,-46,-3,14,-40,2,-37,-15,39,-10,5,17,-5,-13,51,-7,18,6,2,-17,12,-11,3,-3,7,17,-5,3,-2,22,-12,-4,-20,-31,-4,-2,-22,15,-23,-1,47,-1,10,23,-6,-7,33,7,20,5,-1,-6,18,-6,12,8,-1,28,-11,-4,23,19,4,14,0,-7,-8,-12,-11,-9,-2,5,29,-3,-6,22,-29,-15,13,2,11,-10,-4,-7,23,-1,-2,10,0,24,-11,-19,18,1,-4,11,10,13,-11,-7,4,-4,-2,6,7,9,-18,20,-36,-23,-1,-3,25,-2,-20,-18,21,-7,-18,4,-4,20,5,-22,12,-6,-8,9,20,36,-6,-26,19,-6,13,-8,-8,-27,-12,4,-36,0,-7,-31,2,5,-19,-14,6,-13,-1,-11,-15,6,-5,-8,-2,30,-15,-7,-15,14,2,2,-33,-7,8,-6,16,-24,-4,-2,-33,12,-21,-24,-5,6,-4,-17,-5,-3,24,-15,-13,-5,-7,-12,-22,23,-24,8,-4,13,10,1,-23,-20,10,-10,20,-16,-7,-11,-35,8,-21,-17,-15,-7,-14,-15,3,4,33,-25,-21,-12,-14,-7,-15,6,-35,23,7,5,16,-19,-20,-39,-2,-16,-1,-15,-14,-20,-41,-7,-20,-11,-23,-7,-22,-10,0,4,28,-26,-16,-12,-17,-8,-33,5,-35,13,6,-3,7,-16,-19,-42,-4,-11,0,-15,-19,-20,-42,-12,-17,-7,-21,3,-12,-5,1,1,21,-13,-18,-3,-27,-19,-21,21,-34,-11,-4,-19,-15,1,-17,-9,-10,-3,-14,-27,2,5,-5,-8,-12,-18,9,6,-15,-9,-19,-23,-5,6,-16,19,-6,-17,-4,14,12,-4,7,-7,-6,9,-16,8,13,0,11,-13,13,2,1,10,-19,-12,-4,5,4,-8,8,-2,16,-5,-3,22,2,-14,-2,6,1,14,12,13,4,14,-2,-16,33,4,16,-1,13,-1,1,6,-24,-9,-5,2,-1,0,40,14,23,-16,3,23,6,-3,-7,-3,-9,25,10,31,11,-9,9,-24,34,2,1,0,5,2,-3,-1,-16,-4,-5,3,-8,8,44,27,20,-15,6,15,11,-5,-25,0,-20,13,-1,30,0,-9,7,-24,31,2,10,2,-7,3,-2,-6,-17,2,-8,2,-3,15,27,22,14,-5,10,1,8,-23,-14,19,-22,-8,-17,6,-23,1,4,-2,9,9,1,-17,13,1,19,-9,-7,-7,-5,15,5,-13,-33,-28,-9,21,-3,25,15,-8,-12,2,41,-8,9,-2,-9,10,-5,15,51,14,14,-5,29,-6,17,2,-11,-6,-6,11,21,-13,8,-4,3,13,9,36,11,-2,9,-7,30,18,14,16,2,18,9,1,64,18,14,3,31,4,0,-4,-12,-17,-9,10,18,0,45,9,7,-2,16,29,16,5,2,-13,15,36,16,38,10,-3,11,-5,73,21,16,3,24,-1,-7,-8,-4,-22,-1,13,11,9,70,26,4,-12,16,20,19,-8,-9,-1,-6,31,1,42,-6,5,10,-1,62,10,39,-6,4,6,-11,-13,-7,-21,10,3,6,16,71,39,1,-9,4,4,22,-30,17,26,-12,11,-15,27,-30,9,7,3,30,6,33,8,-8,-10,2,-2,-12,-5,-10,8,10,-14,-26,-20,-13,22,6,7,19,-6,-41,-23,40,-26,6,17,-3,0,13,1,44,10,12,9,9,-16,-1,10,-21,-7,-17,-1,19,-18,-19,-17,-10,20,12,12,6,2,-11,-33,23,2,12,9,3,11,15,4,41,18,-3,10,16,-14,-7,-7,-15,-20,-15,-10,18,-13,5,-21,-16,8,13,10,-9,8,-9,-37,5,23,12,6,8,-7,9,-9,41,18,7,4,13,-22,-3,-12,-2,-33,-18,-2,4,-11,28,0,-21,-9,3,5,-11,-5,-9,-25,-11,24,-6,-2,-10,8,1,-6,36,3,24,-10,-1,-11,0,-21,-3,-37,-5,-3,-1,-5,57,14,-21,-18,-12,5,4,-25,27,6,-9,13,-24,-2,-32,9,-2,-9,27,-2,30,24,-21,-12,18,22,-9,6,-5,-17,6,-21,-3,3,-19,13,14,-8,20,2,-32,-29,8,-32,8,25,7,5,5,3,13,0,16,14,-12,-10,14,23,-22,7,-15,-20,7,-25,-24,-9,-22,21,6,5,8,13,-11,-43,7,-11,18,2,7,15,6,12,-5,3,-7,2,-8,-9,-1,9,-16,-5,-13,-27,14,-20,-34,-27,-36,13,3,4,-8,20,-16,-54,-8,6,22,-12,10,0,-8,6,-6,5,3,-4,-6,-22,-10,-3,-6,-18,-25,-20,2,-17,-19,-14,-46,-4,3,5,-20,11,-1,-46,-15,15,5,-23,-8,16,-15,-7,-6,3,12,-12,-8,-20,-8,-25,-9,-24,-24,-14,-2,-20,7,-2,-45,-19,-8,12,-8,-9,21,-17,-7,15,-9,-16,-26,13,-14,-19,13,5,21,15,-3,7,15,1,39,12,32,1,9,-14,16,6,17,-7,19,6,-16,13,12,-3,7,-7,17,15,-11,17,-3,1,15,20,58,-1,-6,0,8,-8,-3,14,17,-11,5,-29,-3,-11,4,-15,17,-3,-14,8,-18,10,6,-3,21,17,-15,-12,-19,2,3,6,22,16,4,19,19,3,-20,29,29,-10,-2,-11,10,8,-7,-15,42,10,11,19,20,19,25,8,23,26,-12,3,-2,11,4,18,25,24,13,29,21,24,-17,40,19,-3,-16,10,2,8,-12,-11,27,0,19,21,36,20,27,17,15,20,-11,14,2,14,18,12,34,13,24,27,37,16,-7,42,7,10,-12,11,3,5,-10,2,11,10,13,13,31,15,28,-3,-11,8,-24,45,-2,54,27,5,57,14,11,-3,23,-2,26,23,27,-2,13,-22,1,-6,15,-3,19,9,11,6,3,7,4,3,27,8,8,-8,-2,10,28,16,7,15,19,-21,25,-31,-22,38,-8,-23,-19,-35,3,-28,9,-22,3,-3,4,0,-29,23,1,2,21,8,0,-53,-3,-22,14,-12,-69,22,24,-15,27,-31,-44,51,-13,-14,-24,-24,25,-17,2,-20,6,4,16,6,-33,31,23,5,16,16,3,-37,15,-25,18,-17,-66,14,20,2,15,-10,-42,44,-5,-6,-27,-16,16,0,-3,-19,-6,4,25,5,-38,31,28,3,14,6,2,-14,8,-26,25,-17,-47,-9,22,15,10,-3,-29,20,-12,-1,-16,-16,14,14,-7,-6,-9,-1,30,-6,-13,16,26,-4,-2,-15,-13,18,-10,8,26,-5,-2,17,24,1,33,-2,12,16,2,-11,6,-4,-4,-9,8,2,33,1,22,16,18,2,2,15,28,46,29,-29,6,-2,11,17,-43,2,33,-33,29,-29,-41,24,-39,-31,-42,-21,-15,-48,16,-29,-31,-16,12,2,-35,16,-12,5,18,31,15,-88,-1,-75,-8,-44,-128,14,36,-46,26,-39,-64,33,-64,-16,-57,-18,-7,-49,18,-27,-52,-5,20,5,-80,28,1,-3,11,34,11,-75,12,-77,6,-70,-128,10,29,-38,18,-29,-70,35,-58,-8,-39,-6,-10,-37,15,-32,-46,-5,27,5,-92,27,9,0,10,30,10,-53,17,-67,10,-60,-118,10,21,-16,8,-15,-52,18,-31,-7,-25,1,8,-10,4,-20,-18,4,33,-3,-42,8,11,9,3,17,-4,-2,11,-36,9,-29,-51,4,5,20,12,17,28,31,11,-17,6,29,9,3,-11,13,25,1,15,24,23,2,-4,24,24,21,36,-19,-8,28,1,31,2,-11,16,-11,2,-3,-19,32,-19,-27,-40,7,6,-21,6,-26,-38,-14,-3,3,-25,18,-24,12,19,12,16,-63,-3,-63,-13,-33,-82,-4,17,-25,10,-11,-38,31,-34,-13,-45,3,10,-28,18,-29,-49,-7,-8,3,-61,35,-19,0,17,17,9,-57,8,-65,-7,-52,-88,0,14,-23,18,-12,-48,25,-36,-8,-22,-1,0,-33,18,-35,-41,-1,-4,9,-56,35,-11,2,14,10,7,-40,5,-68,-1,-42,-71,-5,8,-7,19,-8,-38,4,-14,-13,-18,-1,15,-13,8,-28,-22,14,2,3,-5,12,-3,14,5,0,-4,-4,-13,-56,1,-22,-30,-10,-16,35,-25,37,37,17,26,-2,30,36,20,27,-27,45,29,-3,31,29,24,-26,17,20,4,24,34,14,0,55,19,43,68,-12,-6,36,-20,26,5,16,29,-14,-9,7,25,22,-16,6,-5,-10,37,14,5,-10,-5,4,-1,23,14,-18,9,-3,-1,9,20,1,1,29,-1,24,-12,17,22,0,-17,-4,23,16,-2,-2,-13,2,36,15,-11,5,-2,-9,-11,32,9,-18,17,-8,7,-14,6,-1,5,21,14,18,-24,23,15,5,-1,-6,14,5,4,-11,-17,2,33,17,-10,3,3,-10,-17,27,7,-12,10,3,10,-18,17,-10,1,14,17,14,-26,15,13,3,-3,-10,13,9,-1,-15,-19,12,17,6,24,-19,2,-2,-22,10,-8,8,-2,13,11,-21,26}
+
+#define CONV2_BIAS {0,1,1,0,0,0,0,-1,1,0,0,0,-1,-1,0,0}
+
+#define CONV3_WT {-19,-4,-29,-10,15,27,53,5,-14,1,7,-15,-2,-31,13,-24,-20,-18,-13,-7,7,7,24,-7,-1,-4,-30,11,-21,-5,29,-37,-36,-1,-21,11,30,-23,5,-4,-17,-4,-43,17,-24,-16,16,-24,-15,13,-7,23,-10,-25,2,3,-29,2,-46,52,-11,-15,4,-25,-13,16,-27,20,-25,-38,1,7,-27,14,-19,74,-18,-38,-25,-21,42,25,-2,-16,-7,10,48,14,-11,-4,-19,28,-8,-16,-9,-4,13,12,15,7,-17,-25,12,-15,-1,-4,-9,29,-12,12,-2,8,-13,-2,5,-1,-18,-42,-10,-12,0,7,0,21,1,-17,30,22,-16,8,22,-11,-38,-35,-33,6,24,4,-1,5,-17,-1,34,37,-19,38,2,-21,-37,-27,-31,27,34,11,13,37,-3,-25,3,49,33,35,-2,-17,6,28,42,-9,-1,14,5,30,-14,-36,-7,-27,3,17,12,-7,-10,-3,-5,-31,-17,-5,45,-5,-2,-7,-9,-33,-31,-26,12,-13,-6,-6,-33,-30,-26,1,58,-13,20,-42,2,-39,-8,-40,-3,-17,0,44,-41,-15,9,-8,32,-22,-6,2,9,-23,19,11,-21,-36,13,68,-34,-13,38,2,-13,-14,7,14,-21,-1,3,0,1,-11,-6,-17,-20,14,5,-15,29,-21,3,-28,-3,-4,11,-10,26,12,-5,6,-28,-1,-5,-1,11,-51,-1,12,1,-30,-16,-33,15,31,0,-2,-27,9,-29,15,-2,-53,2,-5,-19,-15,12,-47,-10,24,14,54,-35,25,-7,26,-10,-57,-5,18,-26,7,40,-38,-8,-33,29,59,-40,-11,-15,15,-21,-50,-20,-11,-33,20,29,7,-13,6,19,-4,-25,13,-2,-45,-16,33,11,5,-3,22,6,-1,0,23,7,3,8,24,-24,-17,-22,13,5,51,-8,1,-10,-12,-8,15,15,-50,6,10,-4,-5,1,23,3,16,-17,16,-15,-10,-21,4,9,-34,-31,-6,31,-6,8,18,24,35,-19,16,-18,-14,-16,-26,26,-24,-26,-2,-26,2,15,60,54,20,-2,23,-35,30,50,8,19,25,13,11,-2,7,11,-22,2,21,-6,2,-60,-21,-1,-28,-7,-20,-20,-15,-7,40,60,7,43,-2,-6,-15,-43,-30,10,-30,-34,-39,-30,-12,-34,16,11,-11,38,-37,-17,4,-22,-5,16,-1,-30,-37,-27,-15,-22,-26,-33,-26,-33,-25,0,-7,-2,2,2,-2,-24,-18,8,-13,-7,-6,-36,9,-28,-29,11,-7,-53,14,32,-17,28,-7,44,3,-36,11,-41,5,20,-15,14,-26,-18,-23,-1,-38,4,17,-1,34,-37,14,-30,-9,20,27,-13,-2,-19,8,24,-8,13,34,10,17,-17,-27,6,-36,-16,-15,-4,59,-44,21,-1,8,-14,23,0,-11,-14,-6,10,-20,-29,-1,-4,33,56,28,5,-13,-32,28,9,12,-12,1,-83,36,-32,18,7,1,30,1,42,16,50,-22,-51,31,-44,33,-52,38,0,-20,-2,-37,112,-27,-1,-17,11,-22,-64,18,6,10,-93,15,-49,26,17,1,69,-9,7,13,26,-9,-7,19,45,-38,11,-71,-76,-11,19,41,-34,28,-13,-15,38,-29,-21,33,41,29,113,14,8,-41,-22,-9,64,37,40,-45,31,-32,-14,42,-5,-14,18,45,-4,-25,-18,-38,-35,13,-8,-7,-26,23,-12,-8,-16,-10,30,-1,25,-13,33,-2,15,-6,-34,-36,-38,14,-20,-59,-15,-14,-17,35,0,-16,52,-2,4,-33,-13,16,-24,-27,43,-15,7,-22,-11,-19,20,-33,64,8,-3,-17,-20,-11,27,-53,-2,48,-3,6,-13,13,63,-53,13,-54,43,-8,34,0,43,-32,-2,43,2,-31,-13,-37,4,36,-29,-7,-16,9,16,-8,13,5,18,34,15,-16,39,28,31,-5,-3,-3,34,50,10,6,-8,17,23,-25,-10,21,-21,3,-11,-16,-24,-12,-54,25,-2,43,4,20,37,-37,-46,37,-51,-36,19,-55,-35,-9,-9,12,-33,-5,1,-9,-1,-31,-2,-5,-47,12,10,-60,2,-49,34,-15,15,2,-11,-14,13,-26,39,-20,-12,-23,-62,19,37,22,21,-26,21,-13,-5,-9,-6,-3,-26,-6,27,-50,38,15,15,-10,11,-17,10,5,11,-13,2,12,-20,-11,-1,-60,27,16,0,-7,1,-1,-14,21,29,-3,-9,-8,-6,-25,-9,-44,10,-8,-3,-23,8,-9,-9,23,29,19,1,-3,-16,-43,-5,-34,15,-29,6,-4,4,-3,26,25,7,16,-7,0,-4,-11,-29,-24,10,17,27,8,28,4,23,10,-7,-18,-1,25,-4,5,-14,-32,14,-26,-20,27,2,4,-13,11,4,-24,22,26,-45,-14,-9,-41,26,10,-23,32,-4,-5,-12,1,4,-39,27,18,-29,-21,10,-40,7,7,-24,23,47,-6,-5,-6,-13,-2,29,22,-26,-25,2,-24,-2,-1,-6,10,36,-1,22,-9,-21,16,2,16,-44,-6,-26,-10,-12,-8,19,-1,20,18,4,-10,7,-2,5,2,11,0,15,-17,-20,-10,-48,13,-2,10,-25,-7,5,-14,42,-2,-17,3,38,-34,-14,39,-45,4,-18,4,-24,-4,-10,-25,44,-9,5,-3,19,-38,-36,25,-38,5,24,31,-40,-3,3,-9,27,-20,13,-11,-7,-9,-33,25,-32,6,18,20,-7,-24,14,-7,-14,-17,-6,-13,13,-10,-3,-4,1,-9,2,19,19,2,25,-5,-12,12,-23,-11,21,9,-22,-18,-18,-3,-46,14,-9,13,12,-6,8,-5,-3,11,21,-2,-56,33,-2,-26,-57,14,4,-1,-5,-10,16,-13,15,-1,-10,-1,-47,5,37,-27,-29,36,-1,-2,-3,-12,14,-5,4,-2,-25,32,-1,7,15,-8,-12,28,25,-16,-22,-28,-3,15,33,-7,31,-16,17,-2,11,-6,39,49,35,24,8,17,-16,-19,-33,-28,-3,2,-16,-30,-7,-20,20,32,-4,17,4,27,-45,-4,-9,11,-2,5,-7,-1,4,-28,18,-13,15,-7,-2,-2,-35,7,-11,14,-23,10,23,-8,12,-7,29,-7,29,-1,-18,-26,-29,8,-33,6,-34,19,41,-5,-4,4,26,22,40,22,-13,-46,-7,24,-10,-34,28,-23,42,-9,5,-10,-5,-22,-7,32,19,45,8,31,-6,10,-25,34,-18,-30,13,5,-16,-58,24,2,0,14,-12,-22,30,4,31,24,8,-15,-15,-15,-30,-32,4,5,-2,-33,-15,-28,32,-28,19,20,15,-13,-12,-16,-25,-14,-35,12,14,-9,-21,-35,26,-47,-25,33,31,-2,5,-18,-49,-8,5,16,2,-28,-3,4,53,-27,-47,38,27,-24,2,15,68,-13,-1,22,14,54,-2,0,-5,11,-4,58,-23,-13,-18,33,71,-9,45,15,-11,67,-21,-6,4,-15,9,21,-25,2,-7,-3,4,9,25,2,-22,-24,17,-18,-39,-30,19,3,-8,-39,-2,-20,-27,10,12,-11,-2,-46,35,-14,-34,0,44,-36,34,-72,-7,8,-47,41,-14,-19,11,-29,20,8,-4,39,34,-7,58,-38,-28,34,48,-1,-17,17,-15,33,-12,-49,-6,-11,1,-34,-88,-21,-15,13,27,23,6,3,-5,77,-13,-53,-27,1,-33,-37,-85,-9,15,2,32,1,-23,-55,-39,17,4,-13,-56,10,-43,-41,-38,-55,10,-11,12,-21,16,-52,-12,-56,32,15,-34,-4,24,-78,-6,-88,8,2,-20,1,-20,-4,-2,-28,-17,-1,38,21,76,-61,20,-17,3,17,-13,18,13,23,1,1,20,0,-11,-28,7,-29,-36,-4,-9,12,-19,15,9,4,47,16,27,-39,-4,7,-28,-24,9,18,-22,-2,57,26,-39,-64,18,25,-24,2,17,25,-47,-20,11,-22,1,-26,30,-5,-6,-38,22,-22,11,59,-15,1,-52,-13,6,-40,14,-4,3,2,-19,33,-27,-21,4,24,30,-14,-18,-11,18,37,39,4,-42,21,17,40,20,-33,25,19,-21,-28,0,9,-4,19,9,30,-30,-9,-5,7,46,-21,-17,4,-10,-35,-15,23,15,39,-13,6,7,38,-2,-39,-17,-17,-55,-4,-3,30,24,30,27,42,-11,-69,-13,29,25,0,9,-28,-9,35,-27,21,14,21,1,11,-4,-13,-46,14,8,8,45,0,8,9,31,-24,-43,-5,0,6,26,3,49,-8,25,11,-20,4,3,-1,9,-26,-24,-41,17,20,2,6,21,10,-32,23,19,-12,31,6,48,-26,-13,29,8,36,-11,-47,-2,15,-27,28,18,-42,0,13,47,-14,14,-4,13,22,-22,-36,8,18,8,23,43,-15,-40,6,3,23,53,-39,-12,-8,-5,34,21,-7,6,30,45,-2,-31,-2,-29,64,42,-45,-37,-7,2,38,-4,-16,42,13,-37,22,-5,-45,11,-35,-19,-36,-15,3,-22,40,3,-6,5,2,-12,20,19,-13,44,-41,-3,-1,15,-47,11,-10,5,-5,4,6,2,43,25,25,40,-25,-29,-24,23,-53,19,-40,1,19,13,13,27,35,-2,13,-5,-44,-18,-34,10,-23,7,-44,5,1,-14,18,14,-26,28,15,-24,-50,15,-22,3,-6,2,-4,-5,-8,6,18,8,-3,-34,-19,-5,-44,3,-24,-46,-40,-6,4,-29,-29,5,-22,50,-3,-21,2,-5,-32,19,-8,5,-61,-3,-12,-26,-15,12,-41,26,-7,2,-9,1,-19,-28,-10,2,-59,-10,-10,14,24,7,-40,-4,-4,-15,-13,-3,-19,-36,-4,9,-55,16,-18,33,-4,-17,7,-28,-58,3,12,8,-43,-30,-4,-20,-7,20,-5,20,9,14,34,3,11,-6,20,8,-29,15,25,4,-33,18,9,9,-19,0,14,13,28,9,50,-17,2,9,-4,16,-43,13,-1,-8,-7,-1,17,2,23,-1,-2,-14,5,-31,-9,-20,-28,-18,-2,-8,20,-9,-10,2,18,-9,-24,0,-22,-24,0,-11,-24,9,15,1,-6,-2,-10,-5,34,2,2,20,-13,-31,30,-8,6,21,-5,-5,4,22,9,1,-34,1,1,-5,14,-18,-2,-46,1,21,-2,-12,-14,13,-1,26,-24,11,0,-27,5,-9,-22,-22,-19,26,9,-10,-16,6,3,19,-26,9,-5,-39,-11,-14,-15,10,-7,-8,14,-17,4,-3,0,-1,-11,12,11,-24,-15,-9,2,24,-4,-8,24,-17,2,0,-11,-12,20,-6,22,-8,37,-12,35,17,-25,13,13,-7,66,5,-10,4,44,3,-1,15,18,-58,44,7,-11,-7,2,10,86,17,11,30,-29,10,8,17,25,-10,41,-9,-26,-1,-41,-20,10,3,38,58,-15,21,36,41,-31,3,-37,-1,-34,-2,19,-30,35,1,29,20,28,-9,-19,107,-34,-63,-9,14,2,-18,-23,-18,40,35,21,-15,-32,-25,-10,-22,15,-64,16,10,18,-2,-23,-64,31,14,-2,20,2,-7,-22,17,-33,-23,-9,-1,-10,-16,-16,-31,-14,32,-6,2,-11,2,-6,-22,-6,9,66,28,4,-30,-62,13,-52,33,-6,21,47,17,30,-28,-12,9,-1,33,-10,-2,-5,-5,-5,23,-14,15,31,-16,-14,16,-25,-22,-19,19,-16,8,-49,13,-4,15,6,-6,-6,-20,4,-16,7,-29,22,27,-8,30,-30,-26,9,-8,4,-10,-24,-28,0,18,-46,0,-6,-39,-25,4,6,3,-44,6,-11,-12,-14,-18,-15,-13,-36,-13,19,-17,-21,-17,-31,0,-21,-10,-27,-10,22,8,3,-19,-32,1,-25,-18,-25,-10,11,-37,12,-10,-29,-25,19,-11,0,-5,-34,11,-36,-9,-15,-7,-15,-22,8,-19,20,-14,1,-10,29,18,7,-10,-2,16,0,11,-23,0,0,2,42,29,7,-10,-4,-21,-6,17,-24,-8,5,30,17,-10,-20,15,17,20,15,25,-35,-24,-31,7,-34,-10,-8,15,6,3,18,-5,-8,17,13,29,-26,-1,-31,9,-36,-28,-2,1,28,-2,44,-5,-15,-11,7,10,-6,14,-31,11,-52,-32,3,-19,19,-19,25,12,5,2,-6,9,9,24,-27,-9,-45,-8,2,23,-5,7,-8,8,3,6,5,-10,7,-30,13,-7,-8,27,16,31,-28,-24,-10,8,19,6,4,11,-5,-11,-5,18,-19,10,13,18,-3,-10,11,-15,2,-9,3,-4,-13,2,-24,16,-13,-2,-3,3,7,12,28,-23,-7,-31,1,-9,-10,2,-31,-3,-15,4,10,-6,5,14,8,-3,-4,-20,-16,-1,-17,-6,-13,-23,-21,1,-10,12,-1,0,29,-68,-15,-10,35,31,20,30,-23,16,-13,42,35,-11,-13,29,-14,-47,2,-10,14,30,4,32,1,-10,-22,-10,-11,-20,44,-13,-4,0,-15,-47,-40,-10,-10,-7,29,-38,30,-22,-4,-20,1,-5,-13,17,-22,-52,-32,-37,-19,-14,11,3,8,29,-19,-1,-2,0,8,-13,-16,-37,13,8,28,21,-3,22,-19,20,12,-6,36,-31,-9,-5,-27,1,15,17,-9,32,-42,18,13,23,-28,14,-12,18,-15,-3,17,11,10,24,-23,26,-25,-35,-13,12,-18,-14,14,9,31,14,9,-29,-43,-12,-32,-29,0,-36,29,-12,5,-40,-24,-44,20,48,4,-49,-29,-12,-42,-1,31,37,26,22,-10,0,-21,-8,26,5,-2,-19,13,34,-2,31,-36,22,18,17,8,16,0,-24,-5,-11,-26,-6,-28,-25,23,-7,-26,33,65,-17,-2,15,0,35,-33,-1,-5,9,-7,-16,-9,20,-5,-50,46,-4,33,12,0,43,14,19,8,-17,-48,-32,-39,-24,-3,-12,33,-19,19,-11,-16,-17,12,20,0,-27,-32,-39,-55,-27,47,40,59,17,2,-20,9,-24,16,-24,-9,-2,-15,-26,-17,9,-14,-3,49,5,3,2,-6,-1,10,-6,3,-6,28,-7,23,4,37,0,46,-36,60,8,-27,34,7,5,2,-3,64,-7,-6,17,28,-36,35,-47,45,14,-28,36,13,20,3,-12,13,-11,-20,14,-20,28,-10,-37,-12,8,-43,22,7,32,-7,-21,-11,11,-25,7,0,54,-4,-21,-38,3,-13,-33,28,27,-32,2,-12,8,-10,38,36,27,-10,-52,-41,33,-26,6,0,3,5,-15,29,20,21,31,-31,-23,-26,-50,36,-27,-17,-51,23,-44,-29,1,-7,23,3,33,-20,30,-62,1,9,-1,15,-4,5,-45,-33,6,-4,-25,-10,18,-63,49,-94,39,-53,-14,31,63,-6,-12,23,1,17,-3,3,0,-48,-7,-70,8,21,-33,42,15,9,29,13,16,19,12,-6,2,5,-24,-52,-34,19,1,-20,-12,6,53,-11,23,24,14,46,-45,1,-10,-32,18,-4,6,-3,-36,13,11,-10,30,-17,34,-45,46,-32,29,-33,-32,-62,-10,63,-57,-2,7,27,-4,-9,32,-14,-7,26,-19,-56,-24,-17,-4,20,-30,-6,-21,34,-62,12,45,-8,-36,13,16,-16,-40,-14,38,-47,9,-7,-24,1,-66,11,12,-14,-12,27,-5,-5,3,6,-2,-46,15,-11,3,12,38,-30,0,12,-50,8,14,-6,58,-16,-16,-68,49,6,-20,12,33,-1,12,-21,42,4,-6,42,5,-2,-16,5,65,5,2,3,2,8,5,44,30,41,-37,-24,-11,33,-21,42,-19,-17,-35,33,20,49,30,73,-33,-16,27,-13,-29,-38,21,44,-24,-6,-39,41,17,43,-29,35,-35,-19,-15,-5,-32,-4,-11,13,-9,-10,-43,30,45,-28,-24,-16,-26,21,-8,4,31,-56,-54,-61,28,-13,-17,4,28,-28,-20,-31,6,-37,-35,36,-43,-1,0,-51,60,6,34,-31,-15,-42,-12,18,3,18,-42,0,-39,33,-15,19,13,7,8,-6,6,1,30,35,10,-21,12,-32,-35,-25,-12,21,-28,-8,-4,-17,42,-17,-50,-28,-15,-22,-10,2,-51,8,-14,-9,-19,-15,-44,12,-6,29,-19,-22,44,26,-25,5,57,-16,-32,-18,-16,-4,-8,14,7,-5,-1,6,24,-31,-28,-6,-7,24,-28,-13,4,-2,35,-16,6,-24,5,40,-26,-9,-29,5,-5,-13,-25,28,13,13,25,-28,12,18,34,30,-10,-13,-7,-13,-1,-7,-10,5,-9,-6,20,-38,8,14,-22,-23,-34,-6,-19,21,5,21,3,7,-30,0,-1,-25,-20,20,-13,-10,21,29,23,15,60,11,12,-30,-18,1,-2,17,27,-2,10,10,25,-18,-7,-26,20,39,-2,1,-25,-12,18,22,42,-53,-9,32,10,-4,-15,-26,-10,-1,0,25,-24,18,25,0,16,-16,-11,7,2,8,-11,12,-42,-9,-23,-5,-22,-2,14,-6,-3,-24,-20,-38,-30,-26,-30,18,-35,-5,2,28,22,-18,-16,20,-15,29,6,7,29,34,3,2,14,7,-35,-6,32,26,19,15,7,-45,-21,40,38,23,25,-20,-9,-1,-5,28,-38,37,10,-22,-38,-6,-33,-22,-38,1,1,64,-12,-12,-23,-25,-43,-29,-11,-10,-18,29,-9,-40,-26,-48,-41,28,53,-37,7,-44,-9,20,22,41,-1,-14,-23,31,35,-31,8,-18,8,57,-11,12,20,-22,-11,-7,4,32,30,15,18,21,-7,-6,20,-46,-2,-4,20,26,16,-1,31,-24,26,16,28,6,28,-23,0,-8,8,2,70,35,7,-1,6,43,13,-45,12,20,-26,-11,-33,-15,-8,-20,29,12,-15,-21,4,78,23,-14,-22,33,-47,-26,63,-27,-7,-4,2,28,3,-5,-19,8,12,38,2,23,11,-6,55,24,-1,49,27,-8,18,-45,-17,-32,-11,16,-23,-7,19,13,-7,-31,2,9,-4,2,31,-50,-20,-66,-6,-15,-20,-13,29,-5,-3,6,-3,12,26,-6,18,-1,-20,-87,-18,-40,9,-13,1,-35,-45,25,8,23,3,4,-8,7,-25,-90,-24,29,-22,9,6,-56,10,-5,11,30,-22,31,3,-25,-28,-84,-35,31,-25,17,43,-17,15,27,12,9,5,-14,-25,-4,-12,17,-40,-7,-12,-1,10,15,-16,28,8,41,-2,-13,-1,-31,-1,34,-19,-22,11,9,9,25,-13,19,-5,5,-49,1,-13,-13,10,2,0,-20,31,-5,-5,29,-35,21,-3,6,-61,2,-38,-3,6,-25,-14,-23,-13,-45,-25,31,-46,-5,-12,17,-3,9,-22,-13,-3,-3,-12,-14,-10,-52,-5,31,-21,20,13,3,15,-15,9,20,-34,-7,-36,17,-26,15,32,-8,-28,3,1,10,20,-6,20,-2,-27,31,-23,10,6,13,23,-14,-30,-19,-9,9,-3,12,-4,-16,-27,42,-14,21,11,8,4,6,-14,-10,1,-19,-14,-1,-12,-5,-28,26,-24,8,-25,3,-9,-2,-12,-14,0,-18,-10,-8,16,27,-26,8,-11,11,-25,9,23,14,24,13,12,8,24,1,-7,-12,-12,-64,18,-25,-28,-1,-15,30,-13,20,10,-22,-1,0,51,9,-1,-25,19,-6,-16,8,33,21,30,33,3,-5,-7,4,12,-15,10,23,-46,-15,14,-14,18,-36,-5,-32,-23,9,-2,-17,4,9,49,58,-13,-18,10,9,-12,-56,-38,5,-32,8,-3,4,-50,-5,38,21,25,-30,-5,27,17,-24,-35,26,-24,-22,34,11,6,22,-31,-23,14,-35,-19,13,-34,-1,-32,30,36,28,21,-3,42,33,-2,20,7,-13,3,20,-23,34,-5,8,33,-32,6,16,-30,-14,8,13,-51,12,36,-8,9,9,7,-26,6,-58,-25,11,-13,10,6,-10,17,7,-6,-10,-6,-9,7,7,-28,13,-14,12,-20,11,-30,-4,46,-28,-15,26,-4,-19,-9,0,9,18,2,-1,-2,26,-22,19,-7,-28,-11,9,-37,-30,-53,29,30,29,-27,-14,14,-10,17,-18,9,-14,38,19,3,-3,-8,-19,-14,-52,-23,-5,-30,-44,23,-7,-32,32,39,1,6,7,28,-48,-24,-64,-11,22,29,-23,1,5,-3,20,-16,-2,-19,-23,0,-12,-15,36,-40,29,42,-9,-48,-24,9,-54,-16,22,16,-34,-39,0,37,21,-13,-5,-22,18,-12,-13,9,-53,43,-32,13,3,-26,36,11,10,-21,-12,-17,-35,-26,-31,24,8,35,5,26,18,32,-41,-8,7,22,0,-21,-26,-29,16,-23,33,-11,-16,-32,21,40,-34,2,-24,57,26,13,17,-28,44,-4,12,-6,-15,-14,-22,-10,35,0,13,6,17,10,-3,-16,1,3,-70,3,0,40,-16,-20,19,5,23,-6,-13,20,28,26,-15,3,-21,10,-1,16,-13,-16,28,-23,18,-13,7,0,-7,5,3,-8,9,-7,33,14,23,15,-21,-6,21,9,-16,-7,-20,30,4,-33,-6,-18,12,-14,13,23,-19,15,-17,18,2,0,19,-7,2,-17,15,18,-1,3,2,6,19,-16,-1,8,-1,9,-13,-5,-9,-2,-17,2,-12,18,-5,-8,8,-30,31,-2,-32,-9,-37,-57,29,-3,5,19,-10,-6,-61,-39,23,19,11,-42,-9,11,-26,-20,23,-32,62,-35,1,-12,-38,-17,14,23,0,-51,23,8,-13,23,15,-26,13,-25,21,-36,10,-16,28,-10,-86,-16,60,4,-6,55,26,32,-6,-50,-14,19,11,27,26,12,-75,17,21,-14,1,13,14,2,-10,-20,-33,33,-15,13,-35,28,-48,-34,-26,6,41,-34,-12,-19,16,-5,7,0,43,35,19,11,-26,-22,6,16,32,9,-5,-28,-2,-5,-2,-8,33,17,5,1,-47,-32,15,26,-11,20,4,-3,-22,2,-50,-34,11,28,-5,-42,-45,-18,30,0,-19,15,8,35,-42,10,-1,-9,-25,45,2,-27,3,-4,-2,-1,-20,-4,-7,-5,-43,13,-11,-20,13,-13,-35,15,54,18,-34,-25,-15,4,25,22,22,3,17,-41,28,-1,-56,9,-7,19,-5,-40,-7,42,52,-8,8,-36,19,-33,-1,-4,-57,7,-4,-38,-12,-42,-18,24,3,-12,4,-42,6,-15,-31,24,-55,-36,31,-26,2,-50,1,4,-33,-12,-15,-7,27,8,-14,-2,-39,-37,33,-5,2,-6,4,-32,-28,-16,2,-18,-24,7,38,-32,-6,-10,55,6,-7,-24,21,-3,-4,4,-40,-26,39,-23,-19,35,22,10,39,5,5,-20,4,-1,-28,8,-13,-18,28,12,-21,27,-1,7,74,-12,3,-2,-13,6,-42,-12,-4,-23,29,16,-13,-5,-14,-18,55,22,12,2,-1,23,-1,-11,-24,-13,16,13,40,-3,-10,-26,-18,42,-1,16,-6,-5,13,-4,-5,-9,-24,8,23,-7,2,12,-41,-42,-25,42,23,7,10,10,-54,-9,10,18,-20,19,12,2,6,-19,-13,18,2,-3,8,19,-41,23,-11,39,8,5,10,5,-20,7,5,-6,-16,7,11,9,-27,19,-27,24,8,-21,6,10,-9,22,25,-7,-18,13,18,-9,-11,-1,22,6,12,6,-13,3,-2,32,3,-10,-6,-10,11,-4,-10,15,-3,4,-20,-10,12,-5,-10,-5,4,-19,8,0,-35,24,30,27,1,1,-17,-3,-36,-26,-5,-43,0,28,20,1,-11,9,-4,-31,-9,-19,-26,-30,5,-24,3,-13,-72,-20,31,16,45,-20,14,21,-9,8,-54,17,11,3,53,-16,-41,-26,14,31,53,-10,55,9,-28,-1,-57,30,-2,42,2,-4,-23,3,17,41,18,13,-22,19,-13,5,-17,37,2,8,-25,-19,-3,-38,29,-26,0,8,37,-16,-7,1,-49,12,12,-16,40,-36,9,-2,-9,-32,12,0,-12,-53,40,9,-19,9,28,-29,-8,-47,-42,11,-6,-28,2,-11,-12,-29,51,61,-16,11,-1,-16,17,-17,-4,19,-22,-7,4,-24,-18,-6,5,23,1,-17,-35,7,-46,8,17,4,-20,19,28,14,-21,-7,11,-47,19,25,-4,-8,-78,-13,-45,-44,4,10,6,9,2,-43,-13,2,-34,-7,-5,5,7,-25,-11,-8,-24,-19,-11,-5,-30,-56,25,9,-4,6,27,-1,4,-34,-7,24,-4,-29,-60,-18,-25,-48,28,45,-8,6,-24,-15,-12,35,23,-12,-3,25,-51,1,-42,18,-7,6,26,12,-32,-4,-26,33,24,-10,0,13,15,5,22,-5,53,-35,16,53,-15,7,55,8,-18,-38,48,25,30,14,3,-47,-11,14,-10,14,0,5,22,3,10,12,-2,6,-22,8,-7,-15,6,27,-12,-5,34,-21,-5,-21,11,15,-10,26,-73,-2,-11,-6,-13,16,-1,-18,-16,-27,-29,9,-2,-26,1,44,-4,12,-29,-17,0,-43,40,17,7,-14,-19,-13,-17,8,16,-34,57,27,-2,-7,34,-44,-30,-4,-7,7,57,-24,-19,-18,46,27,-4,5,-10,-39,11,20,36,31,10,2,62,-15,30,13,11,-5,-46,-6,9,16,12,20,34,1,28,-17,30,-36,48,-5,-18,14,-60,-37,2,14,0,-7,44,-24,-18,-22,-3,-6,12,-11,-25,31,20,-23,-7,-3,19,-24,35,1,34,15,-28,-17,-12,22,-44,-13,52,-3,-27,17,-20,2,-74,-24,8,50,14,6,-25,48,34,6,2,-17,-6,25,-35,-11,28,-6,-3,7,-7,19,9,13,25,-20,0,-12,-52,45,-41,-7,17,-2,-22,-17,-44,1,6,-13,5,3,31,10,-20,1,-7,20,46,-14,-14,0,-42,1,-15,-21,4,23,7,-5,-31,-25,19,22,-2,-27,24,-20,-15,-16,-26,8,-4,50,5,-29,-10,-11,3,27,-23,-55,14,10,-8,0,-16,21,12,25,-3,11,56,32,-15,-10,7,-14,-22,24,29,-11,-6,-28,-1,5,-16,-14,-49,25,-16,0,-15,-13,-20,23,20,-4,-16,-63,6,23,0,-7,-23,-40,11,2,-16,1,-20,45,43,-16,-18,-32,17,7,-21,-3,-19,-30,-4,16,-45,2,-4,8,14,9,-17,1,17,32,-11,-4,34,9,-8,36,-34,-12,-14,24,-9,32,-22,41,1,26,-10,-21,23,-5,-7,-66,-3,-13,-10,-9,-10,-27,-28,-1,-21,21,-43,-8,-43,-22,-27,-40,-18,-25,10,11,9,-18,-26,6,2,20,-48,-20,-20,-29,-29,-36,-39,9,-1,9,40,-27,-22,7,2,-10,-18,-11,-18,22,-39,-12,-23,-14,-23,-18,-18,-22,-28,-27,-5,7,2,-20,0,13,1,20,-16,-18,-71,5,-34,25,18,49,-2,-15,15,15,69,20,1,-70,7,28,12,-15,-26,-1,-4,0,2,-29,17,34,24,-24,-28,-42,-23,11,40,40,-42,18,-15,40,4,-9,-4,-8,-5,26,-36,-21,-20,17,8,44,-26,9,-14,17,10,-31,15,2,7,39,-25,1,20,-24,-13,12,-30,-12,-5,-35,11,-36,29,17,23,-6,28,1,23,22,-22,-5,9,9,-14,-30,15,-1,47,-1,29,14,0,39,-21,-13,-15,-8,51,23,-28,-36,5,-18,49,0,3,-41,-6,12,-6,-17,-12,-5,-14,58,-8,37,-4,14,22,-38,-18,9,43,0,29,25,-18,0,10,-4,18,19,-26,29,0,-6,6,0,16,27,31,12,-31,-14,35,-15,20,-17,4,-13,2,9,40,-15,12,13,-7,24,-2,-39,51,-27,7,9,-33,-32,-34,-9,32,5,17,-37,-3,-14,-5,-17,2,-38,4,8,-17,-47,13,35,73,5,18,2,-17,7,-25,19,15,-70,8,-34,-48,-13,12,41,26,4,-2,26,-35,14,14,19,-10,-33,-6,14,-46,18,-6,20,-5,33,16,10,-26,-17,36,24,-19,-3,-16,68,-28,-28,-17,-35,13,30,33,-42,-12,-67,2,51,10,-12,3,29,-14,-36,-28,-13,12,-18,43,-39,-7,-9,7,-17,-17,10,17,5,-7,-36,-41,-9,28,-21,16,-39,-4,15,7,-1,-18,-29,11,-21,-26,0,-39,-3,-10,-28,-7,45,-5,34,15,-23,-19,2,-32,-11,-19,21,-6,17,-16,8,20,36,-5,31,27,30,2,13,-43,23,-2,52,-41,-4,-34,61,25,-10,-20,-21,10,72,7,-13,3,21,1,-35,16,25,17,-30,12,-14,-19,-26,-8,-19,-16,14,-20,-4,-26,-21,-10,1,-2,1,-9,-45,26,-15,1,27,-23,-16,22,-26,-38,-19,-20,-31,-28,21,-10,12,26,-4,29,-20,-29,-13,-8,-34,-20,10,12,-24,-11,-22,-16,3,9,32,-12,-10,14,-15,-60,-15,22,84,23,15,-22,-15,-9,-35,25,62,-15,13,-1,-5,-10,-16,27,-16,42,13,16,-27,8,7,-3,1,-23,-19,-12,4,-42,-7,1,-15,8,17,6,18,16,1,26,-1,-37,16,11,22,23,-10,-11,-33,-9,8,-16,25,21,-20,26,-30,11,0,-9,18,26,-6,1,-10,6,-9,-21,-12,18,-18,-11,-7,-33,0,13,8,-4,-9,17,61,25,6,-17,-26,20,-15,-26,48,-37,22,-3,-22,3,1,38,-32,10,1,1,-5,-7,22,-2,22,-5,-25,-10,-19,-18,24,6,-6,5,29,-1,27,-6,52,-24,29,-28,4,8,28,12,15,-16,-17,-12,23,-4,5,6,-9,8,-23,12,6,-3,7,25,-14,1,-19,-15,-8,-29,-10,14,-41,37,-36,1,19,-12,-21,25,-14,15,2,-43,7,-12,3,-4,1,-41,12,5,7,-6,-4,23,-8,-7,17,-55,-2,30,19,13,-21,-9,-3,-44,47,5,28,22,-14,11,-8,-36,-4,39,5,2,-11,3,-5,6,-19,-1,56,-36,-1,46,-6,14,-8,0,-48,-35,34,19,20,-33,-7,-36,-21,-17,-38,50,-41,13,20,11,-27,-66,6,-12,-19,19,21,-28,-37,-22,11,-12,20,58,23,29,-48,-35,-6,17,13,-2,13,-54,20,20,-7,14,-1,10,9,-29,-12,14,-39,-42,14,-47,26,-18,61,7,-25,4,39,-4,-22,18,21,9,-24,-13,10,-2,-3,9,82,-57,-17,-2,33,-4,-56,31,-6,-24,7,6,0,22,-7,0,17,-10,-26,11,25,-46,-29,34,26,-49,0,-20,-71,43,10,69,4,-7,3,1,56,20,-8,21,-17,0,21,2,-55,22,5,26,-10,44,0,12,-32,-2,-24,-11,-9,32,-23,-30,27,-13,-20,-37,-33,19,19,-27,9,-22,-43,3,8,7,-21,-19,17,-23,-30,-18,40,-47,22,-69,-5,11,-55,-16,-21,-29,-15,18,38,21,4,-69,-1,-13,40,-37,-37,-49,-38,1,6,-54,-31,4,-4,42,25,14,36,-12,25,-4,-46,-13,-26,-21,-8,-24,-1,4,-33,14,21,32,5,38,0,21,6,10,-14,1,-27,12,-18,2,9,12,-12,-8,-67,29,20,15,26,-29,-27,6,0,-19,7,-21,-10,12,6,38,12,-8,0,-43,15,19,-30,-21,2,-20,8,-12,23,21,16,-40,-36,-11,29,-31,-3,-14,0,-27,5,-6,-12,1,12,19,29,-13,33,-16,-5,15,-19,25,14,-50,3,-10,-11,14,-27,25,41,58,-1,25,-7,6,-6,14,-25,19,9,29,-16,-12,-13,-28,-22,16,-33,13,7,5,-10,-14,-27,21,-7,15,16,1,-2,2,-14,41,22,3,-14,-5,21,40,-36,24,-1,29,11,-2,0,6,12,32,-41,7,-17,-34,7,-3,-24,-6,-10,10,-11,1,-29,12,23,4,9,-11,-39,6,-15,-17,-21,-11,-18,-31,0,9,-40,27,38,13,26,-20,58,23,22,33,-32,6,-60,1,12,-8,-20,15,-20,-3,1,25,-2,20,-7,-8,-33,-24,-6,33,25,-12,-12,26,2,-26,-12,7,-24,-5,-29,-21,23,-13,-39,-43,-33,-33,2,-21,39,-19,-28,11,-24,-8,2,-3,89,2,-30,-17,7,-3,21,-41,52,-37,6,48,5,-19,-32,8,2,10,-26,-14,23,15,9,-7,-19,-40,-29,-20,25,32,18,3,-16,17,-22,4,46,31,18,-12,8,-17,-12,43,7,11,27,0,-25,-15,16,24,25,52,17,9,-10,-17,1,9,-17,5,-12,11,18,-34,-14,-22,-35,-12,-17,-27,-17,-7,-28,-19,-49,8,-13,8,54,-25,-18,5,-14,-16,-2,-40,33,-25,24,-9,8,1,-31,6,-29,-5,-25,-10,-26,8,-3,2,23,-23,-10,-9,15,6,3,-20,-19,14,24,8,4,48,13,-28,-8,1,62,31,9,-18,17,19,-48,-6,45,-8,-25,40,-26,-2,-32,10,15,24,-6,-4,-13,15,-20,-8,-8,-18,-32,-31,-57,-7,-31,32,-9,10,-35,8,-3,3,25,-6,-22,23,6,-17,6,-29,16,23,30,8,26,-34,-1,-19,-41,-8,-4,23,-17,11,37,-24,34,-4,-23,-21,19,-10,2,-8,-5,-20,6,-40,-4,-12,-16,-18,-4,1,54,15,-4,-22,-17,20,-15,-30,-11,-28,-34,-34,-23,-16,-2,-1,11,-3,-10,-6,-28,1,0,-16,-46,18,-29,-54,-20,-26,-14,9,10,11,-23,4,6,9,36,13,-39,32,6,-36,12,-14,-10,-11,19,15,16,-29,-18,1,-12,5,-33,30,7,-16,31,2,8,-16,16,-10,11,17,12,-2,19,4,20,-9,42,-5,-19,57,19,5,12,16,-5,21,19,14,4,-15,-7,31,15,-20,15,9,14,22,-14,-10,-11,10,5,-14,-15,-7,-13,25,-40,-40,29,-22,-16,28,-22,2,-8,9,42,19,6,34,-5,-11,-23,-31,30,-8,-10,-12,0,-6,-5,34,25,34,-16,7,32,-7,15,12,-5,5,33,8,-30,27,36,47,34,-9,44,13,-19,-67,-16,-30,-17,3,-13,-14,-36,19,18,42,-11,33,17,33,-21,-2,-9,-27,70,50,4,3,4,-8,44,-13,6,1,-36,-3,-13,-6,-15,-13,18,-4,0,13,48,5,-1,-8,-3,-18,1,-11,-15,-56,-10,-57,-18,-10,12,25,12,25,21,23,-14,-1,-12,-5,11,-14,12,-9,-19,2,9,7,14,42,-5,-23,18,12,19,0,-3,-13,-25,-26,-26,46,1,41,-13,11,-33,30,-30,30,19,-3,-7,1,-24,-33,17,68,11,7,-4,3,-29,-26,-20,10,-34,-47,4,-11,-43,7,-40,24,-7,-51,20,-3,-37,-43,-21,24,-10,-34,-19,-55,-47,-4,-35,-15,-14,-30,2,-6,19,-5,14,19,-5,-11,-14,-21,-45,8,-33,42,-1,-17,11,28,9,-41,-2,0,0,-18,14,25,-27,-12,-16,11,13,54,26,12,-30,5,1,16,19,-26,0,17,-30,-17,-55,13,3,24,22,-2,-38,-34,-10,9,15,-60,-15,-13,-16,37,-67,2,-28,-63,3,-18,-17,-47,-43,12,22,-58,-48,-16,-28,15,-5,-20,-39,-56,12,-24,21,-30,13,-1,19,-29,-21,-8,-54,13,-15,31,-2,-32,6,-3,14,10,15,13,-20,-7,-36,3,-12,-1,30,-23,7,20,24,15,-16,32,21,33,-12,22,-31,24,0,-11,-52,-4,-1,15,-3,29,-30,1,1,7,-13,20,-50,-13,30,14,-36,-25,-6,-36,-36,24,-3,-25,-7,-27,-3,-30,-67,22,3,-7,34,-18,-21,-21,7,7,21,-20,17,-27,24,-46,-26,23,-32,40,33,36,-12,-24,-5,-30,-3,11,-23,-7,-10,-42,-6,-59,10,8,66,-20,-1,-14,-1,3,-17,21,-19,12,-12,21,21,-15,18,-20,14,-10,11,9,-51,12,-20,11,8,-6,-30,64,27,-16,28,-59,19,-26,7,6,-52,40,20,14,24,5,-15,26,-5,-18,8,-17,53,-4,12,8,10,32,40,7,43,18,43,-11,-19,9,15,65,79,25,12,-18,-6,5,27,1,-18,-17,13,-4,-14,31,-32,42,-5,-9,-12,-13,-1,-12,7,18,29,33,23,9,7,33,-17,16,34,-18,22,-11,-7,-56,-1,27,27,-1,33,-2,27,20,0,-47,11,-61,48,11,44,-27,9,35,6,-18,50,-21,75,-5,-63,-52,-36,12,13,1,-16,33,31,40,29,15,2,9,-8,36,4,19,-7,9,-24,0,-11,-11,8,-6,-23,-12,13,-7,-10,17,-24,-6,-31,-23,-1,-11,-13,25,-4,-17,29,40,8,17,13,-8,-14,5,15,11,16,-24,-45,18,-19,-33,6,1,-31,16,-20,2,30,50,52,-25,17,-37,47,-19,-21,-5,-19,-44,-28,-3,36,-27,-22,-18,-9,-5,-12,-26,29,-15,-6,39,25,-49,-48,29,7,-25,-24,-15,14,-26,-45,5,-24,-25,2,-25,-17,-11,11,-13,-9,-6,-4,-51,-48,-29,4,-4,-11,13,-7,-19,-8,-11,13,18,37,-25,-31,-25,-4,7,1,-1,-48,47,-53,-33,-17,-26,-29,-16,-28,1,-4,45,45,-6,-20,-56,3,33,-78,1,4,-9,-11,-38,-8,-5,14,30,9,-11,-32,-42,1,-9,-55,51,28,-16,-10,9,54,-3,-31,-10,-9,-36,-43,-12,-12,-22,8,-15,-1,-1,13,-6,-3,-10,13,-47,-28,-21,1,8,18,5,12,17,-3,-20,10,29,32,-18,-12,-20,-27,1,10,23,16,12,0,0,-1,-12,3,-21,-15,14,-23,23,5,-12,-4,-36,20,6,-38,-8,-1,8,22,-13,-33,4,11,41,8,-10,-34,-4,-16,-21,-22,11,-7,16,24,53,23,0,-27,21,-6,-8,-18,5,-17,-11,4,-21,8,-8,8,-15,10,6,25,-26,-19,-15,11,5,-9,10,5,22,-14,-38,-16,23,18,-18,18,24,-31,-24,15,48,-7,-9,19,33,6,0,-28,-30,7,13,18,-16,8,-54,-11,2,25,-7,-6,9,12,35,27,-22,10,-1,23,-12,35,-34,-20,5,-21,-6,23,-18,-8,16,47,23,14,-3,-19,-9,1,13,6,-6,1,-29,-9,3,35,39,2,43,-16,-44,-15,-2,22,-2,-5,2,20,-28,-16,17,-17,42,-40,1,19,0,-11,-3,27,-11,-6,35,-16,-31,44,4,-47,22,-41,-32,-4,-3,-13,19,1,-7,-9,-41,-14,1,0,16,-22,-4,-30,17,4,-32,9,34,-10,5,8,-41,-37,-11,18,31,-3,-9,-40,24,-3,23,-2,15,-23,-4,39,33,16,-20,-28,14,30,22,-1,21,3,13,-3,-2,38,32,-2,-16,0,-6,-20,12,-13,-9,6,-39,39,-7,-1,25,6,-6,-12,25,11,1,16,-19,-39,-20,21,-3,-1,4,-3,35,-12,-16,-27,-30,17,29,-37,-27,-18,-6,37,23,-4,-5,9,9,-31,-10,-27,-10,-6,1,-14,3,18,-10,32,-18,-6,16,-18,-1,-13,-14,-35,38,-18,-5,41,58,4,-4,-33,-7,3,31,16,-31,15,26,-3,3,-31,9,52,30,-15,-41,-34,-50,50,1,16,18,-11,-21,-14,-5,-9,2,36,-22,-31,-41,-18,-19,3,6,-4,24,-24,-40,-8,-58,2,7,5,-14,-20,-12,5,-9,-17,-1,-2,3,-44,-44,-13,-37,-20,-12,14,55,-16,5,-3,-24,-44,6,-24,2,-24,-39,-20,-13,-7,-17,11,24,36,-1,-26,-18,25,-34,-3,-16,-5,-4,25,-41,-40,0,-3,-15,24,-30,-1,-6,52,-7,-8,-4,5,-14,18,-35,-19,-8,-21,-39,7,0,7,42,38,-1,-49,-7,-3,-17,41,-43,-18,-1,-10,-5,16,18,25,59,3,-7,-55,10,-21,0,37,-48,-5,10,-11,-15,36,24,1,27,-31,-37,-31,13,16,-18,43,-38,14,-8,18,-33,7,-11,-45,-13,24,-40,-3,16,-22,21,-2,-34,-12,9,-14,-6,-16,15,-30,51,-21,1,-7,-21,-8,12,26,49,-8,-10,-18,18,3,65,-32,38,-49,-9,-4,-45,24,29,29,56,-27,-8,-10,17,0,38,-36,22,-68,-2,1,-32,-14,-16,5,37,-3,20,3,1,23,12,-58,5,-49,34,66,8,40,-11,0,13,-12,-3,-38,10,-10,31,56,39,-25,-15,10,6,-4,0,15,-19,1,-7,0,6,-4,-2,20,-16,26,7,23,-8,4,-3,36,-20,11,-15,36,9,2,-7,-50,-50,4,-13,-8,-24,-6,-5,31,-18,-18,5,35,-7,16,10,-19,-2,12,35,26,-9,23,10,5,1,15,-6,-5,22,-7,-14,-19,20,47,6,9,4,-30,1,58,15,3,-11,-21,13,-7,-5,8,22,-4,-20,36,15,-12,9,-23,21,-16,-13,3,4,20,-31,1,-6,1,12,-4,-7,1,42,-28,-31,-15,-10,4,25,-12,-50,-32,-42,-1,-22,-21,16,23,30,3,-56,-32,5,-10,21,-32,-11,-11,33,14,-19,-11,15,0,-1,-3,-9,-3,-13,-51,17,-2,-5,-10,52,38,-29,-12,-27,-46,12,51,16,12,-6,-26,18,-15,-34,-9,-17,14,-20,68,-21,-27,21,-10,53,-20,-21,6,-2,27,-5,-8,3,23,8,23,-39,-3,37,-9,9,-23,-35,1,-19,22,7,-65,-19,-30,5,-21,23,63,10,45,-59,-34,-7,1,-22,6,-13,-15,0,-28,-28,-57,61,-4,-5,0,-24,5,-35,-22,4,33,42,18,38,0,-17,-43,-33,-28,22,-31,20,-33,-33,4,-46,15,-3,-7,12,-7,1,19,-35,18,30,-5,20,-70,5,13,-19,6,-10,-3,19,16,11,-12,-47,15,32,-7,29,-31,1,13,-38,4,-7,-41,31,-19,21,-37,-52,23,3,15,-63,-28,19,49,-45,-3,-48,-3,59,-50,-1,-27,8,-50,-67,-19,-42,15,-1,37,41,0,11,2,62,-9,1,-15,-33,-39,-5,-27,15,-31,-12,29,-9,-39,10,24,15,-40,16,-14,2,-18,-26,12,-11,-16,17,-4,24,16,24,18,-25,-47,21,-35,18,-7,-19,16,-12,30,-4,-36,22,51,25,7,-2,-53,11,-42,-47,-7,-10,32,-43,-11,7,-16,16,51,-13,7,23,-44,25,-14,-29,-11,-48,34,-30,-24,10,-15,40,51,68,-8,23,-1,16,-29,22,60,-4,65,-17,3,41,17,61,28,-27,9,10,-77,1,-40,4,-10,13,-5,-25,-26,10,6,0,-5,12,15,4,-30,20,-11,38,-19,-2,15,-13,-37,38,-3,-28,-15,-17,-14,28,-34,7,3,-8,5,5,17,-2,8,39,-3,-39,33,-40,22,11,-5,-21,23,-68,7,-10,9,39,17,-18,49,-40,69,-11,-44,-38,-11,27,16,-1,-1,-5,-4,3,8,-15,-41,18,-46,-47,-38,16,-29,19,2,32,-8,-9,-5,-24,52,-25,-13,-26,-35,0,18,-13,32,-11,10,19,-1,15,23,21,40,-22,-28,-27,-27,-14,12,6,21,9,-28,-31,34,11,13,-11,29,6,-25,-11,9,-14,5,31,13,-5,-17,-37,28,8,-21,19,13,2,25,-25,62,15,-31,-20,7,12,32,-55,15,-21,-11,6,6,-24,-4,-23,-27,3,1,18,-12,-18,0,-1,42,38,-14,-8,-16,-29,19,-10,-30,23,42,-35,18,-1,21,-14,33,45,5,12,-16,-21,-14,-9,-53,9,16,-45,-17,27,-33,-27,37,-11,-10,-27,-17,14,-29,-2,-23,17,5,-22,-9,-7,-25,-11,-6,0,3,-49,-39,14,6,-21,-20,14,17,12,-28,-35,21,-35,34,-28,-8,-2,-32,1,30,31,-12,-5,35,4,3,-35,-7,-17,11,9,9,28,-46,-37,5,37,-6,-5,20,-20,14,32,2,13,-22,0,21,16,-50,-28,-25,20,5,0,-4,-35,-2,-8,-4,7,-5,-7,27,-7,-10,-13,-26,-6,29,38,-15,-19,-7,-17,20,28,-18,9,43,-20,15,-8,-9,-26,-4,27,-15,24,-32,-15,6,12,-19,-18,8,12,-11,0,20,15,-15,18,34,22,-25,-25,-18,0,28,6,-5,-26,-12,-10,12,22,-16,-3,12,10,3,40,-28,30,-1,4,-7,-10,-20,1,-3,7,-22,-23,-12,-2,14,9,-39,16,-31,-20,-12,-12,-12,-7,28,-18,-12,16,-12,13,-1,14,3,40,-20,-12,6,-3,13,9,25,3,-4,44,10,33,-9,-9,-15,29,-10,2,2,-9,34,19,10,-27,-16,22,37,4,6,-38,-4,2,11,-5,-15,-2,16,17,7,-8,9,7,-27,-10,6,-5,6,-51,-11,-40,4,-2,22,10,6,28,40,-19,-37,-30,20,-18,2,-29,-1,-23,-8,-20,-33,5,25,48,25,-12,22,14,3,6,13,-62,-17,-41,0,-26,-29,27,14,15,29,49,34,-22,-7,0,-27,-13,21,-47,14,-20,-7,-21,25,3,9,-11,-18,-15,-24,-13,16,5,42,-46,-28,-35,-32,2,11,-1,27,-26,-48,-10,-21,-23,17,-43,34,-34,0,-40,-17,-11,6,3,11,-13,-60,-3,-20,-25,30,-29,32,0,14,-18,-45,-2,1,1,-27,9,-22,6,-25,11,15,-57,-12,-1,21,-27,12,37,-8,-12,10,64,2,-29,-41,-4,-9,-11,38,-3,17,-57,14,0,25,3,-15,12,-8,-28,-34,-17,-1,12,39,-26,-20,-34,-35,13,18,-16,-31,-14,17,-16,-31,-50,4,-34,28,20,12,-47,-44,-33,25,-33,-29,2,19,0,-3,-48,16,-42,10,18,11,-19,-33,-10,19,-16,-8,31,-33,0,-10,7,10,-55,-29,6,14,-11,12,50,1,32,17,34,-14,-9,-18,-4,18,10,24,15,-3,-41,67,39,22,-7,12,13,-17,-4,-35,-29,3,44,29,-24,8,-6,16,40,-6,-30,-7,24,-12,9,-39,-43,-1,20,-6,35,-15,-17,-43,-19,-20,-25,-6,8,37,1,-4,-37,-18,9,-59,5,-36,-24,-23,-22,-17,-9,-5,-18,1,-1,-3,-14,-12,-16,-52,-29,-13,-10,17,28,-20,30,12,-26,-11,10,-21,-15,1,30,32,-13,-8,-8,53,31,35,-17,0,1,45,37,2,-23,-11,29,40,-16,31,0,53,1,-31,-19,10,19,2,6,6,3,-11,3,-19,0,16,-4,24,-16,-82,-15,4,21,-13,-11,-1,-9,-37,25,-27,-19,8,-30,26,-24,-49,1,13,-39,-7,21,-16,-20,-14,-16,16,-42,17,12,45,13,2,38,35,-28,45,21,-12,-22,12,11,58,23,-14,23,-36,-21,-29,-18,49,7,-6,33,8,-14,-16,17,1,-39,-4,-5,-37,-19,-24,17,-14,-25,-13,2,8,12,-13,-11,-30,1,28,-6,-5,24,-20,20,-19,-27,-28,2,-20,7,7,-24,-14,11,28,-11,23,44,38,-24,16,-15,-14,-5,-9,-15,12,-17,-3,16,24,-32,10,34,30,-45,27,38,25,-2,-37,-11,15,-2,25,5,-1,-26,-17,22,30,-8,10,-10,8,10,-11,12,-18,-23,-2,7,-3,-22,-40,15,22,1,-31,-9,5,2,-9,9,-30,-11,14,11,25,-31,-1,33,20,-4,-4,1,-13,8,-43,-17,-22,4,43,-11,0,-46,16,-11,38,-20,21,-15,-9,19,-16,-33,-29,-20,11,4,-12,-56,17,-4,14,-17,18,7,-19,0,-29,3,-29,-54,0,10,-8,-28,3,-16,-9,-12,47,56,-2,-21,-9,-12,-17,-14,15,3,13,-32,-4,-5,-13,-4,10,32,0,-26,-16,-33,-22,-9,40,-5,6,-39,16,18,-17,42,22,45,-2,-1,-27,-44,-19,15,45,-38,-30,-48,3,-8,-10,38,31,4,27,-9,4,-35,-28,5,10,-10,-2,-36,-5,2,-10,16,24,14,-8,-10,-11,18,7,-14,8,-25,-7,8,-12,-36,1,-47,7,-13,7,-21,6,12,-4,-33,-2,1,-30,28,19,-30,12,-17,-14,-47,4,-26,4,17,-9,-32,12,34,-13,8,28,-8,10,31,10,-28,-8,-4,-22,1,-3,-7,-9,-12,-10,24,23,-30,9,22,28,-28,29,-17,3,9,-13,-1,-18,-12,12,16,16,6,-4,8,-8,-22,-7,-12,6,9,16,-17,-28,-23,24,6,-5,4,3,-23,5,6,3,19,-5,-2,23,-5,6,5,-25,19,1,12,18,2,5,-17,15,-6,5,2,5,12,20,33,-27,-2,-6,11,17,19,37,-2,-7,-17,-8,-14,-5,18,5,2,-22,19,3,-19,-1,9,23,4,2,-14,0,40,-13,3,14,-2,-6,18,6,6,-21,-7,-38,-28,-29,7,-14,30,-8,-10,26,4,6,-9,-28,-4,13,6,-23,9,6,23,-6,-50,6,-15,-4,3,-7,6,-8,4,5,29,6,14,-33,8,20,-2,-5,15,26,17,16,-10,-1,29,9,-10,16,4,6,-30,17,-14,-47,-2,36,-8,5,14,-13,-8,-9,-5,-18,-23,40,-24,4,17,-37,3,19,-45,-10,-11,-13,-30,7,16,-20,-33,-2,8,-22,-2,-25,52,7,-37,-8,-45,6,0,-37,-45,-12,-15,-4,5,16,-15,34,-17,-24,13,32,-5,9,16,-9,-35,36,-22,-27,4,-5,-3,-4,-15,-23,17,-3,-10,-3,35,30,-16,29,17,-8,-34,-10,-11,-16,-66,-18,14,-29,4,-15,41,-8,21,-40,28,40,-13,-13,13,-12,-14,8,0,-26,-13,12,3,-8,33,-45,29,6,14,-28,-9,6,25,-8,-11,-20,-18,-7,-7,-27,-35,2,-5,-29,-1,6,20,50,15,16,25,-2,10,28,-1,-7,-46,20,-13,-44,-11,-1,27,-6,4,-23,-10,-24,19,17,-2,-4,-28,0,-1,-35,-19,-11,46,-10,-65,-63,-11,-34,16,-20,15,-44,14,-25,24,-7,21,-20,49,-3,-46,-7,27,-24,-11,-37,-9,-15,40,-45,30,-22,45,0,29,6,15,32,6,-9,20,-13,16,27,-30,-33,-18,7,-11,19,-27,32,8,14,38,-12,-1,26,-1,38,-30,11,-12,-6,-42,12,-18,4,5,21,2,-12,18,30,-13,11,-17,10,-18,8,-22,4,23,-17,-9,-9,-10,-13,36,17,-5,-32,8,2,-15,15,25,18,10,5,-7,-3,-8,-9,19,-30,-31,5,28,-12,-11,-16,36,26,4,28,9,-10,-16,3,51,4,20,2,-27,-27,2,45,10,11,-53,12,-10,-13,12,-7,-8,-6,-20,17,-22,30,19,23,3,-16,-16,-5,-12,28,-23,14,-21,-19,0,14,-2,23,15,14,-10,-18,12,-52,-19,2,11,-4,-1,10,23,-24,18,4,27,6,13,-5,-4,-32,11,-17,1,-17,-17,-29,3,-14,39,7,8,5,39,-2,-3,-1,-1,-27,-19,2,-9,-23,20,55,31,-10,20,22,-3,3,29,44,2,0,-6,0,-12,-69,2,-14,12,-11,-5,11,-3,-2,-5,89,-22,-80,-23,37,27,-24,4,-49,17,8,7,-5,-33,91,13,8,-32,-59,10,-5,2,14,44,1,-6,-6,-13,7,-2,48,-35,-52,-20,-20,56,-9,-5,26,18,5,8,-21,-30,13,40,-25,-15,0,31,-2,92,-47,6,14,2,15,5,-12,-1,-54,-32,-11,10,-4,0,-25,-39,-27,-24,-27,14,-79,-35,-2,57,-69,-31,-64,-6,11,43,4,-23,-6,30,-49,-1,-73,-18,70,39,-28,-45,-8,-16,-52,11,27,9,-28,11,-13,22,13,-7,34,-45,34,-27,1,-44,-51,-11,-26,-27,-26,-64,0,-37,23,9,5,-51,31,11,-16,18,33,-20,-14,-10,-12,-10,17,13,-8,-3,1,-26,-75,-25,-29,6,-28,3,-65,-30,10,-40,44,46,-38,-45,21,91,-106,-51,-39,-2,-63,21,26,-6,0,-3,-3,-5,-40,-16,80,60,-75,-2,-19,47,-89,-18,81,-52,1,15,-5,4,-35,4,-7,-76,-3,11,16,14,-61,-10,13,-53,6,-41,15,-50,-17,4,3,-61,3,2,26,-6,3,8,11,-15,-4,20,6,5,-5,4,-1,0,-58,23,-61,40,11,1,-28,-24,9,-55,41,20,-5,-10,-4,30,-49,0,-17,-1,-37,-13,-7,3,7,-3,-15,8,-34,8,10,-9,-41,37,-17,9,-22,-83,26,-35,22,11,-19,-4,-27,-3,-3,-53,-17,25,-19,8,-2,-20,41,7,47,-28,16,-31,24,26,14,-36,7,-16,18,0,7,5,24,52,1,2,67,-21,36,19,-8,53,-22,27,-15,48,11,-5,8,-31,12,-46,5,-22,20,-16,13,49,-13,-10,16,-13,-47,1,-35,-34,-10,-17,-55,21,-3,15,4,-8,-22,18,-7,11,-41,-21,2,-3,-34,-24,1,32,34,9,6,-31,-20,31,-8,8,21,1,42,25,-1,-34,19,10,42,7,9,-15,24,42,6,-10,65,-23,17,2,48,-27,-19,-16,-4,-4,-22,-15,0,-38,-38,12,-20,23,-8,-31,-30,-36,-14,13,-22,7,-1,2,17,-22,-26,-5,6,-6,1,-22,7,-22,-16,3,-18,-14,8,-13,29,-25,-12,1,-10,-14,-1,11,11,-23,-2,-13,-5,-1,-1,-27,13,-36,11,-14,-25,-22,-27,-5,12,-19,13,5,11,30,10,-7,1,-44,15,-1,-23,32,-4,23,-1,-2,-11,4,-13,23,-18,51,-2,5,23,51,-37,23,2,50,1,-21,-18,20,4,49,-15,28,-4,2,-10,30,-11,-4,10,6,21,18,-9,-14,22,23,14,14,-8,-36,4,44,-14,-13,4,4,17,18,-11,-18,3,0,24,5,-3,-30,-2,43,-23,-10,4,10,19,-4,-13,5,8,0,21,14,8,-4,-18,46,12,-20,10,9,-20,9,16,-26,-18,-21,-8,25,1,17,-10,12,4,-46,19,27,16,6,-30,-25,35,-34,-32,3,-2,-6,7,2,7,-24,-14,-23,-10,-33,-28,-65,25,-4,-19,-15,9,-21,45,32,6,-15,-4,-17,-3,-29,12,-51,-20,-2,-8,-32,11,-10,20,43,-23,-27,-3,12,31,-23,14,4,-20,-8,16,-8,16,16,-6,48,-5,-41,9,12,22,17,15,-13,29,-18,-1,-28,5,15,27,-4,40,-9,-2,25,-10,22,-22,-9,-4,-47,-9,7,-23,18,6,-11,18,35,-14,-8,-16,-25,-38,-8,-49,-12,3,29,-34,28,5,-26,-29,33,27,4,-16,-24,7,-2,-45,26,9,-3,-22,24,-10,-29,-57,18,28,27,0,-32,24,11,0,30,11,-45,19,30,-30,-29,-32,13,2,-6,8,13,-11,50,17,39,14,-67,-42,17,11,-8,-13,46,-44,-30,-26,12,-5,49,-28,16,54,11,-34,-22,-8,-23,6,27,-18,-34,-6,-32,-34,55,-65,11,41,60,-28,-27,-24,-21,-13,12,24,-26,-25,-30,-31,51,-53,22,12,35,-27,-8,33,-20,-43,15,46,11,-31,-36,-23,31,2,19,24,-37,-15,40,11,-41,-31,33,-36,-18,1,17,-14,-27,-15,12,19,13,-46,4,45,32,15,14,23,23,41,-27,-35,-52,-10,8,40,5,-23,-34,-6,10,-19,15,-12,3,-30,6,12,-29,-35,30,-5,33,3,26,20,16,-8,-9,67,13,-11,-15,-21,3,-34,-13,-35,34,-22,10,-15,-2,22,-3,32,22,11,-22,15,12,-19,0,29,-2,-73,-22,8,-14,10,22,18,29,-42,-23,-38,23,-8,0,-29,36,4,8,46,-5,-3,0,22,-20,20,-55,-17,27,-2,-25,15,-10,25,-10,-34,-42,-29,28,-35,-17,-16,-8,18,-10,-24,8,18,-29,46,61,0,4,-7,-46,-24,-2,-17,79,-14,9,-32,-3,-30,13,4,12,-9,-28,-26,2,10,-9,-19,9,-7,-27,-5,-12,7,4,-15,5,-8,-23,-25,39,3,-29,-9,-42,4,0,9,-8,-30,27,-3,-18,3,-38,-29,10,18,-40,-7,-46,-5,18,-7,-18,26,-6,14,-3,-75,-19,-28,30,26,-7,-15,1,-11,1,-31,18,23,-59,13,68,11,21,5,-42,-52,-31,-30,112,53,23,-44,13,-22,14,-17,-25,45,-46,-35,27,-8,-49,-38,-17,25,-7,-3,-15,18,21,25,-10,-10,-23,-56,27,21,-31,-6,-63,-6,-5,15,4,-2,0,2,-15,-7,-13,-13,10,-16,-17,-9,26,12,-11,10,-25,-2,-11,27,26,-53,-9,0,10,45,4,0,34,-3,7,5,5,15,-47,10,60,12,-6,22,-17,-18,-22,-9,84,59,27,-1,-6,-6,3,-30,-12,1,2,2,39,12,-44,10,0,11,32,14,-56,-19,-15,45,11,-25,13,-53,-16,13,-57,18,-23,-35,-15,19,-5,4,-18,-3,-12,-7,18,30,-29,-12,3,16,10,-15,-30,11,-20,2,-11,-1,-12,-11,-7,35,4,24,18,30,3,24,-24,-9,1,-4,-35,0,-11,51,-13,19,-1,-43,11,19,6,55,-14,-2,-12,-17,7,-15,-21,30,31,8,8,-23,-26,35,-30,-15,19,14,1,-19,-20,24,5,-3,10,-32,-30,-1,4,16,-13,3,16,-7,-13,-6,33,6,7,-17,9,2,23,13,-57,-1,-26,9,-44,46,21,-1,11,-4,23,46,7,27,-17,11,-32,-41,2,11,-67,25,46,20,10,18,-7,21,-5,21,-43,22,-1,-17,28,25,-46,26,20,26,37,33,-41,0,7,-36,-3,-6,-3,-23,30,38,18,-7,-16,5,54,14,-58,10,-38,-71,33,-23,-66,-33,-48,13,-20,-2,-4,10,6,3,-10,-47,18,-26,18,-11,-28,18,-53,16,-30,25,14,-3,-31,-2,47,24,-8,44,16,-47,-19,15,0,-7,-41,-14,4,19,-38,27,43,23,-6,34,-22,-26,0,34,31,12,-20,-18,-10,29,4,6,-8,20,7,-42,-12,-55,24,33,35,18,18,3,-17,20,8,0,-51,7,-14,-41,10,-9,2,-13,-52,24,26,-21,-18,-19,14,-5,-12,-44,-5,-22,-9,8,25,-4,-52,-4,71,-13,-22,-3,-27,-31,3,-38,-7,23,24,-15,3,11,-27,-50,64,-25,-28,10,-52,-8,12,-22,-14,6,-3,-28,17,5,-21,-21,66,-23,-15,26,-22,-29,-7,15,-3,-40,-4,-37,40,1,-31,-1,31,17,3,5,-29,-13,-29,-28,13,26,-24,16,23,-26,-43,28,20,29,12,-35,19,4,-54,-2,-26,-19,-15,15,43,8,-12,-6,66,29,-8,-14,-1,-16,-56,16,-8,-13,30,24,-27,8,-19,-42,15,7,3,59,-8,1,-14,12,-17,-18,15,8,-39,6,-25,-18,21,-2,3,55,0,-13,24,35,-25,-36,1,26,-10,-9,-48,-2,-2,11,-14,-1,-18,-24,31,0,-16,37,-15,41,-5,-9,-8,-19,-31,-27,3,-25,21,-11,-2,-7,-25,5,20,38,3,48,33,-24,-38,-21,15,-32,-3,-27,-4,-2,-22,7,22,26,-12,18,-8,-36,-59,-40,30,-5,14,17,19,9,-6,-10,23,10,-44,-8,-4,-14,-30,-36,14,22,10,13,37,40,-15,-63,12,-13,-26,-7,-22,6,-31,-19,-1,-2,-2,-21,6,7,1,-25,32,2,0,-14,2,-4,-22,-2,-4,-8,-8,4,-35,-15,3,-25,10,-5,-16,5,-10,9,-26,18,29,-18,-17,-3,-32,-12,-7,-32,36,1,-15,-3,3,4,-10,17,36,-8,-10,-10,-9,12,-10,-22,21,29,-7,-22,-15,13,-12,14,1,18,7,0,-12,-4,-15,4,24,50,1,-26,-41,9,-15,-6,-17,-10,-28,4,-32,4,-9,39,-1,4,-1,-33,-6,-10,2,-7,-10,4,7,9,6,-6,-3,0,1,-5,-2,-1,-9,-23,13,9,-9,6,-25,1,10,-12,-6,-1,19,-15,-16,5,20,-12,18,19,5,18,-32,-32,19,-15,-9,19,-1,-9,-34,-15,9,14,0,9,12,26,5,-29,9,2,21,26,0,14,-18,-21,-11,-11,17,-24,13,24,6,-12,-24,19,15,29,-15,27,-4,-15,20,-12,-10,-24,6,-7,17,2,7,-24,-8,4,-8,-5,-6,21,-5,-26,22,5,12,2,-10,-20,8,-28,15,-10,-14,-12,-20,8,21,-27,24,21,-5,14,-35,-50,-27,-16,9,-1,-22,-8,-38,-4,10,-8,1,-11,-8,21,-16,-5,-21,15,0,-23,-26,-2,2,7,-3,-16,13,-34,30,15,0,13,-19,22,-25,-20,-30,-1,19,8,15,-28,-11,-14,0,-1,-8,-15,-1,-12,-6,15,-8,-1,-17,11,9,-17,16,10,20,17,-22,-44,-2,3,1,-7,-1,-2,-30,-8,23,-16,2,15,-18,27,-34,-59,-24,17,11,-4,5,28,-48,-9,0,-12,-13,-5,-31,24,14,41,0,38,1,-23,-14,36,1,27,-19,-22,21,-6,15,-8,39,90,7,42,-38,15,-34,2,21,14,-28,-18,-21,9,11,-7,3,-31,-5,-21,-10,-1,19,13,-18,-15,0,-2,-19,29,12,10,-8,-49,-20,8,-5,-8,29,-9,-17,-24,-1,2,-39,19,-31,-12,-17,-56,-26,-6,14,9,4,20,-4,-26,-13,6,-4,13,-53,-10,-4,43,28,-2,-10,-7,-39,23,33,5,-19,-5,76,19,-25,-18,17,75,43,-8,-24,56,-40,0,23,-2,-27,9,49,1,-19,-8,2,15,-21,-27,0,-11,12,-31,-38,12,4,9,41,11,14,-47,-10,22,-7,-35,2,-16,-11,-17,-18,-19,-12,10,7,32,1,-73,-45,13,-19,-15,-30,-3,-3,-24,-16,-6,-32,-47,1,-20,-1,31,42,-29,32,46,21,40,-26,40,7,-1,-12,-23,33,-42,27,84,57,-24,-3,30,22,-20,-107,-5,17,-15,81,15,10,17,5,10,-8,-8,-15,-52,8,10,0,-6,-3,23,25,28,-10,26,29,24,-15,16,-12,-24,11,5,-30,14,27,-17,17,23,-25,-16,-9,-40,-75,25,-15,0,-24,-15,-26,-32,12,-5,-23,2,-14,-44,-8,38,-11,-4,63,65,15,-7,34,11,41,-16,-67,-5,-13,-28,1,33,66,-20,46,28,23,-33,-22,1,16,-60,-12,-27,17,2,1,-3,2,-40,5,-3,-24,23,-9,-36,-13,24,29,-40,-5,12,12,16,-3,6,-14,8,6,25,-17,2,14,-6,22,-34,-4,-41,-43,-17,-39,22,-39,-21,-9,2,-43,-24,-16,28,17,10,2,4,-43,25,-25,-13,2,-2,23,-4,27,7,16,11,-46,9,-33,63,-28,-50,-9,-4,14,-32,15,-57,52,40,4,-43,-39,-15,19,-22,-13,-1,36,-33,-33,37,-37,1,-3,-15,16,28,18,-3,11,6,14,-1,45,-7,-23,12,-22,-11,-10,21,14,-14,-14,9,0,-25,10,-20,22,-1,-12,-9,-21,-2,-44,-9,-22,-8,14,19,-4,31,4,15,11,-29,-7,-1,27,67,-3,8,32,-12,-1,1,-15,79,-17,-42,4,-19,0,-33,-2,-7,74,12,-2,0,-34,-22,-4,0,-5,7,28,12,-33,4,-40,22,-5,-8,-13,20,0,-22,12,-13,11,10,6,6,-8,-15,-62,6,-30,26,-9,4,-12,-41,27,-52,31,0,-20,12,23,-2,-65,-21,-15,-16,4,-21,-8,-22,13,-33,35,36,-31,7,14,14,10,43,5,-16,51,-29,3,7,14,32,-12,23,-2,15,15,11,-4,23,11,-28,-3,28,-5,-7,-5,-8,-21,37,20,45,25,-19,-1,-6,-62,-1,15,8,-1,-39,-14,-9,-37,14,38,-18,-27,36,-4,-1,-69,23,33,27,-10,-16,10,-28,-41,34,39,-30,-77,-15,3,12,-82,36,-2,31,2,54,4,-10,-9,12,-15,6,-11,-83,21,4,-80,0,-6,4,17,18,24,17,-2,13,1,19,21,-24,43,12,-31,11,-18,-44,0,-13,-27,-4,12,-8,-63,-8,20,-21,-8,73,-52,-48,34,22,16,-1,-27,9,23,-6,-25,-34,7,22,-14,1,-74,-37,80,39,-19,2,-19,9,16,-21,44,-46,26,-30,-6,6,-107,-31,27,26,-2,-3,-19,-24,-10,-31,30,-14,-3,-4,-9,-20,-87,-39,47,9,-25,-26,18,-8,-7,21,1,-26,-35,37,-19,-11,18,-7,46,-35,12,-9,-38,-29,-3,19,7,-28,15,-3,-50,20,65,9,-19,-3,-55,-7,-32,-7,29,31,-11,-47,-6,37,-47,-14,52,19,66,-22,-2,-22,-20,1,43,-32,-4,-68,61,30,2,27,-20,-42,4,-43,43,-50,-44,-32,-9,-2,49,-26,-1,-25,-9,-1,79,26,10,-31,-21,-38,-9,0,-11,57,42,-35,-20,-45,-42,-12,75,59,-1,-33,-58,57,-43,-24,-41,-25,16,3,-14,-5,-46,-66,116,39,-27,12,-18,12,17,-30,-6,-34,-12,13,-7,26,-40,-66,70,40,-4,-15,-28,-11,-3,-27,26,-5,-62,-10,16,101,21,0,-29,-46,-1,5,25,-9,-61,-38,-24,21,22,-20,-9,-3,54,-5,63,46,-13,24,31,-8,-14,-9,-50,18,-7,25,-4,-47,-35,-4,54,50,-53,22,-59,75,-64,19,-11,-14,-33,5,-15,-36,12,-46,-46,-33,-23,43,38,-12,-3,3,-2,2,-40,13,31,-30,-5,-10,-86,18,-11,7,14,-20,-25,-13,-3,3,-36,18,43,60,4,18,-98,-4,-18,12,59,37,-43,1,-5,1,38,2,7,13,34,-1,-55,-4,-12,35,55,12,-6,51,15,0,-21,33,9,-52,8,31,2,17,-32,21,-50,-28,-3,-6,10,17,-44,-39,-19,-6,11,-36,0,1,-8,55,-50,-5,15,7,-8,1,-52,-26,12,-46,3,4,26,-7,-2,4,-39,-16,1,-21,26,-14,-34,6,36,-19,-8,31,-23,-15,21,-19,16,-12,-12,45,18,9,57,-6,36,-1,-10,-9,-39,-29,22,9,13,-1,-44,63,-43,-23,30,-10,18,-18,-9,21,11,-29,34,22,-5,2,-33,3,0,53,-19,4,-38,-27,9,-33,-27,42,-15,14,-15,6,1,-2,-23,30,0,1,0,6,-18,-9,17,30,-29,6,-31,-3,7,-51,-20,3,17,-8,18,55,-22,-12,16,21,11,19,-16,-53,7,5,7,-1,-10,-26,11,32,-16,-26,5,9,46,30,-30,-16,-7,3,-21,-17,-7,-35,57,38,-23,-7,9,19,2,8,1,-24,-32,-3,31,-12,-45,24,-25,-32,17,-3,-33,0,11,-30,58,56,-2,-15,43,-31,-24,24,10,-21,-6,4,-24,-2,-30,-23,39,81,-3,-55,7,-35,38,1,23,-2,7,-30,-5,9,-56,-27,-6,-4,-39,-26,-19,37,34,10,-8,-47,-16,-42,13,0,-26,8,-76,-20,-52,-23,-16,38,32,-16,-3,-30,-37,-14,24,26,-53,-4,-6,-42,-18,-8,-21,-5,-5,-11,-17,-21,9,29,-3,-10,-8,2,16,57,-1,6,-7,-10,-21,17,-16,-27,1,24,-10,-38,14,15,32,110,-2,-17,2,-48,-30,8,8,-3,16,-4,-28,-25,-1,-6,55,31,-34,-22,-36,-7,8,8,7,-39,37,-13,5,-8,-27,17,32,13,-40,-34,-20,14,-17,-6,-31,-19,26,38,26,-13,-29,14,52,-1,-2,-5,-10,-1,0,-10,2,-3,-5,10,18,7,-14,-5,-9,-26,7,14,-25,-9,-14,10,0,-13,-13,30,8,-20,-30,-10,9,-2,4,35,13,-23,-32,9,-9,5,-4,39,21,-13,-17,-12,15,4,-28,20,18,-17,-11,-4,-18,-8,-6,10,36,-4,-7,-8,17,22,-37,-6,25,-7,-19,-14,-38,-19,25,26,36,23,29,-21,25}
+
+#define CONV3_BIAS {-1,0,0,2,1,3,2,0,-1,1,-3,0,2,1,1,1,0,0,1,0,1,1,0,1,0,0,0,1,1,1,-2,-2}
+
+#define IP1_WT {11,36,14,-3,16,-2,-25,-6,9,-8,-8,-2,-17,55,-11,3,-10,2,23,5,-1,0,9,-1,-9,0,-1,-4,8,4,-8,6,2,1,-1,4,-3,-7,-5,-7,4,-7,1,-1,18,6,1,9,14,-8,18,-3,-1,-5,-6,-7,-10,0,1,-2,19,9,-8,14,6,-6,-3,3,-5,-6,-10,3,-9,-7,-7,0,-11,-7,4,0,-3,-4,-10,1,12,6,-1,2,-3,0,5,-6,-3,-10,-2,-2,-2,0,1,-10,-4,0,-11,20,-17,-8,-1,-3,-12,-14,-2,-4,-16,5,19,-10,14,-11,3,-10,10,-8,11,10,13,-6,-6,5,10,44,5,-9,3,-1,-9,-9,-3,-14,6,-4,-38,71,-14,-8,-2,12,29,-3,-7,-3,21,-10,-4,2,-12,-7,1,1,-7,4,3,8,1,3,-2,-9,-3,2,10,-16,0,2,4,-3,-3,-8,42,-13,8,-4,7,-6,-14,-7,-7,-4,13,-11,3,12,-27,14,1,-3,10,6,0,4,-4,-14,-3,1,-3,-6,-9,-6,5,-2,-1,1,-12,2,6,-4,3,9,-10,1,7,-3,-1,-26,-2,-4,-12,0,-6,8,4,-1,10,20,-13,-11,-4,-3,8,-24,5,-9,-13,13,0,-3,-4,-3,-3,-7,1,-5,14,7,23,-7,-5,6,21,5,2,-9,-21,-13,-1,-11,-1,-4,-5,-1,-19,36,4,0,-2,1,5,1,-2,3,25,-12,-3,6,-6,-8,13,-1,-10,1,-8,14,-4,5,1,2,-6,6,20,-12,5,8,4,6,-10,-3,22,-24,6,-5,3,0,-1,-7,-8,-5,-5,0,4,10,-17,7,-3,6,12,-1,-2,-5,-12,1,-4,2,-6,-4,-1,0,2,7,2,-3,-13,11,1,3,-10,-10,4,-2,6,-2,7,-5,12,0,-14,-10,2,-1,-1,-3,16,7,-11,-6,-7,-2,-12,-18,0,4,-10,-2,16,-5,-4,4,-9,-3,13,6,5,4,-1,0,-4,6,6,-2,11,-7,-14,-14,-9,-11,-2,-1,-2,2,-4,21,1,-7,-2,-3,0,-8,1,0,7,10,-5,4,-8,-12,5,2,1,0,4,-1,-7,15,0,1,-12,4,12,-10,14,1,4,18,-4,6,15,0,-7,-12,-7,-12,-6,14,-2,0,0,-1,2,4,-6,6,0,4,26,-4,-3,8,-1,-5,-4,-2,17,-5,4,2,9,-12,1,1,-9,15,1,7,-12,-9,-2,-1,3,-7,7,-1,11,-13,-3,-5,6,0,0,-1,0,-2,6,-4,0,0,-22,0,4,0,-4,-1,10,0,2,0,0,-4,6,11,0,1,-11,-4,-7,-2,5,17,3,1,4,-11,-6,-6,5,-2,-7,-14,-4,7,-6,8,-6,1,14,1,3,-15,26,1,-16,2,-11,-5,12,-3,5,-1,-1,-2,-8,3,-4,7,4,9,-5,-7,-7,3,23,-1,-2,4,0,13,-4,10,-12,-6,-9,-9,-7,-2,-11,-5,29,17,8,33,6,-5,-5,6,1,2,-2,-4,-17,-11,3,0,-13,-5,-9,-11,-4,-4,-18,5,21,-3,-9,6,-4,-5,-2,-12,-12,-10,-6,18,1,-3,-9,10,2,-10,14,2,-1,0,-16,-3,-13,-3,-3,5,-8,9,2,20,21,-15,-5,8,9,-14,29,22,57,-20,-7,-4,0,26,-2,7,1,-3,0,-9,-7,-9,-17,-3,-8,5,2,-3,4,11,-3,0,-6,-8,34,-1,2,7,-14,5,1,-13,-7,-6,5,6,-2,3,-14,9,6,-2,1,-10,-8,18,35,-5,-3,-7,40,1,-12,2,-17,-11,-7,3,-1,-3,-4,-10,6,18,7,43,-11,-3,2,6,4,5,-9,-8,-9,2,3,0,2,-12,-11,-3,1,-2,-10,-2,7,4,-7,25,-7,-3,-12,-4,-4,-17,2,34,-18,-2,-8,12,10,-9,-7,-2,-2,-1,-21,-8,-3,7,6,8,-5,2,-10,45,5,3,-4,0,-20,-6,11,2,70,-11,2,-3,-10,2,3,2,-4,-3,-1,-1,5,-11,-6,-1,0,11,3,-7,3,-1,0,-5,-4,2,37,3,-2,5,-19,-4,13,-6,-3,3,-7,4,-7,22,-11,9,0,-6,17,-5,-4,20,18,5,-6,-13,12,-3,-2,-1,-3,-7,-5,15,-1,-1,-11,-3,3,14,11,17,-16,-6,4,5,-12,-4,-8,-1,-6,6,-2,-4,-2,-1,-9,0,2,-6,-9,3,1,5,-7,-5,4,-6,2,-9,10,3,14,9,-11,-12,9,3,7,-10,16,1,-4,-2,-2,-12,-1,5,-8,-7,-15,0,1,47,12,6,-5,4,-6,0,7,-4,17,1,-1,-2,-5,-1,10,-3,-8,3,-9,1,7,-10,4,2,0,3,0,-5,-4,-1,4,1,-3,-2,11,4,-5,6,-20,-14,4,-2,0,-1,13,-4,-1,27,14,2,-3,-5,20,-12,-1,11,-6,10,-8,6,-14,8,-9,-2,3,-20,-8,43,-3,1,2,1,1,12,-5,7,1,6,20,0,0,0,1,7,0,-2,-1,-2,2,5,-4,-2,-1,-3,-6,2,-3,-2,-3,-4,-2,-5,1,-11,12,3,19,-15,5,-8,15,4,-1,-2,14,-7,-7,1,3,-11,-8,3,0,-12,-5,-2,2,10,4,-1,6,3,6,11,4,-1,3,5,-1,-1,-5,9,5,-1,0,3,-1,-2,-4,-1,-2,-5,-3,11,-1,0,31,-10,2,-2,24,-16,25,-1,-2,-9,-12,-2,-3,-8,5,2,-6,15,-2,-4,-11,8,-5,10,0,-8,18,-6,13,-10,1,0,9,2,-3,12,-7,-5,-12,-20,-12,-2,-12,-5,16,7,-5,24,-2,3,-14,8,7,1,3,-1,-7,-1,-1,13,-11,9,-12,4,-10,3,-13,-2,29,1,-22,0,-1,-6,-17,-7,-3,4,-1,23,-1,2,12,19,-11,5,7,-15,-3,-1,-13,-1,-1,5,-5,-9,13,7,-6,26,8,-10,-7,2,-1,-6,21,40,37,-10,-16,-17,-7,11,9,1,-2,12,-9,-1,-13,-9,-9,7,20,-10,-6,1,24,-3,2,-2,35,-6,4,3,-6,-4,-8,3,-13,-15,-2,-12,-2,18,-9,4,-15,12,-13,-6,-2,-10,1,5,28,-7,-5,-14,28,-11,3,0,-13,-9,-7,-2,-4,-8,-10,-8,5,1,-11,36,-16,9,-2,2,22,-10,-15,3,-10,1,-1,11,8,-8,-3,8,-11,3,-10,-8,21,5,-4,6,-6,-5,-9,1,4,6,6,22,-7,2,5,32,-15,-2,-19,-9,-5,-4,-8,-5,1,6,8,-10,9,1,-14,56,0,-8,-2,-7,-4,-1,0,-3,23,-6,-3,-3,-2,0,8,4,-2,8,-8,1,-3,-6,-1,9,22,-5,-9,1,11,-1,5,-7,21,0,18,-5,-10,-3,-8,-5,-6,-4,-1,-3,-7,2,-2,25,-8,17,-7,-11,12,-9,-15,12,17,-3,-5,-10,14,-2,-3,-2,-13,1,3,9,-1,2,-4,0,-5,12,8,2,-15,-11,7,-1,5,-9,2,-6,-5,3,4,2,-1,0,-2,7,-5,-2,0,-10,-6,20,-6,-1,0,-4,5,-4,3,2,-1,9,-5,-7,13,11,-6,3,5,-5,-6,1,-5,-5,1,8,-10,-7,0,4,-12,52,-1,0,-6,-9,-5,-2,17,-5,3,3,-2,3,2,1,4,2,1,16,-3,-4,5,-6,-2,0,-3,-7,4,-6,-5,3,0,1,5,-7,5,8,-4,0,-5,-8,-6,-6,-12,-1,5,2,-10,35,9,10,-7,-3,12,-9,-6,5,-5,9,-1,2,-1,4,-6,1,-10,3,-10,27,-2,-6,-1,0,1,15,12,-6,25,-2,27,-7,6,-4,0,-1,3,2,7,6,-6,5,-17,-7,-6,-6,0,-10,-18,23,-6,4,0,-2,-1,-4,6,-1,2,3,3,-2,24,-1,-3,6,11,-6,-8,1,-5,-11,-5,8,-5,-1,-2,1,-2,19,2,3,-2,-1,1,0,9,-3,1,3,2,0,-1,1,4,1,-2,5,-5,2,-9,-5,-4,7,0,2,-3,-5,12,-7,5,-4,19,-5,23,4,-1,-7,-12,8,-15,9,-6,6,19,25,11,-11,-39,-2,-6,1,-4,-2,37,-15,4,3,-2,4,3,-1,-9,19,-1,0,-19,-4,0,1,1,2,2,-2,-2,6,1,2,0,1,-2,-1,2,8,-4,2,-10,5,-9,9,-1,4,-12,8,-2,-10,7,-5,-6,-7,2,-1,-7,-5,-2,0,-10,18,-2,8,14,1,-12,1,-3,-8,3,-7,0,4,0,7,-4,-4,35,-4,4,5,-2,-3,10,-1,-3,3,0,35,5,-11,-13,-15,-1,-5,7,4,-3,4,-16,10,-9,-6,-7,17,8,-12,4,2,3,-10,4,-3,42,4,14,0,-13,-16,-5,2,-19,4,9,-9,20,43,-1,-2,-30,7,-10,0,1,-9,17,-4,26,-9,-7,-4,6,-1,-7,6,-1,0,-1,-10,-3,-6,-3,1,-3,1,0,11,0,0,-1,4,-3,-7,9,10,1,-2,-5,0,-3,-5,8,1,-16,2,6,-14,6,-7,13,17,0,-2,-6,3,-3,0,-5,25,-3,12,9,9,-12,-4,-12,1,1,-5,-5,2,-12,7,-1,-4,19,-5,12,5,-1,-2,-3,3,-9,3,2,2,-3,-1,-10,3,0,-1,2,2,-7,18,-6,-2,0,-10,-12,11,18,0,4,1,5,2,3,-9,24,-3,25,-9,-12,0,-2,1,2,2,1,-4,8,22,2,12,-24,1,-8,-4,5,-5,-6,-1,18,-9,2,6,1,0,-2,6,0,1,5,2,-3,1,0,-6,-4,17,7,8,1,3,11,-3,6,-7,5,6,0,0,0,3,0,0,0,7,-10,-1,5,-2,-14,8,9,1,-1,-2,-4,-1,4,-1,-1,18,4,6,17,-6,-7,0,4,-11,-3,-2,-4,-2,-17,10,-4,-6,11,2,2,10,-2,-1,-6,7,-5,1,14,-2,-7,8,-5,0,1,1,-1,1,0,5,-1,-1,8,-2,0,2,9,-11,4,-5,2,2,-3,-3,6,-15,12,6,-1,-5,2,2,3,-3,-2,5,-1,4,-10,22,10,3,-12,-2,3,-2,-5,-4,-3,-2,0,5,2,-3,-6,3,3,2,-2,-6,-2,-3,0,-3,3,5,5,8,42,-5,33,-5,-3,-4,5,4,2,2,8,0,-8,-7,-23,0,7,-13,2,-4,-15,10,-1,-2,0,0,0,-4,-1,-1,1,6,7,-1,22,-2,-14,7,-8,2,-1,-2,-5,-3,-9,-1,-6,1,0,1,8,14,-1,7,0,0,2,-2,15,-10,-9,0,-3,2,-6,-4,13,6,-11,-15,11,5,-9,5,34,3,-19,2,-3,-8,6,-6,3,-10,-12,8,-14,-9,5,1,13,7,-5,-8,-12,-10,5,10,-5,9,-1,-3,0,5,-12,-17,-18,-20,2,18,13,22,-5,-14,-8,-2,-14,8,-2,1,-21,49,11,6,0,-22,-6,-5,5,-1,-4,0,-3,3,-3,-12,8,5,-8,-2,2,24,-9,-14,3,5,9,-5,-3,-10,-2,11,5,2,-3,7,9,-3,-2,-5,-5,25,0,-7,3,-4,-6,14,-9,14,6,10,-8,38,-8,2,-25,-15,-6,-4,46,-19,-4,-5,-10,-8,-10,10,6,0,-4,-5,0,-5,-1,5,-5,-22,48,-7,-17,15,49,6,-8,22,-5,-17,1,-8,7,-16,-7,-8,-15,-8,0,-2,-6,8,3,-10,-1,14,-2,17,-8,7,-1,4,2,-1,-13,-8,-17,-9,-10,38,2,32,-5,-9,-1,-1,-12,-7,-6,16,-7,16,12,4,2,-16,-5,2,9,-11,6,-11,3,-3,0,-14,4,7,-9,7,-5,12,-7,-17,5,6,1,6,-5,-2,-7,-3,0,11,-11,4,39,0,6,-8,-7,26,5,-3,-7,5,-13,-14,-13,16,19,13,-11,32,-4,-10,-11,0,-3,-7,22,-4,1,-3,-16,-6,0,-3,4,5,-5,-3,10,14,2,18,-6,-1,21,-6,-7,13,37,-6,-7,10,-10,-14,-3,-6,8,-17,-2,-1,-5,-6,4,0,1,8,-6,-7,1,21,-5,10,-2,3,-4,3,-1,-4,-8,-4,-9,-1,-6,18,-1,7,-2,-13,-11,5,-4,-1,-2,16,5,1,18,3,5,-10,-9,-3,11,-10,3,-3,26,-6,-8,-2,1,0,-5,-3,-2,6,-3,-7,-1,2,13,14,-2,2,-4,-2,10,-6,-13,4,1,5,2,-15,-2,25,-2,2,-1,1,-10,-7,-6,11,11,3,-7,42,-7,6,-6,0,7,-4,10,3,-2,-5,-22,1,8,-12,18,-3,-4,1,15,5,12,19,13,-5,2,-3,-5,4,7,-3,-5,-4,0,-4,-4,1,-7,-4,1,3,-2,-1,8,10,7,7,-8,-4,5,12,-5,2,-3,2,3,-1,-2,0,10,3,-11,-3,-16,4,2,-6,0,-18,-12,13,-3,-2,7,6,6,2,8,5,4,-6,-1,-8,-1,4,-10,-9,-6,-5,-8,6,2,-2,-1,-6,0,0,3,-3,0,-6,18,4,0,0,-4,-6,4,-5,-7,5,1,-6,12,-3,0,7,-3,7,1,8,-6,4,0,-5,-4,-1,-5,19,4,7,0,0,2,-3,-1,-1,-1,1,-8,5,5,-4,15,-3,-3,7,-2,5,11,0,-5,-7,7,-2,4,6,39,-4,-7,-6,0,-10,10,-12,-7,-12,-4,3,-9,-9,7,-2,-7,0,-5,-1,-10,-3,-13,28,-8,15,-3,-9,-4,-5,-23,-2,-16,5,14,14,-5,33,2,-1,-8,-8,-7,-3,-9,-7,-32,49,-4,-5,-11,-15,-2,-10,-4,-10,-11,4,14,-7,-6,-12,-5,14,-11,-8,-13,78,-17,-13,15,5,-1,-4,-7,-15,21,4,-9,4,-12,0,44,-8,3,-9,-6,31,-3,-6,1,-1,-6,3,5,0,36,3,-5,19,-18,-9,-4,-9,-6,-3,15,-5,-9,-3,-8,-2,-28,-9,-8,-9,1,-8,6,0,5,-5,-7,-10,36,-13,16,21,64,-3,-15,3,-7,-18,0,-12,-9,-14,-4,-10,-10,2,4,-16,-3,0,9,-9,-3,4,-17,37,-8,9,-6,-9,1,-7,-1,-4,-15,-12,-1,-3,-2,29,-3,0,-4,-3,-5,-8,-4,7,-17,10,-23,11,9,-19,2,-16,-11,-11,-11,-7,39,-15,1,-9,3,16,-11,4,-4,12,-10,-16,14,-2,-5,5,-8,-12,-7,0,-9,1,-7,-18,66,-13,-3,-6,-10,61,-20,2,-11,-10,16,-1,2,-3,50,4,-4,5,-7,-20,-7,-4,-9,-9,8,-6,-8,0,-8,-3,-4,-9,-13,-9,1,-1,2,13,7,-7,1,3,6,2,1,8,30,5,-6,-1,-9,-3,-4,-3,-11,-13,-2,-5,-12,-5,7,-4,-2,3,-12,0,-2,37,-10,18,-6,-2,-4,6,0,-8,0,-7,-9,-5,-16,7,-18,6,-6,-5,-5,-2,-5,-7,-8,9,-1,-5,1,-3,5,-12,-14,3,-11,-1,3,-4,58,-9,-1,-8,4,1,-10,-4,1,2,1,-3,-7,6,6,6,6,-4,-5,9,11,-16,-6,0,-6,-1,4,-8,-12,61,-10,-2,-15,-8,-8,4,4,2,21,-3,-4,8,-9,9,-7,-8,-7,-14,8,-4,-7,-8,-4,7,2,-4,-7,6,-1,-3,7,-2,13,4,16,-1,-8,-1,-4,18,-4,-2,-2,-16,-6,-2,-6,1,-11,-6,1,3,-10,0,14,7,-15,13,-9,5,-4,62,-15,-7,-11,-6,11,-2,3,-13,2,4,-2,-9,-7,4,-14,-3,9,-7,-14,17,-7,-9,-10,2,9,6,2,-8,3,-14,-4,2,1,0,-9,-5,-4,-7,-9,-10,-3,-4,4,-16,0,0,7,-5,-1,4,4,-7,0,15,4,5,-3,-1,-6,8,8,-12,10,-5,-1,15,1,5,-3,5,-16,11,8,-4,-11,-9,5,6,10,9,-2,2,-1,-3,-1,-2,-4,-5,-9,2,2,-2,2,-1,-3,-1,-3,12,6,-2,-7,-2,-3,-4,-1,-6,6,-1,0,-2,2,6,-3,-4,1,0,-7,-2,-9,-4,19,-7,-6,-12,-10,22,-3,0,-16,11,-5,3,-2,-3,-11,4,-5,15,-15,3,7,6,-6,3,0,-3,-14,-14,0,1,-3,-6,-7,3,6,-4,-6,10,17,-5,-5,-3,-19,2,0,0,-2,0,-11,5,-9,3,-9,37,-6,-2,-9,0,-1,3,3,-8,34,-2,-4,5,-12,16,12,-5,-4,-13,3,5,-9,-12,-10,-4,-15,26,-3,-7,35,7,0,10,-16,-2,3,-9,-3,-3,-3,9,-4,-3,-4,6,-24,-19,-4,-8,-2,-17,-4,15,2,-4,-8,2,1,-4,-3,0,13,-4,5,-4,5,4,4,-11,8,-7,-5,-10,0,-4,35,-8,2,-5,-10,34,-1,6,-15,17,-7,-2,2,-14,-3,6,-5,2,-11,-4,7,6,-5,0,1,-5,-7,-9,3,-2,-7,3,-7,10,-10,6,2,-3,23,-13,-10,-6,-10,-6,22,0,0,-6,3,15,-6,5,-3,0,-8,-6,-3,-2,-1,4,6,-17,-5,0,-6,1,-9,-7,17,-4,-4,-12,5,31,-32,-3,-7,-11,1,31,-2,-1,44,7,-1,9,-9,-8,0,-1,-3,-3,-2,1,-9,-6,4,-6,0,-10,4,-7,0,-10,-1,1,9,-6,1,6,-3,-5,0,-8,-2,3,0,0,-2,3,-6,-3,1,-2,0,-11,-6,-4,27,1,-3,3,-15,12,-2,19,-2,-6,-11,1,-3,-4,-1,-15,-5,2,-6,0,-5,-2,-20,0,3,3,1,2,-5,-7,-8,2,-6,3,-4,1,-1,-6,7,-3,-1,-9,5,-4,24,3,3,-13,-1,6,-15,-1,2,0,1,-3,-6,10,0,-1,0,-11,-5,3,6,-1,-6,0,-3,-3,-1,-6,-3,27,-8,-20,-12,-1,-12,33,-2,-2,33,0,-6,7,-6,8,-1,1,-2,-1,1,-7,-11,-8,-3,6,-3,-6,8,-8,0,-5,1,-18,10,-4,8,-3,2,-1,-5,13,-5,4,1,-1,-1,-3,-8,-2,-4,4,4,-4,-3,1,11,-7,-17,14,6,8,-1,31,-7,-14,-14,-5,7,-6,-3,-14,-2,5,0,-5,2,1,-5,-1,5,-1,-1,19,-9,-11,-14,-1,-2,-3,-8,2,-2,4,3,0,-5,-5,-3,-4,1,-11,-1,-6,2,-2,-2,-9,-2,3,4,0,0,32,3,-7,-2,-8,3,1,-6,2,-4,4,3,-2,0,0,-2,1,-6,-7,-4,2,-18,21,1,0,10,-8,1,0,3,7,-3,1,-3,0,-1,-1,-4,-6,4,-3,-2,-3,4,-2,-1,0,4,8,-1,-9,-5,-4,-7,0,-2,10,-6,-3,-2,-4,5,10,-3,-4,2,-16,-7,0,-16,18,21,-1,-2,-9,-12,20,-6,1,-15,16,-4,-5,-6,8,-9,7,4,-3,-16,11,-1,2,-4,-6,0,-1,-8,-8,0,1,6,-6,-4,-7,-5,8,4,9,-1,2,2,1,2,-4,-2,0,0,-3,-3,7,-1,0,-5,8,-2,0,-11,7,2,4,30,-18,37,-14,6,4,0,23,3,-8,-18,-5,2,3,-9,-5,-2,-1,-10,22,-10,8,9,-4,-4,4,-9,3,5,-14,-4,-4,4,1,-3,3,-2,6,-15,-12,9,-2,-4,-7,5,9,-5,-16,-6,4,-11,1,-3,6,-16,-10,8,-5,3,5,4,-11,12,-17,-2,-9,-13,7,31,9,-3,-10,-8,29,-1,8,-14,-1,-6,-8,5,-13,-11,4,1,1,-10,-1,2,-6,-3,-1,0,-1,-6,0,0,0,-3,-2,-4,-4,-6,2,-1,13,-10,6,11,-4,4,-11,4,1,2,-10,2,-1,-3,-2,0,4,-1,0,-5,1,2,-18,34,-14,4,-5,-1,-3,-7,-3,13,-1,-2,-8,7,6,-8,-2,-5,-3,-15,9,-5,19,5,1,-1,4,0,3,-1,6,-1,-4,2,-9,-6,-1,1,4,-10,-6,3,-1,-9,-1,-4,-2,4,-1,-9,10,-7,-1,4,-8,-9,4,-4,3,-4,1,2,-8,2,-5,-2,-10,-7,6,36,-4,-2,-6,-5,5,1,13,-2,12,-9,-6,-6,6,-2,-2,-3,4,-6,-4,-2,-4,-1,-1,0,0,-6,-2,0,-1,-3,5,-9,0,-4,-6,-6,-1,1,-2,4,-3,-2,-3,3,-2,4,-9,-1,1,-5,-5,0,0,-5,-3,-3,14,1,-9,11,-7,13,-7,0,-3,1,1,4,2,-11,-7,1,2,4,-10,-5,4,-11,14,-5,18,10,0,-10,10,4,5,-5,6,1,0,4,-4,-11,-7,-1,2,-10,-2,4,-3,-6,2,-5,-3,5,0,-1,4,1,2,0,-2,-5,7,-3,1,-3,-1,-4,-1,-9,-1,7,-3,-2,13,4,-6,1,-1,4,7,-4,3,-2,-11,-14,-6,0,-6,-6,2,1,6,-1,-3,-1,1,3,1,0,-1,3,6,-3,-2,1,8,6,-5,-2,-7,0,-1,4,-8,-11,0,-14,-1,0,-3,10,-13,6,7,-12,3,-4,2,-1,6,-5,38,-6,1,3,-13,8,-4,-1,0,-4,-5,4,0,-1,0,-5,-5,-4,-5,-1,12,-12,16,-6,11,6,0,0,4,-3,10,-1,-4,-4,1,-2,3,-3,-8,9,1,-4,-6,6,-2,-3,2,-2,-12,-6,-9,8,2,2,-5,-4,-9,0,-1,25,-13,2,-2,2,-1,29,1,-6,2,0,-1,-8,1,-1,-1,18,-1,0,-10,-9,-20,-13,-7,18,5,9,-4,-10,-2,-3,0,6,-4,3,6,1,-3,36,5,-7,-7,3,-3,-3,6,-8,-4,5,-8,-9,-4,-7,-8,-11,-1,2,-3,-9,-1,-4,-9,-1,5,24,-4,-2,7,-10,-2,23,1,-5,-6,3,-2,-1,-6,-5,0,4,-12,-10,-3,-4,-1,-13,3,0,-5,-9,-8,-3,-13,4,4,27,-6,-9,0,2,2,3,1,-4,0,5,-2,-6,-13,-5,-6,4,-4,-3,2,7,-1,-7,-11,10,1,2,27,-6,-11,-6,-5,16,-14,36,-3,-1,-8,38,9,-10,3,-7,24,-14,-6,-4,-5,-2,-5,-3,-16,6,-2,-8,-12,21,3,8,13,-11,-9,-3,3,5,-5,12,-3,-5,-6,39,5,-2,-5,0,15,-9,-4,0,-11,3,-4,-2,3,-6,0,-2,-1,9,-3,1,-7,-2,-11,-1,30,18,-1,-2,8,2,-1,11,5,-2,-5,0,-3,-6,-4,-12,-4,2,-13,-1,2,-8,7,-5,8,5,-9,4,-4,-6,-11,-4,26,36,-4,-10,1,-3,5,6,12,-8,0,-6,-4,-7,-4,-18,3,5,-15,-9,-1,9,2,-6,1,-2,-5,-4,29,-4,-6,-5,-3,2,-17,59,-4,-1,-9,20,5,-8,2,-16,24,-2,1,-6,-4,-12,-4,-3,-14,-2,7,-4,-8,-15,1,1,22,-8,-9,5,22,7,1,28,-3,-8,-8,23,-2,-2,0,0,17,3,-3,-11,-16,-2,-2,2,2,-6,0,-9,-2,-4,4,1,2,-8,-7,-5,43,3,4,-7,-3,11,-3,1,5,-2,-3,2,6,-1,0,-12,-10,1,3,13,-10,-2,4,-13,8,5,2,-8,-4,-6,-10,-10,8,12,-2,-13,0,-3,2,-6,28,-6,-1,-2,2,-2,-1,-19,2,4,-6,-8,-4,-2,4,-1,-1,12,-13,-11,22,-24,0,-4,0,0,-7,27,-3,0,-2,-2,1,6,-3,-16,9,-2,-2,-11,5,-16,1,-7,-7,-5,13,-4,-5,-3,-6,0,15,-22,-9,4,11,0,2,25,3,-1,-2,-2,-1,4,-1,-11,10,0,-8,-6,-2,-7,5,-8,-1,-2,1,-9,-1,-8,-4,-3,5,-18,-4,-2,12,-1,4,-2,4,-4,0,-7,10,6,-2,-9,-1,-2,-1,-9,-7,-6,9,-9,-5,1,7,-8,0,-6,1,-12,3,3,-3,-7,3,-1,-2,2,6,-15,4,-10,26,-3,0,-5,2,-5,3,-13,0,2,-1,-12,-3,-23,-6,-9,0,6,2,-7,14,0,-1,-1,-7,1,-12,6,-10,5,-4,-3,33,-2,1,-5,9,-5,15,-1,0,3,4,19,-2,-15,-9,-11,-7,3,5,-13,10,-7,0,0,1,-3,5,6,-8,0,1,-16,27,0,-7,-2,13,-5,10,2,-4,-6,8,33,-6,-2,-14,-4,-4,11,-2,11,-9,-8,-10,2,0,-5,0,2,-2,-5,0,-12,17,1,-8,-2,6,6,13,-1,-8,2,1,16,0,0,-4,-2,3,3,-7,15,-3,-1,-13,-1,-4,0,-4,6,-3,-2,-2,2,-3,1,2,-2,1,-2,24,-2,-2,0,-7,-2,1,-11,-3,-2,5,10,6,-8,5,2,-1,0,-9,-1,-12,8,-1,4,-21,-7,58,0,-3,2,-5,0,6,1,10,-2,1,-3,19,-17,-4,-11,-4,3,11,-8,10,-1,-3,2,-2,-2,1,7,-6,5,-4,-4,38,1,-8,2,-1,-1,2,9,0,1,4,-4,-2,1,-6,-7,-10,5,0,3,-6,-3,-9,9,-1,6,-1,-1,-10,0,-3,0,26,-1,5,3,-3,5,-5,-2,16,6,-2,-10,3,-1,-3,-2,5,5,-11,4,-17,-4,-4,14,-6,2,-11,-9,1,6,-3,-1,6,-1,0,11,2,-3,0,-9,17,2,-4,0,2,-16,3,8,-6,-11,3,-8,-1,9,-11,14,5,1,7,0,-11,-1,-2,4,6,0,-4,19,-8,12,-1,-6,7,-7,-6,1,46,-16,9,10,-2,-12,-13,-3,-5,5,-9,26,9,0,3,-1,-10,-4,2,12,4,-1,-7,18,-5,0,1,4,-4,2,-4,-13,27,-4,-1,10,1,-6,-7,-1,-3,18,0,26,2,3,-4,3,-3,1,-1,5,3,2,5,16,-1,4,0,-4,3,4,-4,-16,11,-6,-1,5,0,10,-4,-4,2,-1,-3,31,4,8,-3,-1,-3,-3,-7,2,-11,-8,1,15,0,2,4,0,8,-3,-1,7,2,-4,4,15,0,-17,-1,-5,-2,18,-4,20,-9,0,3,2,-8,-1,-3,-2,2,-12,-1,11,-4,5,-1,9,0,-6,-6,-3,37,-4,0,29,8,-19,-12,-5,-6,5,1,29,2,-3,6,-1,-4,0,7,-5,2,-6,-2,7,-6,2,1,15,0,-2,-2,2,30,-3,-3,18,6,-2,-20,-3,-6,2,0,18,-1,-1,2,-4,-3,0,1,-2,-2,-5,-1,-1,5,-2,0,9,4,-6,-8,13,13,-4,-8,3,1,12,-2,-3,-8,1,0,32,0,2,0,-7,-2,0,-5,-8,-8,-9,0,11,6,5,4,5,1,-5,-4,3,10}
+
+#define IP1_BIAS {-12,-69,42,27,70,-4,7,-15,4,-50}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/readme.txt b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/readme.txt
new file mode 100644
index 0000000..5a1284d
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/readme.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_nnexample_cifar10 for
+ Cortex-M4 and Cortex-M7.
+
+The example is configured for uVision Simulator.
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/Makefile b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/Makefile
new file mode 100644
index 0000000..dcba1ce
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/Makefile
@@ -0,0 +1,688 @@
+# This file was automagically generated by mbed.org. For more information,
+# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
+
+###############################################################################
+# Boiler-plate
+
+# cross-platform directory manipulation
+ifeq ($(shell echo $$OS),$$OS)
+ MAKEDIR = if not exist "$(1)" mkdir "$(1)"
+ RM = rmdir /S /Q "$(1)"
+else
+ MAKEDIR = '$(SHELL)' -c "mkdir -p \"$(1)\""
+ RM = '$(SHELL)' -c "rm -rf \"$(1)\""
+endif
+
+OBJDIR := BUILD
+# Move to the build directory
+ifeq (,$(filter $(OBJDIR),$(notdir $(CURDIR))))
+.SUFFIXES:
+mkfile_path := $(abspath $(lastword $(MAKEFILE_LIST)))
+MAKETARGET = '$(MAKE)' --no-print-directory -C $(OBJDIR) -f '$(mkfile_path)' \
+ 'SRCDIR=$(CURDIR)' $(MAKECMDGOALS)
+.PHONY: $(OBJDIR) clean
+all:
+ +@$(call MAKEDIR,$(OBJDIR))
+ +@$(MAKETARGET)
+$(OBJDIR): all
+Makefile : ;
+% :: $(OBJDIR) ; :
+clean :
+ $(call RM,$(OBJDIR))
+
+else
+
+# trick rules into thinking we are in the root, when we are in the bulid dir
+VPATH = ..
+
+# Boiler-plate
+###############################################################################
+# Project settings
+
+PROJECT := gru_example
+
+
+# Project settings
+###############################################################################
+# Objects and Paths
+
+
+OBJECTS +=./DSP/Source/TransformFunctions/arm_bitreversal2.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_q15.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_q31.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_rfft_fast_f32.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_f32.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_rfft_q15.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_radix4_q31.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_radix8_f32.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_dct4_init_q15.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_rfft_init_f32.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_dct4_q15.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_dct4_q31.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_rfft_init_q15.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_rfft_f32.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_rfft_q31.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_rfft_init_q31.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_dct4_init_f32.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_radix4_q15.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_radix2_q31.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_bitreversal.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_radix2_q15.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_radix4_f32.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_radix2_f32.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_dct4_f32.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_dct4_init_q31.o
+OBJECTS +=./DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.o
+OBJECTS +=./DSP/Source/FastMathFunctions/arm_sin_q15.o
+OBJECTS +=./DSP/Source/FastMathFunctions/arm_cos_q15.o
+OBJECTS +=./DSP/Source/FastMathFunctions/arm_sin_q31.o
+OBJECTS +=./DSP/Source/FastMathFunctions/arm_sin_f32.o
+OBJECTS +=./DSP/Source/FastMathFunctions/arm_cos_q31.o
+OBJECTS +=./DSP/Source/FastMathFunctions/arm_cos_f32.o
+OBJECTS +=./DSP/Source/FastMathFunctions/arm_sqrt_q15.o
+OBJECTS +=./DSP/Source/FastMathFunctions/arm_sqrt_q31.o
+OBJECTS +=./DSP/Source/CommonTables/arm_const_structs.o
+OBJECTS +=./DSP/Source/CommonTables/arm_common_tables.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_mult_q31.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_mult_f32.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_scale_q31.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_dot_prod_f32.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_abs_f32.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_add_f32.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_mult_q7.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_sub_q7.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_negate_f32.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_negate_q31.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_offset_f32.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_add_q15.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_dot_prod_q7.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_negate_q15.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_dot_prod_q15.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_scale_q7.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_offset_q7.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_add_q7.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_shift_q7.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_offset_q31.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_shift_q31.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_scale_q15.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_offset_q15.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_dot_prod_q31.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_add_q31.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_abs_q31.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_abs_q15.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_scale_f32.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_negate_q7.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_sub_f32.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_sub_q31.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_mult_q15.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_sub_q15.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_abs_q7.o
+OBJECTS +=./DSP/Source/BasicMathFunctions/arm_shift_q15.o
+OBJECTS +=./DSP/Source/ControllerFunctions/arm_pid_reset_q15.o
+OBJECTS +=./DSP/Source/ControllerFunctions/arm_sin_cos_q31.o
+OBJECTS +=./DSP/Source/ControllerFunctions/arm_pid_reset_f32.o
+OBJECTS +=./DSP/Source/ControllerFunctions/arm_pid_init_q31.o
+OBJECTS +=./DSP/Source/ControllerFunctions/arm_sin_cos_f32.o
+OBJECTS +=./DSP/Source/ControllerFunctions/arm_pid_init_f32.o
+OBJECTS +=./DSP/Source/ControllerFunctions/arm_pid_reset_q31.o
+OBJECTS +=./DSP/Source/ControllerFunctions/arm_pid_init_q15.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_q15_to_q31.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_float_to_q15.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_copy_q7.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_fill_q7.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_q31_to_q15.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_copy_q15.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_float_to_q31.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_q7_to_q31.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_float_to_q7.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_copy_f32.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_q7_to_float.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_fill_q15.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_fill_q31.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_q15_to_float.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_fill_f32.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_q7_to_q15.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_q31_to_q7.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_q31_to_float.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_q15_to_q7.o
+OBJECTS +=./DSP/Source/SupportFunctions/arm_copy_q31.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_sub_q31.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_scale_q15.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_trans_f32.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_scale_f32.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_trans_q15.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_add_q31.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_inverse_f32.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_init_f32.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_mult_q31.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_init_q31.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_init_q15.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_sub_f32.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_mult_q15.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_scale_q31.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_mult_f32.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_add_f32.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_trans_q31.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_sub_q15.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_add_q15.o
+OBJECTS +=./DSP/Source/MatrixFunctions/arm_mat_inverse_f64.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_q7.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_correlate_q7.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_fast_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_correlate_opt_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_lattice_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_lattice_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_correlate_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_fast_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_partial_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_fast_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_correlate_fast_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_sparse_q7.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_sparse_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_decimate_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_iir_lattice_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_lms_init_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_iir_lattice_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_lms_norm_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_q7.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_correlate_opt_q7.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_init_q7.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_decimate_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_lms_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_partial_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_lms_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_decimate_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_opt_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_correlate_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_fast_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_sparse_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_correlate_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_partial_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_init_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_lms_norm_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_lms_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_lms_norm_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_lms_init_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_init_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_lms_init_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_correlate_fast_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_iir_lattice_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_init_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_sparse_f32.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_partial_q7.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_lattice_q15.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.o
+OBJECTS +=./DSP/Source/FilteringFunctions/arm_conv_opt_q7.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.o
+OBJECTS +=./DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_min_f32.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_mean_q31.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_mean_q7.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_power_q31.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_rms_f32.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_rms_q15.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_power_q7.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_min_q31.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_std_f32.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_max_q31.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_max_q15.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_mean_q15.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_std_q31.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_mean_f32.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_var_f32.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_min_q15.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_std_q15.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_rms_q31.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_power_q15.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_var_q15.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_var_q31.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_max_q7.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_power_f32.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_max_f32.o
+OBJECTS +=./DSP/Source/StatisticsFunctions/arm_min_q7.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_convolve_HWC_q15_basic.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_convolve_HWC_q15_fast.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_convolve_HWC_q7_basic.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_convolve_HWC_q7_fast.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_convolve_HWC_q7_RGB.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_depthwise_separable_conv_HWC_q7.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_fully_connected_q15.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_fully_connected_q15_opt.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_fully_connected_q7.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_fully_connected_q7_opt.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_fully_connected_mat_q7_vec_q15.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_fully_connected_mat_q7_vec_q15_opt.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_nn_mat_mult_kernel_q7_q15.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_nntables.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_pool_q7_HWC.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_q7_to_q15_no_shift.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_q7_to_q15_reordered_no_shift.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_relu_q15.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_relu_q7.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_sigmoid.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_softmax.o
+OBJECTS +=./DSP/Source/NNFunctions/arm_tanh.o
+
+
+
+OBJECTS += ./main.o
+
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_flash_ramfunc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/PeripheralPins.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/analogin_api.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/analogout_api.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/can_api.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/gpio_api.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/gpio_irq_api.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/gpio_irq_device.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/hal_init_pre.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/hal_tick_16b.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/hal_tick_32b.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/i2c_api.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/lp_ticker.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/mbed_board.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/mbed_overrides.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/mbed_retarget.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/mbed_sdk_boot.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/pinmap.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/port_api.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/pwmout_api.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/pwmout_device.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/rtc_api.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/serial_api.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/serial_device.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/sleep.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/spi_api.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/startup_stm32f411xe.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_adc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_adc_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_can.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_cec.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_cortex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_crc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_cryp.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_cryp_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_dac.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_dac_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_dcmi.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_dcmi_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_dfsdm.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_dma.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_dma2d.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_dma_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_dsi.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_eth.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_flash.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_flash_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_fmpi2c_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_fmpi2c.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_lptim.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_gpio.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_msp_template.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_hash.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_hash_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_hcd.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_i2c.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_i2c_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_i2s.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_i2s_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_irda.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_iwdg.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_lptim.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_ltdc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_ltdc_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_mmc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_smartcard.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_nand.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_nor.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_pccard.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_pcd.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_pcd_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_pwr.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_pwr_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_qspi.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_rcc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_rcc_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_rng.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_rtc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_rtc_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_sai.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_sai_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_sd.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_sdram.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_spdifrx.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_spi.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_sram.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_tim.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_tim_ex.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_uart.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_usart.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_hal_wwdg.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_adc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_crc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_dac.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_dma.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_dma2d.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_exti.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_fmc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_fsmc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_gpio.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_i2c.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_pwr.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_rcc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_rng.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_rtc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_sdmmc.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_spi.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_tim.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_usart.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_usb.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm32f4xx_ll_utils.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/stm_spi_api.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/system_stm32f4xx.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/trng_api.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/us_ticker_16b.o
+ SYS_OBJECTS += ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/us_ticker_32b.o
+
+INCLUDE_PATHS += -I../DSP/Include
+INCLUDE_PATHS += -I../../../../../../Core/Include/
+
+INCLUDE_PATHS += -I../
+INCLUDE_PATHS += -I../..
+INCLUDE_PATHS += -I../mbed/.
+INCLUDE_PATHS += -I../mbed/TARGET_NUCLEO_F411RE
+INCLUDE_PATHS += -I../mbed/TARGET_NUCLEO_F411RE/TARGET_STM
+INCLUDE_PATHS += -I../mbed/TARGET_NUCLEO_F411RE/TARGET_STM/TARGET_STM32F4
+INCLUDE_PATHS += -I../mbed/TARGET_NUCLEO_F411RE/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE
+INCLUDE_PATHS += -I../mbed/TARGET_NUCLEO_F411RE/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE
+INCLUDE_PATHS += -I../mbed/TARGET_NUCLEO_F411RE/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device
+INCLUDE_PATHS += -I../mbed/TARGET_NUCLEO_F411RE/TARGET_STM/TARGET_STM32F4/device
+INCLUDE_PATHS += -I../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM
+INCLUDE_PATHS += -I../mbed/drivers
+INCLUDE_PATHS += -I../mbed/hal
+INCLUDE_PATHS += -I../mbed/platform
+
+
+
+LIBRARY_PATHS := -L../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM
+LIBRARIES := -l:libmbed.a
+LINKER_SCRIPT ?= ../mbed/TARGET_NUCLEO_F411RE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld
+
+# Objects and Paths
+###############################################################################
+# Tools and Flags
+
+AS = 'arm-none-eabi-gcc' '-x' 'assembler-with-cpp' '-c' '-Wall' '-Wextra' '-Wno-unused-parameter' '-Wno-missing-field-initializers' '-fmessage-length=0' '-fno-exceptions' '-fno-builtin' '-ffunction-sections' '-fdata-sections' '-funsigned-char' '-MMD' '-fno-delete-null-pointer-checks' '-fomit-frame-pointer' '-O3' '-mcpu=cortex-m4' '-mthumb' '-mfpu=fpv4-sp-d16' '-mfloat-abi=softfp'
+CC = 'arm-none-eabi-gcc' '-std=gnu99' '-c' '-Wall' '-Wextra' '-Wno-unused-parameter' '-Wno-missing-field-initializers' '-fmessage-length=0' '-fno-exceptions' '-fno-builtin' '-ffunction-sections' '-fdata-sections' '-funsigned-char' '-MMD' '-fno-delete-null-pointer-checks' '-fomit-frame-pointer' '-O3' '-mcpu=cortex-m4' '-mthumb' '-mfpu=fpv4-sp-d16' '-mfloat-abi=softfp'
+CPP = 'arm-none-eabi-g++' '-std=gnu++98' '-fno-rtti' '-Wvla' '-c' '-Wall' '-Wextra' '-Wno-unused-parameter' '-Wno-missing-field-initializers' '-fmessage-length=0' '-fno-exceptions' '-fno-builtin' '-ffunction-sections' '-fdata-sections' '-funsigned-char' '-MMD' '-fno-delete-null-pointer-checks' '-fomit-frame-pointer' '-O3' '-mcpu=cortex-m4' '-mthumb' '-mfpu=fpv4-sp-d16' '-mfloat-abi=softfp'
+LD = 'arm-none-eabi-gcc'
+ELF2BIN = 'arm-none-eabi-objcopy'
+PREPROC = 'arm-none-eabi-cpp' '-E' '-P' '-Wl,--gc-sections' '-Wl,--wrap,main' '-Wl,--wrap,__malloc_r' '-Wl,--wrap,__free_r' '-Wl,--wrap,__realloc_r' '-Wl,--wrap,_calloc_r' '-Wl,--wrap,exit' '-Wl,--wrap,atexit' '-mcpu=cortex-m4' '-mthumb' '-mfpu=fpv4-sp-d16' '-mfloat-abi=softfp'
+
+
+C_FLAGS += -std=gnu99
+C_FLAGS += -D__MBED__=1
+C_FLAGS += -DDEVICE_I2CSLAVE=1
+C_FLAGS += -DTARGET_LIKE_MBED
+C_FLAGS += -DDEVICE_PORTOUT=1
+C_FLAGS += -DUSBHOST_OTHER
+C_FLAGS += -DDEVICE_PORTINOUT=1
+C_FLAGS += -DTARGET_RTOS_M4_M7
+C_FLAGS += -DDEVICE_LOWPOWERTIMER=1
+C_FLAGS += -DDEVICE_RTC=1
+C_FLAGS += -DTOOLCHAIN_object
+C_FLAGS += -DDEVICE_SERIAL_ASYNCH=1
+C_FLAGS += -DTARGET_STM32F4
+C_FLAGS += -D__CMSIS_RTOS
+C_FLAGS += -D__CORTEX_M4
+C_FLAGS += -DTOOLCHAIN_GCC
+C_FLAGS += -DDEVICE_I2C_ASYNCH=1
+C_FLAGS += -DTARGET_CORTEX_M
+C_FLAGS += -DTARGET_LIKE_CORTEX_M4
+C_FLAGS += -DTARGET_M4
+C_FLAGS += -DTARGET_UVISOR_UNSUPPORTED
+C_FLAGS += -DDEVICE_SPI_ASYNCH=1
+C_FLAGS += -DTARGET_STM32F411xE
+C_FLAGS += -DDEVICE_SERIAL=1
+C_FLAGS += -DDEVICE_INTERRUPTIN=1
+C_FLAGS += -DDEVICE_I2C=1
+C_FLAGS += -DTRANSACTION_QUEUE_SIZE_SPI=2
+C_FLAGS += -DTARGET_NUCLEO_F411RE
+C_FLAGS += -DDEVICE_STDIO_MESSAGES=1
+C_FLAGS += -DTARGET_FF_MORPHO
+C_FLAGS += -D__FPU_PRESENT=1
+C_FLAGS += -DMBED_BUILD_TIMESTAMP=1498862186.21
+C_FLAGS += -DTARGET_FF_ARDUINO
+C_FLAGS += -DDEVICE_PORTIN=1
+C_FLAGS += -DTARGET_RELEASE
+C_FLAGS += -DTARGET_STM
+C_FLAGS += -DDEVICE_SERIAL_FC=1
+C_FLAGS += -D__MBED_CMSIS_RTOS_CM
+C_FLAGS += -DDEVICE_SLEEP=1
+C_FLAGS += -DTOOLCHAIN_GCC_ARM
+C_FLAGS += -DDEVICE_SPI=1
+C_FLAGS += -DUSB_STM_HAL
+C_FLAGS += -DDEVICE_ERROR_RED=1
+C_FLAGS += -DDEVICE_SPISLAVE=1
+C_FLAGS += -DDEVICE_ANALOGIN=1
+C_FLAGS += -DDEVICE_PWMOUT=1
+C_FLAGS += -DTARGET_STM32F411RE
+C_FLAGS += -DARM_MATH_CM4
+C_FLAGS += -include
+C_FLAGS += mbed_config.h
+C_FLAGS += -DMBED
+
+CXX_FLAGS += -std=gnu++98
+CXX_FLAGS += -fno-rtti
+CXX_FLAGS += -Wvla
+CXX_FLAGS += -D__MBED__=1
+CXX_FLAGS += -DDEVICE_I2CSLAVE=1
+CXX_FLAGS += -DTARGET_LIKE_MBED
+CXX_FLAGS += -DDEVICE_PORTOUT=1
+CXX_FLAGS += -DUSBHOST_OTHER
+CXX_FLAGS += -DDEVICE_PORTINOUT=1
+CXX_FLAGS += -DTARGET_RTOS_M4_M7
+CXX_FLAGS += -DDEVICE_LOWPOWERTIMER=1
+CXX_FLAGS += -DDEVICE_RTC=1
+CXX_FLAGS += -DTOOLCHAIN_object
+CXX_FLAGS += -DDEVICE_SERIAL_ASYNCH=1
+CXX_FLAGS += -DTARGET_STM32F4
+CXX_FLAGS += -D__CMSIS_RTOS
+CXX_FLAGS += -D__CORTEX_M4
+CXX_FLAGS += -DTOOLCHAIN_GCC
+CXX_FLAGS += -DDEVICE_I2C_ASYNCH=1
+CXX_FLAGS += -DTARGET_CORTEX_M
+CXX_FLAGS += -DTARGET_LIKE_CORTEX_M4
+CXX_FLAGS += -DTARGET_M4
+CXX_FLAGS += -DTARGET_UVISOR_UNSUPPORTED
+CXX_FLAGS += -DDEVICE_SPI_ASYNCH=1
+CXX_FLAGS += -DTARGET_STM32F411xE
+CXX_FLAGS += -DDEVICE_SERIAL=1
+CXX_FLAGS += -DDEVICE_INTERRUPTIN=1
+CXX_FLAGS += -DDEVICE_I2C=1
+CXX_FLAGS += -DTRANSACTION_QUEUE_SIZE_SPI=2
+CXX_FLAGS += -DTARGET_NUCLEO_F411RE
+CXX_FLAGS += -DDEVICE_STDIO_MESSAGES=1
+CXX_FLAGS += -DTARGET_FF_MORPHO
+CXX_FLAGS += -D__FPU_PRESENT=1
+CXX_FLAGS += -DMBED_BUILD_TIMESTAMP=1498862186.21
+CXX_FLAGS += -DTARGET_FF_ARDUINO
+CXX_FLAGS += -DDEVICE_PORTIN=1
+CXX_FLAGS += -DTARGET_RELEASE
+CXX_FLAGS += -DTARGET_STM
+CXX_FLAGS += -DDEVICE_SERIAL_FC=1
+CXX_FLAGS += -D__MBED_CMSIS_RTOS_CM
+CXX_FLAGS += -DDEVICE_SLEEP=1
+CXX_FLAGS += -DTOOLCHAIN_GCC_ARM
+CXX_FLAGS += -DDEVICE_SPI=1
+CXX_FLAGS += -DUSB_STM_HAL
+CXX_FLAGS += -DDEVICE_ERROR_RED=1
+CXX_FLAGS += -DDEVICE_SPISLAVE=1
+CXX_FLAGS += -DDEVICE_ANALOGIN=1
+CXX_FLAGS += -DDEVICE_PWMOUT=1
+CXX_FLAGS += -DTARGET_STM32F411RE
+CXX_FLAGS += -DARM_MATH_CM4
+CXX_FLAGS += -include
+CXX_FLAGS += mbed_config.h
+CXX_FLAGS += -DMBED
+
+ASM_FLAGS += -x
+ASM_FLAGS += assembler-with-cpp
+ASM_FLAGS += -DTRANSACTION_QUEUE_SIZE_SPI=2
+ASM_FLAGS += -D__CORTEX_M4
+ASM_FLAGS += -DUSB_STM_HAL
+ASM_FLAGS += -DARM_MATH_CM4
+ASM_FLAGS += -D__FPU_PRESENT=1
+ASM_FLAGS += -DUSBHOST_OTHER
+ASM_FLAGS += -D__MBED_CMSIS_RTOS_CM
+ASM_FLAGS += -D__CMSIS_RTOS
+
+
+LD_FLAGS :=-Wl,--gc-sections -Wl,--wrap,main -Wl,--wrap,__malloc_r -Wl,--wrap,__free_r -Wl,--wrap,__realloc_r -Wl,--wrap,__calloc_r -Wl,--wrap,exit -Wl,--wrap,atexit -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp
+LD_SYS_LIBS :=-Wl,--start-group -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys -Wl,--end-group
+
+# Tools and Flags
+###############################################################################
+# Rules
+
+.PHONY: all lst size
+
+
+all: $(PROJECT).bin $(PROJECT).hex size
+
+
+.asm.o:
+ +@$(call MAKEDIR,$(dir $@))
+ +@echo "Assemble: $(notdir $<)"
+ @$(AS) -c $(ASM_FLAGS) $(INCLUDE_PATHS) -o $@ $<
+
+.s.o:
+ +@$(call MAKEDIR,$(dir $@))
+ +@echo "Assemble: $(notdir $<)"
+ @$(AS) -c $(ASM_FLAGS) $(INCLUDE_PATHS) -o $@ $<
+
+.S.o:
+ +@$(call MAKEDIR,$(dir $@))
+ +@echo "Assemble: $(notdir $<)"
+ @$(AS) -c $(ASM_FLAGS) $(INCLUDE_PATHS) -o $@ $<
+
+.c.o:
+ +@$(call MAKEDIR,$(dir $@))
+ +@echo "Compile: $(notdir $<)"
+ @$(CC) $(C_FLAGS) $(INCLUDE_PATHS) -o $@ $<
+
+.cpp.o:
+ +@$(call MAKEDIR,$(dir $@))
+ +@echo "Compile: $(notdir $<)"
+ @$(CPP) $(CXX_FLAGS) $(INCLUDE_PATHS) -o $@ $<
+
+
+$(PROJECT).link_script.ld: $(LINKER_SCRIPT)
+ @$(PREPROC) $< -o $@
+
+
+
+$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS) $(PROJECT).link_script.ld
+ +@echo "link: $(notdir $@)"
+ @$(LD) $(LD_FLAGS) -T $(filter %.ld, $^) $(LIBRARY_PATHS) --output $@ $(filter %.o, $^) $(LIBRARIES) $(LD_SYS_LIBS)
+
+
+$(PROJECT).bin: $(PROJECT).elf
+ $(ELF2BIN) -O binary $< $@
+ +@echo "===== bin file ready to flash: $(OBJDIR)/$@ ====="
+
+$(PROJECT).hex: $(PROJECT).elf
+ $(ELF2BIN) -O ihex $< $@
+
+
+# Rules
+###############################################################################
+# Dependencies
+
+DEPS = $(OBJECTS:.o=.d) $(SYS_OBJECTS:.o=.d)
+-include $(DEPS)
+endif
+
+# Dependencies
+###############################################################################
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/startup_ARMCM0.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..9fc447d
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,242 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM0.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM0 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000C00
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/system_ARMCM0.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66829ad
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file system_ARMCM0.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM0 Device Series
+ * @version V5.00
+ * @date 08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000U) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/startup_ARMCM3.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..16e56b0
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM3.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM3 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000C00
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/system_ARMCM3.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f08df7a
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file system_ARMCM3.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM3 Device Series
+ * @version V5.00
+ * @date 08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000U) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4/startup_ARMCM4.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4/startup_ARMCM4.s
new file mode 100644
index 0000000..dae6439
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4/startup_ARMCM4.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM4.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM4 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000C00
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4/system_ARMCM4.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4/system_ARMCM4.c
new file mode 100644
index 0000000..af23005
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file system_ARMCM4.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM4 Device Series
+ * @version V5.00
+ * @date 07. September 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+ #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+ #include "ARMCM4_FP.h"
+#else
+ #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000UL) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5U * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+ extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+ SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+ SCB->CPACR |= ((3U << 10U*2U) | /* set CP10 Full Access */
+ (3U << 11U*2U) ); /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+ SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..dae6439
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM4.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM4 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000C00
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..070fa1e
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file system_ARMCM4.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM4 Device Series
+ * @version V5.00
+ * @date 08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+ #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+ #include "ARMCM4_FP.h"
+#else
+ #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000U) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3U << 10*2) | /* set CP10 Full Access */
+ (3U << 11*2) ); /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+ SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/gcc_arm.ld b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/gcc_arm.ld
new file mode 100644
index 0000000..b987fd1
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/gcc_arm.ld
@@ -0,0 +1,196 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K
+ RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ * Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ * __exidx_start
+ * __exidx_end
+ * __copy_table_start__
+ * __copy_table_end__
+ * __zero_table_start__
+ * __zero_table_end__
+ * __etext
+ * __data_start__
+ * __preinit_array_start
+ * __preinit_array_end
+ * __init_array_start
+ * __init_array_end
+ * __fini_array_start
+ * __fini_array_end
+ * __data_end__
+ * __bss_start__
+ * __bss_end__
+ * __end__
+ * end
+ * __HeapBase
+ * __HeapLimit
+ * __StackLimit
+ * __StackTop
+ * __stack
+ * __Vectors_End
+ * __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.vectors))
+ __Vectors_End = .;
+ __Vectors_Size = __Vectors_End - __Vectors;
+ __end__ = .;
+
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ /* To copy multiple ROM to RAM sections,
+ * uncomment .copy.table section and,
+ * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .copy.table :
+ {
+ . = ALIGN(4);
+ __copy_table_start__ = .;
+ LONG (__etext)
+ LONG (__data_start__)
+ LONG (__data_end__ - __data_start__)
+ LONG (__etext2)
+ LONG (__data2_start__)
+ LONG (__data2_end__ - __data2_start__)
+ __copy_table_end__ = .;
+ } > FLASH
+ */
+
+ /* To clear multiple BSS sections,
+ * uncomment .zero.table section and,
+ * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .zero.table :
+ {
+ . = ALIGN(4);
+ __zero_table_start__ = .;
+ LONG (__bss_start__)
+ LONG (__bss_end__ - __bss_start__)
+ LONG (__bss2_start__)
+ LONG (__bss2_end__ - __bss2_start__)
+ __zero_table_end__ = .;
+ } > FLASH
+ */
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ end = __end__;
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
new file mode 100644
index 0000000..26edb9f
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
@@ -0,0 +1,295 @@
+/**************************************************************************//**
+ * @file startup_ARMCM7.s
+ * @brief CMSIS Core Device Startup File for
+ * ARMCM7 Device Series
+ * @version V5.00
+ * @date 26. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdint.h>
+
+
+/*----------------------------------------------------------------------------
+ Linker generated Symbols
+ *----------------------------------------------------------------------------*/
+extern uint32_t __etext;
+extern uint32_t __data_start__;
+extern uint32_t __data_end__;
+extern uint32_t __copy_table_start__;
+extern uint32_t __copy_table_end__;
+extern uint32_t __zero_table_start__;
+extern uint32_t __zero_table_end__;
+extern uint32_t __bss_start__;
+extern uint32_t __bss_end__;
+extern uint32_t __StackTop;
+
+/*----------------------------------------------------------------------------
+ Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+
+/*----------------------------------------------------------------------------
+ External References
+ *----------------------------------------------------------------------------*/
+#ifndef __START
+extern void _start(void) __attribute__((noreturn)); /* PreeMain (C library entry point) */
+#else
+extern int __START(void) __attribute__((noreturn)); /* main entry point */
+#endif
+
+#ifndef __NO_SYSTEM_INIT
+extern void SystemInit (void); /* CMSIS System Initialization */
+#endif
+
+
+/*----------------------------------------------------------------------------
+ Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void); /* Default empty handler */
+void Reset_Handler(void); /* Reset Handler */
+
+
+/*----------------------------------------------------------------------------
+ User Initial Stack & Heap
+ *----------------------------------------------------------------------------*/
+#ifndef __STACK_SIZE
+ #define __STACK_SIZE 0x00000400
+#endif
+static uint8_t stack[__STACK_SIZE] __attribute__ ((aligned(8), used, section(".stack")));
+
+#ifndef __HEAP_SIZE
+ #define __HEAP_SIZE 0x00000C00
+#endif
+#if __HEAP_SIZE > 0
+static uint8_t heap[__HEAP_SIZE] __attribute__ ((aligned(8), used, section(".heap")));
+#endif
+
+
+/*----------------------------------------------------------------------------
+ Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Cortex-M7 Processor Exceptions */
+void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+/* ARMCM7 Specific Interrupts */
+void WDT_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIM0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIM2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void MCIA_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void MCIB_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART4_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void AACI_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void ENET_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBDC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBHC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CHLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void FLEXRAY_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CAN_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void LIN_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void I2C_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CPU_CLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPI_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+ Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+const pFunc __Vectors[] __attribute__ ((section(".vectors"))) = {
+ /* Cortex-M7 Exceptions Handler */
+ (pFunc)((uint32_t)&__StackTop), /* Initial Stack Pointer */
+ Reset_Handler, /* Reset Handler */
+ NMI_Handler, /* NMI Handler */
+ HardFault_Handler, /* Hard Fault Handler */
+ MemManage_Handler, /* MPU Fault Handler */
+ BusFault_Handler, /* Bus Fault Handler */
+ UsageFault_Handler, /* Usage Fault Handler */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ SVC_Handler, /* SVCall Handler */
+ DebugMon_Handler, /* Debug Monitor Handler */
+ 0, /* Reserved */
+ PendSV_Handler, /* PendSV Handler */
+ SysTick_Handler, /* SysTick Handler */
+
+ /* External interrupts */
+ WDT_IRQHandler, /* 0: Watchdog Timer */
+ RTC_IRQHandler, /* 1: Real Time Clock */
+ TIM0_IRQHandler, /* 2: Timer0 / Timer1 */
+ TIM2_IRQHandler, /* 3: Timer2 / Timer3 */
+ MCIA_IRQHandler, /* 4: MCIa */
+ MCIB_IRQHandler, /* 5: MCIb */
+ UART0_IRQHandler, /* 6: UART0 - DUT FPGA */
+ UART1_IRQHandler, /* 7: UART1 - DUT FPGA */
+ UART2_IRQHandler, /* 8: UART2 - DUT FPGA */
+ UART4_IRQHandler, /* 9: UART4 - not connected */
+ AACI_IRQHandler, /* 10: AACI / AC97 */
+ CLCD_IRQHandler, /* 11: CLCD Combined Interrupt */
+ ENET_IRQHandler, /* 12: Ethernet */
+ USBDC_IRQHandler, /* 13: USB Device */
+ USBHC_IRQHandler, /* 14: USB Host Controller */
+ CHLCD_IRQHandler, /* 15: Character LCD */
+ FLEXRAY_IRQHandler, /* 16: Flexray */
+ CAN_IRQHandler, /* 17: CAN */
+ LIN_IRQHandler, /* 18: LIN */
+ I2C_IRQHandler, /* 19: I2C ADC/DAC */
+ 0, /* 20: Reserved */
+ 0, /* 21: Reserved */
+ 0, /* 22: Reserved */
+ 0, /* 23: Reserved */
+ 0, /* 24: Reserved */
+ 0, /* 25: Reserved */
+ 0, /* 26: Reserved */
+ 0, /* 27: Reserved */
+ CPU_CLCD_IRQHandler, /* 28: Reserved - CPU FPGA CLCD */
+ 0, /* 29: Reserved - CPU FPGA */
+ UART3_IRQHandler, /* 30: UART3 - CPU FPGA */
+ SPI_IRQHandler /* 31: SPI Touchscreen - CPU FPGA */
+};
+
+
+/*----------------------------------------------------------------------------
+ Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void) {
+ uint32_t *pSrc, *pDest;
+ uint32_t *pTable __attribute__((unused));
+
+/* Firstly it copies data from read only memory to RAM. There are two schemes
+ * to copy. One can copy more than one sections. Another can only copy
+ * one section. The former scheme needs more instructions and read-only
+ * data to implement than the latter.
+ * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */
+
+#ifdef __STARTUP_COPY_MULTIPLE
+/* Multiple sections scheme.
+ *
+ * Between symbol address __copy_table_start__ and __copy_table_end__,
+ * there are array of triplets, each of which specify:
+ * offset 0: LMA of start of a section to copy from
+ * offset 4: VMA of start of a section to copy to
+ * offset 8: size of the section to copy. Must be multiply of 4
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+ pTable = &__copy_table_start__;
+
+ for (; pTable < &__copy_table_end__; pTable = pTable + 3) {
+ pSrc = (uint32_t*)*(pTable + 0);
+ pDest = (uint32_t*)*(pTable + 1);
+ for (; pDest < (uint32_t*)(*(pTable + 1) + *(pTable + 2)) ; ) {
+ *pDest++ = *pSrc++;
+ }
+ }
+#else
+/* Single section scheme.
+ *
+ * The ranges of copy from/to are specified by following symbols
+ * __etext: LMA of start of the section to copy from. Usually end of text
+ * __data_start__: VMA of start of the section to copy to
+ * __data_end__: VMA of end of the section to copy to
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+ pSrc = &__etext;
+ pDest = &__data_start__;
+
+ for ( ; pDest < &__data_end__ ; ) {
+ *pDest++ = *pSrc++;
+ }
+#endif /*__STARTUP_COPY_MULTIPLE */
+
+/* This part of work usually is done in C library startup code. Otherwise,
+ * define this macro to enable it in this startup.
+ *
+ * There are two schemes too. One can clear multiple BSS sections. Another
+ * can only clear one section. The former is more size expensive than the
+ * latter.
+ *
+ * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
+ * Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
+ */
+#ifdef __STARTUP_CLEAR_BSS_MULTIPLE
+/* Multiple sections scheme.
+ *
+ * Between symbol address __copy_table_start__ and __copy_table_end__,
+ * there are array of tuples specifying:
+ * offset 0: Start of a BSS section
+ * offset 4: Size of this BSS section. Must be multiply of 4
+ */
+ pTable = &__zero_table_start__;
+
+ for (; pTable < &__zero_table_end__; pTable = pTable + 2) {
+ pDest = (uint32_t*)*(pTable + 0);
+ for (; pDest < (uint32_t*)(*(pTable + 0) + *(pTable + 1)) ; ) {
+ *pDest++ = 0;
+ }
+ }
+#elif defined (__STARTUP_CLEAR_BSS)
+/* Single BSS section scheme.
+ *
+ * The BSS section is specified by following symbols
+ * __bss_start__: start of the BSS section.
+ * __bss_end__: end of the BSS section.
+ *
+ * Both addresses must be aligned to 4 bytes boundary.
+ */
+ pDest = &__bss_start__;
+
+ for ( ; pDest < &__bss_end__ ; ) {
+ *pDest++ = 0UL;
+ }
+#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
+
+#ifndef __NO_SYSTEM_INIT
+ SystemInit();
+#endif
+
+#ifndef __START
+#define __START _start
+#endif
+ __START();
+
+}
+
+
+/*----------------------------------------------------------------------------
+ Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) {
+
+ while(1);
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..b69f038
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM7.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM7 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000C00
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..65bfaca
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file system_ARMCM7.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM7 Device Series
+ * @version V5.00
+ * @date 08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+ #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+ #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+ #include "ARMCM7_DP.h"
+#else
+ #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000U) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3U << 10*2) | /* set CP10 Full Access */
+ (3U << 11*2) ); /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+ SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/STM32F411RETx/startup_stm32f411xe.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/STM32F411RETx/startup_stm32f411xe.s
new file mode 100644
index 0000000..9b70614
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/STM32F411RETx/startup_stm32f411xe.s
@@ -0,0 +1,395 @@
+;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
+;* File Name : startup_stm32f411xe.s
+;* Author : MCD Application Team
+;* Version : V2.6.0
+;* Date : 04-November-2016
+;* Description : STM32F411xExx devices vector table for MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the CortexM4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>
+;*******************************************************************************
+;
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;* 1. Redistributions of source code must retain the above copyright notice,
+;* this list of conditions and the following disclaimer.
+;* 2. Redistributions in binary form must reproduce the above copyright notice,
+;* this list of conditions and the following disclaimer in the documentation
+;* and/or other materials provided with the distribution.
+;* 3. Neither the name of STMicroelectronics nor the names of its contributors
+;* may be used to endorse or promote products derived from this software
+;* without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;
+;*******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_IRQHandler ; PVD through EXTI Line detection
+ DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
+ DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
+ DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
+ DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
+ DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
+ DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
+ DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
+ DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
+ DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
+ DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD 0 ; Reserved
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]s
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
+ DCD 0 ; Reserved
+ DCD SDIO_IRQHandler ; SDIO
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
+ DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
+ DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
+ DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
+ DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD OTG_FS_IRQHandler ; USB OTG FS
+ DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
+ DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
+ DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
+ DCD USART6_IRQHandler ; USART6
+ DCD I2C3_EV_IRQHandler ; I2C3 event
+ DCD I2C3_ER_IRQHandler ; I2C3 error
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD FPU_IRQHandler ; FPU
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SPI4_IRQHandler ; SPI4
+ DCD SPI5_IRQHandler ; SPI5
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_IRQHandler [WEAK]
+ EXPORT TAMP_STAMP_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Stream0_IRQHandler [WEAK]
+ EXPORT DMA1_Stream1_IRQHandler [WEAK]
+ EXPORT DMA1_Stream2_IRQHandler [WEAK]
+ EXPORT DMA1_Stream3_IRQHandler [WEAK]
+ EXPORT DMA1_Stream4_IRQHandler [WEAK]
+ EXPORT DMA1_Stream5_IRQHandler [WEAK]
+ EXPORT DMA1_Stream6_IRQHandler [WEAK]
+ EXPORT ADC_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
+ EXPORT DMA1_Stream7_IRQHandler [WEAK]
+ EXPORT SDIO_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT DMA2_Stream0_IRQHandler [WEAK]
+ EXPORT DMA2_Stream1_IRQHandler [WEAK]
+ EXPORT DMA2_Stream2_IRQHandler [WEAK]
+ EXPORT DMA2_Stream3_IRQHandler [WEAK]
+ EXPORT DMA2_Stream4_IRQHandler [WEAK]
+ EXPORT OTG_FS_IRQHandler [WEAK]
+ EXPORT DMA2_Stream5_IRQHandler [WEAK]
+ EXPORT DMA2_Stream6_IRQHandler [WEAK]
+ EXPORT DMA2_Stream7_IRQHandler [WEAK]
+ EXPORT USART6_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT SPI5_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_IRQHandler
+TAMP_STAMP_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Stream0_IRQHandler
+DMA1_Stream1_IRQHandler
+DMA1_Stream2_IRQHandler
+DMA1_Stream3_IRQHandler
+DMA1_Stream4_IRQHandler
+DMA1_Stream5_IRQHandler
+DMA1_Stream6_IRQHandler
+ADC_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM9_IRQHandler
+TIM1_UP_TIM10_IRQHandler
+TIM1_TRG_COM_TIM11_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+OTG_FS_WKUP_IRQHandler
+DMA1_Stream7_IRQHandler
+SDIO_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+DMA2_Stream0_IRQHandler
+DMA2_Stream1_IRQHandler
+DMA2_Stream2_IRQHandler
+DMA2_Stream3_IRQHandler
+DMA2_Stream4_IRQHandler
+OTG_FS_IRQHandler
+DMA2_Stream5_IRQHandler
+DMA2_Stream6_IRQHandler
+DMA2_Stream7_IRQHandler
+USART6_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+FPU_IRQHandler
+SPI4_IRQHandler
+SPI5_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/STM32F411RETx/system_stm32f4xx.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/STM32F411RETx/system_stm32f4xx.c
new file mode 100644
index 0000000..bca0633
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/STM32F411RETx/system_stm32f4xx.c
@@ -0,0 +1,763 @@
+/**
+ ******************************************************************************
+ * @file system_stm32f4xx.c
+ * @author MCD Application Team
+ * @version V2.6.0
+ * @date 04-November-2016
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32f4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32f4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Includes
+ * @{
+ */
+
+
+#include "stm32f4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+ || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+/* #define DATA_IN_ExtSRAM */
+#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
+ STM32F412Zx || STM32F412Vx */
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+/* #define DATA_IN_ExtSDRAM */
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
+ STM32F479xx */
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Variables
+ * @{
+ */
+ /* This variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+uint32_t SystemCoreClock = 16000000;
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+ static void SystemInit_ExtMemCtl(void);
+#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system
+ * Initialize the FPU setting, vector table location and External memory
+ * configuration.
+ * @param None
+ * @retval None
+ */
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
+ #endif
+ /* Reset the RCC clock configuration to the default reset state ------------*/
+ /* Set HSION bit */
+ RCC->CR |= (uint32_t)0x00000001;
+
+ /* Reset CFGR register */
+ RCC->CFGR = 0x00000000;
+
+ /* Reset HSEON, CSSON and PLLON bits */
+ RCC->CR &= (uint32_t)0xFEF6FFFF;
+
+ /* Reset PLLCFGR register */
+ RCC->PLLCFGR = 0x24003010;
+
+ /* Reset HSEBYP bit */
+ RCC->CR &= (uint32_t)0xFFFBFFFF;
+
+ /* Disable all interrupts */
+ RCC->CIR = 0x00000000;
+
+#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+ SystemInit_ExtMemCtl();
+#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
+ * depends on the application requirements), user has to ensure that HSE_VALUE
+ * is same as the real frequency of the crystal used. Otherwise, this function
+ * may have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+ switch (tmp)
+ {
+ case 0x00: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+ case 0x04: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+ case 0x08: /* PLL used as system clock source */
+
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+ SYSCLK = PLL_VCO / PLL_P
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+
+ if (pllsource != 0)
+ {
+ /* HSE used as PLL clock source */
+ pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+ }
+ else
+ {
+ /* HSI used as PLL clock source */
+ pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+ }
+
+ pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+ SystemCoreClock = pllvco/pllp;
+ break;
+ default:
+ SystemCoreClock = HSI_VALUE;
+ break;
+ }
+ /* Compute HCLK frequency --------------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK frequency */
+ SystemCoreClock >>= tmp;
+}
+
+#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx)
+/**
+ * @brief Setup the external memory controller.
+ * Called in startup_stm32f4xx.s before jump to main.
+ * This function configures the external memories (SRAM/SDRAM)
+ * This SRAM/SDRAM will be used as program data memory (including heap and stack).
+ * @param None
+ * @retval None
+ */
+void SystemInit_ExtMemCtl(void)
+{
+ __IO uint32_t tmp = 0x00;
+
+ register uint32_t tmpreg = 0, timeout = 0xFFFF;
+ register __IO uint32_t index;
+
+ /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
+ RCC->AHB1ENR |= 0x000001F8;
+
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
+
+ /* Connect PDx pins to FMC Alternate function */
+ GPIOD->AFR[0] = 0x00CCC0CC;
+ GPIOD->AFR[1] = 0xCCCCCCCC;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOD->MODER = 0xAAAA0A8A;
+ /* Configure PDx pins speed to 100 MHz */
+ GPIOD->OSPEEDR = 0xFFFF0FCF;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOD->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOD->PUPDR = 0x00000000;
+
+ /* Connect PEx pins to FMC Alternate function */
+ GPIOE->AFR[0] = 0xC00CC0CC;
+ GPIOE->AFR[1] = 0xCCCCCCCC;
+ /* Configure PEx pins in Alternate function mode */
+ GPIOE->MODER = 0xAAAA828A;
+ /* Configure PEx pins speed to 100 MHz */
+ GPIOE->OSPEEDR = 0xFFFFC3CF;
+ /* Configure PEx pins Output type to push-pull */
+ GPIOE->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PEx pins */
+ GPIOE->PUPDR = 0x00000000;
+
+ /* Connect PFx pins to FMC Alternate function */
+ GPIOF->AFR[0] = 0xCCCCCCCC;
+ GPIOF->AFR[1] = 0xCCCCCCCC;
+ /* Configure PFx pins in Alternate function mode */
+ GPIOF->MODER = 0xAA800AAA;
+ /* Configure PFx pins speed to 50 MHz */
+ GPIOF->OSPEEDR = 0xAA800AAA;
+ /* Configure PFx pins Output type to push-pull */
+ GPIOF->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PFx pins */
+ GPIOF->PUPDR = 0x00000000;
+
+ /* Connect PGx pins to FMC Alternate function */
+ GPIOG->AFR[0] = 0xCCCCCCCC;
+ GPIOG->AFR[1] = 0xCCCCCCCC;
+ /* Configure PGx pins in Alternate function mode */
+ GPIOG->MODER = 0xAAAAAAAA;
+ /* Configure PGx pins speed to 50 MHz */
+ GPIOG->OSPEEDR = 0xAAAAAAAA;
+ /* Configure PGx pins Output type to push-pull */
+ GPIOG->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PGx pins */
+ GPIOG->PUPDR = 0x00000000;
+
+ /* Connect PHx pins to FMC Alternate function */
+ GPIOH->AFR[0] = 0x00C0CC00;
+ GPIOH->AFR[1] = 0xCCCCCCCC;
+ /* Configure PHx pins in Alternate function mode */
+ GPIOH->MODER = 0xAAAA08A0;
+ /* Configure PHx pins speed to 50 MHz */
+ GPIOH->OSPEEDR = 0xAAAA08A0;
+ /* Configure PHx pins Output type to push-pull */
+ GPIOH->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PHx pins */
+ GPIOH->PUPDR = 0x00000000;
+
+ /* Connect PIx pins to FMC Alternate function */
+ GPIOI->AFR[0] = 0xCCCCCCCC;
+ GPIOI->AFR[1] = 0x00000CC0;
+ /* Configure PIx pins in Alternate function mode */
+ GPIOI->MODER = 0x0028AAAA;
+ /* Configure PIx pins speed to 50 MHz */
+ GPIOI->OSPEEDR = 0x0028AAAA;
+ /* Configure PIx pins Output type to push-pull */
+ GPIOI->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PIx pins */
+ GPIOI->PUPDR = 0x00000000;
+
+/*-- FMC Configuration -------------------------------------------------------*/
+ /* Enable the FMC interface clock */
+ RCC->AHB3ENR |= 0x00000001;
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+
+ FMC_Bank5_6->SDCR[0] = 0x000019E4;
+ FMC_Bank5_6->SDTR[0] = 0x01115351;
+
+ /* SDRAM initialization sequence */
+ /* Clock enable command */
+ FMC_Bank5_6->SDCMR = 0x00000011;
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Delay */
+ for (index = 0; index<1000; index++);
+
+ /* PALL command */
+ FMC_Bank5_6->SDCMR = 0x00000012;
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Auto refresh command */
+ FMC_Bank5_6->SDCMR = 0x00000073;
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* MRD register program */
+ FMC_Bank5_6->SDCMR = 0x00046014;
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Set refresh count */
+ tmpreg = FMC_Bank5_6->SDRTR;
+ FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
+
+ /* Disable write protection */
+ tmpreg = FMC_Bank5_6->SDCR[0];
+ FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
+ /* Configure and enable Bank1_SRAM2 */
+ FMC_Bank1->BTCR[2] = 0x00001011;
+ FMC_Bank1->BTCR[3] = 0x00000201;
+ FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
+#if defined(STM32F469xx) || defined(STM32F479xx)
+ /* Configure and enable Bank1_SRAM2 */
+ FMC_Bank1->BTCR[2] = 0x00001091;
+ FMC_Bank1->BTCR[3] = 0x00110212;
+ FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F469xx || STM32F479xx */
+
+ (void)(tmp);
+}
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
+#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+/**
+ * @brief Setup the external memory controller.
+ * Called in startup_stm32f4xx.s before jump to main.
+ * This function configures the external memories (SRAM/SDRAM)
+ * This SRAM/SDRAM will be used as program data memory (including heap and stack).
+ * @param None
+ * @retval None
+ */
+void SystemInit_ExtMemCtl(void)
+{
+ __IO uint32_t tmp = 0x00;
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+#if defined (DATA_IN_ExtSDRAM)
+ register uint32_t tmpreg = 0, timeout = 0xFFFF;
+ register __IO uint32_t index;
+
+#if defined(STM32F446xx)
+ /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
+ clock */
+ RCC->AHB1ENR |= 0x0000007D;
+#else
+ /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
+ clock */
+ RCC->AHB1ENR |= 0x000001F8;
+#endif /* STM32F446xx */
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
+
+#if defined(STM32F446xx)
+ /* Connect PAx pins to FMC Alternate function */
+ GPIOA->AFR[0] |= 0xC0000000;
+ GPIOA->AFR[1] |= 0x00000000;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOA->MODER |= 0x00008000;
+ /* Configure PDx pins speed to 50 MHz */
+ GPIOA->OSPEEDR |= 0x00008000;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOA->OTYPER |= 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOA->PUPDR |= 0x00000000;
+
+ /* Connect PCx pins to FMC Alternate function */
+ GPIOC->AFR[0] |= 0x00CC0000;
+ GPIOC->AFR[1] |= 0x00000000;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOC->MODER |= 0x00000A00;
+ /* Configure PDx pins speed to 50 MHz */
+ GPIOC->OSPEEDR |= 0x00000A00;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOC->OTYPER |= 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOC->PUPDR |= 0x00000000;
+#endif /* STM32F446xx */
+
+ /* Connect PDx pins to FMC Alternate function */
+ GPIOD->AFR[0] = 0x000000CC;
+ GPIOD->AFR[1] = 0xCC000CCC;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOD->MODER = 0xA02A000A;
+ /* Configure PDx pins speed to 50 MHz */
+ GPIOD->OSPEEDR = 0xA02A000A;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOD->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOD->PUPDR = 0x00000000;
+
+ /* Connect PEx pins to FMC Alternate function */
+ GPIOE->AFR[0] = 0xC00000CC;
+ GPIOE->AFR[1] = 0xCCCCCCCC;
+ /* Configure PEx pins in Alternate function mode */
+ GPIOE->MODER = 0xAAAA800A;
+ /* Configure PEx pins speed to 50 MHz */
+ GPIOE->OSPEEDR = 0xAAAA800A;
+ /* Configure PEx pins Output type to push-pull */
+ GPIOE->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PEx pins */
+ GPIOE->PUPDR = 0x00000000;
+
+ /* Connect PFx pins to FMC Alternate function */
+ GPIOF->AFR[0] = 0xCCCCCCCC;
+ GPIOF->AFR[1] = 0xCCCCCCCC;
+ /* Configure PFx pins in Alternate function mode */
+ GPIOF->MODER = 0xAA800AAA;
+ /* Configure PFx pins speed to 50 MHz */
+ GPIOF->OSPEEDR = 0xAA800AAA;
+ /* Configure PFx pins Output type to push-pull */
+ GPIOF->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PFx pins */
+ GPIOF->PUPDR = 0x00000000;
+
+ /* Connect PGx pins to FMC Alternate function */
+ GPIOG->AFR[0] = 0xCCCCCCCC;
+ GPIOG->AFR[1] = 0xCCCCCCCC;
+ /* Configure PGx pins in Alternate function mode */
+ GPIOG->MODER = 0xAAAAAAAA;
+ /* Configure PGx pins speed to 50 MHz */
+ GPIOG->OSPEEDR = 0xAAAAAAAA;
+ /* Configure PGx pins Output type to push-pull */
+ GPIOG->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PGx pins */
+ GPIOG->PUPDR = 0x00000000;
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx)
+ /* Connect PHx pins to FMC Alternate function */
+ GPIOH->AFR[0] = 0x00C0CC00;
+ GPIOH->AFR[1] = 0xCCCCCCCC;
+ /* Configure PHx pins in Alternate function mode */
+ GPIOH->MODER = 0xAAAA08A0;
+ /* Configure PHx pins speed to 50 MHz */
+ GPIOH->OSPEEDR = 0xAAAA08A0;
+ /* Configure PHx pins Output type to push-pull */
+ GPIOH->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PHx pins */
+ GPIOH->PUPDR = 0x00000000;
+
+ /* Connect PIx pins to FMC Alternate function */
+ GPIOI->AFR[0] = 0xCCCCCCCC;
+ GPIOI->AFR[1] = 0x00000CC0;
+ /* Configure PIx pins in Alternate function mode */
+ GPIOI->MODER = 0x0028AAAA;
+ /* Configure PIx pins speed to 50 MHz */
+ GPIOI->OSPEEDR = 0x0028AAAA;
+ /* Configure PIx pins Output type to push-pull */
+ GPIOI->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PIx pins */
+ GPIOI->PUPDR = 0x00000000;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
+
+/*-- FMC Configuration -------------------------------------------------------*/
+ /* Enable the FMC interface clock */
+ RCC->AHB3ENR |= 0x00000001;
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+
+ /* Configure and enable SDRAM bank1 */
+#if defined(STM32F446xx)
+ FMC_Bank5_6->SDCR[0] = 0x00001954;
+#else
+ FMC_Bank5_6->SDCR[0] = 0x000019E4;
+#endif /* STM32F446xx */
+ FMC_Bank5_6->SDTR[0] = 0x01115351;
+
+ /* SDRAM initialization sequence */
+ /* Clock enable command */
+ FMC_Bank5_6->SDCMR = 0x00000011;
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Delay */
+ for (index = 0; index<1000; index++);
+
+ /* PALL command */
+ FMC_Bank5_6->SDCMR = 0x00000012;
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Auto refresh command */
+#if defined(STM32F446xx)
+ FMC_Bank5_6->SDCMR = 0x000000F3;
+#else
+ FMC_Bank5_6->SDCMR = 0x00000073;
+#endif /* STM32F446xx */
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* MRD register program */
+#if defined(STM32F446xx)
+ FMC_Bank5_6->SDCMR = 0x00044014;
+#else
+ FMC_Bank5_6->SDCMR = 0x00046014;
+#endif /* STM32F446xx */
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Set refresh count */
+ tmpreg = FMC_Bank5_6->SDRTR;
+#if defined(STM32F446xx)
+ FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
+#else
+ FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
+#endif /* STM32F446xx */
+
+ /* Disable write protection */
+ tmpreg = FMC_Bank5_6->SDCR[0];
+ FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
+#endif /* DATA_IN_ExtSDRAM */
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
+
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+ || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+
+#if defined(DATA_IN_ExtSRAM)
+/*-- GPIOs Configuration -----------------------------------------------------*/
+ /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+ RCC->AHB1ENR |= 0x00000078;
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
+
+ /* Connect PDx pins to FMC Alternate function */
+ GPIOD->AFR[0] = 0x00CCC0CC;
+ GPIOD->AFR[1] = 0xCCCCCCCC;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOD->MODER = 0xAAAA0A8A;
+ /* Configure PDx pins speed to 100 MHz */
+ GPIOD->OSPEEDR = 0xFFFF0FCF;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOD->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOD->PUPDR = 0x00000000;
+
+ /* Connect PEx pins to FMC Alternate function */
+ GPIOE->AFR[0] = 0xC00CC0CC;
+ GPIOE->AFR[1] = 0xCCCCCCCC;
+ /* Configure PEx pins in Alternate function mode */
+ GPIOE->MODER = 0xAAAA828A;
+ /* Configure PEx pins speed to 100 MHz */
+ GPIOE->OSPEEDR = 0xFFFFC3CF;
+ /* Configure PEx pins Output type to push-pull */
+ GPIOE->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PEx pins */
+ GPIOE->PUPDR = 0x00000000;
+
+ /* Connect PFx pins to FMC Alternate function */
+ GPIOF->AFR[0] = 0x00CCCCCC;
+ GPIOF->AFR[1] = 0xCCCC0000;
+ /* Configure PFx pins in Alternate function mode */
+ GPIOF->MODER = 0xAA000AAA;
+ /* Configure PFx pins speed to 100 MHz */
+ GPIOF->OSPEEDR = 0xFF000FFF;
+ /* Configure PFx pins Output type to push-pull */
+ GPIOF->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PFx pins */
+ GPIOF->PUPDR = 0x00000000;
+
+ /* Connect PGx pins to FMC Alternate function */
+ GPIOG->AFR[0] = 0x00CCCCCC;
+ GPIOG->AFR[1] = 0x000000C0;
+ /* Configure PGx pins in Alternate function mode */
+ GPIOG->MODER = 0x00085AAA;
+ /* Configure PGx pins speed to 100 MHz */
+ GPIOG->OSPEEDR = 0x000CAFFF;
+ /* Configure PGx pins Output type to push-pull */
+ GPIOG->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PGx pins */
+ GPIOG->PUPDR = 0x00000000;
+
+/*-- FMC/FSMC Configuration --------------------------------------------------*/
+ /* Enable the FMC/FSMC interface clock */
+ RCC->AHB3ENR |= 0x00000001;
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+ /* Configure and enable Bank1_SRAM2 */
+ FMC_Bank1->BTCR[2] = 0x00001011;
+ FMC_Bank1->BTCR[3] = 0x00000201;
+ FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
+#if defined(STM32F469xx) || defined(STM32F479xx)
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+ /* Configure and enable Bank1_SRAM2 */
+ FMC_Bank1->BTCR[2] = 0x00001091;
+ FMC_Bank1->BTCR[3] = 0x00110212;
+ FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F469xx || STM32F479xx */
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
+ || defined(STM32F412Zx) || defined(STM32F412Vx)
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
+ /* Configure and enable Bank1_SRAM2 */
+ FSMC_Bank1->BTCR[2] = 0x00001011;
+ FSMC_Bank1->BTCR[3] = 0x00000201;
+ FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
+#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
+
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
+ STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */
+ (void)(tmp);
+}
+#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM0/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM0/RTE_Components.h
new file mode 100644
index 0000000..4459a74
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM0/RTE_Components.h
@@ -0,0 +1,20 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ * *** Do not modify ! ***
+ *
+ * Project: 'arm_nnexamples_cifar10'
+ * Target: 'ARMCM0'
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File:
+ */
+#define CMSIS_device_header "ARMCM0.h"
+
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM4_FP/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM4_FP/RTE_Components.h
new file mode 100644
index 0000000..739edeb
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM4_FP/RTE_Components.h
@@ -0,0 +1,28 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ * *** Do not modify ! ***
+ *
+ * Project: 'arm_nnexamples_gru'
+ * Target: 'ARMCM4_FP'
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File:
+ */
+#define CMSIS_device_header "ARMCM4_FP.h"
+
+#define RTE_Compiler_IO_STDERR /* Compiler I/O: STDERR */
+ #define RTE_Compiler_IO_STDERR_ITM /* Compiler I/O: STDERR ITM */
+#define RTE_Compiler_IO_STDIN /* Compiler I/O: STDIN */
+ #define RTE_Compiler_IO_STDIN_ITM /* Compiler I/O: STDIN ITM */
+#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
+ #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
+#define RTE_Compiler_IO_TTY /* Compiler I/O: TTY */
+ #define RTE_Compiler_IO_TTY_ITM /* Compiler I/O: TTY ITM */
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM7_SP/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM7_SP/RTE_Components.h
new file mode 100644
index 0000000..287ab63
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM7_SP/RTE_Components.h
@@ -0,0 +1,20 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ * *** Do not modify ! ***
+ *
+ * Project: 'arm_nnexampes_cifar10'
+ * Target: 'ARMCM7_SP'
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File:
+ */
+#define CMSIS_device_header "ARMCM7_SP.h"
+
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.cpp b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.cpp
new file mode 100644
index 0000000..e69a5ee
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.cpp
@@ -0,0 +1,212 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
+*
+*
+* Project: CMSIS NN Library
+* Title: arm_nnexamples_gru.cpp
+*
+* Description: Gated Recurrent Unit Example
+*
+* Target Processor: Cortex-M4/Cortex-M7
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in
+* the documentation and/or other materials provided with the
+* distribution.
+* - Neither the name of Arm LIMITED nor the names of its contributors
+* may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup GRUExample Gated Recurrent Unit Example
+ *
+ * \par Description:
+ * \par
+ * Demonstrates a gated recurrent unit (GRU) example with the use of fully-connected,
+ * Tanh/Sigmoid activation functions.
+ *
+ * \par Model definition:
+ * \par
+ * GRU is a type of recurrent neural network (RNN). It contains two sigmoid gates and one hidden
+ * state.
+ * \par
+ * The computation can be summarized as:
+ * <pre>z[t] = sigmoid( W_z · {h[t-1],x[t]} )
+ * r[t] = sigmoid( W_r · {h[t-1],x[t]} )
+ * n[t] = tanh( W_n · [r[t] × {h[t-1], x[t]} )
+ * h[t] = (1 - z[t]) × h[t-1] + z[t] × n[t] </pre>
+ * \image html GRU.gif "Gate Recurrent Unit Diagram"
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c update_gate_weights, \c reset_gate_weights, \c hidden_state_weights are weights corresponding to update gate (W_z), reset gate (W_r), and hidden state (W_n).
+ * \li \c update_gate_bias, \c reset_gate_bias, \c hidden_state_bias are layer bias arrays
+ * \li \c test_input1, \c test_input2, \c test_history are the inputs and initial history
+ *
+ * \par
+ * The buffer is allocated as:
+ * \par
+ * | reset | input | history | update | hidden_state |
+ * \par
+ * In this way, the concatenation is automatically done since (reset, input) and (input, history)
+ * are physically concatinated in memory.
+ * \par
+ * The ordering of the weight matrix should be adjusted accordingly.
+ *
+ *
+ *
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_fully_connected_mat_q7_vec_q15_opt()
+ * - arm_nn_activations_direct_q15()
+ * - arm_mult_q15()
+ * - arm_offset_q15()
+ * - arm_sub_q15()
+ * - arm_copy_q15()
+ *
+ * <b> Refer </b>
+ * \link arm_nnexamples_gru.cpp \endlink
+ *
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+#include "arm_nnexamples_gru_test_data.h"
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+#define DIM_HISTORY 32
+#define DIM_INPUT 32
+#define DIM_VEC 64
+
+#define USE_X4
+
+#ifndef USE_X4
+static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X2;
+static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X2;
+static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X2;
+#else
+static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X4;
+static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X4;
+static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X4;
+#endif
+
+static q7_t update_gate_bias[DIM_HISTORY] = UPDATE_GATE_BIAS;
+static q7_t reset_gate_bias[DIM_HISTORY] = RESET_GATE_BIAS;
+static q7_t hidden_state_bias[DIM_HISTORY] = HIDDEN_STATE_BIAS;
+
+static q15_t test_input1[DIM_INPUT] = INPUT_DATA1;
+static q15_t test_input2[DIM_INPUT] = INPUT_DATA2;
+static q15_t test_history[DIM_HISTORY] = HISTORY_DATA;
+
+q15_t scratch_buffer[DIM_HISTORY * 4 + DIM_INPUT];
+
+void gru_example(q15_t * scratch_input, uint16_t input_size, uint16_t history_size,
+ q7_t * weights_update, q7_t * weights_reset, q7_t * weights_hidden_state,
+ q7_t * bias_update, q7_t * bias_reset, q7_t * bias_hidden_state)
+{
+
+ q15_t *reset = scratch_input;
+ q15_t *input = scratch_input + history_size;
+ q15_t *history = scratch_input + history_size + input_size;
+ q15_t *update = scratch_input + 2 * history_size + input_size;
+ q15_t *hidden_state = scratch_input + 3 * history_size + input_size;
+
+ // reset gate calculation
+ // the range of the output can be adjusted with bias_shift and output_shift
+#ifndef USE_X4
+ arm_fully_connected_mat_q7_vec_q15(input, weights_reset, input_size + history_size, history_size, 0, 15, bias_reset,
+ reset, NULL);
+#else
+ arm_fully_connected_mat_q7_vec_q15_opt(input, weights_reset, input_size + history_size, history_size, 0, 15,
+ bias_reset, reset, NULL);
+#endif
+ // sigmoid function, the size of the integer bit-width should be consistent with out_shift
+ arm_nn_activations_direct_q15(reset, history_size, 0, ARM_SIGMOID);
+ arm_mult_q15(history, reset, reset, history_size);
+
+ // update gate calculation
+ // the range of the output can be adjusted with bias_shift and output_shift
+#ifndef USE_X4
+ arm_fully_connected_mat_q7_vec_q15(input, weights_update, input_size + history_size, history_size, 0, 15,
+ bias_update, update, NULL);
+#else
+ arm_fully_connected_mat_q7_vec_q15_opt(input, weights_update, input_size + history_size, history_size, 0, 15,
+ bias_update, update, NULL);
+#endif
+
+ // sigmoid function, the size of the integer bit-width should be consistent with out_shift
+ arm_nn_activations_direct_q15(update, history_size, 0, ARM_SIGMOID);
+
+ // hidden state calculation
+#ifndef USE_X4
+ arm_fully_connected_mat_q7_vec_q15(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
+ bias_hidden_state, hidden_state, NULL);
+#else
+ arm_fully_connected_mat_q7_vec_q15_opt(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
+ bias_hidden_state, hidden_state, NULL);
+#endif
+
+ // tanh function, the size of the integer bit-width should be consistent with out_shift
+ arm_nn_activations_direct_q15(hidden_state, history_size, 0, ARM_TANH);
+ arm_mult_q15(update, hidden_state, hidden_state, history_size);
+
+ // we calculate z - 1 here
+ // so final addition becomes substraction
+ arm_offset_q15(update, 0x8000, update, history_size);
+ // multiply history
+ arm_mult_q15(history, update, update, history_size);
+ // calculate history_out
+ arm_sub_q15(hidden_state, update, history, history_size);
+
+ return;
+}
+
+int main()
+{
+
+ printf("Start GRU execution\n");
+ int input_size = DIM_INPUT;
+ int history_size = DIM_HISTORY;
+
+ // copy over the input data
+ arm_copy_q15(test_input1, scratch_buffer + history_size, input_size);
+ arm_copy_q15(test_history, scratch_buffer + history_size + input_size, history_size);
+
+ gru_example(scratch_buffer, input_size, history_size,
+ update_gate_weights, reset_gate_weights, hidden_state_weights,
+ update_gate_bias, reset_gate_bias, hidden_state_bias);
+ printf("Complete first iteration on GRU\n");
+
+ arm_copy_q15(test_input2, scratch_buffer + history_size, input_size);
+ gru_example(scratch_buffer, input_size, history_size,
+ update_gate_weights, reset_gate_weights, hidden_state_weights,
+ update_gate_bias, reset_gate_bias, hidden_state_bias);
+ printf("Complete second iteration on GRU\n");
+
+ return 0;
+}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.uvoptx b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.uvoptx
new file mode 100644
index 0000000..02709bf
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.uvoptx
@@ -0,0 +1,1203 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj; *.o</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>ARMCM0</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>10000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\ARMCM0_debug\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>.\arm_convolution_example.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>241</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>1722</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>1</BreakIfRCount>
+ <Filename>C:\Users\lialai01\OneDrive - ARM\Documents\uVision\CMSIS\CMSIS_5_with_NN-master-afefd8a43b134ea754b0ae06f1ab1deb64ba5917\CMSIS\DSP\Examples\ARM\arm_nn_examples\cifar10_M4\arm_convolution_example_f32.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression>\\arm_convolution_example\arm_convolution_example_f32.c\241</Expression>
+ </Bp>
+ <Bp>
+ <Number>1</Number>
+ <Type>0</Type>
+ <LineNumber>244</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>1726</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>1</BreakIfRCount>
+ <Filename>C:\Users\lialai01\OneDrive - ARM\Documents\uVision\CMSIS\CMSIS_5_with_NN-master-afefd8a43b134ea754b0ae06f1ab1deb64ba5917\CMSIS\DSP\Examples\ARM\arm_nn_examples\cifar10_M4\arm_convolution_example_f32.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression>\\arm_convolution_example\arm_convolution_example_f32.c\244</Expression>
+ </Bp>
+ <Bp>
+ <Number>2</Number>
+ <Type>0</Type>
+ <LineNumber>118</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>C:\Users\lialai01\Work\CMSIS_5_with_NN\CMSIS\DSP\Examples\ARM\arm_nn_examples\gru\main.cpp</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMCM3</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>10000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\ARMCM3_debug\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>.\arm_convolution_example.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM3$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>244</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>1696</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>1</BreakIfRCount>
+ <Filename>C:\Users\lialai01\OneDrive - ARM\Documents\uVision\CMSIS\CMSIS_5_with_NN-master-afefd8a43b134ea754b0ae06f1ab1deb64ba5917\CMSIS\DSP\Examples\ARM\arm_nn_examples\cifar10_M4\arm_convolution_example_f32.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression>\\arm_convolution_example\arm_convolution_example_f32.c\244</Expression>
+ </Bp>
+ <Bp>
+ <Number>1</Number>
+ <Type>0</Type>
+ <LineNumber>241</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>1692</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>1</BreakIfRCount>
+ <Filename>C:\Users\lialai01\OneDrive - ARM\Documents\uVision\CMSIS\CMSIS_5_with_NN-master-afefd8a43b134ea754b0ae06f1ab1deb64ba5917\CMSIS\DSP\Examples\ARM\arm_nn_examples\cifar10_M4\arm_convolution_example_f32.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression>\\arm_convolution_example\arm_convolution_example_f32.c\241</Expression>
+ </Bp>
+ <Bp>
+ <Number>2</Number>
+ <Type>0</Type>
+ <LineNumber>118</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>C:\Users\lialai01\Work\CMSIS_5_with_NN\CMSIS\DSP\Examples\ARM\arm_nn_examples\gru\main.cpp</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMCM4_FP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\ARMCM4_debug\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>1</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>1</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMCM7_SP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\ARMCM7_debug\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>.\arm_convolution_example.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM7_SP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>241</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>2028</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>1</BreakIfRCount>
+ <Filename>C:\Users\lialai01\OneDrive - ARM\Documents\uVision\CMSIS\CMSIS_5_with_NN-master-afefd8a43b134ea754b0ae06f1ab1deb64ba5917\CMSIS\DSP\Examples\ARM\arm_nn_examples\cifar10_M4\arm_convolution_example_f32.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression>\\arm_convolution_example\arm_convolution_example_f32.c\241</Expression>
+ </Bp>
+ <Bp>
+ <Number>1</Number>
+ <Type>0</Type>
+ <LineNumber>244</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>2032</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>1</BreakIfRCount>
+ <Filename>C:\Users\lialai01\OneDrive - ARM\Documents\uVision\CMSIS\CMSIS_5_with_NN-master-afefd8a43b134ea754b0ae06f1ab1deb64ba5917\CMSIS\DSP\Examples\ARM\arm_nn_examples\cifar10_M4\arm_convolution_example_f32.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression>\\arm_convolution_example\arm_convolution_example_f32.c\244</Expression>
+ </Bp>
+ <Bp>
+ <Number>2</Number>
+ <Type>0</Type>
+ <LineNumber>118</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>C:\Users\lialai01\Work\CMSIS_5_with_NN\CMSIS\DSP\Examples\ARM\arm_nn_examples\gru\main.cpp</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>1</FileNumber>
+ <FileType>8</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\arm_nnexamples_gru.cpp</PathWithFileName>
+ <FilenameWithoutPath>arm_nnexamples_gru.cpp</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>2</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nn_activations_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>3</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nn_activations_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>4</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ActivationFunctions\arm_relu_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_relu_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>5</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ActivationFunctions\arm_relu_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_relu_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>6</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>7</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_basic.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>8</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_fast.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>9</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_fast_nonsquare.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>10</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_RGB.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>11</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q15_basic.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>12</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q15_fast.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>13</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_depthwise_separable_conv_HWC_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>14</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</PathWithFileName>
+ <FilenameWithoutPath>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>15</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nn_mat_mult_kernel_q7_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>16</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>17</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_mat_q7_vec_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>18</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_mat_q7_vec_q15_opt.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>19</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>20</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q7_opt.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>21</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>22</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q15_opt.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>23</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\NNSupportFunctions\arm_nntables.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nntables.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>24</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</PathWithFileName>
+ <FilenameWithoutPath>arm_pool_q7_HWC.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>25</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</PathWithFileName>
+ <FilenameWithoutPath>arm_q7_to_q15_no_shift.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>26</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</PathWithFileName>
+ <FilenameWithoutPath>arm_q7_to_q15_reordered_no_shift.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>27</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_softmax_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>28</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_softmax_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>29</FileNumber>
+ <FileType>5</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\readme.txt</PathWithFileName>
+ <FilenameWithoutPath>readme.txt</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>1</RteFlg>
+ </Group>
+
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>1</RteFlg>
+ </Group>
+
+ <Group>
+ <GroupName>::Device</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>1</RteFlg>
+ </Group>
+
+</ProjectOpt>
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.uvprojx b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.uvprojx
new file mode 100644
index 0000000..cdce4f3
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.uvprojx
@@ -0,0 +1,2385 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+ <SchemaVersion>2.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Targets>
+ <Target>
+ <TargetName>ARMCM0</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060300::V5.06 update 3 (build 300)::ARMCC</pCCUsed>
+ <uAC6>0</uAC6>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM0</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.2.0</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(10000000) ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Flash\NEW_DEVICE.flm))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM0$Device\Include\ARMCM0.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM0$SVD\ARMCM0.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\ARMCM0_debug\</OutputDirectory>
+ <OutputName>arm_convolution_example</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\ARMCM0_debug\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> </SimDllArguments>
+ <SimDlgDll>DARMCM1.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM0</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments> </TargetDllArguments>
+ <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3>"" ()</Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M0"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>0</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>0</EndSel>
+ <uLtcg>0</uLtcg>
+ <nSecure>0</nSecure>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>1</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>0</uC99>
+ <useXO>0</useXO>
+ <v6Lang>1</v6Lang>
+ <v6LangP>1</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_CM0</Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <uClangAs>0</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <Files>
+ <File>
+ <FileName>arm_nnexamples_gru.cpp</FileName>
+ <FileType>8</FileType>
+ <FilePath>.\arm_nnexamples_gru.cpp</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_RGB.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nntables.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_nntables.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_q7_HWC.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_reordered_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ <GroupOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>0</IncludeInBuild>
+ <AlwaysBuild>2</AlwaysBuild>
+ <GenerateAssemblyFile>2</GenerateAssemblyFile>
+ <AssembleAssemblyFile>2</AssembleAssemblyFile>
+ <PublicsOnly>2</PublicsOnly>
+ <StopOnExitCode>11</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <GroupArmAds>
+ <Cads>
+ <interw>2</interw>
+ <Optim>0</Optim>
+ <oTime>2</oTime>
+ <SplitLS>2</SplitLS>
+ <OneElfS>2</OneElfS>
+ <Strict>2</Strict>
+ <EnumInt>2</EnumInt>
+ <PlainCh>2</PlainCh>
+ <Ropi>2</Ropi>
+ <Rwpi>2</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>2</uThumb>
+ <uSurpInc>2</uSurpInc>
+ <uC99>2</uC99>
+ <useXO>2</useXO>
+ <v6Lang>0</v6Lang>
+ <v6LangP>0</v6LangP>
+ <vShortEn>2</vShortEn>
+ <vShortWch>2</vShortWch>
+ <v6Lto>2</v6Lto>
+ <v6WtE>2</v6WtE>
+ <v6Rtti>2</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>2</interw>
+ <Ropi>2</Ropi>
+ <Rwpi>2</Rwpi>
+ <thumb>2</thumb>
+ <SplitLS>2</SplitLS>
+ <SwStkChk>2</SwStkChk>
+ <NoWarn>2</NoWarn>
+ <uSurpInc>2</uSurpInc>
+ <useXO>2</useXO>
+ <uClangAs>2</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ </GroupArmAds>
+ </GroupOption>
+ </Group>
+ <Group>
+ <GroupName>::Device</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ <Target>
+ <TargetName>ARMCM3</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060300::V5.06 update 3 (build 300)::ARMCC</pCCUsed>
+ <uAC6>0</uAC6>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM3</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.2.0</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(10000000) ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM3$Flash\NEW_DEVICE.flm))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM3$Device\Include\ARMCM3.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM3$SVD\ARMCM3.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\ARMCM3_debug\</OutputDirectory>
+ <OutputName>arm_convolution_example</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\ARMCM3_debug\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> </SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments></TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3>"" ()</Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M3"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>0</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>0</EndSel>
+ <uLtcg>0</uLtcg>
+ <nSecure>0</nSecure>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>1</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>0</uC99>
+ <useXO>0</useXO>
+ <v6Lang>1</v6Lang>
+ <v6LangP>1</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_CM3</Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <uClangAs>0</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <Files>
+ <File>
+ <FileName>arm_nnexamples_gru.cpp</FileName>
+ <FileType>8</FileType>
+ <FilePath>.\arm_nnexamples_gru.cpp</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_RGB.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nntables.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_nntables.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_q7_HWC.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_reordered_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Device</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ <Target>
+ <TargetName>ARMCM4_FP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
+ <uAC6>0</uAC6>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM4_FP</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.2.0</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM4_FP$Device\ARM\ARMCM4\Include\ARMCM4_FP.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM4_FP$Device\ARM\SVD\ARMCM4.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\ARMCM4_debug\</OutputDirectory>
+ <OutputName>arm_nnexamples_gru</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\ARMCM4_debug\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> -MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments> -MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3></Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M4"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>1</EndSel>
+ <uLtcg>0</uLtcg>
+ <nSecure>0</nSecure>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>4</Optim>
+ <oTime>1</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>0</uC99>
+ <useXO>0</useXO>
+ <v6Lang>1</v6Lang>
+ <v6LangP>1</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_CM4 __FPU_PRESENT=1U</Define>
+ <Undefine></Undefine>
+ <IncludePath>..\..\..\..\Include;..\..\..\..\..\Core\Include;..\..\..\..\..\DSP\Include;..\cifar10</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <uClangAs>0</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <Files>
+ <File>
+ <FileName>arm_nnexamples_gru.cpp</FileName>
+ <FileType>8</FileType>
+ <FilePath>.\arm_nnexamples_gru.cpp</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_RGB.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nntables.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_nntables.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_q7_HWC.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_reordered_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Device</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ <Target>
+ <TargetName>ARMCM7_SP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060300::V5.06 update 3 (build 300)::ARMCC</pCCUsed>
+ <uAC6>0</uAC6>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM7_SP</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.2.0</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM7_SP$Device\ARM\Flash\NEW_DEVICE.FLM))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM7_SP$Device\ARM\ARMCM7\Include\ARMCM7_SP.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM7_SP$Device\ARM\SVD\ARMCM7.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\ARMCM7_debug\</OutputDirectory>
+ <OutputName>arm_convolution_example</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\ARMCM7_debug\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> -MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM7</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments> -MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM7</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3></Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M7"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>1</EndSel>
+ <uLtcg>0</uLtcg>
+ <nSecure>0</nSecure>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>1</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>0</uC99>
+ <useXO>0</useXO>
+ <v6Lang>1</v6Lang>
+ <v6LangP>1</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <uClangAs>0</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <Files>
+ <File>
+ <FileName>arm_nnexamples_gru.cpp</FileName>
+ <FileType>8</FileType>
+ <FilePath>.\arm_nnexamples_gru.cpp</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ActivationFunctions\arm_relu_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_RGB.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nntables.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_nntables.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_q7_HWC.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_reordered_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Device</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+ <RTE>
+ <apis/>
+ <components>
+ <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.2" condition="ARMv6_7_8-M Device">
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ <component Cclass="CMSIS" Cgroup="DSP" Cvendor="ARM" Cversion="1.5.2" condition="CMSIS DSP">
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM0 CMSIS">
+ <package name="CMSIS" schemaVersion="1.2" url="http://www.keil.com/pack/" vendor="ARM" version="4.0.11"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ </targetInfos>
+ </component>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS">
+ <package name="CMSIS" schemaVersion="1.2" url="http://www.keil.com/pack/" vendor="ARM" version="4.0.11"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ </targetInfos>
+ </component>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS">
+ <package name="CMSIS" schemaVersion="1.2" url="http://www.keil.com/pack/" vendor="ARM" version="4.0.11"/>
+ <targetInfos>
+ <targetInfo name="ARMCM4_FP"/>
+ </targetInfos>
+ </component>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM7 CMSIS">
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.1.10"/>
+ <targetInfos>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDERR" Cvariant="ITM" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M with ITM">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDIN" Cvariant="ITM" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M with ITM">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="ITM" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M with ITM">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="TTY" Cvariant="ITM" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M with ITM">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </component>
+ </components>
+ <files>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM0\Source\ARM\startup_ARMCM0.s" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM0\startup_ARMCM0.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM0 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM0\Source\system_ARMCM0.c" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM0\system_ARMCM0.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM0 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM0"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM3\system_ARMCM3.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM4\Source\ARM\startup_ARMCM4.s" version="1.0.0">
+ <instance index="0" removed="1">RTE\Device\ARMCM4\startup_ARMCM4.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.2.0"/>
+ <targetInfos/>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM4\Source\system_ARMCM4.c" version="1.0.0">
+ <instance index="0" removed="1">RTE\Device\ARMCM4\system_ARMCM4.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.2.0"/>
+ <targetInfos/>
+ </file>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM4\Source\ARM\startup_ARMCM4.s" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM4_FP\startup_ARMCM4.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM4_FP"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM4\Source\system_ARMCM4.c" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM4_FP\system_ARMCM4.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM4_FP"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM7\Source\ARM\startup_ARMCM7.s" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM7_SP\startup_ARMCM7.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM7 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM7\Source\system_ARMCM7.c" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM7_SP\system_ARMCM7.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM7 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM7_SP"/>
+ </targetInfos>
+ </file>
+ </files>
+ </RTE>
+
+</Project>
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru_test_data.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru_test_data.h
new file mode 100644
index 0000000..4fd2bb0
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru_test_data.h
@@ -0,0 +1,23 @@
+#define UPDATE_GATE_WEIGHT_X2 {-62,83,-58,-89,-80,1,-93,31,101,95,121,-83,71,18,-98,-5,44,-100,-16,-73,25,62,34,-22,-16,42,9,-125,60,-78,15,-76,-76,-63,71,-25,78,-66,38,-118,-71,-120,-80,28,33,51,82,-105,26,-47,38,86,-114,44,90,-98,105,-123,24,95,-12,11,49,-35,78,104,104,17,-116,-40,-83,4,88,-110,-111,-98,18,-89,120,-84,66,-69,-8,-22,-91,-29,-41,110,55,-124,-67,103,-40,-100,1,-25,-68,-62,-89,-75,-20,-78,101,-92,-51,-97,-54,59,-78,41,34,-102,-9,-53,56,103,-55,13,81,-75,-20,-37,29,36,110,84,-80,-127,-68,-33,-70,-16,-42,-9,-104,107,-81,-16,42,-74,-63,-4,-128,-109,-105,55,-51,-68,-88,19,-39,116,-7,66,52,-29,63,-94,71,-2,-127,31,-103,120,124,41,-13,-23,127,59,-22,54,-2,32,-87,-109,85,-31,-5,-59,-122,-97,-14,-88,-19,43,-30,115,42,14,10,121,28,-63,83,-85,101,40,23,-39,74,-99,73,50,-20,123,-88,-13,-126,-25,70,-11,16,-28,121,-29,20,-69,104,117,-40,-1,-97,-12,31,32,15,-32,77,31,16,40,107,-52,-52,-89,-17,124,-95,54,48,-40,37,24,-46,42,119,5,-118,-45,-10,106,83,57,-74,-10,-56,85,37,-25,83,-31,-54,111,-78,-96,-114,-65,-100,28,-31,-111,33,66,74,-43,112,119,-80,-26,74,-81,-123,55,-126,32,-66,110,-86,-118,-21,15,16,26,13,-109,41,-16,88,81,-82,-55,-89,109,-52,118,-39,57,-16,86,-68,-10,-19,110,-50,-17,-84,103,-3,94,-8,50,15,-44,-87,6,18,8,61,66,-108,-67,-6,107,-68,25,25,25,-82,71,62,121,-31,-4,17,-6,-60,-17,116,-67,45,117,-90,12,-68,20,121,-65,-43,74,-104,-42,-69,35,4,-17,5,95,-82,18,65,43,-57,89,1,-8,37,-51,10,67,4,-50,-18,81,-120,44,98,16,-98,25,127,88,-111,-49,114,111,-17,-74,40,-18,35,19,31,48,-23,53,102,41,89,-27,87,-54,-121,-113,97,125,125,-108,58,-17,8,70,-67,-55,59,42,-85,78,27,16,66,67,54,-74,33,-19,72,77,126,-122,-7,-109,58,78,-88,15,2,16,37,-34,-114,-88,-53,88,115,19,7,-67,93,80,-48,-11,-61,31,38,29,-59,-70,0,25,106,-7,-44,53,62,19,-64,109,70,-103,-114,97,57,112,24,-66,-127,29,29,-31,-87,-125,54,-98,101,-39,56,-88,-63,-113,-73,-91,80,112,-27,-75,-42,-5,79,60,-55,23,-61,66,51,39,-91,96,-60,-64,-1,75,55,-108,73,38,75,-113,-9,-92,-92,-3,-30,93,-27,-100,-55,125,52,72,110,12,84,-83,65,-79,92,11,87,-106,35,-38,-24,-79,15,-11,-109,-22,95,82,-1,-2,-113,116,-64,93,-62,-11,101,35,-91,51,-6,21,29,25,-16,68,-103,-111,-23,-123,-80,24,-17,-7,53,23,114,-13,-105,-88,120,13,-25,-40,29,-38,-43,3,2,-121,-110,54,-43,30,66,28,60,-81,-6,-8,126,-80,64,-42,126,75,-69,-116,-41,81,94,31,-116,5,-46,5,-21,-105,78,-20,-34,54,46,-124,120,-83,44,-17,-52,-23,-110,34,-35,31,61,88,-108,-38,31,117,-26,38,-57,65,9,0,59,124,14,-39,-95,-91,107,-34,85,-83,-31,-68,-78,-86,21,-118,56,60,-3,-116,33,53,-94,85,77,91,-94,100,-89,97,88,111,36,74,-110,7,-74,91,-112,21,32,-59,98,36,10,-41,44,-114,-88,92,111,72,43,58,42,-125,-11,96,126,25,96,-105,-128,-70,85,-82,-17,103,23,-37,76,58,108,16,-116,-44,22,89,0,6,-108,27,-34,88,-125,22,-45,-116,28,-29,-70,-3,-81,-80,42,119,105,-40,-109,105,64,5,72,-32,-95,90,60,6,-29,40,-19,57,89,-50,34,-123,-32,-18,20,9,-19,-81,-45,-120,-120,20,2,18,70,75,100,64,126,-9,63,-82,114,-62,106,-11,104,-9,-13,88,-40,101,73,108,52,33,116,-54,-114,-47,85,2,-117,-80,100,-20,98,-75,-83,-24,-125,-91,-97,95,-46,15,-94,-21,53,-27,-18,65,87,112,38,-115,-27,37,-84,1,103,85,-50,36,-49,-119,68,20,119,-113,43,-67,105,44,4,-48,16,-42,83,-39,106,31,-34,-76,-51,68,82,-111,-116,-104,-118,109,-29,-6,-91,81,-102,-76,-82,64,121,27,-98,-24,-88,36,115,59,-84,-121,4,29,45,73,110,-56,-12,109,-88,85,-30,87,18,118,23,21,106,40,115,78,-72,-103,11,83,44,117,-63,98,30,115,123,-39,25,15,84,52,46,77,64,-104,125,-13,34,125,65,6,57,-128,-2,115,7,-65,-73,82,72,-109,99,43,-94,-106,-39,-4,-127,58,123,-128,29,-80,4,51,109,-50,-38,25,-13,-52,-106,87,76,44,78,101,16,-102,-20,104,23,107,-88,18,-85,119,-21,-53,-84,-7,-8,-114,23,-54,74,80,77,-40,19,-75,-41,60,77,82,-96,-121,-43,114,-124,-1,-75,32,34,-117,21,64,-87,-100,-29,-36,-45,-46,-111,4,-44,-94,-117,100,-25,-27,105,95,15,88,25,-38,-88,122,62,-62,-28,95,-86,125,-83,-9,-100,101,-124,22,21,-91,50,-100,-27,-92,115,86,85,33,-112,-43,61,114,62,-31,-84,-7,5,-26,-10,-21,-89,60,-96,48,-34,88,-80,-91,92,12,118,-2,-38,83,-50,-109,-111,-26,-109,-78,-7,84,60,-95,15,-71,112,126,71,36,39,-42,-85,-126,-68,105,-18,-127,48,-41,57,-93,13,-25,-71,66,-43,-23,122,4,-70,123,115,124,-61,-32,18,-18,49,123,-101,37,-50,-111,-73,124,-18,54,-64,93,-69,16,112,21,-56,56,127,113,-48,-57,-4,85,-84,53,44,28,-126,-59,-11,94,58,-64,112,82,127,58,50,5,-6,-102,90,-18,-86,104,17,108,-64,-22,73,-102,-17,-31,-11,-105,-40,-49,84,-82,104,57,30,112,-119,-92,78,-92,35,90,-45,-13,-75,-125,-19,-83,-75,29,15,-33,127,-14,29,-80,61,41,67,-14,-18,101,101,108,-24,-61,-90,-59,-48,-114,1,-14,106,52,109,-45,-100,74,-33,-68,-94,-68,-22,-99,31,-86,85,-27,-70,69,127,92,125,-95,117,-87,-8,-71,18,94,-90,103,-31,-1,-50,-60,-2,96,31,-1,-98,75,104,-6,-38,-24,127,94,-48,97,-96,4,-108,106,76,-31,-7,-41,58,-13,-72,-81,-116,-24,-45,46,-20,114,97,-14,125,11,22,26,27,-2,-88,-28,-76,119,50,52,66,65,120,-42,-43,-59,-56,-28,-42,-87,-18,-47,-85,74,119,97,-6,-127,-86,30,18,-43,48,-73,22,-5,34,122,9,115,-32,-63,-13,61,119,18,-113,-12,80,26,-39,-76,-101,-104,-6,48,38,-82,-52,-91,-38,112,110,115,76,69,100,-116,109,3,-35,16,94,24,110,86,25,-5,84,2,62,57,-121,-28,-108,29,127,-25,89,16,-86,15,-68,97,-115,-73,-110,-13,41,16,-47,-74,75,-71,-52,-20,-29,3,-34,68,-2,-29,63,-5,95,-79,26,-42,-91,-109,-19,107,-102,62,111,-35,80,36,55,-65,26,76,-86,26,-88,-116,110,84,-62,-13,120,-31,-47,-32,84,-98,58,74,18,-22,5,-83,-3,11,53,114,32,-118,16,-91,-74,-67,-68,78,-34,102,88,-80,-5,63,-35,22,-87,-97,-30,-76,94,116,44,-109,-122,38,112,-103,99,-119,49,35,107,108,47,54,11,-50,-73,37,-56,71,-125,108,-47,15,-115,-65,-90,-13,-27,-16,-94,72,-101,-74,-58,27,121,-91,110,-101,45,-54,105,-8,-88,-66,-71,-128,-35,-53,-50,-51,-85,113,96,16,-72,-80,-54,78,47,75,-82,-115,-53,40,-39,54,-43,23,-35,43,81,125,-8,51,49,-91,122,123,-102,-65,-78,19,14,51,-68,60,43,-36,105,44,-100,36,89,-40,123,31,105,26,-128,63,-49,-115,48,96,-91,-73,99,37,2,3,-52,-103,-11,10,31,-106,-119,-67,118,-71,-67,-52,-12,43,-21,99,-64,-88,64,100,-62,-11,-32,23,-90,68,-102,116,-21,-78,1,108,-2,116,-122,114,53,-33,102,65,33,73,92,-79,-51,-50,-65,49,76,119,-51,15,-21,95,-109,80,17,7,115,115,-117,-77,-39,-115,-19,-83,-35,-122,56,94,1,-13,83,8,-84,72,-88,87,77,-82,-125,-18,75,10,-106,51,-59,120,-85,22,-45,-68,-44,-38,64,38,-75,-69,122,88,53,18,41,-108,48,38,-127,34,-85,36,-116,-96,56,105,38,76,92,-41,99,-101,-100,112,74,57,60,85,-14,95,0,-73,-46,12,-93,-14,-78,-1,-2,-10,34,111,115,-91,16,-79,76,-108,-8,-84,33,111,-98,2,-6,8,0,-77,1,52,18,-5,-77,-46,-80,-20,-61,-30,-81,-73,-7,49,-107,-25,-97,-125,69,-89,31,-124,-108,76,96,58,88,24,49,79,11,-43,-60,100,108,62,21,-72,-111,81,46,-108,-107,29,90,-13,55,-23,-63,-10,-128,-124,86,88,3,-39,-39,98,-57,-24,-97,-124,85,-84,-78,4,11,59,-73,120,66,21,-73,20,-95,91,-53,76,98,-29,49,-76,-74,-67,-80,-29,-106,111,60,32,-127,-87,104,30,95,-21,93,-23,-97,26,-46,63,12,-28,123,12,30,102,-115,36,74,-54,-54,-103,-57,-95,-72,-60,24,-14,-41,27,9,19,-74,-12,-65,-7,17,122,-85,123,16,-127,22,75,-85,-28,-50,125,-102,-28,24,120,-53,-128,-108,-65,-37,60,-53,-10,28,-38,-11,71,-45,21,-77,-108,-115,-24,103,-29,121,-23,11,-102,-115,-108,-78,-55,84,-17,-58,-8,-118,-119,-56,1,-109,42,-94,51,54,6,-30,56,12,23,-10,121,-113,-74,9,12,0,-93,67,51,-110,44,-69,-40,-72,49,-16,-31,-16,9,-43,7,90,96,-63,-24,-74,-26,35,-16,109,-101,38,87,-13,11,-18,-54,33,37,106,84,79,80,23,-76,-80,-45,-106,56,3,-103,-92,86,-81,68,90,-126,-125,102,-83,-36,83,97,-39,-44,-14,-14,79,-9,-31,119,114,29,-27,-29,55,-72,-3,54,49,-40,22,-37,54,68,71,66,-66,-23,49,69,-73,83,-14,-70,9,117,-63,111,65,66,92,58,-56,15,20,52,-72,-4,34,-94,119,-95}
+
+#define UPDATE_GATE_WEIGHT_X4 {-62,78,83,104,-68,28,-33,-63,-58,104,-89,17,-70,83,-16,-85,-80,-116,1,-40,-42,101,-9,40,-93,-83,31,4,-104,23,107,-39,101,88,95,-110,-81,74,-16,-99,121,-111,-83,-98,42,73,-74,50,71,18,18,-89,-63,-20,-4,123,-98,120,-5,-84,-128,-88,-109,-13,44,66,-100,-69,-105,-126,55,-25,-16,-8,-73,-22,-51,70,-68,-11,25,-91,62,-29,-88,16,19,-28,34,-41,-22,110,-39,121,116,-29,-16,55,42,-124,-7,20,66,-69,9,-67,-125,103,52,104,-29,117,60,-40,-78,-100,63,-40,-94,-1,15,1,-76,-25,71,-97,-2,-12,-76,-68,-63,-62,-127,31,31,32,71,-89,-25,-75,-103,15,120,-32,78,-20,-66,-78,124,77,41,31,38,101,-118,-92,-13,16,-23,40,-71,-51,-120,-97,127,107,59,-52,-80,-54,28,59,-22,-52,54,-89,33,-78,51,41,-2,-17,32,124,82,34,-105,-102,-87,-95,-109,54,26,-9,-47,-53,85,48,-31,-40,38,56,86,103,-5,37,-59,24,-114,-55,44,13,-122,-46,-97,42,90,81,-98,-75,-14,119,-88,5,105,-20,-123,-37,-19,-118,43,-45,24,29,95,36,-30,-10,115,106,-12,110,11,84,42,83,14,57,49,-80,-35,-127,10,-74,121,-10,-56,-8,85,50,-120,37,44,-34,37,15,-25,-44,98,-114,16,-88,83,-87,-31,6,-98,-53,25,88,-54,18,111,8,127,115,88,19,-78,61,-96,66,-111,7,-49,-67,-114,-108,-65,-67,114,93,111,80,-100,-6,28,107,-17,-48,-74,-11,-31,-68,-111,25,40,-61,-18,31,33,25,66,25,35,38,19,29,74,-82,-43,71,31,-59,48,-70,112,62,119,121,-23,0,53,25,-80,-31,-26,-4,102,106,41,-7,74,17,-81,-6,89,-44,-27,53,-123,-60,55,-17,87,62,-54,19,-126,116,32,-67,-121,-64,-113,109,-66,45,110,117,97,70,125,-103,-86,-90,-118,12,125,-114,-108,97,-21,-68,15,20,58,57,-17,112,16,121,26,-65,8,24,70,-66,13,-43,-109,74,-67,-127,-55,29,41,-104,-16,-42,59,29,42,-31,88,-69,81,35,-85,-87,78,-125,-82,4,-55,-17,27,54,16,-98,-89,5,109,95,66,101,67,-39,-52,-82,118,18,54,56,-74,-88,-39,65,57,43,33,-63,-19,-113,-16,-57,86,89,72,-73,77,-91,-68,1,-10,-8,126,80,-122,112,-19,37,110,-51,-7,-27,-109,-75,-50,10,-17,67,58,-42,78,-5,-84,4,103,-50,-88,79,15,60,-3,-18,94,81,2,-55,16,23,-61,-16,66,68,-52,44,-23,-114,51,-103,39,-111,-110,-88,34,92,-91,-23,96,-123,-35,111,31,72,-60,-80,-64,24,61,43,88,58,-1,-17,75,-7,-108,42,-38,-125,55,53,-108,23,31,-11,117,96,73,114,38,-13,-26,126,38,25,75,-105,-113,-88,-57,96,65,-105,-9,120,-92,13,9,-128,0,-70,-92,-25,-3,-40,59,85,124,-82,-30,29,93,-38,14,-17,-39,103,-27,-43,-100,3,-95,23,-91,-37,-55,2,125,-121,107,76,-34,58,52,-110,72,54,85,108,-83,16,110,-43,12,30,-31,-116,-68,-44,84,66,-83,28,-78,22,-86,89,65,60,-79,-81,21,0,-118,6,92,-6,11,-8,56,-108,60,27,87,126,-106,-80,-3,-34,-116,88,35,64,-38,-42,33,-125,53,22,-24,126,-79,75,-94,-45,85,-116,15,-69,-11,-116,77,28,91,-29,-109,-41,-22,81,-94,-70,100,-3,95,94,82,31,-89,-81,97,-80,-1,-116,-2,5,88,42,111,119,-113,-46,116,5,36,105,74,-40,-64,-21,93,-105,-110,-109,7,105,-62,78,-11,-20,-74,64,91,5,101,-34,35,54,-112,72,21,-32,-91,46,51,-124,32,-95,-59,90,-6,120,21,-83,98,60,36,6,29,44,25,-17,10,-29,-41,40,-19,-18,57,65,110,4,-56,51,89,87,-50,112,-12,109,109,-50,34,38,-123,-115,-88,-38,85,25,-32,-27,-18,37,-30,-13,87,-52,20,-84,9,1,18,-106,118,87,-19,103,-81,85,23,76,21,44,-45,-50,-120,36,106,78,40,101,-120,-49,20,-119,115,16,78,-102,2,68,18,20,-72,-20,-103,104,70,119,75,-113,11,23,83,107,100,43,64,-67,44,-88,117,18,126,105,-9,44,-63,-85,98,119,63,4,-82,-48,30,-21,115,-53,114,16,-62,-42,123,-84,-39,-7,106,83,-11,-39,25,-8,15,-114,104,106,-9,31,84,23,52,-54,-13,-34,88,-76,46,74,77,80,-40,-51,101,68,64,77,-104,-40,73,82,108,-111,125,19,-13,-75,52,-116,33,-104,34,-41,125,60,116,-118,-54,109,65,77,6,82,-114,-29,-47,-6,57,-96,-128,-121,85,-91,2,81,-2,-43,115,114,-117,-102,-80,-76,7,-124,-65,-1,100,-82,-20,64,-73,-75,82,32,98,121,-75,27,72,34,-109,-117,-83,-98,-24,-24,99,21,43,64,-125,-88,-91,36,-94,-87,-106,-100,-97,115,95,59,-39,-29,-4,-36,-46,-84,15,-121,-127,-45,58,-46,-94,4,-21,29,123,-111,-128,4,53,45,-27,73,29,-44,-80,-94,-117,-109,100,-78,-84,-18,53,101,-25,-7,-27,84,44,101,28,108,105,60,95,-95,-126,-24,-59,-61,15,15,88,-71,-11,-90,94,-59,25,112,-38,126,58,-48,-64,-114,-88,71,122,36,112,1,82,-14,62,39,-62,-42,127,106,58,52,-28,-85,95,-126,50,109,5,-45,-86,-68,125,105,-6,-100,-102,74,-83,-18,-9,-127,90,-33,-18,-68,-100,48,101,-41,-86,-94,104,-68,-124,57,22,-93,17,-22,108,-99,21,13,-91,-25,-64,31,-22,-86,50,-71,-100,66,73,85,-102,-27,-27,-43,-92,-23,-17,-70,-31,69,115,122,86,4,-11,127,-105,92,85,-70,33,123,-40,125,-49,-95,-112,115,-43,124,84,117,-82,-87,61,-61,114,-32,104,-8,57,-71,62,18,-31,-18,30,18,112,94,-84,49,-7,123,-119,-90,-92,103,5,-101,-26,37,78,-31,-92,-1,-10,-50,-21,-111,35,-50,90,-60,-89,-73,60,124,-45,-2,-13,96,-96,-18,48,54,-75,31,-125,-1,-34,-64,88,93,-19,-98,-83,75,-80,-69,-91,16,-75,104,29,-6,92,112,12,21,15,-38,-33,-24,118,-56,-2,56,127,127,-14,94,-38,127,83,113,29,-48,-80,97,-50,-48,-109,-57,61,-96,41,4,-111,-4,-26,85,67,-108,-14,106,76,-113,-31,-12,-2,-30,-29,-76,-7,80,-41,26,63,94,-5,116,58,-39,-13,-76,95,44,-79,-109,-72,-101,-81,-104,26,-122,-42,38,-116,-6,-24,48,-91,112,-109,-103,-45,38,46,-82,-19,99,107,-119,-20,-52,114,-91,-102,49,62,35,97,-38,-14,112,111,107,-35,108,125,110,11,115,80,47,36,54,22,76,26,69,55,11,-65,-50,27,100,-2,-116,26,-73,76,37,-88,109,-28,3,-86,-56,26,71,-76,-35,119,16,-88,-125,-116,108,50,94,52,24,110,-47,84,15,66,110,65,86,-62,-115,-13,-65,120,25,-42,-5,120,-90,-31,-13,-43,84,-59,2,-47,-27,-32,-16,-56,62,-28,57,84,-94,-98,72,-42,-121,-87,-28,58,-101,74,-74,-18,-108,-47,29,18,-58,-22,27,-85,127,74,-25,5,121,-83,-91,119,89,97,16,-3,110,11,-101,-6,-86,-127,15,53,45,114,-54,-86,-68,30,97,32,105,-118,-8,18,-115,-43,-73,16,-88,-91,-66,48,-110,-73,-13,-74,-71,-67,-128,22,41,-5,16,-68,-35,78,-53,34,-47,122,-74,-34,-50,102,-51,9,75,115,-71,88,-85,-80,113,-32,-52,-63,-20,-5,96,63,16,-13,-29,61,3,-35,-72,22,-80,119,-34,18,68,-87,-54,-97,78,47,-12,75,43,-88,115,87,-91,-82,-21,-115,99,77,16,-82,-79,-53,-64,40,-88,-125,76,-18,-108,-39,64,54,100,75,-8,10,-84,-43,-62,23,-11,-106,33,51,111,-35,-32,43,23,-59,-98,120,2,81,-90,125,68,-85,-6,22,8,-8,-102,51,116,-45,0,-68,-77,49,-21,-91,-78,-44,1,-38,52,122,1,123,108,64,18,38,-5,-102,-2,-65,116,-75,-77,-69,-46,-78,-122,19,114,122,-80,88,-20,14,53,51,-33,53,-61,18,-30,-68,102,60,65,41,-81,-108,-73,43,33,-36,73,48,-7,38,49,105,92,44,-79,-127,-107,34,-25,-100,-51,36,-50,-85,-97,36,-125,89,-65,-40,49,-116,69,-96,-89,123,76,31,119,56,31,105,-124,105,-51,26,15,38,-108,76,76,-128,-21,63,95,92,96,-41,58,-49,-109,-115,80,99,88,-101,24,48,17,96,7,-100,49,112,79,-91,115,-73,115,74,11,57,-43,99,-117,37,-77,60,-60,85,100,2,-39,3,-115,-14,108,95,62,-52,-19,-103,-83,0,21,-73,-72,-11,-35,10,-122,-46,-111,12,81,31,56,-106,94,-93,46,-14,-108,-119,1,-67,-13,-78,-107,-1,29,118,83,-71,8,-2,90,-10,-13,-67,-84,-52,72,34,55,111,-23,-63,-54,-10,-103,-118,3,-119,-103,-128,-57,-124,-95,-56,-92,1,86,86,-72,88,-60,-109,-81,42,68,3,24,-39,-14,-94,90,51,-126,-39,-41,98,27,54,-125,6,102,-57,9,-24,19,-30,-83,56,-36,-97,-74,-124,-12,12,83,23,97,85,-65,-84,-7,-10,-39,121,-44,-78,17,4,122,-113,-14,-74,-14,11,-85,59,123,9,79,12,-9,-73,16,120,-127,0,-31,-93,119,66,22,21,75,67,114,51,29,-73,-85,20,-28,-110,-27,44,-29,-95,-50,91,125,-69,55,-40,-72,-53,-102,76,-28,-72,-3,49,54,98,24,-29,120,-16,49,-31,-40,49,-53,-76,-128,-16,22,9,-37,-74,-108,-67,-65,-43,54,7,68,-80,-37,-29,60,90,71,96,66,-106,-53,111,-10,-63,-66,-24,-23,60,28,32,-38,-74,49,-26,69,-127,-11,-87,71,35,-73,-16,83,104,-45,30,21,109,-14,-101,-70,95,-77,-21,-108,38,9,87,117,93,-115,-23,-24,-13,-63,11,111,-97,103,26,-29,-18,65,-54,66,-46,121,63,-23,33,92,37,58,12,11,-28,-102,106,-56,84,15,123,-115,12,-108,79,20,80,52,30,-78,102,-55,23,-72,-76,-4,-115,84,36,-17,-80,34,-45,-94,74,-58,-54,-8,-106,119,56,-95}
+
+#define RESET_GATE_WEIGHT_X2 {65,-28,-36,70,67,55,86,-53,23,25,-19,59,67,43,-92,48,94,-113,60,-58,24,76,-15,-19,15,36,-74,115,-59,3,34,-43,21,-125,-45,127,92,-5,-65,-103,-83,51,42,109,-51,-39,-97,-64,-4,57,79,-42,88,-4,-108,83,-4,20,86,82,-87,95,12,-69,28,30,-97,-13,-33,-48,75,119,18,31,-83,-59,-114,-21,127,34,-27,-26,-47,86,-83,-49,8,29,-48,-31,-94,-59,-49,-36,0,28,-64,113,65,-8,47,-55,-49,112,-40,-39,-100,-42,32,82,27,-78,-105,3,19,88,15,-121,-120,7,-9,-107,-23,104,114,66,113,-102,-90,24,80,-34,106,48,-91,-11,22,-96,-82,75,26,-42,59,-45,23,78,79,-76,6,20,63,-118,-125,-42,111,-80,-79,-59,-121,-79,83,49,-95,-49,81,15,-11,-54,-45,64,-30,-49,81,-57,71,91,113,-46,-63,-4,-96,-95,-27,5,-52,35,67,112,58,-62,48,112,106,80,-19,103,4,-32,-118,-74,12,13,-126,-20,-5,115,-74,-30,123,-74,-66,11,-99,-16,-102,-100,-81,-20,-24,92,-79,-31,44,-24,-85,-123,5,-52,-111,73,29,28,-19,18,23,-112,-32,-52,-38,99,-59,-52,-31,87,124,28,-42,-39,81,-87,-24,16,47,20,36,1,-70,121,124,13,1,30,112,87,-86,11,36,-18,74,-104,-100,-14,0,-24,28,-53,53,66,-63,-109,-10,-50,-15,63,34,82,-59,85,-44,105,-10,-27,99,5,-105,-69,-75,2,-47,-66,71,-30,73,-11,-45,93,47,-37,-34,-8,90,-106,103,112,65,-100,-25,-13,38,74,54,27,-81,-8,19,49,94,118,-121,-116,120,-71,-87,36,-65,-112,8,-59,-106,-40,-16,68,87,-109,53,12,-7,9,6,67,78,8,-42,-123,79,-93,-102,-40,12,-66,-109,47,15,-8,-5,51,-62,111,8,-66,-82,-102,120,68,-67,9,-73,-69,-79,56,-36,-10,-69,-99,-2,-11,-66,76,37,4,92,1,-89,74,85,-124,-25,40,106,-102,42,-19,-30,0,-70,82,84,106,-84,48,16,37,33,-114,38,-29,-117,51,101,26,56,127,-81,-76,38,-124,103,-25,54,-21,-112,40,102,3,63,36,-54,16,-18,114,39,5,105,83,117,-92,-5,-14,-102,-87,-48,-77,-19,-82,-55,119,-95,-43,97,126,-48,-50,-97,-25,-102,-53,47,111,66,-82,-16,-38,76,-15,23,20,88,-19,125,-90,107,-31,102,107,30,-111,71,38,26,43,-85,82,29,-99,126,-109,21,-42,-107,-115,-123,30,-46,39,4,-19,-44,-69,86,41,4,33,57,-110,95,-22,123,71,1,119,77,90,105,81,-68,74,-38,-109,6,-82,-20,-115,-104,38,27,-44,82,-107,99,-41,-28,-55,100,10,-42,7,91,56,-91,113,-91,70,-66,-48,-18,109,-27,42,-89,-20,-63,-41,77,-13,73,10,-74,-51,88,28,50,-5,7,92,18,-98,-41,-14,8,-16,99,30,-109,7,52,110,-120,-17,33,53,1,106,-99,-14,-93,-46,-60,7,-54,100,91,93,89,-84,118,58,-84,38,57,-24,-25,22,-52,119,-85,-75,-79,60,-97,1,-13,54,-43,98,-92,65,37,-110,64,21,-18,-111,-9,86,90,42,-71,-29,86,-10,-15,-20,106,-45,-22,44,105,55,-61,-89,-119,31,93,-97,-35,9,-113,86,-113,22,-68,-29,-36,-123,98,79,34,-29,71,44,49,56,93,4,63,-3,45,12,54,-96,27,-55,-72,84,69,27,-28,-111,-57,-41,92,-106,-90,55,105,-60,94,34,94,-1,112,-86,-55,-58,68,-65,37,110,-107,-62,66,61,-69,-52,27,-61,70,-56,-116,-101,-103,127,-98,-79,25,-117,40,33,111,10,-3,-65,1,84,-41,5,-93,-85,-96,78,54,43,70,77,-53,-71,-38,48,103,-88,115,94,20,-5,-125,-7,-61,30,-25,-57,-42,-100,63,-114,40,-53,123,50,-7,121,75,67,75,3,-38,-101,-44,-46,54,38,-22,4,18,102,-126,44,86,-10,-1,118,98,102,-125,74,32,18,74,73,72,64,47,105,-72,5,73,98,9,39,18,10,-68,81,-128,-89,27,-51,51,16,119,-71,-53,51,-84,107,-116,7,73,106,20,52,-85,-74,-103,-18,29,-13,73,106,-92,107,-115,5,65,83,-79,-7,98,-42,-33,82,-64,75,-32,100,-67,-122,84,43,-111,114,-99,46,12,99,43,50,-24,-88,-60,111,68,64,54,-105,-120,119,68,5,51,63,89,-57,-75,-25,-35,-28,42,-64,101,-103,-35,-99,-96,-18,-64,-94,-46,89,-65,-38,-1,-97,127,-67,84,-18,86,115,60,-78,-109,-61,-93,-67,-87,-80,124,26,-9,111,115,-88,-71,-86,-71,-65,-15,108,-25,111,9,86,-115,-55,-23,57,27,103,108,-28,65,86,68,114,62,126,-4,33,-34,-123,87,-76,-104,-126,26,-13,44,108,105,12,-35,-58,3,-5,-32,91,49,89,88,37,38,119,-125,-48,37,53,85,-73,67,116,-116,-127,103,127,-115,92,-35,-83,-45,25,-96,-13,-90,41,-27,105,119,85,27,-3,-64,93,17,-53,104,-70,-43,65,45,-90,61,-31,-49,-99,84,46,93,-37,84,-79,13,-59,-76,62,19,-11,-96,-104,-3,-8,-78,92,98,50,-7,-39,-82,37,-126,127,-113,67,94,115,-9,-33,-57,26,-67,9,28,-8,81,-98,-10,84,34,111,-95,127,75,38,-7,-2,-71,-62,-72,99,-74,25,123,114,51,-28,103,-110,43,113,7,58,75,-95,-52,19,-112,101,26,65,-115,-91,85,-5,-45,110,-103,-34,-69,50,-15,-19,-110,-44,-7,-112,-93,29,50,-84,-55,-41,11,19,-31,-47,-62,-12,-105,-47,68,-124,-47,-113,-55,30,25,55,-14,85,-66,-5,-105,62,-27,-89,-124,-84,112,34,52,25,104,32,-30,84,-46,-38,60,-2,-107,-95,-86,-25,117,60,-121,32,84,8,-88,-1,91,-46,-76,81,44,79,105,-105,82,20,59,-115,96,21,-113,19,92,122,76,36,-112,78,16,38,73,69,54,97,41,-49,78,-71,-69,95,-85,117,10,-98,25,72,126,47,-17,4,-44,-32,-16,-12,105,76,4,-82,-91,-21,-117,30,-67,46,-8,-125,84,-51,94,0,-60,127,99,43,60,16,55,-16,-121,-61,-115,38,25,17,35,23,68,9,-107,-44,118,119,43,99,-95,40,42,-70,54,19,92,-36,82,-35,122,-96,54,-29,-50,100,-79,-71,-99,-60,-2,-100,41,97,-93,-58,-123,126,-102,81,-5,83,110,-50,58,-86,41,-126,43,-49,98,-59,94,-91,115,16,-3,-58,-30,-109,110,-114,124,22,-88,-79,-29,-100,54,-33,23,-1,-77,52,-126,114,70,-50,90,82,-13,-25,-125,16,48,101,-93,19,-103,67,-1,-32,28,-72,-26,73,45,-22,83,-68,-61,89,57,-37,90,16,-38,-124,47,-5,-113,81,71,-30,-46,-18,-52,-104,-40,49,-101,106,38,6,125,-70,25,-88,-50,-77,-12,53,110,-84,23,-109,-53,112,2,88,101,-55,-10,-72,123,-35,42,-15,98,-85,48,-100,-54,123,52,-105,7,-28,86,-125,85,12,86,-34,103,-8,-65,-24,88,-43,57,-16,114,-98,101,81,34,-83,-8,3,-27,5,110,-24,-80,9,85,-108,96,-93,-34,76,-107,71,84,-98,-10,-94,71,71,-38,-96,-112,100,127,52,-32,-127,102,61,-119,-46,-119,125,109,-23,-80,-11,-68,84,-53,35,-115,105,-88,72,110,109,17,-121,80,-87,-72,-123,-31,13,71,63,-126,107,115,-100,27,39,10,75,-128,58,103,-104,126,-59,31,89,-67,97,-96,-69,87,19,99,49,111,9,91,-98,-4,-118,103,-63,-92,-74,106,-53,52,122,12,24,123,-126,-105,104,38,107,118,10,74,-38,14,-11,76,-112,-112,30,-47,95,112,65,-94,120,21,85,33,52,55,-54,-57,-77,-16,52,88,-81,-77,52,0,90,-126,66,88,-81,83,50,81,-28,-56,-36,-8,50,4,115,58,-30,-53,-78,-114,-16,-100,33,-80,-6,96,108,4,-27,-90,8,48,-118,-112,22,-56,114,-66,4,-11,-48,118,61,104,118,-27,13,52,2,74,112,-127,48,27,59,-37,-58,18,85,-5,-41,-91,-32,-56,-5,-40,-117,-89,-48,-8,-32,43,-75,-118,-109,-92,-122,67,88,107,79,-90,30,-65,-102,-100,-112,-104,57,-33,-103,69,-26,15,-12,106,-17,50,-20,33,51,14,98,-118,-82,63,-65,-40,-89,-8,-75,-16,-1,-13,118,76,34,-100,83,-10,72,26,-13,50,92,69,12,-33,-66,76,62,-47,-10,-31,60,-52,52,74,77,30,59,-98,-78,-124,107,38,-121,97,-39,-12,-1,63,-112,71,-65,9,-66,-31,50,39,77,56,-81,-125,-109,-36,-62,-74,12,31,-128,64,62,86,-9,26,69,-45,-35,46,39,95,78,-22,81,-5,-22,90,-47,-36,58,65,88,-89,37,81,115,-3,-108,52,7,-32,80,-96,-24,-22,104,-95,-3,117,59,105,66,-113,28,55,-75,46,45,-118,79,-3,-113,119,-114,-3,-64,56,34,118,67,32,25,-8,1,-64,91,112,31,-88,91,-53,115,33,-3,14,-43,82,-42,-57,-128,-124,127,-69,-112,98,-40,-9,-35,29,-87,-74,27,120,77,-70,93,39,95,118,-39,82,83,-26,60,106,-116,43,8,-114,66,28,5,-95,111,-11,68,24,44,65,-93,26,50,13,100,-33,-93,99,6,0,77,98,5,-10,84,77,46,4,-13,-31,-83,84,-78,-97,-58,76,-71,-6,2,27,-73,81,100,-126,-7,117,-10,-6,118,52,-4,25,56,43,-26,-43,-64,23,-44,-108,-53,45,-117,91,-88,-45,-87,63,120,82,70,73,-108,89,-12,35,-81,-98,-124,-114,-126,86,21,-35,-32,-105,122,111,98,77,38,-18,-7,-48,69,22,74,-127,-62,-47,-20,-8,9,-48,-2,-53,-58,-37,51,27,-91,57,69,-27,-91,76,-127,78,76,-108,-1,13,-71,-41,38,46,60,-5,-73,-98,123,106,35,-38,-102,2,125,25,-63,-110,9,25,-106,-21,-113,-111,97,-33,33,83,55,123,72,-11,-78,-85,35,56,-110,-18,118,9,85,-100,-65,126,24,-18,50,-32,98,40,114,59,-60,-6,-72,-68,16,21,-10,-6,113,-23,-24,-27,-116,-126,119,6,-78,118,15,-53,7,113,3,83,52,44,-44,-53,-85,78,-108,-83,-128,63,-10,-122,-92,24,28,21,-87}
+
+#define RESET_GATE_WEIGHT_X4 {65,28,-28,30,-90,106,24,80,-36,-97,70,-13,80,-19,-34,103,67,-33,55,-48,106,4,48,-32,86,75,-53,119,-91,-118,-11,-74,23,18,25,31,22,12,-96,13,-19,-83,59,-59,-82,-126,75,-20,67,-114,43,-21,26,-5,-42,115,-92,127,48,34,59,-74,-45,-30,94,-27,-113,-26,23,123,78,-74,60,-47,-58,86,79,-66,-76,11,24,-83,76,-49,6,-99,20,-16,-15,8,-19,29,63,-102,-118,-100,15,-48,36,-31,-125,-81,-42,-20,-74,-94,115,-59,111,-24,-80,92,-59,-49,3,-36,-79,-79,-59,-31,34,0,-43,28,-121,44,-79,-24,21,-64,-125,113,83,-85,49,-123,-45,65,127,-8,-95,5,-49,-52,92,47,-5,-55,81,-111,15,73,-65,-49,-103,112,-11,29,-54,28,-83,-40,51,-39,-45,-19,64,18,42,-100,109,-42,-30,23,-49,-112,-51,32,-39,82,81,-32,-57,-52,-97,27,-64,-78,71,-38,91,99,-4,-105,57,3,113,-59,-46,-52,79,19,-42,88,-63,-31,-4,87,88,15,-4,-121,-96,124,-95,28,-108,-120,83,7,-27,-42,5,-39,-4,-9,20,-107,-52,81,35,-87,86,-23,82,104,67,-24,112,16,-87,114,95,66,58,47,-62,20,12,113,-69,-102,48,36,112,1,-70,54,121,27,-2,-102,-11,-87,124,-81,13,-8,-66,-48,76,-77,1,19,30,49,37,-19,4,-82,112,94,87,118,92,-55,1,119,-86,-121,11,-116,-89,-95,74,-43,36,120,-18,-71,85,97,-124,126,74,-87,-104,36,-25,-48,40,-50,-100,-65,-14,-112,106,-97,-102,-25,0,8,-24,-59,42,-102,-19,-53,28,-106,-53,-40,-30,47,0,111,53,-16,66,68,-70,66,82,-82,-63,87,-109,-109,84,-16,106,-38,-10,53,-50,12,-84,76,48,-15,-15,-7,63,9,16,23,37,20,34,6,82,67,33,88,-114,-19,-59,78,85,8,38,125,-29,-90,-44,-42,105,-123,-117,107,51,-31,-10,79,-27,-93,101,102,26,107,99,-102,5,-40,56,30,127,-111,-105,12,-69,-66,-81,71,-76,38,-75,-109,2,47,38,26,-124,43,-47,15,-66,-8,103,-85,-25,82,71,-5,-30,51,54,29,-21,-99,73,-62,-11,111,-112,126,40,-109,-45,8,93,-66,102,21,3,-42,47,-82,-37,-102,63,-107,36,-115,-34,120,-8,68,-54,-123,16,30,90,-67,-106,9,-18,-46,114,39,103,-73,112,-69,39,4,5,-19,65,-79,-100,56,105,-44,83,-69,-25,-36,-13,-10,117,86,-92,41,38,-69,74,-99,-5,4,-14,33,57,-41,-110,-14,-15,68,-20,-65,95,8,-22,-16,106,37,-45,110,123,99,71,30,-22,-107,44,-62,1,-109,119,7,105,66,55,61,77,52,90,110,-61,-69,-89,-52,105,-120,81,-17,-119,27,31,-61,-68,33,74,53,93,70,-97,-56,-38,1,-109,106,-35,-116,9,-101,6,-99,-82,-14,-113,-103,86,127,-20,-93,-115,-46,-113,-98,22,-79,-104,-60,38,7,-68,25,-29,-117,27,-54,-44,100,-36,40,-123,33,82,91,-107,93,98,111,79,10,99,89,-41,-84,34,-3,-29,-65,-28,118,-55,58,71,1,44,84,100,-84,10,38,49,-41,56,5,-42,57,7,-24,93,-93,4,-85,91,-25,56,22,63,-96,-3,78,-91,-52,113,119,45,54,12,43,-91,-85,70,-75,54,70,-96,77,-66,-79,-48,60,27,-53,-55,-71,-18,-97,109,1,-72,-38,84,48,-27,-13,42,54,69,103,27,-88,-89,-43,-20,98,-28,115,-111,94,-63,-92,-41,65,-57,20,-41,-5,77,37,-13,-110,92,-125,-106,-7,73,64,10,21,-90,-61,55,30,-74,-18,-51,-111,105,-25,-60,-57,88,-9,28,86,94,-42,34,-100,50,90,-5,42,94,63,-1,-114,7,-71,92,-29,112,40,-86,-53,18,86,-98,-10,-55,123,-58,50,-7,-103,121,-18,-46,-35,89,-58,75,29,67,-13,-65,3,-38,-5,75,73,3,106,-1,-32,-97,91,-38,-92,-101,107,127,49,-67,89,-44,-115,-46,5,84,88,-18,37,54,65,38,83,86,38,115,119,-22,-79,4,-7,60,-125,-78,-48,18,98,102,-42,-109,37,-61,53,-126,-33,44,82,-93,85,-67,-73,86,-64,-10,75,-87,67,-80,116,-1,-32,118,100,124,-116,26,-127,98,-67,102,-122,-9,103,111,127,-125,84,74,43,115,-115,-88,92,32,-111,18,114,-71,-35,-86,-83,74,-99,73,46,-71,-45,-65,25,72,12,64,99,-15,-96,108,-13,47,43,105,50,-25,-90,111,41,-72,-24,5,-88,9,-27,86,105,73,-60,98,111,-115,119,-55,85,9,68,39,64,-23,27,57,-3,18,54,10,-105,27,-64,103,93,-68,-120,81,119,108,17,-28,-53,-128,68,-89,5,65,104,86,-70,27,51,-51,63,68,-43,114,65,51,89,16,-57,62,45,126,-90,119,-75,-71,-25,-4,61,33,-31,-53,-35,51,-28,-34,-49,-123,-99,-84,42,107,-64,87,84,-76,46,-116,101,7,-103,-104,93,-126,-37,73,-35,106,-99,26,84,-13,-79,20,-96,52,-18,44,13,108,-59,-85,-64,-74,-94,105,-76,12,62,19,-115,-11,-91,117,-67,60,46,-96,85,-104,-5,-121,-8,32,-125,-3,-45,-8,110,84,84,8,-51,-78,-103,92,-34,-88,94,-1,0,98,-69,50,50,91,-60,-46,127,-7,-15,-39,-19,-76,99,81,43,-82,-110,37,-44,44,60,79,16,-126,-7,127,-112,105,55,-105,-16,-113,-93,67,29,82,-121,20,-61,94,50,115,-84,59,-115,-115,38,-9,-55,-33,-41,96,25,21,17,-57,11,26,19,-113,35,19,23,-67,-31,9,-47,92,68,122,9,28,-62,-8,-12,76,-107,36,-44,81,-105,-98,-47,-112,118,78,119,-10,68,84,-124,16,43,38,99,34,-47,111,-113,73,-95,69,40,-95,-55,127,30,54,42,97,-70,75,25,38,55,41,54,-49,19,-7,-14,-2,85,78,92,-71,-36,-71,-66,-62,-5,-69,82,95,-35,-72,-105,99,62,-85,122,117,-96,-74,-27,25,-89,10,54,-98,-29,123,-124,114,-84,25,-50,72,100,51,112,-28,34,126,-79,47,-71,103,52,-110,25,-17,-99,4,-60,43,104,113,32,-44,-2,-32,-100,7,-30,58,84,-16,41,-12,97,75,-46,-95,-38,105,-93,76,-58,-52,60,19,-2,4,-123,-82,126,-112,-107,101,-95,-91,-102,-21,81,26,-86,65,-25,-117,-5,30,83,110,-38,-50,-124,57,-31,-16,13,58,47,-86,-5,114,71,-98,63,41,-113,-126,81,101,-126,81,107,43,71,-49,-30,34,115,-83,-100,98,-46,-59,-18,-8,27,3,39,94,-52,-91,-104,-27,10,5,75,115,-40,16,49,110,-128,-24,58,-3,-101,-58,106,-80,103,9,-104,-30,38,-109,6,85,126,-108,-59,110,125,-114,-70,96,31,-93,89,124,25,22,-88,-34,-67,76,97,-88,-50,-79,-77,-107,-96,71,-69,-29,-12,-100,53,84,87,-98,19,54,110,-33,-84,-10,99,-94,49,23,23,-1,-109,71,111,71,9,-77,-53,52,112,-38,91,-96,-98,-126,2,114,88,-112,-4,100,-118,70,101,-50,-55,127,103,52,-63,90,-10,82,-72,-32,-92,-127,-74,-13,123,-25,-35,102,106,61,-53,-125,42,16,-15,-119,52,-46,122,48,98,101,-85,-119,12,125,24,-93,48,19,-100,109,123,-23,-126,-103,-54,67,123,-80,-105,-11,104,-1,52,-32,-105,-68,38,84,107,28,7,-72,-28,-53,118,35,10,-26,86,73,-125,-115,74,105,-38,45,85,-22,12,-88,14,72,-11,83,86,-68,-34,110,76,109,-112,-61,103,89,-8,17,-112,-121,30,57,-65,-37,-24,80,-47,-87,95,90,88,16,-43,-72,112,-123,65,-94,52,120,2,-16,26,-1,69,21,74,85,112,-13,-45,118,-35,33,-127,52,48,76,46,34,39,55,27,-54,59,-100,95,83,78,-57,-37,-77,-58,-10,-22,72,81,-16,18,52,85,26,-5,-13,-22,88,-5,-81,-41,50,90,92,-47,-77,-91,52,-32,69,-36,12,58,0,-56,90,-5,-33,65,-66,88,-126,-40,66,-117,76,-89,62,37,88,-89,-81,-48,-47,81,-10,115,83,-8,50,-32,-31,-3,60,-108,81,43,-28,-75,-52,52,52,7,-56,-118,-36,-109,74,-32,77,80,-8,-92,50,-122,30,-96,59,-24,4,67,115,88,-98,-22,-78,104,58,107,-30,79,-124,-95,107,-3,-53,-90,-78,30,38,117,-121,59,-114,-65,-16,-102,97,105,-39,66,-100,-100,33,-112,-12,-113,-1,28,-80,-104,-6,57,63,55,-112,-75,96,-33,108,-103,71,46,-65,45,4,69,-27,-26,9,-118,-66,79,-90,15,8,-12,-31,-3,50,-113,48,106,-118,-17,39,119,77,-114,-112,50,22,-20,56,-3,-81,-64,-56,33,114,51,-125,56,-109,34,-66,14,4,98,-36,118,-62,67,-11,-118,-48,-82,-74,32,12,25,118,63,61,-65,31,-8,-128,1,104,-40,118,-89,64,-64,62,91,-27,-8,13,-75,86,112,-9,31,-88,-10,91,84,111,123,98,72,-53,77,115,46,77,-11,38,-78,33,4,-3,-13,-18,-85,-7,35,14,-31,-43,-83,-48,56,69,-110,82,84,-42,-78,22,-18,74,118,-57,-97,-128,-58,-127,9,-62,85,-124,76,127,-71,-47,-100,-20,-65,-69,-6,-112,2,-8,126,9,24,98,27,-40,-73,-48,-18,-2,50,-9,81,-35,100,-53,-32,-58,98,29,-126,-87,-7,-37,40,51,114,-74,117,27,-10,27,59,-91,-60,120,-6,77,118,57,-6,69,-72,-70,52,93,-4,-27,-68,-91,16,39,25,95,56,76,21,-127,-10,118,43,-39,-26,78,-6,76,113,82,-43,83,-64,-108,-23,-1,-24,-26,23,60,-44,13,-27,-71,-116,106,-108,-116,-53,-41,-126,38,119,43,45,8,-117,46,6,60,-78,-114,91,66,-88,-5,118,-73,15,28,-45,5,-87,-98,-53,123,7,-95,63,111,120,106,113,35,3,-11,82,68,70,-38,83,-102,52,24,73,44,-108,2,44,125,-44,65,89,-93,-12,25,-53,-63,-85,26,35,50,-81,-110,78,9,-108,13,-98,100,-124,25,-83,-106,-128,-33,-114,-93,-126,-21,63,-113,-10,99,86,6,21,-111,-122,97,-92,0,-35,77,-32,-33,24,33,28,98,-105,5,122,83,21,55,-87}
+
+#define HIDDEN_STATE_WEIGHT_X2 {-3,-33,59,21,117,70,0,44,108,108,-47,-80,-118,34,88,-91,-123,-108,8,51,26,82,-80,107,-100,-69,97,-90,17,19,63,111,-40,-125,110,24,58,-69,26,-31,-65,-37,-47,-41,-109,106,-100,108,-99,108,116,104,86,-50,-45,10,-53,112,34,96,-10,-39,-32,-25,69,102,-2,-4,-25,121,-1,-28,-48,-100,0,-128,60,-73,42,-32,118,-88,-113,-112,-113,70,-98,118,95,77,-52,123,-99,72,26,-102,-32,120,113,22,6,-68,84,-33,103,66,111,60,-76,33,10,25,-43,93,41,-79,110,13,67,107,-113,90,58,64,-125,79,-85,-18,76,80,-59,11,-18,-74,15,-102,99,-19,117,99,65,-50,-108,-121,-9,-104,33,94,-95,110,-48,-97,76,36,1,-58,86,-115,45,-88,38,51,123,-23,-20,-43,-37,15,91,-85,-88,6,-96,58,78,13,23,1,-43,62,-70,-108,44,30,74,90,79,-80,-20,71,-21,0,60,19,-59,-52,44,-14,77,92,-69,121,-123,-27,119,-84,79,87,24,85,118,1,-51,-96,60,102,-6,15,96,120,-109,6,35,11,-119,-109,-18,16,-112,91,-126,71,-29,121,-21,-120,37,57,-117,-39,93,56,-73,-104,77,-107,-52,111,-61,-4,44,-119,67,72,-66,36,-127,-113,-124,123,21,98,84,86,76,23,78,7,-127,-4,1,-46,-107,59,-21,53,-65,-99,-15,-98,53,-31,7,64,7,105,51,-75,50,-52,48,101,-126,-120,5,34,3,81,-39,70,41,112,25,30,79,-6,107,-11,-97,92,-84,67,49,107,60,101,-37,27,-91,-61,-96,120,-113,87,-46,68,64,102,-86,-60,13,-71,56,-105,90,-9,-35,27,103,120,39,23,-39,-1,-85,-95,-6,119,-41,-2,-69,102,102,-119,-3,-11,-125,-111,40,-115,-41,-117,-44,-7,83,123,-21,23,99,-107,43,100,-99,-3,89,3,-113,103,47,-94,-69,-38,-28,-37,49,-117,-49,-126,17,-98,37,92,55,-116,-70,-50,77,120,47,124,78,114,67,-48,6,-42,-115,85,116,-114,-46,-50,-13,70,-101,110,-55,20,-51,125,-19,-9,-15,46,30,-27,-123,114,-50,-30,-72,76,-83,71,47,-45,74,102,44,108,-26,108,-113,-43,110,-91,37,-69,76,-33,106,-76,-96,20,-117,63,-33,-5,11,-121,-51,63,-56,59,-16,-33,114,74,124,73,99,-50,51,-71,118,106,30,-92,26,-40,119,-121,2,-45,9,0,-5,-2,-89,88,-11,-85,-60,19,81,-96,75,82,-40,124,89,-36,-117,-100,-2,-34,112,101,39,-101,-106,60,59,-126,-32,96,68,-53,87,20,54,-24,46,-95,65,-112,22,60,122,-22,-106,-124,97,-37,-86,95,-110,-8,44,58,-12,-120,-45,-86,-32,-86,-94,-14,15,29,-8,-114,71,70,-93,-69,100,-123,-18,-47,-12,127,104,-102,93,-11,-73,121,87,-79,-92,46,92,-108,-107,79,121,-71,-89,16,-11,-52,72,-114,-32,-60,-9,-57,-4,10,-81,-22,68,74,76,-68,-127,96,-84,69,-3,-26,-106,-3,-87,-65,105,109,122,-103,31,-108,-86,-5,-39,85,88,67,-82,0,-25,93,61,-62,5,-54,-114,-51,-9,-114,20,49,-26,38,19,39,-103,33,-120,37,-97,32,-89,119,111,-124,-99,78,-49,-128,76,-18,-12,-109,96,90,-73,-104,59,-59,-92,123,55,54,-120,-80,-48,-16,-95,96,36,118,-119,-58,93,45,-43,-75,64,38,-2,-72,-111,22,-89,-75,-120,-42,45,108,59,-105,40,27,32,-66,121,-22,-71,-9,118,124,60,-96,47,4,14,-27,64,70,47,-91,-70,1,-44,94,-46,53,4,23,-124,-92,-95,83,-49,-81,40,-80,48,0,39,1,-113,32,40,-21,-1,-110,102,1,-74,-51,40,108,-35,-36,89,84,123,-48,-115,-115,83,-61,114,-127,-61,114,100,-82,-45,60,87,60,19,86,97,-68,40,-66,75,86,-32,-128,88,-57,-27,77,3,-27,43,-39,-62,66,5,-82,45,-104,-78,34,57,96,89,-90,66,-10,37,-110,-30,82,-58,13,94,12,115,35,117,0,80,61,-7,107,-104,-21,21,-70,-93,-94,-51,-61,39,-62,64,-82,-109,76,84,58,-47,-100,52,46,-51,88,91,8,-47,108,-80,25,-58,111,-59,-83,-75,92,98,110,54,106,65,-47,-120,-5,90,-123,101,-61,-85,-93,109,88,0,8,59,86,56,126,17,-26,58,-101,-25,35,0,-123,-3,-56,112,-128,8,17,-52,88,31,-3,105,-56,68,-1,-94,96,-19,10,-22,-88,-10,119,-44,19,42,75,-86,18,-107,89,-82,-120,76,40,84,-122,29,33,-47,17,-50,-13,23,-66,-46,85,-29,-110,42,-68,8,99,-93,-29,101,16,52,-13,127,0,86,-117,-92,-70,-32,-27,127,-123,1,34,-13,92,114,-11,29,-103,-121,-54,20,73,16,74,108,16,-61,89,50,-30,-14,116,44,-31,16,96,24,-51,7,39,-87,-69,-61,-98,61,-46,113,85,-95,103,67,99,-66,-45,-42,-70,96,104,5,-111,69,-25,99,-118,23,109,11,4,-41,-94,73,100,96,6,90,-75,-25,79,-13,-43,-6,-12,51,12,40,124,-56,81,-8,59,-60,-26,-54,33,122,85,53,-99,125,19,-26,94,41,-5,46,-48,-70,-10,41,102,-1,-98,-9,15,29,46,-66,-118,-53,45,119,-127,94,53,-58,90,124,5,-110,-98,-80,-77,77,29,19,105,-121,92,9,-124,50,-119,59,40,67,104,-12,13,103,101,47,-51,34,-66,-101,-117,112,-5,118,-48,-60,-114,38,-71,2,51,114,80,115,-5,116,20,16,-47,-19,30,24,-68,7,-30,-3,-64,-7,-34,-12,44,34,-91,-97,116,112,-99,108,-75,17,26,-14,-61,80,22,-7,34,47,-93,45,106,121,78,43,-97,39,-99,-68,-72,-7,64,-49,-82,-127,78,-64,48,18,15,126,-125,-111,-69,-111,10,-46,111,-75,123,-44,-67,-31,-96,-67,-53,-53,-106,67,-101,23,62,30,9,-114,-12,-57,-38,-78,95,-10,-3,110,88,123,-26,78,-125,114,53,10,-57,26,38,-51,73,92,-124,79,15,75,-62,109,-113,-67,1,35,52,-36,55,7,111,-43,109,101,88,122,-21,-32,-87,59,16,-122,-109,-118,17,-22,-39,53,-105,77,90,-24,-65,43,-27,113,30,-117,-30,106,37,55,59,54,-70,99,99,-73,120,97,-39,-88,-54,101,51,-76,70,-121,-68,23,-73,-31,75,-8,-63,-123,-93,96,-81,99,-95,28,-36,55,-104,32,-64,41,-97,95,-89,126,-26,-25,126,2,-26,-54,110,-86,110,74,-3,-110,56,-60,-49,117,-82,-55,-103,-112,70,-85,85,-63,82,7,75,-61,90,32,35,-115,72,73,-121,63,-84,-52,-29,-59,-4,29,64,119,127,58,-117,48,126,120,-115,-15,-10,27,27,-81,117,-5,121,-72,113,31,-13,10,27,-106,-51,81,-96,-22,19,-78,6,71,-34,123,118,75,-23,-72,-97,111,-121,0,80,28,52,95,59,-116,72,80,-75,-62,88,23,-102,13,6,113,-85,98,45,-96,-32,94,-7,12,-9,86,18,59,-15,75,13,-70,50,-93,52,67,53,-31,19,45,-111,36,39,-91,-77,104,71,7,-44,-76,3,-62,121,43,37,-7,-96,-6,57,-104,30,-126,-94,118,-44,91,29,124,-86,-13,55,41,-41,91,-112,-25,103,81,-70,-112,113,-25,-73,-82,16,67,-5,104,56,66,-115,-90,-126,106,80,-78,-51,-15,-68,-3,102,-10,-123,-10,-71,-111,86,48,-45,101,81,-114,-94,77,-127,-96,-100,86,109,-33,15,-34,60,88,-86,-63,-103,-46,101,-127,-88,90,-37,82,-125,-28,-6,61,-104,77,0,-52,59,-9,-82,59,-78,79,80,-77,-125,-95,16,26,-55,-16,15,-76,-9,56,110,85,-102,-23,-12,-6,-97,-34,32,-79,-95,71,126,127,30,-112,-115,75,-8,125,103,-118,65,-43,107,46,96,-41,-87,-64,-18,126,82,10,81,45,95,61,9,28,-113,-71,47,117,26,-81,73,49,-55,-126,-33,62,-84,-87,-56,-71,97,49,-124,-76,-9,97,119,-23,127,-29,20,-66,-80,-122,40,-2,116,126,-120,-48,124,57,-107,104,80,-13,81,118,33,88,119,-110,33,-35,-75,-6,89,-41,99,46,127,-36,54,-55,50,24,51,49,-71,37,-117,114,6,110,88,84,-30,-45,-50,113,-12,-57,59,-18,49,99,-124,46,-48,88,-82,-121,-97,15,-73,-128,-121,46,30,-93,-109,-15,-86,-2,75,1,-32,-27,-86,-13,-38,48,10,-36,-107,-27,-48,88,-7,-88,98,-83,61,-81,20,-123,18,-41,-127,-55,-66,24,-107,73,30,-42,-74,124,-43,-125,102,98,6,32,24,-123,32,113,105,-81,117,-41,-54,-113,-126,-28,31,-56,-64,-6,-103,-36,-2,-59,34,-40,-64,-39,-64,-74,-105,50,-86,-66,-14,-71,35,-116,-20,15,-119,-12,90,-117,-29,13,-8,-75,57,67,124,-38,66,113,-80,113,105,45,-74,-80,108,-24,-3,36,62,-8,109,-40,-101,106,12,-47,-113,-118,-12,-3,-86,-52,-93,-24,-62,-119,-93,67,39,4,-18,-103,24,1,71,93,95,-113,-7,34,-10,-77,-74,96,86,52,-2,-45,-71,-48,124,-97,1,23,-59,-117,-74,58,-31,-115,114,-14,-115,77,82,100,67,117,-16,-64,105,-19,59,124,124,-116,-33,22,-115,30,102,91,98,-124,38,12,-38,-23,-106,52,75,-45,74,-6,-29,31,117,20,99,66,27,-92,127,-67,-53,68,-66,-26,35,114,-84,-74,-94,-14,-43,-106,-32,-67,-27,28,29,-32,-101,-60,-55,-6,-101,-42,61,111,107,-87,-67,102,-36,119,-81,-54,52,-114,5,-26,115,-7,44,-30,-21,-67,33,-92,29,-30,3,7,-101,-83,-115,29,68,49,-70,-40,-116,63,-49,115,97,123,119,22,-13,47,-4,-14,-94,94,-122,56,58,57,-127,-60,-46,29,94,-105,49,-72,94,20,-8,104,35,-90,19,-26,24,-7,109,10,-9,80,-105,0,126,94,105,63,85,43,-63,-2,-32,39,-119,-12,-108,33,-67,127,-66,-23,-123,8,41,-21,-30,117,20,-85,-39,-87,2,96,-12,-128,83,67,-53,-101,3,-3,-22,-16,51,125,-125,-76,25,42,101,101,35,-36,103,85,-71,-24,6,26,105,60,112,-91,69,13,21,10,-93,22,-111,0,-38,4,-34,45,-86,121,-42,-54,7}
+
+#define HIDDEN_STATE_WEIGHT_X4 {-3,69,-33,102,76,60,80,19,59,-2,21,-4,-59,-59,11,-52,117,-25,70,121,-18,44,-74,-14,0,-1,44,-28,15,77,-102,92,108,-48,108,-100,99,-69,-19,121,-47,0,-80,-128,117,-123,99,-27,-118,60,34,-73,65,119,-50,-84,88,42,-91,-32,-108,79,-121,87,-123,118,-108,-88,-9,24,-104,85,8,-113,51,-112,33,118,94,1,26,-113,82,70,-95,-51,110,-96,-80,-98,107,118,-48,60,-97,102,-100,95,-69,77,76,-6,36,15,97,-52,-90,123,1,96,-58,120,17,-99,19,72,86,-109,-115,6,63,26,111,-102,45,35,-88,11,-40,-32,-125,120,38,-119,51,-109,110,113,24,22,123,-18,-23,16,58,6,-69,-68,-20,-112,-43,91,26,84,-31,-33,-37,-126,15,71,-65,103,-37,66,91,-29,-85,121,-47,111,-41,60,-88,-21,6,-120,-109,-76,106,33,-96,37,58,57,-100,10,108,25,78,-117,13,-39,-99,-43,108,93,23,93,1,56,116,41,104,-79,-43,-73,62,-104,86,110,-50,13,-70,77,-108,-107,-45,67,10,107,44,-52,30,111,-53,-113,112,90,74,-61,90,-4,34,58,96,64,79,44,-80,-119,-10,-125,-39,79,-20,67,71,72,-32,-85,-25,-18,-21,-66,0,36,-127,-96,-113,120,49,76,-117,-33,-124,-113,123,87,-49,106,-126,-76,21,-46,98,68,17,-96,-98,20,84,64,86,102,37,-117,92,63,76,-86,23,-60,55,-33,-116,-5,78,13,7,-71,-70,11,-50,-121,-127,56,-4,-105,77,-51,120,63,1,90,-46,-9,47,-56,124,59,-107,-35,59,27,78,-16,114,-33,-21,103,53,120,67,114,-48,74,-65,39,-99,23,6,124,-42,73,-15,-39,-98,-1,-115,99,85,-50,53,-85,-31,-95,116,51,-114,-71,7,-6,64,119,-46,118,-50,106,7,-41,105,-2,-13,30,70,-92,51,-69,-75,102,-101,26,110,-40,50,102,-52,-119,-55,119,20,-121,48,-3,101,-11,-51,2,125,-45,-126,-125,-120,-111,-19,9,-9,0,5,40,34,-115,-15,-5,46,-2,3,-41,81,-117,30,-89,-27,88,-39,-44,70,-7,-123,-11,114,-85,41,83,112,123,-50,-60,-30,19,25,-21,30,23,-72,81,76,-96,79,99,-6,-107,-83,75,71,82,107,43,-11,100,47,-40,-45,124,-97,-99,92,-3,74,89,102,-36,-84,89,67,3,44,-117,108,-100,49,-113,107,103,-26,-2,108,-34,60,47,101,-94,-113,112,-43,101,-37,-69,27,-38,110,39,-91,-101,-91,-28,-61,-37,37,-106,-69,60,59,121,-126,-71,-97,47,32,4,-32,-89,96,16,-89,14,119,-27,68,-11,-53,-52,111,64,-124,70,87,72,20,-114,-99,47,78,-91,54,-32,-24,-60,-49,-70,-128,1,46,-9,-95,-57,76,-44,-18,94,65,-4,-112,10,-12,-46,-109,53,22,-81,60,-22,96,4,90,23,122,68,-22,74,-73,-124,-104,-92,-106,76,-124,-68,59,-95,-59,83,97,-127,-37,96,-92,-49,123,-81,-86,-84,95,69,55,40,54,-80,-110,-3,-8,-26,-120,48,-80,0,44,-106,58,-3,-48,39,-16,1,-12,-87,-120,-65,-95,-113,96,32,-45,105,-86,109,36,40,118,-21,-32,122,-86,-103,-119,-1,-58,-110,-94,31,-14,-108,93,102,45,1,15,-86,29,-5,-43,-74,-75,-51,-8,-39,-114,85,64,40,38,108,71,88,70,67,-2,-35,-72,-36,-93,-82,-69,0,-111,89,22,84,100,-25,-123,93,-89,123,-75,-48,-18,61,-47,-62,-120,-115,-42,-115,-12,5,127,-54,45,83,108,-61,104,-114,-102,-51,59,114,-105,-127,93,-9,-11,-114,40,-61,27,114,-73,20,121,49,32,100,-66,-82,87,-26,-79,38,121,-45,-22,60,-92,19,46,39,-71,87,-9,60,92,-103,-108,33,118,19,124,86,-107,-120,79,37,60,97,-96,-68,40,-51,-66,88,-10,-61,119,89,75,91,86,8,-44,50,19,-30,-32,-47,-128,108,42,-14,75,116,88,-80,-57,25,-86,44,18,-31,-27,-58,77,111,-107,16,89,96,3,-59,-27,-83,-82,24,-120,-51,43,-75,-39,92,76,7,40,39,-62,98,66,110,84,-87,-122,-69,5,54,-82,106,29,-61,33,-98,45,65,-104,-47,-47,61,17,-46,-78,-120,34,-5,-50,113,-13,85,57,90,96,-123,23,-95,-66,103,89,101,-90,-61,-46,67,85,99,66,-85,-10,-93,-29,-66,-110,-45,37,109,-110,88,42,-42,-68,-70,-30,0,82,8,8,96,99,104,-58,59,13,86,-93,5,-29,-111,94,56,12,126,101,69,16,-25,115,17,35,-26,52,99,-13,-118,117,58,0,-101,127,23,0,109,80,-25,61,35,86,11,-117,4,-7,0,107,-123,-92,-41,-70,-94,-104,-3,-21,-56,-32,73,-27,100,21,112,-70,-128,127,96,-123,6,-93,8,-94,17,1,90,34,-75,-51,-52,-61,88,-13,-25,92,79,39,31,-62,-3,114,-13,-11,-43,64,105,-82,-56,29,-6,-103,-12,-109,68,76,-1,-121,51,-54,12,84,-94,58,96,20,40,73,124,-47,-19,-100,10,16,-56,74,81,52,-22,46,-88,108,-8,16,59,-60,-101,-26,-117,-127,-36,78,55,-54,112,33,-5,-64,7,48,111,122,118,85,-48,18,-43,15,109,53,-60,-99,-114,126,101,-125,88,125,38,19,-71,-111,122,-69,-21,-26,2,94,51,-111,-32,10,-87,41,114,-5,80,-46,59,111,16,46,115,-48,-5,-75,-122,123,-109,-70,116,-10,20,-44,-118,-67,17,41,16,102,-47,-31,-22,-96,-39,-1,-19,-98,30,-67,53,-53,-105,-9,24,15,-68,-53,77,-106,90,29,7,46,-30,67,-24,-101,-65,-66,-3,-118,-64,23,43,62,-27,-53,-7,45,-34,30,113,9,30,119,-12,-127,44,-114,-117,-12,-30,94,34,53,-91,-57,106,-38,37,-58,-97,90,116,-78,55,95,59,124,112,5,-99,-10,54,-3,-70,-110,108,-98,-75,110,99,88,99,-80,17,-77,26,123,-73,-26,120,77,-14,29,-61,78,97,-125,-39,19,80,105,22,114,-88,53,-54,-121,-7,92,34,10,101,-57,51,9,47,-124,-93,26,-76,38,70,50,45,-119,106,-51,-121,73,-68,59,121,40,78,92,23,-124,-73,67,43,104,-97,79,-31,15,75,-12,39,13,-99,75,-8,-62,-63,103,-68,101,-72,109,-123,-113,-93,47,-7,-51,64,-67,96,1,-81,34,-49,-66,-82,35,99,52,-95,28,27,-36,27,-93,-15,52,-68,55,-81,-104,117,67,-3,53,102,32,-5,-64,121,-31,-10,19,-123,41,-72,-97,113,45,-10,-111,-71,95,31,-89,-13,36,-111,39,86,126,10,-26,27,-91,48,-77,-45,-25,-106,126,-51,104,101,71,81,2,81,-26,-96,7,-114,-44,-94,-54,-22,110,19,-76,77,3,-127,-86,-78,110,6,-62,-96,121,-100,74,71,-3,-34,43,86,37,109,-110,123,56,118,-7,-33,-96,15,-60,75,-49,-23,-6,-34,57,60,117,-72,-82,-97,-104,88,30,-86,-55,111,-103,-121,-126,-63,-94,-103,-112,0,70,80,118,-46,-44,101,-85,28,85,52,91,-127,29,-88,-63,95,82,59,124,90,-86,-37,7,-116,75,72,-13,82,55,-125,-61,80,90,-75,41,-28,-41,-6,32,-62,35,88,91,61,-112,-104,-115,23,72,-102,-25,77,103,0,73,13,-121,6,81,-52,-70,59,63,113,-84,-85,-112,-9,113,-82,-52,98,-29,45,-25,59,-73,-78,-59,-96,-4,-32,-82,79,16,80,29,94,64,-7,67,-77,-5,-125,119,12,127,-9,104,-95,56,16,58,86,-117,18,66,26,-115,-55,48,59,126,-15,-90,-16,-126,15,120,75,-115,13,106,-76,80,-9,-15,-70,-10,50,-78,56,-51,110,85,-29,-102,20,15,-56,-73,-64,-23,-66,-12,-80,-128,-6,-121,-103,-6,-122,-97,40,46,-36,30,-2,-34,-2,32,116,-93,-59,-109,34,-79,126,-95,-120,-15,-40,-86,-64,71,-48,126,124,-2,-39,75,-64,127,57,30,-107,1,-74,-32,-105,-112,104,-115,80,-27,50,-86,-86,75,-13,-8,81,-13,-66,-38,-14,125,118,103,33,48,-71,10,35,-118,88,65,119,-36,-116,-107,-20,-43,-110,107,33,-27,15,-48,-119,46,-35,96,-75,88,-12,-7,90,-41,-6,-87,89,-88,-117,98,-29,-64,-41,-18,99,-83,13,61,-8,126,46,82,127,-81,-75,20,57,10,-36,81,54,-123,67,18,124,45,-55,95,50,-41,-38,-127,66,61,24,9,51,-55,113,-66,-80,28,49,-113,-71,24,113,-107,105,-71,37,47,-117,73,45,30,-74,117,114,26,6,-42,-80,-74,108,-81,110,73,88,124,-24,-43,-3,49,84,-55,-30,-125,36,102,62,-126,-45,-33,-50,98,-8,6,109,62,113,-84,-12,32,-40,24,-101,-87,-57,-56,59,-123,106,32,12,-71,-18,97,49,113,-47,105,-113,49,99,-124,-124,-81,-118,117,-12,-76,46,-9,-48,-41,-3,-54,-86,97,88,119,-82,-113,-52,-126,-93,-23,-121,127,-97,-28,-24,31,-62,-119,52,-93,75,7,33,-101,-67,67,-45,39,74,-83,127,-115,-66,4,-6,-18,-29,29,-23,68,-123,-103,31,24,117,49,8,-70,41,1,20,71,99,-40,-21,-116,-30,93,66,95,27,63,117,-49,20,-113,-92,-7,127,115,-85,97,-39,34,-67,-10,-53,123,-87,119,2,-77,68,-74,-66,22,96,-13,-12,96,-26,86,35,47,-128,-4,83,52,114,-2,-84,-14,67,-94,-53,-45,-74,-71,-94,94,-101,-122,3,-48,-14,124,-43,56,-3,58,-22,-97,-106,1,-32,57,-16,-127,51,23,-67,-59,-27,-60,125,-46,-125,-117,28,-74,29,29,-76,94,25,58,-32,-31,-101,-105,42,49,101,-115,-60,114,-55,-72,101,94,35,-14,-6,-115,-101,20,-36,-8,103,77,-42,82,61,104,85,35,-71,100,111,67,107,-90,-24,19,6,117,-87,-16,-67,-26,26,24,105,-64,102,105,-36,-7,60,109,112,-19,119,59,-81,10,-91,-9,69,124,-54,124,52,80,13,-105,21,-116,-114,-33,5,0,10,126,-93,22,-26,-115,115,94,22,105,-111,30,-7,102,44,63,0,85,-38,91,-30,98,-21,43,4,-63,-34,-124,-67,38,33,-2,45,-32,-86,12,-92,-38,29,39,121,-119,-42,-23,-30,-106,3,-12,-54,-108,7}
+
+#define UPDATE_GATE_BIAS {-85,78,113,70,33,38,8,114,70,-35,-67,65,31,-24,-70,-124,-89,104,124,-122,111,61,-87,75,-61,-98,83,-69,-63,45,-11,103}
+
+#define RESET_GATE_BIAS {-77,67,-93,-3,98,59,-121,33,49,50,41,91,-115,-33,71,47,-70,45,89,-115,72,106,-22,100,97,-100,-95,108,-33,3,14,30}
+
+#define HIDDEN_STATE_BIAS {-85,78,113,70,33,38,8,114,70,-35,-67,65,31,-24,-70,-124,-89,104,124,-122,111,61,-87,75,-61,-98,83,-69,-63,45,-11,103}
+
+#define INPUT_DATA1 {-367,-338,0,-89,453,-413,-343,-16,42,418,201,274,-352,477,-290,-92,266,-49,342,453,-398,247,-153,328,217,342,85,69,-38,351,73,128}
+
+#define INPUT_DATA2 {280,41,-322,61,315,350,504,-227,-221,-483,352,252,455,-236,344,364,-378,229,-187,-498,295,357,-511,58,-349,-458,-420,-66,-400,-379,477,-60}
+
+#define HISTORY_DATA {-38,53,105,-79,-463,51,-343,-226,-435,-282,218,441,-299,-215,-109,335,340,-471,-109,273,33,-245,-469,170,-26,-59,192,-119,76,-6,236,-145}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/para_gen.py b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/para_gen.py
new file mode 100644
index 0000000..e2f053b
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/para_gen.py
@@ -0,0 +1,183 @@
+#!/usr/bin/env python
+
+#
+# This is a simple script to generate and convert weights
+# from regular ordering to specific ordering used by
+# q7_x4 or q7_q15_x4
+#
+
+
+import numpy as np
+
+def convert_to_x4_weights(weights):
+ [r, h, w, c] = weights.shape
+ weights = np.reshape(weights, (r, h*w*c))
+ num_of_rows = r
+ num_of_cols = h*w*c
+ new_weights = np.copy(weights)
+ new_weights = np.reshape(new_weights, (r*h*w*c))
+ counter = 0
+ for i in range(int(num_of_rows)/4):
+ # we only need to do the re-ordering for every 4 rows
+ row_base = 4*i
+ for j in range (int(num_of_cols)/4):
+ # for each 4 entries
+ column_base = 4*j
+ new_weights[counter] = weights[row_base ][column_base ]
+ new_weights[counter+1] = weights[row_base+1][column_base ]
+ new_weights[counter+2] = weights[row_base ][column_base+2]
+ new_weights[counter+3] = weights[row_base+1][column_base+2]
+ new_weights[counter+4] = weights[row_base+2][column_base ]
+ new_weights[counter+5] = weights[row_base+3][column_base ]
+ new_weights[counter+6] = weights[row_base+2][column_base+2]
+ new_weights[counter+7] = weights[row_base+3][column_base+2]
+
+ new_weights[counter+8] = weights[row_base ][column_base+1]
+ new_weights[counter+9] = weights[row_base+1][column_base+1]
+ new_weights[counter+10] = weights[row_base ][column_base+3]
+ new_weights[counter+11] = weights[row_base+1][column_base+3]
+ new_weights[counter+12] = weights[row_base+2][column_base+1]
+ new_weights[counter+13] = weights[row_base+3][column_base+1]
+ new_weights[counter+14] = weights[row_base+2][column_base+3]
+ new_weights[counter+15] = weights[row_base+3][column_base+3]
+ counter = counter + 16
+ # the remaining ones are in order
+ for j in range((int)(num_of_cols-num_of_cols%4), int(num_of_cols)):
+ new_weights[counter] = weights[row_base][j]
+ new_weights[counter+1] = weights[row_base+1][j]
+ new_weights[counter+2] = weights[row_base+2][j]
+ new_weights[counter+3] = weights[row_base+3][j]
+ counter = counter + 4
+ return new_weights
+
+def convert_q7_q15_weights(weights):
+ [r, h, w, c] = weights.shape
+ weights = np.reshape(weights, (r, h*w*c))
+ num_of_rows = r
+ num_of_cols = h*w*c
+ new_weights = np.copy(weights)
+ new_weights = np.reshape(new_weights, (r*h*w*c))
+ counter = 0
+ for i in range(int(num_of_rows)/4):
+ # we only need to do the re-ordering for every 4 rows
+ row_base = 4*i
+ for j in range (int(num_of_cols)/2):
+ # for each 2 entries
+ column_base = 2*j
+ new_weights[counter] = weights[row_base ][column_base ]
+ new_weights[counter+1] = weights[row_base+1][column_base ]
+ new_weights[counter+2] = weights[row_base ][column_base+1]
+ new_weights[counter+3] = weights[row_base+1][column_base+1]
+ new_weights[counter+4] = weights[row_base+2][column_base ]
+ new_weights[counter+5] = weights[row_base+3][column_base ]
+ new_weights[counter+6] = weights[row_base+2][column_base+1]
+ new_weights[counter+7] = weights[row_base+3][column_base+1]
+
+ counter = counter + 8
+ # the remaining ones are in order
+ for j in range((int)(num_of_cols-num_of_cols%2), int(num_of_cols)):
+ new_weights[counter] = weights[row_base][j]
+ new_weights[counter+1] = weights[row_base+1][j]
+ new_weights[counter+2] = weights[row_base+2][j]
+ new_weights[counter+3] = weights[row_base+3][j]
+ counter = counter + 4
+ return new_weights
+
+
+vec_dim = 64
+row_dim = 32
+
+update_weight = np.zeros((row_dim,vec_dim), dtype=int)
+reset_weight = np.zeros((row_dim,vec_dim), dtype=int)
+hidden_weight = np.zeros((row_dim,vec_dim), dtype=int)
+
+update_bias = np.zeros((row_dim), dtype=int)
+reset_bias = np.zeros((row_dim), dtype=int)
+hidden_bias = np.zeros((row_dim), dtype=int)
+
+input_data1 = np.zeros((vec_dim-row_dim), dtype=int)
+input_data2 = np.zeros((vec_dim-row_dim), dtype=int)
+history_data = np.zeros((row_dim), dtype=int)
+
+outfile = open("arm_nnexamples_gru_test_data.h", "w")
+
+for i in range(row_dim):
+ for j in range(vec_dim):
+ update_weight[i][j] = np.random.randint(256)-128
+ reset_weight[i][j] = np.random.randint(256)-128
+ hidden_weight[i][j] = np.random.randint(256)-128
+
+for i in range(row_dim):
+ update_bias[i] = np.random.randint(256)-128
+ reset_bias[i] = np.random.randint(256)-128
+ hidden_bias[i] = np.random.randint(256)-128
+ history_data[i] = np.random.randint(2**10)-2**9
+
+for i in range(vec_dim-row_dim):
+ input_data1[i] = np.random.randint(2**10)-2**9
+ input_data2[i] = np.random.randint(2**10)-2**9
+
+weight = np.reshape(update_weight, (row_dim, vec_dim, 1, 1))
+new_weight = convert_to_x4_weights(weight)
+
+outfile.write("#define UPDATE_GATE_WEIGHT_X2 {")
+weight.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+new_weight = convert_q7_q15_weights(weight)
+outfile.write("#define UPDATE_GATE_WEIGHT_X4 {")
+new_weight.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+weight = np.reshape(reset_weight, (row_dim, vec_dim, 1, 1))
+new_weight = convert_to_x4_weights(weight)
+
+outfile.write("#define RESET_GATE_WEIGHT_X2 {")
+weight.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+new_weight = convert_q7_q15_weights(weight)
+outfile.write("#define RESET_GATE_WEIGHT_X4 {")
+new_weight.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+weight = np.reshape(hidden_weight, (row_dim, vec_dim, 1, 1))
+new_weight = convert_to_x4_weights(weight)
+
+outfile.write("#define HIDDEN_STATE_WEIGHT_X2 {")
+weight.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+new_weight = convert_q7_q15_weights(weight)
+outfile.write("#define HIDDEN_STATE_WEIGHT_X4 {")
+new_weight.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+outfile.write("#define UPDATE_GATE_BIAS {")
+update_bias.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+outfile.write("#define RESET_GATE_BIAS {")
+reset_bias.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+outfile.write("#define HIDDEN_STATE_BIAS {")
+update_bias.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+outfile.write("#define INPUT_DATA1 {")
+input_data1.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+outfile.write("#define INPUT_DATA2 {")
+input_data2.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+
+outfile.write("#define HISTORY_DATA {")
+history_data.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+
+
+outfile.close()
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/readme.txt b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/readme.txt
new file mode 100644
index 0000000..7444abd
--- /dev/null
+++ b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/readme.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_nnexample_gru0 for
+ Cortex-M4 and Cortex-M7.
+
+The example is configured for uVision Simulator.
diff --git a/CMSIS/NN/Include/arm_nn_tables.h b/CMSIS/NN/Include/arm_nn_tables.h
new file mode 100644
index 0000000..0b1cc72
--- /dev/null
+++ b/CMSIS/NN/Include/arm_nn_tables.h
@@ -0,0 +1,59 @@
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_nn_tables.h
+ * Description: Extern declaration for NN tables
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_NN_TABLES_H
+#define _ARM_NN_TABLES_H
+
+#include "arm_math.h"
+
+/**
+* @brief tables for various activation functions
+*
+*/
+
+extern const q15_t sigmoidTable_q15[256];
+extern const q7_t sigmoidTable_q7[256];
+
+extern const q7_t tanhTable_q7[256];
+extern const q15_t tanhTable_q15[256];
+
+ /**
+ * @brief 2-way tables for various activation functions
+ *
+ * 2-way table, H table for value larger than 1/4
+ * L table for value smaller than 1/4, H table for remaining
+ * We have this only for the q15_t version. It does not make
+ * sense to have it for q7_t type
+ */
+extern const q15_t sigmoidHTable_q15[192];
+extern const q15_t sigmoidLTable_q15[128];
+
+extern const q15_t sigmoidLTable_q15[128];
+extern const q15_t sigmoidHTable_q15[192];
+
+#endif /* ARM_NN_TABLES_H */
diff --git a/CMSIS/NN/Include/arm_nnfunctions.h b/CMSIS/NN/Include/arm_nnfunctions.h
new file mode 100644
index 0000000..23edf5a
--- /dev/null
+++ b/CMSIS/NN/Include/arm_nnfunctions.h
@@ -0,0 +1,896 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_nnfunctions.h
+ * Description: Public header file for CMSIS NN Library
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ * -------------------------------------------------------------------- */
+
+/**
+ \mainpage CMSIS NN Software Library
+ *
+ * Introduction
+ * ------------
+ *
+ * This user manual describes the CMSIS DSP software library,
+ * a suite of common signal processing functions for use on Cortex-M processor based devices.
+ *
+ * The library is divided into a number of functions each covering a specific category:
+ * - Neural Network Convolution Functions
+ * - Neural Network Activation Functions
+ * - Fully-connected Layer Functions
+ * - Neural Network Pooling Functions
+ * - Softmax Functions
+ * - Neural Network Support Functions
+ *
+ * The library has separate functions for operating on different weight and activation data
+ * types including 8-bit integers and 16-bit integers,
+ *
+ * Block Diagram
+ * --------
+ * \image html CMSIS-NN-OVERVIEW.GIF
+ *
+ * Examples
+ * --------
+ *
+ * The library ships with a number of examples which demonstrate how to use the library functions.
+ *
+ * Pre-processor Macros
+ * ------------
+ *
+ * Each library project have differant pre-processor macros.
+ *
+ * - ARM_MATH_DSP:
+ *
+ * Define macro ARM_MATH_DSP, If the silicon supports DSP instructions.
+ *
+ * - ARM_MATH_BIG_ENDIAN:
+ *
+ * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
+ *
+ * - ARM_NNUSE_ROUND:
+ *
+ * Define macro ARM_NNUSE_ROUND to use round instead of floor for the computation.
+ *
+ * Copyright Notice
+ * ------------
+ *
+ * Copyright (C) 2010-2018 Arm Limited. All rights reserved.
+ */
+
+/**
+ * @defgroup groupNN Neural Network Functions
+ * These functions perform basic operations for neural network layers.
+ */
+
+#ifndef _ARM_NNFUNCTIONS_H
+#define _ARM_NNFUNCTIONS_H
+
+#include "arm_nnsupportfunctions.h"
+#include "arm_nn_tables.h"
+
+#define USE_INTRINSIC
+
+#define ARM_NNUSE_ROUND /* This config the rounding model to floor or round to the nearest int */
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @defgroup NNConv Neural Network Convolution Functions
+ *
+ * Perform convolution layer
+ *
+ * The convolution is implemented in 2 steps: im2col and GEMM
+ *
+ * im2col is a process of converting each patch of image data into
+ * a column. After im2col, the convolution is computed as matrix-matrix
+ * multiplication.
+ *
+ * To reduce the memory footprint, the im2col is performed partially.
+ * Each iteration, only a few column (i.e., patches) are generated and
+ * computed with GEMM kernels similar to CMSIS-DSP arm_mat_mult functions.
+ *
+ */
+
+ /**
+ * @brief Basic Q7 convolution function
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ */
+
+ arm_status arm_convolve_HWC_q7_basic(const q7_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out,
+ const uint16_t dim_im_out,
+ q15_t * bufferA,
+ q7_t * bufferB);
+
+ /**
+ * @brief Basic Q15 convolution function
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ */
+
+ arm_status arm_convolve_HWC_q15_basic(const q15_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const q15_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const q15_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q15_t * Im_out,
+ const uint16_t dim_im_out,
+ q15_t * bufferA,
+ q7_t * bufferB);
+
+ /**
+ * @brief Fast Q7 convolution function
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * This function is the version with full list of optimization tricks, but with
+ * some contraints:
+ * ch_im_in is multiple of 4
+ * ch_im_out is multiple of 2
+ */
+
+ arm_status arm_convolve_HWC_q7_fast(const q7_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out,
+ const uint16_t dim_im_out,
+ q15_t * bufferA,
+ q7_t * bufferB);
+
+ /**
+ * @brief Fast Q7 convolution function (non-sqaure shape)
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in_x input tensor dimention x
+ * @param[in] dim_im_in_y input tensor dimention y
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel_x filter kernel size x
+ * @param[in] dim_kernel_y filter kernel size y
+ * @param[in] padding_x padding size x
+ * @param[in] padding_y padding size y
+ * @param[in] stride_x convolution stride x
+ * @param[in] stride_y convolution stride y
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out_x output tensor dimension x
+ * @param[in] dim_im_out_y output tensor dimension y
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * This function is the version with full list of optimization tricks, but with
+ * some contraints:
+ * ch_im_in is multiple of 4
+ * ch_im_out is multiple of 2
+ */
+
+ arm_status arm_convolve_HWC_q7_fast_nonsquare(const q7_t * Im_in,
+ const uint16_t dim_im_in_x,
+ const uint16_t dim_im_in_y,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel_x,
+ const uint16_t dim_kernel_y,
+ const uint16_t padding_x,
+ const uint16_t padding_y,
+ const uint16_t stride_x,
+ const uint16_t stride_y,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out,
+ const uint16_t dim_im_out_x,
+ const uint16_t dim_im_out_y,
+ q15_t * bufferA,
+ q7_t * bufferB);
+
+ /**
+ * @brief Fast Q7 version of 1x1 convolution (non-sqaure shape)
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in_x input tensor dimention x
+ * @param[in] dim_im_in_y input tensor dimention y
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel_x filter kernel size x
+ * @param[in] dim_kernel_y filter kernel size y
+ * @param[in] padding_x padding size x
+ * @param[in] padding_y padding size y
+ * @param[in] stride_x convolution stride x
+ * @param[in] stride_y convolution stride y
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out_x output tensor dimension x
+ * @param[in] dim_im_out_y output tensor dimension y
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * This function implement convolution with 1x1 kernel size (i.e., dim_kernel_x=1
+ * and dim_kernel_y=1). It can be used for
+ * second half of MobileNets after depthwise separable convolution.
+ *
+ * This function is the version with full list of optimization tricks, but with
+ * some contraints:
+ * ch_im_in is multiple of 4
+ * ch_im_out is multiple of 2
+ */
+ arm_status arm_convolve_1x1_HWC_q7_fast_nonsquare(const q7_t * Im_in,
+ const uint16_t dim_im_in_x,
+ const uint16_t dim_im_in_y,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel_x,
+ const uint16_t dim_kernel_y,
+ const uint16_t padding_x,
+ const uint16_t padding_y,
+ const uint16_t stride_x,
+ const uint16_t stride_y,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out,
+ const uint16_t dim_im_out_x,
+ const uint16_t dim_im_out_y,
+ q15_t * bufferA,
+ q7_t * bufferB);
+
+ /**
+ * @brief Q7 version of convolution for RGB image
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * This kernel is written exclusively for convolution with ch_im_in
+ * equals 3. This applies on the first layer of CNNs which has input
+ * image with RGB format.
+ */
+
+ arm_status arm_convolve_HWC_q7_RGB(const q7_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out,
+ const uint16_t dim_im_out,
+ q15_t * bufferA,
+ q7_t * bufferB);
+
+ /**
+ * @brief Fast Q15 convolution function
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * This function is the version with full list of optimization tricks, but with
+ * some contraints:
+ * ch_im_in is multiple of 2
+ * ch_im_out is multiple of 2
+ */
+
+ arm_status arm_convolve_HWC_q15_fast(const q15_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const q15_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const q15_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q15_t * Im_out,
+ const uint16_t dim_im_out,
+ q15_t * bufferA,
+ q7_t * bufferB);
+
+ /**
+ * @brief Q7 depthwise separable convolution function
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * This function is the version with full list of optimization tricks, but with
+ * some contraints:
+ * ch_im_in is multiple of 2
+ * ch_im_out is multiple of 2
+ */
+
+ arm_status arm_depthwise_separable_conv_HWC_q7(const q7_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out,
+ const uint16_t dim_im_out,
+ q15_t * bufferA,
+ q7_t * bufferB);
+
+ /**
+ * @brief Q7 depthwise separable convolution function (non-square shape)
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in_x input tensor dimention x
+ * @param[in] dim_im_in_y input tensor dimention y
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel_x filter kernel size x
+ * @param[in] dim_kernel_y filter kernel size y
+ * @param[in] padding_x padding sizes x
+ * @param[in] padding_y padding sizes y
+ * @param[in] stride_x convolution stride x
+ * @param[in] stride_y convolution stride y
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out_x output tensor dimension x
+ * @param[in] dim_im_out_y output tensor dimension y
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * This function is the version with full list of optimization tricks, but with
+ * some contraints:
+ * ch_im_in is multiple of 2
+ * ch_im_out is multiple of 2
+ */
+ arm_status arm_depthwise_separable_conv_HWC_q7_nonsquare(const q7_t * Im_in,
+ const uint16_t dim_im_in_x,
+ const uint16_t dim_im_in_y,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel_x,
+ const uint16_t dim_kernel_y,
+ const uint16_t padding_x,
+ const uint16_t padding_y,
+ const uint16_t stride_x,
+ const uint16_t stride_y,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out,
+ const uint16_t dim_im_out_x,
+ const uint16_t dim_im_out_y,
+ q15_t * bufferA,
+ q7_t * bufferB);
+
+
+/**
+ * @defgroup FC Fully-connected Layer Functions
+ *
+ * Perform fully-connected layer
+ *
+ * Fully-connected layer is basically a matrix-vector multiplication
+ * with bias. The matrix is the weights and the input/output vectors
+ * are the activation values. Supported {weight, activation} precisions
+ * include {8-bit, 8-bit}, {16-bit, 16-bit}, and {8-bit, 16-bit}.
+ *
+ * Here we have two types of kernel functions. The basic function
+ * implements the function using regular GEMV approach. The opt functions
+ * operates with weights in interleaved formats.
+ *
+ */
+
+ /**
+ * @brief Q7 basic fully-connected layer function
+ * @param[in] pV pointer to input vector
+ * @param[in] pM pointer to matrix weights
+ * @param[in] dim_vec length of the vector
+ * @param[in] num_of_rows number of rows in weight matrix
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias pointer to bias
+ * @param[in,out] pOut pointer to output vector
+ * @param[in,out] vec_buffer pointer to buffer space for input
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ */
+
+ arm_status arm_fully_connected_q7(const q7_t * pV,
+ const q7_t * pM,
+ const uint16_t dim_vec,
+ const uint16_t num_of_rows,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q7_t * bias,
+ q7_t * pOut,
+ q15_t * vec_buffer);
+
+ /**
+ * @brief Q7 opt fully-connected layer function
+ * @param[in] pV pointer to input vector
+ * @param[in] pM pointer to matrix weights
+ * @param[in] dim_vec length of the vector
+ * @param[in] num_of_rows number of rows in weight matrix
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias pointer to bias
+ * @param[in,out] pOut pointer to output vector
+ * @param[in,out] vec_buffer pointer to buffer space for input
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ */
+
+ arm_status arm_fully_connected_q7_opt(const q7_t * pV,
+ const q7_t * pM,
+ const uint16_t dim_vec,
+ const uint16_t num_of_rows,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q7_t * bias,
+ q7_t * pOut,
+ q15_t * vec_buffer);
+
+ /**
+ * @brief Q15 basic fully-connected layer function
+ * @param[in] pV pointer to input vector
+ * @param[in] pM pointer to matrix weights
+ * @param[in] dim_vec length of the vector
+ * @param[in] num_of_rows number of rows in weight matrix
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias pointer to bias
+ * @param[in,out] pOut pointer to output vector
+ * @param[in,out] vec_buffer pointer to buffer space for input
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ */
+
+ arm_status arm_fully_connected_q15(const q15_t * pV,
+ const q15_t * pM,
+ const uint16_t dim_vec,
+ const uint16_t num_of_rows,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q15_t * bias,
+ q15_t * pOut,
+ q15_t * vec_buffer);
+
+ /**
+ * @brief Q15 opt fully-connected layer function
+ * @param[in] pV pointer to input vector
+ * @param[in] pM pointer to matrix weights
+ * @param[in] dim_vec length of the vector
+ * @param[in] num_of_rows number of rows in weight matrix
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias pointer to bias
+ * @param[in,out] pOut pointer to output vector
+ * @param[in,out] vec_buffer pointer to buffer space for input
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ */
+
+ arm_status arm_fully_connected_q15_opt(const q15_t * pV,
+ const q15_t * pM,
+ const uint16_t dim_vec,
+ const uint16_t num_of_rows,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q15_t * bias,
+ q15_t * pOut,
+ q15_t * vec_buffer);
+
+ /**
+ * @brief Mixed Q15-Q7 fully-connected layer function
+ * @param[in] pV pointer to input vector
+ * @param[in] pM pointer to matrix weights
+ * @param[in] dim_vec length of the vector
+ * @param[in] num_of_rows number of rows in weight matrix
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias pointer to bias
+ * @param[in,out] pOut pointer to output vector
+ * @param[in,out] vec_buffer pointer to buffer space for input
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ */
+
+ arm_status arm_fully_connected_mat_q7_vec_q15(const q15_t * pV,
+ const q7_t * pM,
+ const uint16_t dim_vec,
+ const uint16_t num_of_rows,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q7_t * bias,
+ q15_t * pOut,
+ q15_t * vec_buffer);
+
+ /**
+ * @brief Mixed Q15-Q7 opt fully-connected layer function
+ * @param[in] pV pointer to input vector
+ * @param[in] pM pointer to matrix weights
+ * @param[in] dim_vec length of the vector
+ * @param[in] num_of_rows number of rows in weight matrix
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias pointer to bias
+ * @param[in,out] pOut pointer to output vector
+ * @param[in,out] vec_buffer pointer to buffer space for input
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ */
+
+ arm_status arm_fully_connected_mat_q7_vec_q15_opt(const q15_t * pV,
+ const q7_t * pM,
+ const uint16_t dim_vec,
+ const uint16_t num_of_rows,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q7_t * bias,
+ q15_t * pOut,
+ q15_t * vec_buffer);
+
+/**
+ * @brief Matrix-Multiplication Kernels for Convolution
+ *
+ * These functions are used within convolution layer functions for
+ * matrix multiplication.
+ *
+ * The implementation is similar to CMSIS-DSP arm_mat_mult functions
+ * with one Q7 and one Q15 operands. The Q15 operand is the im2col
+ * output which is always with 2 columns.
+ *
+ */
+
+ /**
+ * @brief Matrix-multiplication function for convolution
+ * @param[in] pA pointer to operand A
+ * @param[in] pInBuffer pointer to operand B, always conssists of 2 vectors
+ * @param[in] ch_im_out numRow of A
+ * @param[in] numCol_A numCol of A
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias the bias
+ * @param[in,out] pOut pointer to output
+ * @return The function returns the incremented output pointer
+ */
+
+ q7_t *arm_nn_mat_mult_kernel_q7_q15(const q7_t * pA,
+ const q15_t * pInBuffer,
+ const uint16_t ch_im_out,
+ const uint16_t numCol_A,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q7_t * bias,
+ q7_t * pOut);
+
+ /**
+ * @brief Matrix-multiplication function for convolution with reordered columns
+ * @param[in] pA pointer to operand A
+ * @param[in] pInBuffer pointer to operand B, always conssists of 2 vectors
+ * @param[in] ch_im_out numRow of A
+ * @param[in] numCol_A numCol of A
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias the bias
+ * @param[in,out] pOut pointer to output
+ * @return The function returns the incremented output pointer
+ */
+
+ q7_t *arm_nn_mat_mult_kernel_q7_q15_reordered(const q7_t * pA,
+ const q15_t * pInBuffer,
+ const uint16_t ch_im_out,
+ const uint16_t numCol_A,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q7_t * bias,
+ q7_t * pOut);
+
+#ifdef __cplusplus
+}
+#endif
+
+/*
+ * Other functions
+ * These layers are typically not timing critical
+ * Basic implementation is supported here
+ */
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @defgroup Acti Neural Network Activation Functions
+ *
+ * Perform activation layers, including ReLU (Rectified Linear Unit),
+ * sigmoid and tanh
+ *
+ */
+
+ /**
+ * @brief Q7 RELU function
+ * @param[in,out] data pointer to input
+ * @param[in] size number of elements
+ * @return none.
+ */
+
+ void arm_relu_q7(q7_t * data, uint16_t size);
+
+ /**
+ * @brief Q15 RELU function
+ * @param[in,out] data pointer to input
+ * @param[in] size number of elements
+ * @return none.
+ */
+
+ void arm_relu_q15(q15_t * data, uint16_t size);
+
+ /**
+ * @brief Q7 neural network activation function using direct table look-up
+ * @param[in,out] data pointer to input
+ * @param[in] size number of elements
+ * @param[in] int_width bit-width of the integer part, assume to be smaller than 3
+ * @param[in] type type of activation functions
+ * @return none.
+ */
+
+ void arm_nn_activations_direct_q7(q7_t * data, uint16_t size, uint16_t int_width,
+ arm_nn_activation_type type);
+
+ /**
+ * @brief Q15 neural network activation function using direct table look-up
+ * @param[in,out] data pointer to input
+ * @param[in] size number of elements
+ * @param[in] int_width bit-width of the integer part, assume to be smaller than 3
+ * @param[in] type type of activation functions
+ * @return none.
+ */
+
+ void arm_nn_activations_direct_q15(q15_t * data, uint16_t size, uint16_t int_width,
+ arm_nn_activation_type type);
+
+/**
+ * @defgroup Pooling Neural Network Pooling Functions
+ *
+ * Perform pooling functions, including max pooling and average pooling
+ *
+ */
+
+ /**
+ * @brief Q7 max pooling function
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input
+ * @param[in,out] Im_out pointer to output tensor
+ * @return none.
+ *
+ */
+
+ void arm_maxpool_q7_HWC(q7_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const uint16_t dim_im_out,
+ q7_t * bufferA,
+ q7_t * Im_out);
+
+ /**
+ * @brief Q7 average pooling function
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input
+ * @param[in,out] Im_out pointer to output tensor
+ * @return none.
+ *
+ */
+
+ void arm_avepool_q7_HWC(q7_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const uint16_t dim_im_out,
+ q7_t * bufferA,
+ q7_t * Im_out);
+
+/**
+ * @defgroup Softmax Softmax Functions
+ *
+ * EXP(2) based softmax function
+ *
+ */
+
+ /**
+ * @brief Q7 softmax function
+ * @param[in] vec_in pointer to input vector
+ * @param[in] dim_vec input vector dimention
+ * @param[out] p_out pointer to output vector
+ * @return none.
+ *
+ */
+
+ void arm_softmax_q7(const q7_t * vec_in, const uint16_t dim_vec, q7_t * p_out);
+
+ /**
+ * @brief Q15 softmax function
+ * @param[in] vec_in pointer to input vector
+ * @param[in] dim_vec input vector dimention
+ * @param[out] p_out pointer to output vector
+ * @return none.
+ *
+ */
+
+ void arm_softmax_q15(const q15_t * vec_in, const uint16_t dim_vec, q15_t * p_out);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/CMSIS/NN/Include/arm_nnsupportfunctions.h b/CMSIS/NN/Include/arm_nnsupportfunctions.h
new file mode 100644
index 0000000..3f47abc
--- /dev/null
+++ b/CMSIS/NN/Include/arm_nnsupportfunctions.h
@@ -0,0 +1,142 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_nnsupportfunctions.h
+ * Description: Public header file of support functions for CMSIS NN Library
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ * -------------------------------------------------------------------- */
+
+#ifndef _ARM_NNSUPPORTFUNCTIONS_H_
+#define _ARM_NNSUPPORTFUNCTIONS_H_
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+#include <cstring>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief Union for SIMD access of Q31/Q15/Q7 types
+ */
+union arm_nnword
+{
+ q31_t word;
+ /**< Q31 type */
+ q15_t half_words[2];
+ /**< Q15 type */
+ q7_t bytes[4];
+ /**< Q7 type */
+};
+
+/**
+ * @brief Struct for specifying activation function types
+ *
+ */
+typedef enum
+{
+ ARM_SIGMOID = 0,
+ /**< Sigmoid activation function */
+ ARM_TANH = 1,
+ /**< Tanh activation function */
+} arm_nn_activation_type;
+
+/**
+ * @defgroup nndata_convert Neural Network Data Conversion Functions
+ *
+ * Perform data type conversion in-between neural network operations
+ *
+ */
+
+/**
+ * @brief Converts the elements of the Q7 vector to Q15 vector without left-shift
+ * @param[in] *pSrc points to the Q7 input vector
+ * @param[out] *pDst points to the Q15 output vector
+ * @param[in] blockSize length of the input vector
+ * @return none.
+ *
+ */
+
+void arm_q7_to_q15_no_shift(const q7_t * pSrc, q15_t * pDst, uint32_t blockSize);
+
+/**
+ * @brief Converts the elements of the Q7 vector to reordered Q15 vector without left-shift
+ * @param[in] *pSrc points to the Q7 input vector
+ * @param[out] *pDst points to the Q15 output vector
+ * @param[in] blockSize length of the input vector
+ * @return none.
+ *
+ */
+
+void arm_q7_to_q15_reordered_no_shift(const q7_t * pSrc, q15_t * pDst, uint32_t blockSize);
+
+#if defined (ARM_MATH_DSP)
+
+/**
+ * @brief read and expand one Q7 word into two Q15 words
+ */
+
+__STATIC_FORCEINLINE void *read_and_pad(void *source, q31_t * out1, q31_t * out2)
+{
+ q31_t inA = *__SIMD32(source)++;
+ q31_t inAbuf1 = __SXTB16(__ROR(inA, 8));
+ q31_t inAbuf2 = __SXTB16(inA);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+ *out2 = __PKHTB(inAbuf1, inAbuf2, 16);
+ *out1 = __PKHBT(inAbuf2, inAbuf1, 16);
+#else
+ *out1 = __PKHTB(inAbuf1, inAbuf2, 16);
+ *out2 = __PKHBT(inAbuf2, inAbuf1, 16);
+#endif
+
+ return source;
+}
+
+/**
+ * @brief read and expand one Q7 word into two Q15 words with reordering
+ */
+
+__STATIC_FORCEINLINE void *read_and_pad_reordered(void *source, q31_t * out1, q31_t * out2)
+{
+ q31_t inA = *__SIMD32(source)++;
+#ifndef ARM_MATH_BIG_ENDIAN
+ *out2 = __SXTB16(__ROR(inA, 8));
+ *out1 = __SXTB16(inA);
+#else
+ *out1 = __SXTB16(__ROR(inA, 8));
+ *out2 = __SXTB16(inA);
+#endif
+
+ return source;
+}
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM0/startup_ARMCM0.s b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..9fc447d
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,242 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM0.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM0 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000C00
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM0/system_ARMCM0.c b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66829ad
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file system_ARMCM0.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM0 Device Series
+ * @version V5.00
+ * @date 08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000U) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM3/startup_ARMCM3.s b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..e3ea17f
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM3.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM3 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00080000
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM3/system_ARMCM3.c b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f08df7a
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file system_ARMCM3.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM3 Device Series
+ * @version V5.00
+ * @date 08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000U) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4/startup_ARMCM4.s b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4/startup_ARMCM4.s
new file mode 100644
index 0000000..dae6439
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4/startup_ARMCM4.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM4.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM4 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000C00
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4/system_ARMCM4.c b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4/system_ARMCM4.c
new file mode 100644
index 0000000..af23005
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file system_ARMCM4.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM4 Device Series
+ * @version V5.00
+ * @date 07. September 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+ #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+ #include "ARMCM4_FP.h"
+#else
+ #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000UL) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5U * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+ extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+ SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+ SCB->CPACR |= ((3U << 10U*2U) | /* set CP10 Full Access */
+ (3U << 11U*2U) ); /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+ SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..116c5cb
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM4.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM4 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00004000
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00100000
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..070fa1e
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file system_ARMCM4.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM4 Device Series
+ * @version V5.00
+ * @date 08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+ #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+ #include "ARMCM4_FP.h"
+#else
+ #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000U) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3U << 10*2) | /* set CP10 Full Access */
+ (3U << 11*2) ); /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+ SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/gcc_arm.ld b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/gcc_arm.ld
new file mode 100644
index 0000000..b987fd1
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/gcc_arm.ld
@@ -0,0 +1,196 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K
+ RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ * Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ * __exidx_start
+ * __exidx_end
+ * __copy_table_start__
+ * __copy_table_end__
+ * __zero_table_start__
+ * __zero_table_end__
+ * __etext
+ * __data_start__
+ * __preinit_array_start
+ * __preinit_array_end
+ * __init_array_start
+ * __init_array_end
+ * __fini_array_start
+ * __fini_array_end
+ * __data_end__
+ * __bss_start__
+ * __bss_end__
+ * __end__
+ * end
+ * __HeapBase
+ * __HeapLimit
+ * __StackLimit
+ * __StackTop
+ * __stack
+ * __Vectors_End
+ * __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.vectors))
+ __Vectors_End = .;
+ __Vectors_Size = __Vectors_End - __Vectors;
+ __end__ = .;
+
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ /* To copy multiple ROM to RAM sections,
+ * uncomment .copy.table section and,
+ * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .copy.table :
+ {
+ . = ALIGN(4);
+ __copy_table_start__ = .;
+ LONG (__etext)
+ LONG (__data_start__)
+ LONG (__data_end__ - __data_start__)
+ LONG (__etext2)
+ LONG (__data2_start__)
+ LONG (__data2_end__ - __data2_start__)
+ __copy_table_end__ = .;
+ } > FLASH
+ */
+
+ /* To clear multiple BSS sections,
+ * uncomment .zero.table section and,
+ * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .zero.table :
+ {
+ . = ALIGN(4);
+ __zero_table_start__ = .;
+ LONG (__bss_start__)
+ LONG (__bss_end__ - __bss_start__)
+ LONG (__bss2_start__)
+ LONG (__bss2_end__ - __bss2_start__)
+ __zero_table_end__ = .;
+ } > FLASH
+ */
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ end = __end__;
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
new file mode 100644
index 0000000..26edb9f
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
@@ -0,0 +1,295 @@
+/**************************************************************************//**
+ * @file startup_ARMCM7.s
+ * @brief CMSIS Core Device Startup File for
+ * ARMCM7 Device Series
+ * @version V5.00
+ * @date 26. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdint.h>
+
+
+/*----------------------------------------------------------------------------
+ Linker generated Symbols
+ *----------------------------------------------------------------------------*/
+extern uint32_t __etext;
+extern uint32_t __data_start__;
+extern uint32_t __data_end__;
+extern uint32_t __copy_table_start__;
+extern uint32_t __copy_table_end__;
+extern uint32_t __zero_table_start__;
+extern uint32_t __zero_table_end__;
+extern uint32_t __bss_start__;
+extern uint32_t __bss_end__;
+extern uint32_t __StackTop;
+
+/*----------------------------------------------------------------------------
+ Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+
+/*----------------------------------------------------------------------------
+ External References
+ *----------------------------------------------------------------------------*/
+#ifndef __START
+extern void _start(void) __attribute__((noreturn)); /* PreeMain (C library entry point) */
+#else
+extern int __START(void) __attribute__((noreturn)); /* main entry point */
+#endif
+
+#ifndef __NO_SYSTEM_INIT
+extern void SystemInit (void); /* CMSIS System Initialization */
+#endif
+
+
+/*----------------------------------------------------------------------------
+ Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void); /* Default empty handler */
+void Reset_Handler(void); /* Reset Handler */
+
+
+/*----------------------------------------------------------------------------
+ User Initial Stack & Heap
+ *----------------------------------------------------------------------------*/
+#ifndef __STACK_SIZE
+ #define __STACK_SIZE 0x00000400
+#endif
+static uint8_t stack[__STACK_SIZE] __attribute__ ((aligned(8), used, section(".stack")));
+
+#ifndef __HEAP_SIZE
+ #define __HEAP_SIZE 0x00000C00
+#endif
+#if __HEAP_SIZE > 0
+static uint8_t heap[__HEAP_SIZE] __attribute__ ((aligned(8), used, section(".heap")));
+#endif
+
+
+/*----------------------------------------------------------------------------
+ Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Cortex-M7 Processor Exceptions */
+void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+/* ARMCM7 Specific Interrupts */
+void WDT_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIM0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIM2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void MCIA_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void MCIB_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART4_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void AACI_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void ENET_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBDC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBHC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CHLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void FLEXRAY_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CAN_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void LIN_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void I2C_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CPU_CLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPI_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+ Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+const pFunc __Vectors[] __attribute__ ((section(".vectors"))) = {
+ /* Cortex-M7 Exceptions Handler */
+ (pFunc)((uint32_t)&__StackTop), /* Initial Stack Pointer */
+ Reset_Handler, /* Reset Handler */
+ NMI_Handler, /* NMI Handler */
+ HardFault_Handler, /* Hard Fault Handler */
+ MemManage_Handler, /* MPU Fault Handler */
+ BusFault_Handler, /* Bus Fault Handler */
+ UsageFault_Handler, /* Usage Fault Handler */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ SVC_Handler, /* SVCall Handler */
+ DebugMon_Handler, /* Debug Monitor Handler */
+ 0, /* Reserved */
+ PendSV_Handler, /* PendSV Handler */
+ SysTick_Handler, /* SysTick Handler */
+
+ /* External interrupts */
+ WDT_IRQHandler, /* 0: Watchdog Timer */
+ RTC_IRQHandler, /* 1: Real Time Clock */
+ TIM0_IRQHandler, /* 2: Timer0 / Timer1 */
+ TIM2_IRQHandler, /* 3: Timer2 / Timer3 */
+ MCIA_IRQHandler, /* 4: MCIa */
+ MCIB_IRQHandler, /* 5: MCIb */
+ UART0_IRQHandler, /* 6: UART0 - DUT FPGA */
+ UART1_IRQHandler, /* 7: UART1 - DUT FPGA */
+ UART2_IRQHandler, /* 8: UART2 - DUT FPGA */
+ UART4_IRQHandler, /* 9: UART4 - not connected */
+ AACI_IRQHandler, /* 10: AACI / AC97 */
+ CLCD_IRQHandler, /* 11: CLCD Combined Interrupt */
+ ENET_IRQHandler, /* 12: Ethernet */
+ USBDC_IRQHandler, /* 13: USB Device */
+ USBHC_IRQHandler, /* 14: USB Host Controller */
+ CHLCD_IRQHandler, /* 15: Character LCD */
+ FLEXRAY_IRQHandler, /* 16: Flexray */
+ CAN_IRQHandler, /* 17: CAN */
+ LIN_IRQHandler, /* 18: LIN */
+ I2C_IRQHandler, /* 19: I2C ADC/DAC */
+ 0, /* 20: Reserved */
+ 0, /* 21: Reserved */
+ 0, /* 22: Reserved */
+ 0, /* 23: Reserved */
+ 0, /* 24: Reserved */
+ 0, /* 25: Reserved */
+ 0, /* 26: Reserved */
+ 0, /* 27: Reserved */
+ CPU_CLCD_IRQHandler, /* 28: Reserved - CPU FPGA CLCD */
+ 0, /* 29: Reserved - CPU FPGA */
+ UART3_IRQHandler, /* 30: UART3 - CPU FPGA */
+ SPI_IRQHandler /* 31: SPI Touchscreen - CPU FPGA */
+};
+
+
+/*----------------------------------------------------------------------------
+ Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void) {
+ uint32_t *pSrc, *pDest;
+ uint32_t *pTable __attribute__((unused));
+
+/* Firstly it copies data from read only memory to RAM. There are two schemes
+ * to copy. One can copy more than one sections. Another can only copy
+ * one section. The former scheme needs more instructions and read-only
+ * data to implement than the latter.
+ * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */
+
+#ifdef __STARTUP_COPY_MULTIPLE
+/* Multiple sections scheme.
+ *
+ * Between symbol address __copy_table_start__ and __copy_table_end__,
+ * there are array of triplets, each of which specify:
+ * offset 0: LMA of start of a section to copy from
+ * offset 4: VMA of start of a section to copy to
+ * offset 8: size of the section to copy. Must be multiply of 4
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+ pTable = &__copy_table_start__;
+
+ for (; pTable < &__copy_table_end__; pTable = pTable + 3) {
+ pSrc = (uint32_t*)*(pTable + 0);
+ pDest = (uint32_t*)*(pTable + 1);
+ for (; pDest < (uint32_t*)(*(pTable + 1) + *(pTable + 2)) ; ) {
+ *pDest++ = *pSrc++;
+ }
+ }
+#else
+/* Single section scheme.
+ *
+ * The ranges of copy from/to are specified by following symbols
+ * __etext: LMA of start of the section to copy from. Usually end of text
+ * __data_start__: VMA of start of the section to copy to
+ * __data_end__: VMA of end of the section to copy to
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+ pSrc = &__etext;
+ pDest = &__data_start__;
+
+ for ( ; pDest < &__data_end__ ; ) {
+ *pDest++ = *pSrc++;
+ }
+#endif /*__STARTUP_COPY_MULTIPLE */
+
+/* This part of work usually is done in C library startup code. Otherwise,
+ * define this macro to enable it in this startup.
+ *
+ * There are two schemes too. One can clear multiple BSS sections. Another
+ * can only clear one section. The former is more size expensive than the
+ * latter.
+ *
+ * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
+ * Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
+ */
+#ifdef __STARTUP_CLEAR_BSS_MULTIPLE
+/* Multiple sections scheme.
+ *
+ * Between symbol address __copy_table_start__ and __copy_table_end__,
+ * there are array of tuples specifying:
+ * offset 0: Start of a BSS section
+ * offset 4: Size of this BSS section. Must be multiply of 4
+ */
+ pTable = &__zero_table_start__;
+
+ for (; pTable < &__zero_table_end__; pTable = pTable + 2) {
+ pDest = (uint32_t*)*(pTable + 0);
+ for (; pDest < (uint32_t*)(*(pTable + 0) + *(pTable + 1)) ; ) {
+ *pDest++ = 0;
+ }
+ }
+#elif defined (__STARTUP_CLEAR_BSS)
+/* Single BSS section scheme.
+ *
+ * The BSS section is specified by following symbols
+ * __bss_start__: start of the BSS section.
+ * __bss_end__: end of the BSS section.
+ *
+ * Both addresses must be aligned to 4 bytes boundary.
+ */
+ pDest = &__bss_start__;
+
+ for ( ; pDest < &__bss_end__ ; ) {
+ *pDest++ = 0UL;
+ }
+#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
+
+#ifndef __NO_SYSTEM_INIT
+ SystemInit();
+#endif
+
+#ifndef __START
+#define __START _start
+#endif
+ __START();
+
+}
+
+
+/*----------------------------------------------------------------------------
+ Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) {
+
+ while(1);
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..0170ef4
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM7.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM7 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00080000
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ; 0: Watchdog Timer
+ DCD RTC_IRQHandler ; 1: Real Time Clock
+ DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
+ DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
+ DCD MCIA_IRQHandler ; 4: MCIa
+ DCD MCIB_IRQHandler ; 5: MCIb
+ DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
+ DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
+ DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
+ DCD UART4_IRQHandler ; 9: UART4 - not connected
+ DCD AACI_IRQHandler ; 10: AACI / AC97
+ DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
+ DCD ENET_IRQHandler ; 12: Ethernet
+ DCD USBDC_IRQHandler ; 13: USB Device
+ DCD USBHC_IRQHandler ; 14: USB Host Controller
+ DCD CHLCD_IRQHandler ; 15: Character LCD
+ DCD FLEXRAY_IRQHandler ; 16: Flexray
+ DCD CAN_IRQHandler ; 17: CAN
+ DCD LIN_IRQHandler ; 18: LIN
+ DCD I2C_IRQHandler ; 19: I2C ADC/DAC
+ DCD 0 ; 20: Reserved
+ DCD 0 ; 21: Reserved
+ DCD 0 ; 22: Reserved
+ DCD 0 ; 23: Reserved
+ DCD 0 ; 24: Reserved
+ DCD 0 ; 25: Reserved
+ DCD 0 ; 26: Reserved
+ DCD 0 ; 27: Reserved
+ DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
+ DCD 0 ; 29: Reserved - CPU FPGA
+ DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
+ DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT TIM0_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT MCIA_IRQHandler [WEAK]
+ EXPORT MCIB_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT AACI_IRQHandler [WEAK]
+ EXPORT CLCD_IRQHandler [WEAK]
+ EXPORT ENET_IRQHandler [WEAK]
+ EXPORT USBDC_IRQHandler [WEAK]
+ EXPORT USBHC_IRQHandler [WEAK]
+ EXPORT CHLCD_IRQHandler [WEAK]
+ EXPORT FLEXRAY_IRQHandler [WEAK]
+ EXPORT CAN_IRQHandler [WEAK]
+ EXPORT LIN_IRQHandler [WEAK]
+ EXPORT I2C_IRQHandler [WEAK]
+ EXPORT CPU_CLCD_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+ B .
+
+ ENDP
+
+
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..65bfaca
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file system_ARMCM7.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM7 Device Series
+ * @version V5.00
+ * @date 08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+ #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+ #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+ #include "ARMCM7_DP.h"
+#else
+ #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL ( 5000000U) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+ Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+ SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3U << 10*2) | /* set CP10 Full Access */
+ (3U << 11*2) ); /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+ SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/STM32F411RETx/startup_stm32f411xe.s b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/STM32F411RETx/startup_stm32f411xe.s
new file mode 100644
index 0000000..9b70614
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/STM32F411RETx/startup_stm32f411xe.s
@@ -0,0 +1,395 @@
+;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
+;* File Name : startup_stm32f411xe.s
+;* Author : MCD Application Team
+;* Version : V2.6.0
+;* Date : 04-November-2016
+;* Description : STM32F411xExx devices vector table for MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the CortexM4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>
+;*******************************************************************************
+;
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;* 1. Redistributions of source code must retain the above copyright notice,
+;* this list of conditions and the following disclaimer.
+;* 2. Redistributions in binary form must reproduce the above copyright notice,
+;* this list of conditions and the following disclaimer in the documentation
+;* and/or other materials provided with the distribution.
+;* 3. Neither the name of STMicroelectronics nor the names of its contributors
+;* may be used to endorse or promote products derived from this software
+;* without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;
+;*******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_IRQHandler ; PVD through EXTI Line detection
+ DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
+ DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
+ DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
+ DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
+ DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
+ DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
+ DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
+ DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
+ DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
+ DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD 0 ; Reserved
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]s
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
+ DCD 0 ; Reserved
+ DCD SDIO_IRQHandler ; SDIO
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
+ DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
+ DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
+ DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
+ DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD OTG_FS_IRQHandler ; USB OTG FS
+ DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
+ DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
+ DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
+ DCD USART6_IRQHandler ; USART6
+ DCD I2C3_EV_IRQHandler ; I2C3 event
+ DCD I2C3_ER_IRQHandler ; I2C3 error
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD FPU_IRQHandler ; FPU
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SPI4_IRQHandler ; SPI4
+ DCD SPI5_IRQHandler ; SPI5
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_IRQHandler [WEAK]
+ EXPORT TAMP_STAMP_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Stream0_IRQHandler [WEAK]
+ EXPORT DMA1_Stream1_IRQHandler [WEAK]
+ EXPORT DMA1_Stream2_IRQHandler [WEAK]
+ EXPORT DMA1_Stream3_IRQHandler [WEAK]
+ EXPORT DMA1_Stream4_IRQHandler [WEAK]
+ EXPORT DMA1_Stream5_IRQHandler [WEAK]
+ EXPORT DMA1_Stream6_IRQHandler [WEAK]
+ EXPORT ADC_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
+ EXPORT DMA1_Stream7_IRQHandler [WEAK]
+ EXPORT SDIO_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT DMA2_Stream0_IRQHandler [WEAK]
+ EXPORT DMA2_Stream1_IRQHandler [WEAK]
+ EXPORT DMA2_Stream2_IRQHandler [WEAK]
+ EXPORT DMA2_Stream3_IRQHandler [WEAK]
+ EXPORT DMA2_Stream4_IRQHandler [WEAK]
+ EXPORT OTG_FS_IRQHandler [WEAK]
+ EXPORT DMA2_Stream5_IRQHandler [WEAK]
+ EXPORT DMA2_Stream6_IRQHandler [WEAK]
+ EXPORT DMA2_Stream7_IRQHandler [WEAK]
+ EXPORT USART6_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT SPI5_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_IRQHandler
+TAMP_STAMP_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Stream0_IRQHandler
+DMA1_Stream1_IRQHandler
+DMA1_Stream2_IRQHandler
+DMA1_Stream3_IRQHandler
+DMA1_Stream4_IRQHandler
+DMA1_Stream5_IRQHandler
+DMA1_Stream6_IRQHandler
+ADC_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM9_IRQHandler
+TIM1_UP_TIM10_IRQHandler
+TIM1_TRG_COM_TIM11_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+OTG_FS_WKUP_IRQHandler
+DMA1_Stream7_IRQHandler
+SDIO_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+DMA2_Stream0_IRQHandler
+DMA2_Stream1_IRQHandler
+DMA2_Stream2_IRQHandler
+DMA2_Stream3_IRQHandler
+DMA2_Stream4_IRQHandler
+OTG_FS_IRQHandler
+DMA2_Stream5_IRQHandler
+DMA2_Stream6_IRQHandler
+DMA2_Stream7_IRQHandler
+USART6_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+FPU_IRQHandler
+SPI4_IRQHandler
+SPI5_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/STM32F411RETx/system_stm32f4xx.c b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/STM32F411RETx/system_stm32f4xx.c
new file mode 100644
index 0000000..bca0633
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/Device/STM32F411RETx/system_stm32f4xx.c
@@ -0,0 +1,763 @@
+/**
+ ******************************************************************************
+ * @file system_stm32f4xx.c
+ * @author MCD Application Team
+ * @version V2.6.0
+ * @date 04-November-2016
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32f4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32f4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Includes
+ * @{
+ */
+
+
+#include "stm32f4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+ || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+/* #define DATA_IN_ExtSRAM */
+#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
+ STM32F412Zx || STM32F412Vx */
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+/* #define DATA_IN_ExtSDRAM */
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
+ STM32F479xx */
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Variables
+ * @{
+ */
+ /* This variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+uint32_t SystemCoreClock = 16000000;
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+ static void SystemInit_ExtMemCtl(void);
+#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system
+ * Initialize the FPU setting, vector table location and External memory
+ * configuration.
+ * @param None
+ * @retval None
+ */
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
+ #endif
+ /* Reset the RCC clock configuration to the default reset state ------------*/
+ /* Set HSION bit */
+ RCC->CR |= (uint32_t)0x00000001;
+
+ /* Reset CFGR register */
+ RCC->CFGR = 0x00000000;
+
+ /* Reset HSEON, CSSON and PLLON bits */
+ RCC->CR &= (uint32_t)0xFEF6FFFF;
+
+ /* Reset PLLCFGR register */
+ RCC->PLLCFGR = 0x24003010;
+
+ /* Reset HSEBYP bit */
+ RCC->CR &= (uint32_t)0xFFFBFFFF;
+
+ /* Disable all interrupts */
+ RCC->CIR = 0x00000000;
+
+#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+ SystemInit_ExtMemCtl();
+#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
+ * depends on the application requirements), user has to ensure that HSE_VALUE
+ * is same as the real frequency of the crystal used. Otherwise, this function
+ * may have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+ switch (tmp)
+ {
+ case 0x00: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+ case 0x04: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+ case 0x08: /* PLL used as system clock source */
+
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+ SYSCLK = PLL_VCO / PLL_P
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+
+ if (pllsource != 0)
+ {
+ /* HSE used as PLL clock source */
+ pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+ }
+ else
+ {
+ /* HSI used as PLL clock source */
+ pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+ }
+
+ pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+ SystemCoreClock = pllvco/pllp;
+ break;
+ default:
+ SystemCoreClock = HSI_VALUE;
+ break;
+ }
+ /* Compute HCLK frequency --------------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK frequency */
+ SystemCoreClock >>= tmp;
+}
+
+#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx)
+/**
+ * @brief Setup the external memory controller.
+ * Called in startup_stm32f4xx.s before jump to main.
+ * This function configures the external memories (SRAM/SDRAM)
+ * This SRAM/SDRAM will be used as program data memory (including heap and stack).
+ * @param None
+ * @retval None
+ */
+void SystemInit_ExtMemCtl(void)
+{
+ __IO uint32_t tmp = 0x00;
+
+ register uint32_t tmpreg = 0, timeout = 0xFFFF;
+ register __IO uint32_t index;
+
+ /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
+ RCC->AHB1ENR |= 0x000001F8;
+
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
+
+ /* Connect PDx pins to FMC Alternate function */
+ GPIOD->AFR[0] = 0x00CCC0CC;
+ GPIOD->AFR[1] = 0xCCCCCCCC;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOD->MODER = 0xAAAA0A8A;
+ /* Configure PDx pins speed to 100 MHz */
+ GPIOD->OSPEEDR = 0xFFFF0FCF;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOD->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOD->PUPDR = 0x00000000;
+
+ /* Connect PEx pins to FMC Alternate function */
+ GPIOE->AFR[0] = 0xC00CC0CC;
+ GPIOE->AFR[1] = 0xCCCCCCCC;
+ /* Configure PEx pins in Alternate function mode */
+ GPIOE->MODER = 0xAAAA828A;
+ /* Configure PEx pins speed to 100 MHz */
+ GPIOE->OSPEEDR = 0xFFFFC3CF;
+ /* Configure PEx pins Output type to push-pull */
+ GPIOE->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PEx pins */
+ GPIOE->PUPDR = 0x00000000;
+
+ /* Connect PFx pins to FMC Alternate function */
+ GPIOF->AFR[0] = 0xCCCCCCCC;
+ GPIOF->AFR[1] = 0xCCCCCCCC;
+ /* Configure PFx pins in Alternate function mode */
+ GPIOF->MODER = 0xAA800AAA;
+ /* Configure PFx pins speed to 50 MHz */
+ GPIOF->OSPEEDR = 0xAA800AAA;
+ /* Configure PFx pins Output type to push-pull */
+ GPIOF->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PFx pins */
+ GPIOF->PUPDR = 0x00000000;
+
+ /* Connect PGx pins to FMC Alternate function */
+ GPIOG->AFR[0] = 0xCCCCCCCC;
+ GPIOG->AFR[1] = 0xCCCCCCCC;
+ /* Configure PGx pins in Alternate function mode */
+ GPIOG->MODER = 0xAAAAAAAA;
+ /* Configure PGx pins speed to 50 MHz */
+ GPIOG->OSPEEDR = 0xAAAAAAAA;
+ /* Configure PGx pins Output type to push-pull */
+ GPIOG->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PGx pins */
+ GPIOG->PUPDR = 0x00000000;
+
+ /* Connect PHx pins to FMC Alternate function */
+ GPIOH->AFR[0] = 0x00C0CC00;
+ GPIOH->AFR[1] = 0xCCCCCCCC;
+ /* Configure PHx pins in Alternate function mode */
+ GPIOH->MODER = 0xAAAA08A0;
+ /* Configure PHx pins speed to 50 MHz */
+ GPIOH->OSPEEDR = 0xAAAA08A0;
+ /* Configure PHx pins Output type to push-pull */
+ GPIOH->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PHx pins */
+ GPIOH->PUPDR = 0x00000000;
+
+ /* Connect PIx pins to FMC Alternate function */
+ GPIOI->AFR[0] = 0xCCCCCCCC;
+ GPIOI->AFR[1] = 0x00000CC0;
+ /* Configure PIx pins in Alternate function mode */
+ GPIOI->MODER = 0x0028AAAA;
+ /* Configure PIx pins speed to 50 MHz */
+ GPIOI->OSPEEDR = 0x0028AAAA;
+ /* Configure PIx pins Output type to push-pull */
+ GPIOI->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PIx pins */
+ GPIOI->PUPDR = 0x00000000;
+
+/*-- FMC Configuration -------------------------------------------------------*/
+ /* Enable the FMC interface clock */
+ RCC->AHB3ENR |= 0x00000001;
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+
+ FMC_Bank5_6->SDCR[0] = 0x000019E4;
+ FMC_Bank5_6->SDTR[0] = 0x01115351;
+
+ /* SDRAM initialization sequence */
+ /* Clock enable command */
+ FMC_Bank5_6->SDCMR = 0x00000011;
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Delay */
+ for (index = 0; index<1000; index++);
+
+ /* PALL command */
+ FMC_Bank5_6->SDCMR = 0x00000012;
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Auto refresh command */
+ FMC_Bank5_6->SDCMR = 0x00000073;
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* MRD register program */
+ FMC_Bank5_6->SDCMR = 0x00046014;
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Set refresh count */
+ tmpreg = FMC_Bank5_6->SDRTR;
+ FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
+
+ /* Disable write protection */
+ tmpreg = FMC_Bank5_6->SDCR[0];
+ FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
+ /* Configure and enable Bank1_SRAM2 */
+ FMC_Bank1->BTCR[2] = 0x00001011;
+ FMC_Bank1->BTCR[3] = 0x00000201;
+ FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
+#if defined(STM32F469xx) || defined(STM32F479xx)
+ /* Configure and enable Bank1_SRAM2 */
+ FMC_Bank1->BTCR[2] = 0x00001091;
+ FMC_Bank1->BTCR[3] = 0x00110212;
+ FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F469xx || STM32F479xx */
+
+ (void)(tmp);
+}
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
+#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+/**
+ * @brief Setup the external memory controller.
+ * Called in startup_stm32f4xx.s before jump to main.
+ * This function configures the external memories (SRAM/SDRAM)
+ * This SRAM/SDRAM will be used as program data memory (including heap and stack).
+ * @param None
+ * @retval None
+ */
+void SystemInit_ExtMemCtl(void)
+{
+ __IO uint32_t tmp = 0x00;
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+#if defined (DATA_IN_ExtSDRAM)
+ register uint32_t tmpreg = 0, timeout = 0xFFFF;
+ register __IO uint32_t index;
+
+#if defined(STM32F446xx)
+ /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
+ clock */
+ RCC->AHB1ENR |= 0x0000007D;
+#else
+ /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
+ clock */
+ RCC->AHB1ENR |= 0x000001F8;
+#endif /* STM32F446xx */
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
+
+#if defined(STM32F446xx)
+ /* Connect PAx pins to FMC Alternate function */
+ GPIOA->AFR[0] |= 0xC0000000;
+ GPIOA->AFR[1] |= 0x00000000;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOA->MODER |= 0x00008000;
+ /* Configure PDx pins speed to 50 MHz */
+ GPIOA->OSPEEDR |= 0x00008000;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOA->OTYPER |= 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOA->PUPDR |= 0x00000000;
+
+ /* Connect PCx pins to FMC Alternate function */
+ GPIOC->AFR[0] |= 0x00CC0000;
+ GPIOC->AFR[1] |= 0x00000000;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOC->MODER |= 0x00000A00;
+ /* Configure PDx pins speed to 50 MHz */
+ GPIOC->OSPEEDR |= 0x00000A00;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOC->OTYPER |= 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOC->PUPDR |= 0x00000000;
+#endif /* STM32F446xx */
+
+ /* Connect PDx pins to FMC Alternate function */
+ GPIOD->AFR[0] = 0x000000CC;
+ GPIOD->AFR[1] = 0xCC000CCC;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOD->MODER = 0xA02A000A;
+ /* Configure PDx pins speed to 50 MHz */
+ GPIOD->OSPEEDR = 0xA02A000A;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOD->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOD->PUPDR = 0x00000000;
+
+ /* Connect PEx pins to FMC Alternate function */
+ GPIOE->AFR[0] = 0xC00000CC;
+ GPIOE->AFR[1] = 0xCCCCCCCC;
+ /* Configure PEx pins in Alternate function mode */
+ GPIOE->MODER = 0xAAAA800A;
+ /* Configure PEx pins speed to 50 MHz */
+ GPIOE->OSPEEDR = 0xAAAA800A;
+ /* Configure PEx pins Output type to push-pull */
+ GPIOE->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PEx pins */
+ GPIOE->PUPDR = 0x00000000;
+
+ /* Connect PFx pins to FMC Alternate function */
+ GPIOF->AFR[0] = 0xCCCCCCCC;
+ GPIOF->AFR[1] = 0xCCCCCCCC;
+ /* Configure PFx pins in Alternate function mode */
+ GPIOF->MODER = 0xAA800AAA;
+ /* Configure PFx pins speed to 50 MHz */
+ GPIOF->OSPEEDR = 0xAA800AAA;
+ /* Configure PFx pins Output type to push-pull */
+ GPIOF->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PFx pins */
+ GPIOF->PUPDR = 0x00000000;
+
+ /* Connect PGx pins to FMC Alternate function */
+ GPIOG->AFR[0] = 0xCCCCCCCC;
+ GPIOG->AFR[1] = 0xCCCCCCCC;
+ /* Configure PGx pins in Alternate function mode */
+ GPIOG->MODER = 0xAAAAAAAA;
+ /* Configure PGx pins speed to 50 MHz */
+ GPIOG->OSPEEDR = 0xAAAAAAAA;
+ /* Configure PGx pins Output type to push-pull */
+ GPIOG->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PGx pins */
+ GPIOG->PUPDR = 0x00000000;
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx)
+ /* Connect PHx pins to FMC Alternate function */
+ GPIOH->AFR[0] = 0x00C0CC00;
+ GPIOH->AFR[1] = 0xCCCCCCCC;
+ /* Configure PHx pins in Alternate function mode */
+ GPIOH->MODER = 0xAAAA08A0;
+ /* Configure PHx pins speed to 50 MHz */
+ GPIOH->OSPEEDR = 0xAAAA08A0;
+ /* Configure PHx pins Output type to push-pull */
+ GPIOH->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PHx pins */
+ GPIOH->PUPDR = 0x00000000;
+
+ /* Connect PIx pins to FMC Alternate function */
+ GPIOI->AFR[0] = 0xCCCCCCCC;
+ GPIOI->AFR[1] = 0x00000CC0;
+ /* Configure PIx pins in Alternate function mode */
+ GPIOI->MODER = 0x0028AAAA;
+ /* Configure PIx pins speed to 50 MHz */
+ GPIOI->OSPEEDR = 0x0028AAAA;
+ /* Configure PIx pins Output type to push-pull */
+ GPIOI->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PIx pins */
+ GPIOI->PUPDR = 0x00000000;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
+
+/*-- FMC Configuration -------------------------------------------------------*/
+ /* Enable the FMC interface clock */
+ RCC->AHB3ENR |= 0x00000001;
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+
+ /* Configure and enable SDRAM bank1 */
+#if defined(STM32F446xx)
+ FMC_Bank5_6->SDCR[0] = 0x00001954;
+#else
+ FMC_Bank5_6->SDCR[0] = 0x000019E4;
+#endif /* STM32F446xx */
+ FMC_Bank5_6->SDTR[0] = 0x01115351;
+
+ /* SDRAM initialization sequence */
+ /* Clock enable command */
+ FMC_Bank5_6->SDCMR = 0x00000011;
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Delay */
+ for (index = 0; index<1000; index++);
+
+ /* PALL command */
+ FMC_Bank5_6->SDCMR = 0x00000012;
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Auto refresh command */
+#if defined(STM32F446xx)
+ FMC_Bank5_6->SDCMR = 0x000000F3;
+#else
+ FMC_Bank5_6->SDCMR = 0x00000073;
+#endif /* STM32F446xx */
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* MRD register program */
+#if defined(STM32F446xx)
+ FMC_Bank5_6->SDCMR = 0x00044014;
+#else
+ FMC_Bank5_6->SDCMR = 0x00046014;
+#endif /* STM32F446xx */
+ timeout = 0xFFFF;
+ while((tmpreg != 0) && (timeout-- > 0))
+ {
+ tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+ }
+
+ /* Set refresh count */
+ tmpreg = FMC_Bank5_6->SDRTR;
+#if defined(STM32F446xx)
+ FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
+#else
+ FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
+#endif /* STM32F446xx */
+
+ /* Disable write protection */
+ tmpreg = FMC_Bank5_6->SDCR[0];
+ FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
+#endif /* DATA_IN_ExtSDRAM */
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
+
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+ || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+
+#if defined(DATA_IN_ExtSRAM)
+/*-- GPIOs Configuration -----------------------------------------------------*/
+ /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+ RCC->AHB1ENR |= 0x00000078;
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
+
+ /* Connect PDx pins to FMC Alternate function */
+ GPIOD->AFR[0] = 0x00CCC0CC;
+ GPIOD->AFR[1] = 0xCCCCCCCC;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOD->MODER = 0xAAAA0A8A;
+ /* Configure PDx pins speed to 100 MHz */
+ GPIOD->OSPEEDR = 0xFFFF0FCF;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOD->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOD->PUPDR = 0x00000000;
+
+ /* Connect PEx pins to FMC Alternate function */
+ GPIOE->AFR[0] = 0xC00CC0CC;
+ GPIOE->AFR[1] = 0xCCCCCCCC;
+ /* Configure PEx pins in Alternate function mode */
+ GPIOE->MODER = 0xAAAA828A;
+ /* Configure PEx pins speed to 100 MHz */
+ GPIOE->OSPEEDR = 0xFFFFC3CF;
+ /* Configure PEx pins Output type to push-pull */
+ GPIOE->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PEx pins */
+ GPIOE->PUPDR = 0x00000000;
+
+ /* Connect PFx pins to FMC Alternate function */
+ GPIOF->AFR[0] = 0x00CCCCCC;
+ GPIOF->AFR[1] = 0xCCCC0000;
+ /* Configure PFx pins in Alternate function mode */
+ GPIOF->MODER = 0xAA000AAA;
+ /* Configure PFx pins speed to 100 MHz */
+ GPIOF->OSPEEDR = 0xFF000FFF;
+ /* Configure PFx pins Output type to push-pull */
+ GPIOF->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PFx pins */
+ GPIOF->PUPDR = 0x00000000;
+
+ /* Connect PGx pins to FMC Alternate function */
+ GPIOG->AFR[0] = 0x00CCCCCC;
+ GPIOG->AFR[1] = 0x000000C0;
+ /* Configure PGx pins in Alternate function mode */
+ GPIOG->MODER = 0x00085AAA;
+ /* Configure PGx pins speed to 100 MHz */
+ GPIOG->OSPEEDR = 0x000CAFFF;
+ /* Configure PGx pins Output type to push-pull */
+ GPIOG->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PGx pins */
+ GPIOG->PUPDR = 0x00000000;
+
+/*-- FMC/FSMC Configuration --------------------------------------------------*/
+ /* Enable the FMC/FSMC interface clock */
+ RCC->AHB3ENR |= 0x00000001;
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+ /* Configure and enable Bank1_SRAM2 */
+ FMC_Bank1->BTCR[2] = 0x00001011;
+ FMC_Bank1->BTCR[3] = 0x00000201;
+ FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
+#if defined(STM32F469xx) || defined(STM32F479xx)
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+ /* Configure and enable Bank1_SRAM2 */
+ FMC_Bank1->BTCR[2] = 0x00001091;
+ FMC_Bank1->BTCR[3] = 0x00110212;
+ FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F469xx || STM32F479xx */
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
+ || defined(STM32F412Zx) || defined(STM32F412Vx)
+ /* Delay after an RCC peripheral clock enabling */
+ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
+ /* Configure and enable Bank1_SRAM2 */
+ FSMC_Bank1->BTCR[2] = 0x00001011;
+ FSMC_Bank1->BTCR[3] = 0x00000201;
+ FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
+#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
+
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
+ STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */
+ (void)(tmp);
+}
+#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM0/RTE_Components.h b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM0/RTE_Components.h
new file mode 100644
index 0000000..4459a74
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM0/RTE_Components.h
@@ -0,0 +1,20 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ * *** Do not modify ! ***
+ *
+ * Project: 'arm_nnexamples_cifar10'
+ * Target: 'ARMCM0'
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File:
+ */
+#define CMSIS_device_header "ARMCM0.h"
+
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM3/RTE_Components.h b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM3/RTE_Components.h
new file mode 100644
index 0000000..f12e4f3
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM3/RTE_Components.h
@@ -0,0 +1,26 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ * *** Do not modify ! ***
+ *
+ * Project: 'arm_nnexamples_nn_test'
+ * Target: 'ARMCM3'
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File:
+ */
+#define CMSIS_device_header "ARMCM3.h"
+
+#define RTE_Compiler_IO_STDERR /* Compiler I/O: STDERR */
+ #define RTE_Compiler_IO_STDERR_ITM /* Compiler I/O: STDERR ITM */
+#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
+ #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
+#define RTE_Compiler_IO_TTY /* Compiler I/O: TTY */
+ #define RTE_Compiler_IO_TTY_ITM /* Compiler I/O: TTY ITM */
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM4_FP/RTE_Components.h b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM4_FP/RTE_Components.h
new file mode 100644
index 0000000..d4542f5
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM4_FP/RTE_Components.h
@@ -0,0 +1,26 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ * *** Do not modify ! ***
+ *
+ * Project: 'arm_nnexamples_nn_test'
+ * Target: 'ARMCM4_FP'
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File:
+ */
+#define CMSIS_device_header "ARMCM4_FP.h"
+
+#define RTE_Compiler_IO_STDERR /* Compiler I/O: STDERR */
+ #define RTE_Compiler_IO_STDERR_ITM /* Compiler I/O: STDERR ITM */
+#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
+ #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
+#define RTE_Compiler_IO_TTY /* Compiler I/O: TTY */
+ #define RTE_Compiler_IO_TTY_ITM /* Compiler I/O: TTY ITM */
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM7_SP/RTE_Components.h b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM7_SP/RTE_Components.h
new file mode 100644
index 0000000..97ef09a
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM7_SP/RTE_Components.h
@@ -0,0 +1,26 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ * *** Do not modify ! ***
+ *
+ * Project: 'arm_nnexamples_nn_test'
+ * Target: 'ARMCM7_SP'
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File:
+ */
+#define CMSIS_device_header "ARMCM7_SP.h"
+
+#define RTE_Compiler_IO_STDERR /* Compiler I/O: STDERR */
+ #define RTE_Compiler_IO_STDERR_ITM /* Compiler I/O: STDERR ITM */
+#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
+ #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
+#define RTE_Compiler_IO_TTY /* Compiler I/O: TTY */
+ #define RTE_Compiler_IO_TTY_ITM /* Compiler I/O: TTY ITM */
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q15_ref.c b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q15_ref.c
new file mode 100644
index 0000000..5d37740
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q15_ref.c
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ref_functions.h"
+
+void arm_convolve_HWC_q15_ref(const q15_t * Im_in, // input image
+ const uint16_t dim_im_in, // input image dimention
+ const uint16_t ch_im_in, // number of input image channels
+ const q15_t * wt, // kernel weights
+ const uint16_t ch_im_out, // number of filters, i.e., output image channels
+ const uint16_t dim_kernel, // filter kernel size
+ const uint16_t padding, // padding sizes
+ const uint16_t stride, // stride
+ const q15_t * bias, // bias
+ const uint16_t bias_shift, const uint16_t out_shift, q15_t * Im_out, // output image
+ const uint16_t dim_im_out, // output image dimension
+ q15_t * bufferA, //buffer space for input
+ q7_t * bufferB //buffer space for output
+ )
+{
+ int i, j, k, l, m, n;
+ int conv_out;
+ int in_row, in_col;
+
+ for (i = 0; i < ch_im_out; i++)
+ {
+ for (j = 0; j < dim_im_out; j++)
+ {
+ for (k = 0; k < dim_im_out; k++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ conv_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ conv_out = bias[i] << bias_shift;
+#endif
+ for (m = 0; m < dim_kernel; m++)
+ {
+ for (n = 0; n < dim_kernel; n++)
+ {
+ in_row = stride * j + m - padding;
+ in_col = stride * k + n - padding;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
+ {
+ for (l = 0; l < ch_im_in; l++)
+ {
+ conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + l] *
+ wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel + n) * ch_im_in + l];
+ }
+ }
+ }
+ }
+ Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q15_t) __SSAT((conv_out >> out_shift), 16);
+ }
+ }
+ }
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q7_ref.c b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q7_ref.c
new file mode 100644
index 0000000..a65a4f8
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q7_ref.c
@@ -0,0 +1,72 @@
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ref_functions.h"
+
+void arm_convolve_HWC_q7_ref(const q7_t * Im_in, // input image
+ const uint16_t dim_im_in, // input image dimention
+ const uint16_t ch_im_in, // number of input image channels
+ const q7_t * wt, // kernel weights
+ const uint16_t ch_im_out, // number of filters, i.e., output image channels
+ const uint16_t dim_kernel, // filter kernel size
+ const uint16_t padding, // padding sizes
+ const uint16_t stride, // stride
+ const q7_t * bias, // bias
+ const uint16_t bias_shift, const uint16_t out_shift, q7_t * Im_out, // output image
+ const uint16_t dim_im_out, // output image dimension
+ q15_t * bufferA, //buffer space for input
+ q7_t * bufferB //buffer space for output
+ )
+{
+ int i, j, k, l, m, n;
+ int conv_out;
+ int in_row, in_col;
+
+ for (i = 0; i < ch_im_out; i++)
+ {
+ for (j = 0; j < dim_im_out; j++)
+ {
+ for (k = 0; k < dim_im_out; k++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ conv_out = ((q31_t) (bias[i]) << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ conv_out = bias[i] << bias_shift;
+#endif
+ for (m = 0; m < dim_kernel; m++)
+ {
+ for (n = 0; n < dim_kernel; n++)
+ {
+ // if-for implementation
+ in_row = stride * j + m - padding;
+ in_col = stride * k + n - padding;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
+ {
+ for (l = 0; l < ch_im_in; l++)
+ {
+ conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + l] *
+ wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel + n) * ch_im_in + l];
+ }
+ }
+ }
+ }
+ Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
+ }
+ }
+ }
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q7_ref_nonsquare.c b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q7_ref_nonsquare.c
new file mode 100644
index 0000000..6c52318
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q7_ref_nonsquare.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ref_functions.h"
+
+void arm_convolve_HWC_q7_ref_nonsquare(const q7_t * Im_in, // input image
+ const uint16_t dim_im_in_x, // input image dimention x
+ const uint16_t dim_im_in_y, // input image dimention y
+ const uint16_t ch_im_in, // number of input image channels
+ const q7_t * wt, // kernel weights
+ const uint16_t ch_im_out, // number of filters, i.e., output image channels
+ const uint16_t dim_kernel_x, // filter kernel size x
+ const uint16_t dim_kernel_y, // filter kernel size y
+ const uint16_t padding_x, // padding sizes x
+ const uint16_t padding_y, // padding sizes y
+ const uint16_t stride_x, // stride x
+ const uint16_t stride_y, // stride y
+ const q7_t * bias, // bias
+ const uint16_t bias_shift, const uint16_t out_shift, q7_t * Im_out, // output image
+ const uint16_t dim_im_out_x, // output image dimension x
+ const uint16_t dim_im_out_y, // output image dimension y
+ q15_t * bufferA, //buffer space for input
+ q7_t * bufferB //buffer space for output
+ )
+{
+ int i, j, k, l, m, n;
+ int conv_out;
+ int in_row, in_col;
+
+ for (i = 0; i < ch_im_out; i++)
+ {
+ for (j = 0; j < dim_im_out_y; j++)
+ {
+ for (k = 0; k < dim_im_out_x; k++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ conv_out = ((q31_t) (bias[i]) << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ conv_out = bias[i] << bias_shift;
+#endif
+ for (m = 0; m < dim_kernel_y; m++)
+ {
+ for (n = 0; n < dim_kernel_x; n++)
+ {
+ // if-for implementation
+ in_row = stride_y * j + m - padding_y;
+ in_col = stride_x * k + n - padding_x;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
+ {
+ for (l = 0; l < ch_im_in; l++)
+ {
+ conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] *
+ wt[i * ch_im_in * dim_kernel_y * dim_kernel_x + (m * dim_kernel_x + n) * ch_im_in +
+ l];
+ }
+ }
+ }
+ }
+ Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
+ }
+ }
+ }
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_depthwise_separable_conv_HWC_q7_ref.c b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_depthwise_separable_conv_HWC_q7_ref.c
new file mode 100644
index 0000000..0517ecc
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_depthwise_separable_conv_HWC_q7_ref.c
@@ -0,0 +1,70 @@
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ref_functions.h"
+
+void arm_depthwise_separable_conv_HWC_q7_ref(const q7_t * Im_in, // input image
+ const uint16_t dim_im_in, // input image dimention
+ const uint16_t ch_im_in, // number of input image channels
+ const q7_t * wt, // kernel weights
+ const uint16_t ch_im_out, // number of filters, i.e., output image channels
+ const uint16_t dim_kernel, // filter kernel size
+ const uint16_t padding, // padding sizes
+ const uint16_t stride, // stride
+ const q7_t * bias, // bias
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ q7_t * Im_out, // output image
+ const uint16_t dim_im_out, // output image dimension
+ q15_t * bufferA, //buffer space for input
+ q7_t * bufferB //buffer space for output
+ )
+{
+ int i_out_y, i_out_x, i_ch_out;
+ int i_ker_y, i_ker_x;
+ for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
+ {
+ for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++)
+ {
+ // for each output
+#if defined (ARM_NNUSE_ROUND)
+ int conv_out = (bias[i_ch_out] << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ int conv_out = bias[i_ch_out] << bias_shift;
+#endif
+ for (i_ker_y = 0; i_ker_y < dim_kernel; i_ker_y++)
+ {
+ for (i_ker_x = 0; i_ker_x < dim_kernel; i_ker_x++)
+ {
+ int in_row = stride * i_out_y + i_ker_y - padding;
+ int in_col = stride * i_out_x + i_ker_x - padding;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
+ {
+ conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + i_ch_out] *
+ wt[(i_ker_y * dim_kernel + i_ker_x) * ch_im_out + i_ch_out];
+ }
+ }
+ }
+ Im_out[(i_out_y * dim_im_out + i_out_x) * ch_im_out + i_ch_out] =
+ (q7_t) __SSAT((conv_out >> out_shift), 8);
+ }
+ }
+ }
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c
new file mode 100644
index 0000000..ed538fd
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ref_functions.h"
+
+void arm_depthwise_separable_conv_HWC_q7_ref_nonsquare(const q7_t * Im_in, // input image
+ const uint16_t dim_im_in_x, // input image dimention x
+ const uint16_t dim_im_in_y, // input image dimention y
+ const uint16_t ch_im_in, // number of input image channels
+ const q7_t * wt, // kernel weights
+ const uint16_t ch_im_out, // number of filters, i.e., output image channels
+ const uint16_t dim_kernel_x, // filter kernel size x
+ const uint16_t dim_kernel_y, // filter kernel size y
+ const uint16_t padding_x, // padding sizes x
+ const uint16_t padding_y, // padding sizes y
+ const uint16_t stride_x, // stride x
+ const uint16_t stride_y, // stride y
+ const q7_t * bias, // bias
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ q7_t * Im_out, // output image
+ const uint16_t dim_im_out_x, // output image dimension x
+ const uint16_t dim_im_out_y, // output image dimension y
+ q15_t * bufferA, //buffer space for input
+ q7_t * bufferB //buffer space for output
+ )
+{
+ int i_out_y, i_out_x, i_ch_out;
+ int i_ker_y, i_ker_x;
+ for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
+ {
+ for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++)
+ {
+ // for each output
+#if defined (ARM_NNUSE_ROUND)
+ int conv_out = (bias[i_ch_out] << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ int conv_out = bias[i_ch_out] << bias_shift;
+#endif
+ for (i_ker_y = 0; i_ker_y < dim_kernel_y; i_ker_y++)
+ {
+ for (i_ker_x = 0; i_ker_x < dim_kernel_x; i_ker_x++)
+ {
+ int in_row = stride_y * i_out_y + i_ker_y - padding_y;
+ int in_col = stride_x * i_out_x + i_ker_x - padding_x;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
+ {
+ conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + i_ch_out] *
+ wt[(i_ker_y * dim_kernel_x + i_ker_x) * ch_im_out + i_ch_out];
+ }
+ }
+ }
+ Im_out[(i_out_y * dim_im_out_x + i_out_x) * ch_im_out + i_ch_out] =
+ (q7_t) __SSAT((conv_out >> out_shift), 8);
+ }
+ }
+ }
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_mat_q7_vec_q15_opt_ref.c b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_mat_q7_vec_q15_opt_ref.c
new file mode 100644
index 0000000..cf1d9c8
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_mat_q7_vec_q15_opt_ref.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ref_functions.h"
+
+void arm_fully_connected_mat_q7_vec_q15_opt_ref(const q15_t * pV, // pointer to vector
+ const q7_t * pM, // pointer to matrix
+ const uint16_t dim_vec, // length of the vector
+ const uint16_t num_of_rows, // numCol of A
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ const q7_t * bias, q15_t * pOut, // output operand
+ q15_t * vec_buffer)
+{
+
+ uint16_t rowCnt = num_of_rows >> 2;
+ const q7_t *pB = pM;
+ const q15_t *pA;
+ q15_t *pO = pOut;
+ const q7_t *pBias = bias;
+
+ while (rowCnt)
+ {
+ pA = pV;
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+ q31_t sum2 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+ q31_t sum3 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+ q31_t sum4 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+ q31_t sum3 = *pBias++ << bias_shift;
+ q31_t sum4 = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = dim_vec >> 1;
+
+ while (colCnt)
+ {
+ q15_t inA1 = *pA++;
+ q15_t inA2 = *pA++;
+
+ q7_t inB1 = *pB++;
+ q7_t inB3 = *pB++;
+ q7_t inB2 = *pB++;
+ q7_t inB4 = *pB++;
+
+ sum += inA1 * inB1 + inA2 * inB2;
+ sum2 += inA1 * inB3 + inA2 * inB4;
+
+ inB1 = *pB++;
+ inB3 = *pB++;
+ inB2 = *pB++;
+ inB4 = *pB++;
+
+ sum3 += inA1 * inB1 + inA2 * inB2;
+ sum4 += inA1 * inB3 + inA2 * inB4;
+
+ colCnt--;
+ }
+ colCnt = dim_vec & 0x1;
+ while (colCnt)
+ {
+ q15_t inA = *pA++;
+ q7_t inB = *pB++;
+ sum += inA * inB;
+ inB = *pB++;
+ sum2 += inA * inB;
+ inB = *pB++;
+ sum3 += inA * inB;
+ inB = *pB++;
+ sum4 += inA * inB;
+
+ colCnt--;
+ }
+ *pO++ = (q15_t) __SSAT((sum >> out_shift), 16);
+ *pO++ = (q15_t) __SSAT((sum2 >> out_shift), 16);
+ *pO++ = (q15_t) __SSAT((sum3 >> out_shift), 16);
+ *pO++ = (q15_t) __SSAT((sum4 >> out_shift), 16);
+
+ rowCnt--;
+ }
+
+ rowCnt = num_of_rows & 0x3;
+
+ while (rowCnt)
+ {
+ pA = pV;
+#if defined (ARM_NNUSE_ROUND)
+ int ip_out = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ int ip_out = *pBias++ << bias_shift;
+#endif
+ for (int j = 0; j < dim_vec; j++)
+ {
+ q15_t inA = *pA++;
+ q7_t inB = *pB++;
+ ip_out += inA * inB;
+ }
+ *pO++ = (q15_t) __SSAT((ip_out >> out_shift), 16);
+
+ rowCnt--;
+ }
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_mat_q7_vec_q15_ref.c b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_mat_q7_vec_q15_ref.c
new file mode 100644
index 0000000..bd47362
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_mat_q7_vec_q15_ref.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ref_functions.h"
+
+void arm_fully_connected_mat_q7_vec_q15_ref(const q15_t * pV, // pointer to vector
+ const q7_t * pM, // pointer to matrix
+ const uint16_t dim_vec, // length of the vector
+ const uint16_t num_of_rows, // numCol of A
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ const q7_t * bias, q15_t * pOut, // output operand
+ q15_t * vec_buffer)
+{
+ for (int i = 0; i < num_of_rows; i++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ int ip_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ int ip_out = bias[i] << bias_shift;
+#endif
+ for (int j = 0; j < dim_vec; j++)
+ {
+ ip_out += pV[j] * pM[i * dim_vec + j];
+ }
+ pOut[i] = (q15_t) __SSAT((ip_out >> out_shift), 16);
+ }
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q15_opt_ref.c b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q15_opt_ref.c
new file mode 100644
index 0000000..5ea0259
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q15_opt_ref.c
@@ -0,0 +1,119 @@
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ref_functions.h"
+
+void arm_fully_connected_q15_opt_ref(const q15_t * pV, // pointer to vector
+ const q15_t * pM, // pointer to matrix
+ const uint16_t dim_vec, // length of the vector
+ const uint16_t num_of_rows, // numCol of A
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ const q15_t * bias, q15_t * pOut, // output operand
+ q15_t * vec_buffer)
+{
+
+ uint16_t rowCnt = num_of_rows >> 2;
+ const q15_t *pB = pM;
+ const q15_t *pA;
+ q15_t *pO = pOut;
+ const q15_t *pBias = bias;
+
+ while (rowCnt)
+ {
+ pA = pV;
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+ q31_t sum2 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+ q31_t sum3 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+ q31_t sum4 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+ q31_t sum3 = *pBias++ << bias_shift;
+ q31_t sum4 = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = dim_vec >> 1;
+
+ while (colCnt)
+ {
+ q15_t inA1 = *pA++;
+ q15_t inA2 = *pA++;
+
+ q15_t inB1 = *pB++;
+ q15_t inB2 = *pB++;
+ sum += inA1 * inB1 + inA2 * inB2;
+
+ inB1 = *pB++;
+ inB2 = *pB++;
+ sum2 += inA1 * inB1 + inA2 * inB2;
+
+ inB1 = *pB++;
+ inB2 = *pB++;
+ sum3 += inA1 * inB1 + inA2 * inB2;
+
+ inB1 = *pB++;
+ inB2 = *pB++;
+ sum4 += inA1 * inB1 + inA2 * inB2;
+
+ colCnt--;
+ }
+ colCnt = dim_vec & 0x1;
+ while (colCnt)
+ {
+ q15_t inA = *pA++;
+ q15_t inB = *pB++;
+ sum += inA * inB;
+ inB = *pB++;
+ sum2 += inA * inB;
+ inB = *pB++;
+ sum3 += inA * inB;
+ inB = *pB++;
+ sum4 += inA * inB;
+ colCnt--;
+ }
+ *pO++ = (q15_t) __SSAT((sum >> out_shift), 16);
+ *pO++ = (q15_t) __SSAT((sum2 >> out_shift), 16);
+ *pO++ = (q15_t) __SSAT((sum3 >> out_shift), 16);
+ *pO++ = (q15_t) __SSAT((sum4 >> out_shift), 16);
+
+ rowCnt--;
+ }
+
+ rowCnt = num_of_rows & 0x3;
+
+ while (rowCnt)
+ {
+ pA = pV;
+#if defined (ARM_NNUSE_ROUND)
+ int ip_out = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ int ip_out = *pBias++ << bias_shift;
+#endif
+ for (int j = 0; j < dim_vec; j++)
+ {
+ q15_t inA = *pA++;
+ q15_t inB = *pB++;
+ ip_out += inA * inB;
+ }
+ *pO++ = (q15_t) __SSAT((ip_out >> out_shift), 16);
+
+ rowCnt--;
+ }
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q15_ref.c b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q15_ref.c
new file mode 100644
index 0000000..38a2d17
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q15_ref.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ref_functions.h"
+
+void arm_fully_connected_q15_ref(const q15_t * pV, // pointer to vector
+ const q15_t * pM, // pointer to matrix
+ const uint16_t dim_vec, // length of the vector
+ const uint16_t num_of_rows, // numCol of A
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ const q15_t * bias, q15_t * pOut, // output operand
+ q15_t * vec_buffer)
+{
+ for (int i = 0; i < num_of_rows; i++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ int ip_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ int ip_out = bias[i] << bias_shift;
+#endif
+ for (int j = 0; j < dim_vec; j++)
+ {
+ ip_out += pV[j] * pM[i * dim_vec + j];
+ }
+ pOut[i] = (q15_t) __SSAT((ip_out >> out_shift), 16);
+ }
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q7_opt_ref.c b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q7_opt_ref.c
new file mode 100644
index 0000000..734874b
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q7_opt_ref.c
@@ -0,0 +1,138 @@
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ref_functions.h"
+
+void arm_fully_connected_q7_opt_ref(const q7_t * pV, // pointer to vector
+ const q7_t * pM, // pointer to matrix
+ const uint16_t dim_vec, // length of the vector
+ const uint16_t num_of_rows, // numCol of A
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ const q7_t * bias, q7_t * pOut, // output operand
+ q15_t * vec_buffer)
+{
+
+ uint16_t rowCnt = num_of_rows >> 2;
+ const q7_t *pB = pM;
+ const q7_t *pA;
+ q7_t *pO = pOut;
+ const q7_t *pBias = bias;
+
+ while (rowCnt)
+ {
+ pA = pV;
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+ q31_t sum2 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+ q31_t sum3 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+ q31_t sum4 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+ q31_t sum3 = *pBias++ << bias_shift;
+ q31_t sum4 = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = dim_vec >> 2;
+
+ while (colCnt)
+ {
+ q7_t inA1 = *pA++;
+ q7_t inA3 = *pA++;
+ q7_t inA2 = *pA++;
+ q7_t inA4 = *pA++;
+
+ q7_t inB1 = *pB++;
+ q7_t inB3 = *pB++;
+ q7_t inB2 = *pB++;
+ q7_t inB4 = *pB++;
+
+ sum += inA1 * inB1 + inA2 * inB2;
+ sum2 += inA1 * inB3 + inA2 * inB4;
+
+ inB1 = *pB++;
+ inB3 = *pB++;
+ inB2 = *pB++;
+ inB4 = *pB++;
+
+ sum3 += inA1 * inB1 + inA2 * inB2;
+ sum4 += inA1 * inB3 + inA2 * inB4;
+
+ inB1 = *pB++;
+ inB3 = *pB++;
+ inB2 = *pB++;
+ inB4 = *pB++;
+
+ sum += inA3 * inB1 + inA4 * inB2;
+ sum2 += inA3 * inB3 + inA4 * inB4;
+
+ inB1 = *pB++;
+ inB3 = *pB++;
+ inB2 = *pB++;
+ inB4 = *pB++;
+
+ sum3 += inA3 * inB1 + inA4 * inB2;
+ sum4 += inA3 * inB3 + inA4 * inB4;
+
+ colCnt--;
+ }
+ colCnt = dim_vec & 0x3;
+ while (colCnt)
+ {
+ q7_t inA = *pA++;
+ q7_t inB = *pB++;
+ sum += inA * inB;
+ inB = *pB++;
+ sum2 += inA * inB;
+ inB = *pB++;
+ sum3 += inA * inB;
+ inB = *pB++;
+ sum4 += inA * inB;
+
+ colCnt--;
+ }
+ *pO++ = (q7_t) __SSAT((sum >> out_shift), 8);
+ *pO++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
+ *pO++ = (q7_t) __SSAT((sum3 >> out_shift), 8);
+ *pO++ = (q7_t) __SSAT((sum4 >> out_shift), 8);
+
+ rowCnt--;
+ }
+
+ rowCnt = num_of_rows & 0x3;
+
+ while (rowCnt)
+ {
+ pA = pV;
+#if defined (ARM_NNUSE_ROUND)
+ int ip_out = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ int ip_out = *pBias++ << bias_shift;
+#endif
+ for (int j = 0; j < dim_vec; j++)
+ {
+ q7_t inA = *pA++;
+ q7_t inB = *pB++;
+ ip_out += inA * inB;
+ }
+ *pO++ = (q7_t) __SSAT((ip_out >> out_shift), 8);
+
+ rowCnt--;
+ }
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q7_ref.c b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q7_ref.c
new file mode 100644
index 0000000..c1b5056
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q7_ref.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ref_functions.h"
+
+void arm_fully_connected_q7_ref(const q7_t * pV, // pointer to vector
+ const q7_t * pM, // pointer to matrix
+ const uint16_t dim_vec, // length of the vector
+ const uint16_t num_of_rows, // numCol of A
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ const q7_t * bias, q7_t * pOut, // output operand
+ q15_t * vec_buffer)
+{
+ for (int i = 0; i < num_of_rows; i++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ int ip_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
+#else
+ int ip_out = bias[i] << bias_shift;
+#endif
+ for (int j = 0; j < dim_vec; j++)
+ {
+ ip_out += pV[j] * pM[i * dim_vec + j];
+ }
+ pOut[i] = (q7_t) __SSAT((ip_out >> out_shift), 8);
+ }
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_pool_ref.c b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_pool_ref.c
new file mode 100644
index 0000000..f4b90c7
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_pool_ref.c
@@ -0,0 +1,96 @@
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ref_functions.h"
+
+void arm_avepool_q7_HWC_ref(const q7_t * Im_in, // input image
+ const uint16_t dim_im_in, // input image dimension
+ const uint16_t ch_im_in, // number of input image channels
+ const uint16_t dim_kernel, // window kernel size
+ const uint16_t padding, // padding sizes
+ const uint16_t stride, // stride
+ const uint16_t dim_im_out, // output image dimension
+ q7_t * bufferA, // a buffer for local storage
+ q7_t * Im_out)
+{
+ int16_t i_ch_in, i_x, i_y;
+ int16_t k_x, k_y;
+
+ for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
+ {
+ for (i_y = 0; i_y < dim_im_out; i_y++)
+ {
+ for (i_x = 0; i_x < dim_im_out; i_x++)
+ {
+ int sum = 0;
+ int count = 0;
+ for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
+ {
+ for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
+ {
+ if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
+ {
+ sum += Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
+ count++;
+ }
+ }
+ }
+ Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = sum / count;
+ }
+ }
+ }
+}
+
+void arm_maxpool_q7_HWC_ref(const q7_t * Im_in, // input image
+ const uint16_t dim_im_in, // input image dimension
+ const uint16_t ch_im_in, // number of input image channels
+ const uint16_t dim_kernel, // window kernel size
+ const uint16_t padding, // padding sizes
+ const uint16_t stride, // stride
+ const uint16_t dim_im_out, // output image dimension
+ q7_t * bufferA, // a buffer for local storage
+ q7_t * Im_out)
+{
+ int16_t i_ch_in, i_x, i_y;
+ int16_t k_x, k_y;
+
+ for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
+ {
+ for (i_y = 0; i_y < dim_im_out; i_y++)
+ {
+ for (i_x = 0; i_x < dim_im_out; i_x++)
+ {
+ int max = -129;
+ for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
+ {
+ for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
+ {
+ if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
+ {
+ if (Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)] > max)
+ {
+ max = Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
+ }
+ }
+ }
+ }
+ Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = max;
+ }
+ }
+ }
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_relu_ref.c b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_relu_ref.c
new file mode 100644
index 0000000..221c116
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_relu_ref.c
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+void arm_relu_q7_ref(q7_t * data, uint16_t size)
+{
+ uint16_t i;
+
+ for (i = 0; i < size; i++)
+ {
+ if (data[i] < 0)
+ data[i] = 0;
+ }
+}
+
+void arm_relu_q15_ref(q15_t * data, uint16_t size)
+{
+ uint16_t i;
+
+ for (i = 0; i < size; i++)
+ {
+ if (data[i] < 0)
+ data[i] = 0;
+ }
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/fully_connected_testing_weights.h b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/fully_connected_testing_weights.h
new file mode 100644
index 0000000..74b79f8
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/fully_connected_testing_weights.h
@@ -0,0 +1,7 @@
+#define IP2_WEIGHT {18,-12,-120,-75,60,-92,62,106,43,43,-108,-80,78,76,94,13,-125,63,54,-121,-61,26,60,-125,-79,112,-45,-97,-59,-100,28,35,-15,26,-41,-65,-99,106,115,109,-20,-75,83,-106,51,-55,25,-126,15,-46,-73,62,-89,-15,-37,-79,-12,43,-30,120,46,116,113,11,-57,-81,113,-53,4,117,18,-31,101,65,125,60,76,91,-53,-63,-74,73,-47,-51,-87,-27,-126,-12,107,103,79,113,-41,93,124,122,-72,67,93,-103,-97,-61,62,-17,10,30,124,-119,-17,31,-60,4,88,-76,18,25,-109,-47,19,33,102,71,66,-42,-111,8,-4,-44,78,40,-19,107,-118,11,-105,-116,48,0,-73,-101,-55,-20,-81,71,-121,60,107,110,103,-28,88,-85,34,-90,12,-105,-21,-10,-115,118,-84,97,86,-67,-80,-43,-107,115,108,-49,-59,22,19,122,-76,82,-16,93,67,-100,-57,-41,-43,99,-1,-69,-79,54,-46,24,-59,-1,77,-94,111,-20,-35,108,54,3,107,-59,17,-112,106,-108,95,37,63,60,9,-65,-63,7,-118,-69,-48,111,120,40,44,63,-67,108,26,-37,127,96,-54,-1,21,88,-24,-112,-115,-27,-9,59,-89,22,109,45,47,-42,68,-72,94,55,-121,-23,-2,83,105,-18,104,-34,29,-80,58,-104,-6,-20,53,-86,-5,115,94,39,100,70,-70,-69,-121,-106,-43,94,83,120,121,-93,-97,90,0,-26,-87,6,-26,1,94,67,-26,-71,-21,64,53,35,-46,-102,-58,-103,-7,-34,15,-19,117,-27,59,20,111,-31,-31,43,-36,-19,49,94,-17,119,32,118,110,-19,121,24,30,-74,-12,-38,52,21,-38,98,-58,63,-115,-84,29,22,-93,63,-127,-113,56,25,-2,43,88,107,29,14,116,88,-24,115,-22,-14,-65,116,-119,-95,88,57,-64,18,-127,8,-123,-51,-80,75,-8,-98,2,-109,19,76,40,3,117,121,-4,61,92,-56,21,94,47,-32,24,-50,-38,-26,111,-61,118,-111,94,-14,-74,51,-38,-116,111,62,-39,-121,97,109,-45,-122,-37,-62,108,-74,73,34,59,-21,-20,37,-2,-102,45,121,-41,-116,80,-2,110,-52,-39,62,-12,-127,52,99,13,124,-15,-89,89,85,67,-119,110,-38,-13,-14,-53,-97,119,-121,16,14,-53,-65,-118,26,-4,19,111,-44,22,-57,81,110,-26,-70,45,55,-55,108,-122,-78,-34,24,-69,90,-48,-76,-80,-123,-49,10,113,89,58,119,68,-26,109,-35,-90,88,-90,-66,-24,78,-122,-84,82,76,93,106,123,-52,2,-19,-125,38,36,105,31,3,-99,-27,74,54,-29,8,40,30,-111,21,-118,87,95,58,-29,-117,84,-83,114,-75,96,64,94,-23,-44,46,-77,-82,62,104,74,26,-91,7,63,81,14,-27,33,41,31,-9,64,-19,60,-79,21,-120,49,26,63,-8,105,-116,-58,65,87,-38,-27,109,-97,-50,63,83,-70,111,32,-70,104,22,-123,74,-61,98,60,58,-13,-80,-37,-62,76,-82,-26,76,109,25,81,78,-104,96,-29,-9,-6,-46,-120,54,-33,-30,-108,41,22,110,-54,78,52,14,-40,-70,59,-101,-38,61,-122,77,46,116,-3,-21,-124,-23,41,80,83,29,-71,-43,9,101,77,35,-119,2,93,-30,22,-62,97,-12,29,40,41,36,106,-87,21,93,-41,-112,60,-100,81,91,-89,-10,79,-69,-7,-113,111,-47,51,-23,14,16,-56,98,26,-50,121,127,-104,39,-38,44,-22,-73,-69,125,61,15,-78,-119,-47,-15,-44,-90,-72,29,61,92,109,-10,25,-16,-49,-31,-109,121,5,-2,-125,10,53,80,-13,46,38,1,73,116,66,75,-18,-50,99,-44,-126,-60,-126,-26,-57,-121,-35,105,57,77,112,44,56,83,66,-94,106,60,-119,-124,-25,57,104,106,122,-52,-51,-38,68,47,64,-50,25,-64,-72,-127,73,124,-51,-96,116,53,75,-18,97,97,-96,-12,-16,46,29,105,-118,11,53,-31,-127,-98,-126,2,-115,-116,12,-47,-70,-106,-41,73,-115,-55,-96,126,-124,-41,-48,-43,-6,18,-107,-106,-59,86,-5,85,89,-17,91,-71,103,-116,-122,-80,99,-26,-87,-14,-4,-110,52,-44,-124,-47,15,104,-52,-16,18,62,92,-92,-81,101,94,38,45,-77,-103,-124,74,67,70,-113,25,25,-53,-125,124,33,-84,-119,118,105,-70,-101,-108,-48,111,118,-91,-49,38,102,105,24,56,-95,-119,-45,-96,88,33,126,-101,74,-30,17,-35,24,-23,123,47,-41,-82,91,-3,60,15,-4,46,38,49,-8,-35,82,28,110,8,-58,-108,-124,60,125,-5,49,31,69,-73,94,-25,75,107,75,-1,53,-32,66,20,121,-75,-39,-13,-84,120,15,8,-33,-46,-30,-121,-119,-17,73,-102,-36,103,-20,11,-62,-80,-111,69,-84,-37,38,82,-87,8,69,-110,80,66,-41,122,102,125,-90,72,109,-120,-25,-56,-43,-44,-93,48,63,-59,-30,106,85,-83,-68,44,112,-75,-61,-127,-4,21,-124,-79,-111,-65,68,0,-111,62,-14,41,27,53,68,69,102,-55,122,99,-5,-74,74,2,96,71,107,49,88,19,55,10,84,-124,2,10,-47,-66,-1,-61,-70,3,-101,37,113,120,33,3,18,3,52,-86,38,91,-88,-48,-115,104,-20,49,-25,26,-108,-82,86,80,-125,-86,-73,-109,-72,-49,108,56,-8,-103,-10,-115,-99,97,-120,15,-94,-52,90,-1,-39,-1,-2,89,-103,-69,-82,-63,-32,59,101,-23,-83,-67,-112,-23,-12,-47,-105,-85,-117,-9,-80,-34,-38,108,-77,89,112,-63,28,-69,70,-99,47,59,82,16,-89,47,-78,-21,-101,23,115,-98,-89,23,83,-113,-26,6,-15,101,-72,95,15,-116,46,107,117,67,-98,45,21,-30,10,108,120,99,-30,-91,-96,100,53,-62,-126,54,103,96,-20,-57,14,-128,123,-104,-7,-62,-49,-94,105,108,-104,52,5,-91,114,62,102,-103,10,84,1,30,-102,-17,-112,91,-115,14,1,54,-110,4,99,-10,-35,78,84,78,-66,120,-110,-29,-92,105,-96,118,64,81,48,-127,-32,-9,51,69,-31,40,-84,111,4,-123,-43,54,55,100,-61,19,33,-65,-50,-27,42,120,-66,-126,-17,36,107,2,53,80,95,-94,17,64,50,-25,29,9,-67,-101,-24,82,97,-53,-58,-119,-40,-10,8,-99,60,-29,79,-79,-43,-127,-73,26,-60,-26,114,-82,-19,-111,49,3,-54,100,67,45,72,-84,-50,-17,123,54,-94,-86,80,-9,-87,-51,-57,-32,-92,123,40,-93,-44,-61,-24,-128,-85,-52,-56,-52,51,32,-23,-108,-32,8,-69,9,-2,84,-36,24,126,-80,-73,3,42,20,30,-46,-29,25,89,-30,48,115,37,57,-47,-95,-100,-77,-38,-8,26,-37,-23,-31,124,65,67,-87,35,19,-80,107,-71,120,106,21,-28,69,24,-110,103,-43,-68,94,95,-105,28,-16,-49,-6,88,121,-36,-83,28,-101,102,-28,40,-7,-108,28,97,11,-98,117,80,2,-92,-62,-43,-67,113,74,59,18,-72,-124,-126,-52,102,-128,-14,125,-116,-40,21,82,13,-2,59,-111,-110,-125,-44,-94,109,111,49,-71,40,-52,1,2,-73,-62,-40,-30,-93,-43,25,-103,-94,-110,126,-112,78,32,24,-95,-121,101,25,95,66,-63,5,72,-61,-83,-66,-88,-57,118,113,-110,92,-44,-3,15,24,-14,-114,14,33,-76,-75,80,76,-110,122,-56,101,12,66,-89,21,-76,42,86,-49,77,65,97,127,-20,43,0,-117,115,9,-83,-27,119,15,-122,4,21,-47,72,-113,-68,-98,-124,-89,125,-90,-83,35,-74,79,101,-65,127,60,-118,104,73,44,-41,-111,79,54,-70,-52,-97,10,18,-17,91,-46,-72,3,-35,-23,44,84,-11,-17,-11,-45,-38,67,75,-100,3,54,-16,-22,66,-98,-79,41,-110,-49,-76,-6,-33,-109,30,6,-18,84,63,50,-119,64,-127,-79,101,-91,59,-87,-51,0,-18,-23,-102,-99,120,-28,123,-86,59,-81,-22,-13,43,107,-13,-92,78,95,-10,26,-108,36,-57,-44,-118,-93,-62,-77,-33,-6,-50,-122,-103,-20,57,24,3,-25,-95,-91,-47,74,14,20,16,23,52,78,-15,-17,69,13,-98,126,84,115,74,-125,23,62,110,34,124,-38,111,6,106,-24,82,53,-102,-53,-36,7,60,1,19,80,-26,-111,58,83,-76,-19,112,121,41,-45,69,112,-95,98,-126,68,-37,-109,-55,-70,77,-97,35,-61,12,-58,54,-36,93,-48,4,10,104,102,37,70,4,10,-18,33,26,0,60,69,-49,26,66,-114,-22,-72,-96,124,16,-6,-92,-52,83,103,96,77,-99,4,80,10,-119,-108,-117,122,39,-13,-72,-7,77,-91,58,111,3,29,52,93,116,-123,-16,44,-60,107,60,-57,83,15,42,33,-93,-16,60,-97,53,86,5,-76,120,-42,-88,-35,18,12,110,-4,-62,84,2,-46,-14,-99,27,96,96,-69,15,102,79,-84,-24,-7,-64,-49,107,-51,17,108,-3,-41,-104,122,-123,-2,-58,-69,-36,-69,-33,81,-78,12,0,11,-63,125,97,58,-43,-63,-49,48,73,-78,-87,-88,-94,94,97,56,-31,-27,-113,125,-128,-25,-65,5,67,71,-26,7,40,-115,-55,-119,74,-34,-111,-42,-77,-15,-80,41,71,-121,-62,54,-95,-76,122,-115,101,-80,36,82,-55,-25,11,11,105,39,-98,-80,-77,-45,-58,93,-118,64,126,124,-46,1,26,113,37,107,108,-117,-127,123,-17,-120,-64,-35,-99,10,81,2,55,-110,-122,-120,-3,-24,-11,109,126,72,60,-18,92,-79,32,84,2,103,-7,-22,-7,-2,-108,-40,-55,45,47,14,-77,-60,50,43,-98,67,-52,51,101,107,105,45,-24,52,93,46,-61,-45,-36,-63,-33,-33,50,-81,-30,38,-124,73,-106,-90,54,-116,-86,-77,76,-63,-5,121,-22,-79,-73,-87,29,69,68,5,87,-85,-36,43,124,0,-62,104,72,-98,-63,-90,76,88,52,12,107,63,119,-54,102,-30,80,-63,-50,51,-5,79,110,-101,-11,32,80,-90,-22,-28,78,42,-76,89,-22,74,111,9,-78,28,-76,-17,20,-113,44,99,-82,31,-94,40,42,-75,-10,57,27,41,-29,42,-104,127,-70,-119,115,-77,54,114,-5,89,-63,9,-51,-68,-117,99,13,-23,103,-30,-117,76,78,112,-118,-16,-87,41,-23,72,67,-4,-69,30,-16,-18,-97,-111,-93,-68,-104,-112,55,-92,123,52,-14,-78,3,69,61,-35,-108,68,88,87,-114,-81,-126,26,-94,-111,80,10,47,43,98,28,-115,-122,103,-88,20,-58,79,33,103,-48,118,102,6,86,35,52,126,123,-62,62,-37,-126,-52,65,84,28,127,49,120,-67,-80,-8,96,-60,-25,100,-47,-14,103,-79,-29,-11,75,-77,-29,-56,1,-88,75,39,-36,-12,-71,-77,34,-98,-35,-103,-89,-41,-106,-86,-56,-36,-119,113,-17,-1,118,48,-59,101,-9,-51,-117,4,-71,31,23,6,80,3,40,-52,18,103,-127,50,75,-102,-56,0,47,-16,29,-15,-38,-32,-10,97,60,-4,-77,-105,-38,115,32,-14,5,-57,34,-22,-125,107,-32,99,115,64,-114,-90,118,-101,-25,125,33,-98,105,-88,85,-121,-66,-62,-46,-108,49,-19,-15,86,-83,49,50,42,-25,-128,-3,-89,-107,99,-116,-101,-45,-44,5,-53,57,-96,107,-77,-119,127,-76,99,-94,45,59,-6,-1,6,108,-71,-46,-35,-3,-26,4,104,-106,23,-51,52,104,-67,-74,-38,-125,-107,-9,-24,-93,75,-123,80,-68,28,-98,-119,-69,15,91,105,-17,46,-110,4,76,39,106,18,23,-55,69,-77,7,105,-16,-19,53,38,-95,100,46,73,23,44,86,19,64,87,-28,76,-1,81,-59,-123,-39,70,127,-120,81,89,110,-27,-54,-92,36,70,-45,-3,-12,-72,88,-109,96,123,-80,26,101,87,-113,-100,-45,0,29,122,111,-86,-67,-104,-87,-6,-109,-49,94,110,-85,113,93,-49,-110,-48,67,-85,34,-60,50,89,-34,-1,-46,12,3,-74,-25,0,-23,-48,-100,-98,54,-126,101,95,68,127,-118,-22,9,-106,84,95,-124,-31,-90,-39,18,23,10,7,45,35,52,6,-102,37,40,-31,-9,-33,69,-95,119,-36,6,-124,-3,-100,75,-91,126,106,77,126,112,-72,-60,53,-127,90,-112,45,115,69,32,61,69,-82,56,80,-40,-115,50,-124,34,-13,109,35,-21,-19,-82,90,65,-93,10,-121,106,39,114,-81,10,-43,-58,91,-26,-88,125,-36,93,-19,70,40,121,-26,-124,-28,-28,-70,18,-94,-120,109,10,100,-19,96,-78,-26,62,127,60,91,-6,-52,-64,-52,34,-47,47,-85,-49,-2,-44,91,56,-100,90,-62,124,-113,-67,-127,-15,-67,-39,10,53,87,38,41,3,-58,83,14,36,109,13,57,32,-37,-97,-18,-4,3,5,-33,-31,-7,46,73,-1,-120,-117,33,-82,91,76,84,-35,-128,100,41,117,-102,126,71,-50,18,41,16,-109,117,-86,102,-36,56,-66,-77,-92,-67,-70,-66,75,49,98,53,-36,50,103,62,61,-15,61,11,-19,-51,126,79,14,76,32,-120,35,-21,106,93,66,-74,4,13,19,-18,68,-90,-91,55,93,27,68,70,-64,-97,13,-32,-112,65,-116,91,3,37,13,-77,21,-17,83,53,-56,69,-86,55,-107,-116,106,-49,2,-5,-59,63,124,16,30,-81,-27,-61,-60,65,92,103,72,39,-88,113,112,-31,-52,55,-46,53,-58,-50,50,51,57,-71,-112,-99,42,76,-33,58,2,115,-111,15,27,-49,114,74,-63,5,123,-108,-73,-56,8,-26,-122,-35,88,40,18,51,52,20,65,-35,-24,-41,-7,67,65,-47,20,8,-118,51,107,36,17,96,-108,-69,-40,-72,-61,-67,-17,-109,61,-26,59,-83,-31,10,-25,-62,-47,-113,65,46,25,13,86,-61,-14,113,-52,64,-100,0,110,34,-64,-35,-88,121,-84,81,46,33,-19,22,-23,106,49,40,4,-76,-89,53,110,86,-50,-71,-67,28,14,49,-123,-66,-18,66,-100,-83,111,101,54,18,-70,63,9,-48,-70,-115,-22,21,-71,-14,-74,65,-71,-2,-77,53,-62,-35,-127,-100,33,24,-5,-87,65,82,52,0,87,-37,20,104,-62,-52,31,11,29,-45,-58,-54,107,126,-119,-113,-47,-9,-72,-77,43,102,-116,-4,-79,-120,-90,79,-117,39,1,53,-91,127,123,41,-70,-104,38,31,-53,-85,-18,-127,45,18,13,-59,-5,-75,-110,1,24,-60,28,-110,58,-9,0,43,-104,92,-125,106,-91,-16,-75,-1,113,-115,-83,-95,66,-25,63,-120,-96,-26,101,51,83,27,47,-75,60,83,63,-58,-26,42,-88,-22,111,116,-72,-5,-65,-44,-78,-70,12,-109,95,-71,-27,125,9,-6,-72,104,-39,70,98,-38,48,117,67,-66,-117,-125,-89,49,-72,-71,127,-67,8,8,36,-76,-71,-105,-127,70,-100,-78,115,-84,32,38,78,26,85,43,62,-79,56,-78,113,-2,-12,-37,4,49,-17,123,-87,51,36,-90,-62,-27,11,47,73,-1,-37,18,75,18,19,-109,30,44,-96,91,-21,-115,-88,85,108,-17,-18,52,111,32,-88,108,66,-9,113,13,-117,-44,-49,15,-37,27,28,-57,-15,125,106,43,60,98,-21,-119,36,42,52,6,65,52,23,-39,60,-46,-61,100,50,116,111,8,-128,87,29,-27,-42,93,122,125,50,-82,45,95,-86,6,-10,21,-23,87,21,61,-14,-102,27,-64,43,8,3,-118,-97,-82,-66,-119,-82,56,-13,90,-109,-36,-116,-21,-42,64,-38,-55,-77,-14,-97,93,126,-10,77,39,-78,64,-39,46,-17,27,114,114,-88,80,-86,-88,-20,-121,-7,97,-20,100,82,-3,81,-108,-10,-40,53,-54,59,-103,31,-58,96,85,87,-76,118,-60,24,-41,78,84,38,-56,121,39,-101,55,6,103,40,-39,117,44,-26,-67,14,-33,-71,36,-38,-88,73,-5,28,-41,-21,-31,33,-53,82,93,54,-28,-63,31,-17,94,-48,-128,115,-62,-89,36,-28,-4,-48,75,-104,25,113,-76,-52,103,24,-96,-24,-44,107,-17,124,-95,-75,122,-64,122,51,74,121,106,-45,41,-77,-91,97,-17,87,111,106,-25,-38,-109,-87,-91,42,-71,-97,-111,-69,18,77,66,46,96,10,24,-89,16,-25,10,-1,-114,26,123,68,46,75,-115,44,-125,-121,-60,112,48,-110,-50,-10,-55,-10,75,4,-79,53,-84,99,98,-36,56,52,-66,67,-126,-77,29,-31,-88,-35,26,62,79,-79,-10,-114,-52,110,-21,-22,124,47,-114,-18,-101,-105,-44,-50,-114,-12,-104,-77,-38,-128,60,-81,-110,30,101,13,107,-57,-69,-40,14,-97,-50,-54,92,-60,59,127,-128,-95,95,-8,0,-119,83,24,-96,-106,-84,96,-29,14,-80,82,-120,-28,-116,-55,-78,-31,95,112,-82,68,92,-121,74,75,-62,24,-5,97,6,42,-123,-99,82,-82,-70,56,16,118,-84,66,111,80,-82,-15,-104,69,-12,-76,-23,-69,-55,-46,-48,22,79,16,-51,34,-115,64,23,-106,-77,71,-8,107,46,-22,34,-14,60,-80,117,-8,89,-108,123,25,-58,15,-25,64,-114,-19,69,50,95,-7,-95,120,98,106,-41,-31,-120,-127,88,71,53,41,-50,-68,-80,40,55,96,26,-8,-6,54,96,106,98,-60,-71,90,60,-17,48,24,17,-36,10,95,74,126,-123,51,79,118,115,69,-106,-78,65,121,77,96,78,-70,-49,91,27,-91,-51,62,53,-68,5,-96,-108,12,-45,79,-19,-80,-61,-30,-40,127,-117,77,83,22,116,19,-70,70,-95,95,-77,-120,59,24,-41,79,-100,95,-112,-22,89,-99,77,94,60,84,-5,112,55,-33,-92,63,88,-89,-88,-23,123,-20,-6,115,22,29,125,-46,65,-118,77,-50,94,-31,24,111,-107,63,19,-71,22,-69,-102,-26,-26,22,85,111,126,-55,46,90,-13,34,77,-5,61,43,-29,-60,13,114,107,19,-64,-107,108,-101,-63,103,51,32,-26,79,-115,-91,22,-120,-58,33,-83,-114,95,-48,-126,84,-112,-38,-38,54,-52,-113,46,111,-38,-111,-69,55,26,-43,-88,-81,94,-96,120,102,54,80,-68,-10,11,53,-68,102,32,-50,-60,50,20,124,-27,-57,15,87,-92,57,-50,51,49,-70,-124,32,-76,-51,-3,-38,22,-9,-18,102,-78,49,27,-96,-47,-9,89,-81,-39,37,-82,-70,-88,-104,46,95,31,-17,10,-62,-66,68,26,118,-104,-50,-50,-17,-108,24,-120,-88,22,-31,59,-7,-5,-15,75,101,-102,-17,106,57,12,93,-99,-105,24,51,-14,-7,107,-111,46,98,75,-8,-101,121,42,5,4,89,-110,-42,21,-14,-110,-46,49,-67,-64,-20,-85,72,41,-89,95,79,89,-97,43,48,14,121,109,-53,-50,35,-35,-103,12,-97,-111,-17,2,-89,28,-126,-36,-96,-98,71,-98,-9,74,-59,112,81,-89,-123,31,115,28,110,-20,-109,101,-107,-98,122,-101,15,47,27,-63,-19,85,-113,99,-67,109,-45,55,5,18,-97,31,117,-3,104,-8,11,24,-63,34,-86,42,-65,55,16,103,51,-82,-121,73,-61,104,76,-115,-92,30,86,-30,-110,-51,-115,-43,-108,-13,114,-89,-104,-51,-26,-112,-83,-29,79,8,112,-30,-47,94,71,-21,89,-38,7,-57,-70,105,62,-116,76,-12,95,-94,114,9,55,7,-46,-95,-105,96,61,24,88,25,-126,42,31,69,20,-93,-86,126,-79,97,39,87,-74,-104,-71,66,-83,87,-81,108,75,8,1,-121,120,-10,-1,-29,-47,-20,38,-73,67,7,52,-89,100,-57,92,9,-38,-58,-71,-112,-57,108,-121,-17,-127,-59,40,0,-69,-45,-98,115,-67,49,55,-76,-97,57,-94,-67,-60,97,-25,-13,-77,91,-54,118,36,-122,14,63,29,-66,-41,-87,2,9,-83,14,-42,34,25,-36,54,19,93,95,69,77,115,115,-67,-20,90,110,70,-83,-68,65,28,122,-51,102,-112,123,-55,-6,-88,42,76,-8,-96,127,117,-121,-97,36,62,120,90,-58,-89,79,56,-114,-1,62,69,-44,-96,-49,-18,102,6,-43,-9,-26,34,-127,83,-97,-74,-48,0,118,52,-66,42,-74,126,-89,-107,-37,-72,-114,64,-109,51,-2,34,-104,47,-122,-20,65,-48,24,81,2,-29,122,44,-11,61,27,11,114,75,21,18,22,39,114,-46,-109,124,-41,59,-99,-28,55,53,24,77,-63,51,118,122,101,-48,11,71,91,18,37,-41,-86,65,-69,-48,15,-101,-2,-43,122,20,-102,-58,-97,-88,25,3,47,22,-91,51,37,-14,70,118,-2,-47,25,49,111,45,83,15,-70,-96,8,23,112,-8,-79,-89,49,68,-35,118,101,-1,39,11,-51,98,-5,-67,-64,52,-41,-128,-128,30,-128,74,113,-85,-25,30,-22,2,127,-20,13,-85,-92,-32,-4,-21,31,-105,3,-47,22,35,5,29,-82,126,62,83,-28,-4,-94,93,-93,-120,44,16,19,-67,-70,5,-31,-100,85,80,30,123,-89,-9,52,2,87,79,105,45,82,-93,-46,99,-110,87,-13,-4,-52,19,7,17,54,-92,-118,-127,-24,71,-79,55,-102,0,30,-71,-42,-6,-112,-78,-55,85,29,-32,-103,-54,72,27,-76,-95,30,-7,-6,67,112,76,-79,84,-56,7,-84,85,33,-86,-39,-77,-27,103,100,99,-43,105,68,12,85,44,-92,76,-109,31,20,27,-28,-39,78,30,94,46,-28,-79,76,-103,-26,25,52,-21,-79,9,26,-26,-84,-17,-102,15,-120,70,-100,89,55,-3,-125,-80,-65,-27,89,-41,74,-8,-63,77,99,-9,-9,89,87,74,-101,-44,-16,112,100,102,9,-47,-40,-41,15,-53,-88,59,-44,93,-8,-51,26,76,-54,21,102,94,23,-81,9,110,-125,-76,59,-45,22,-78,72,19,98,127,21,-113,12,62,-80,-27,-21,58,-38,7,-112,-109,-111,-123,32,73,-29,-65,8,23,20,-58,106,-101,-30,20,-93,-36,-38,48,31,57,-26,-76,-93,93,-33,-99,12,25,-68,64,-90,120,-86,82,-102,103,-11,56,-96,104,3,101,83,-82,8,36,-38,-72,98,-94,112,-112,-83,-60,-123,125,86,96,64,17,89,113,34,2,68,51,-85,109,-92,102,50,64,-57,-64,114,66,-37,-120,-32,-102,96,-38,-90,-114,-81,46,-15,108,72,19,118,-98,64,33,-58,-93,-13,70,-93,41,67,93,-61,99,-53,88,-79,-64,-85,48,-67,56,-54,-46,58,2,-14,58,-127,-72,73,34,-12,-50,-50,31,48,-75,33,-89,-7,-93,-76,-95,-96,-52,85,122,35,-14,73,-30,-107,-112,127,-22,74,85,-127,44,13,-78,-85,-63,-86,-121,-58,126,-117,71,113,59,-95,117,41,48,-73,2,-89,34,18,-3,90,112,15,-26,-5,69,46,-24,99,-6,35,38,-33,-55,52,104,53,77,-114,-37,43,-36,-70,114,36,88,-43,-81,53,-99,75,108,-70,92,99,-6,102,-80,-128,-112,119,-107,-22,36,27,123,105,-80,76,-103,83,127,20,-7,14,-52,76,-23,-128,123,63,-65,-111,-53,25,100,-6,40,40,34,-42,-25,-44,-40,8,-36,-46,84,41,-123,106,117,-89,69,-53,-33,-58,-41,90,-114,-68,26,-80,-124,8,-77,92,-49,103,-48,-27,-77,-50,-96,-113,-6,55,-5,-60,106,112,-6,-111,-89,-127,-38,-33,99,83,-88,113,-2,-23,-73,-7,-88,-49,76,69,-42,35,46,58,-96,67,29,84,117,52,-97,93,-113,64,123,-90,-104,109,-41,-26,-50,-48,85,-52,41,104,-20,38,45,25,-105,37,85,15,-92,79,-23,81,-125,-40,-49,18,1,-124,-34,-125,59,-97,65,68,93,64,38,-5,-31,-59,-74,43,-104,-62,-100,95,14,-85,-60,-56,-37,37,116,27,41,106,63,124,64,75,109,72,47,44,-128,-119,60,28,105,58,20,-104,-35,-98,63,118,-61,-11,-28,32,-97,92,57,114,99,47,-80,92,39,-115,-55,-35,-57,-79,4,-113,28,43,124,-31,-119,-83,56,101,-114,-53,116,-102,-126,-73,-124,-97,46,83,-17,49,-17,-13,96,23,3,-60,-93,-73,23,4,-35,-119,-71,5,-118,30,-51,71,112,121,-95,97,23,-37,47,55,102,-6,17,107,-16,-70,124,-81,28,-5,71,77,-70,43,20,71,44,-72,-125,88,123,32,40,-27,98,62,-6,35,47,49,-74,20,-56,-112,82,-50,22,113,82,-11,102,-67,114,-6,-41,123,41,-73,-102,-65,-97,-39,-41,70,-25,-21,96,58,74,119,-125,-112,-101,-57,87,116,-29,-25,-79,24,8,-83,17,76,-28,40,25,80,-59,-77,61,-50,41,69,-21,38,-56,61,26,114,32,49,50,-47,5,-53,29,-43,41,-5,-80,38,-112,49,49,-26,-34,-54,-95,50,103,16,95,28,-31,-126,-31,-2,-48,74,122,-83,-73,-22,-122,89,52,-12,13,18,117,-80,52,-36,88,-57,-37,32,-107,33,-55,15,78,80,23,-30,-44,126,125,124,12,125,73,-3,-8,37,-15,8,29,70,73,92,19,63,-5,24,-123,60,53,-14,-27,-92,20,-12,-38,49,-43,9,-118,111,39,110,50,-16,98,-85,21,23,30,-9,93,-96,77,52,-107,-58,-19,-72,69,21,-127,-43,-43,19,-39,121,-103,-125,58,-105,2,90,92,-49,-74,-95,-52,119,81,38,-13,-63,11,112,-2,125,-34,-82,81,13,65,-43,-88,-74,5,17,-112,-41,26,60,-71,58,-93,-92,-75,-65,-24,-49,119,55,-118,-4,125,34,7,97,20,60,-3,105,-44,-111,-96,-73,53,-79,-83,-53,59,33,-20,-3,-89,117,59,98,-104,-43,-48,19,100,60,-125,76,58,-125,94,78,-40,23,-49,46,85,45,-108,-126,-108,-19,-101,-27,-68,-111,-16,-62,-4,123,18,98,-82,110,-81,-41,-120,76,-41,-76,123,21,-55,58,-24,-86,-125,-94,-37,-127,-77,31,108,-2,30,-24,123,116,10,-16,104,-111,-68,80,-113,62,-64,64,-78,-81,127,101,125,-15,-54,87,-48,-108,86,-119,-55,52,122,-118,47,-121,59,-84,-45,54,-97,-72,94,-38,114,-105,8,-53,-61,69,-113,-27,-30,75,-37,13,-51,24,-49,-122,12,97,111,29,68,-111,-35,21,50,-9,-105,-94,90,43,52,-80,0,-100,61,100,-68,-89,103,-52,-105,29,-128,109,-32,52,-88,77,59,6,38,69,-31,-110,-85,102,112,93,-64,-79,-51,-117,70,11,-51,100,102,-120,-48,79,123,-86,-32,5,5,-108,116,111,-34,-47,-90,79,-17,40,-59,-85,95,-69,-9,42,12,-77,54,-75,-3,68,-128,-88,-32,118,-126,19,20,56,118,-84,-30,-87,87,99,-19,-125,-62,-31,123,-19,-56,-83,21,87,1,-38,-96,73,-30,20,22,95,35,45,87,-61,48,10,80,125,122,24,33,27,37,85,-30,-54,-99,-7,-75,68,-63,-28,-22,14,-84,82,-89,-17,-82,-63,123,-76,77,107,89,-46,49,-69,-88,96,48,5,73,122,33,-16,67,-67,-92,-33,87,-68,113,-23,-45,93,69,-128,-8,-39,87,-91,-104,-76,13,71,-17,-20,-128,111,80,-43,55,34,110,85,-128,-111,48,-109,102,-52,-93,-26,-25,-88,90,81,123,88,-119,-54,63,-96,3,-13,-40,-48,-41,-79,-10,86,69,-62,65,105,-116,49,-107,-98,-38,23,-76,120,86,-74,-69,119,19,-58,-13,100,23,-121,-4,-85,-85,-41,93,117,-52,-75,89,119,55,-13,31,98,-51,110,18,-17,4,73,90,106,99,86,74,-80,45,-18,102,74,-83,-119,124,75,-72,-18,-27,93,-9,-77,-65,-33,86,-76,-94,-11,29,63,-69,-106,-115,107,81,9,-117,44,77,-4,-36,-109,-78,-40,-94,-79,15,-59,40,42,117,44,-44,-51,71,124,-65,73,-46,59,-61,59,45,-56,-95,-96,16,10,-28,-94,120,67,-92,86,-86,-43,-7,-95,112,-37,74,55,-21,-75,-112,97,-20,73,52,-53,-59,-120,71,-40,58,91,85,77,49,-15,-82,-86,-39,-67,-122,-91,-118,-30,-36,-7,50,-89,93,30,17,-99,-104,107,-76,8,-37,-14,101,-15,83,92,101,-82,-46,-91,45,-74,-122,-70,-93,-41,-50,-38,120,-17,-106,-118,98,80,-49,-70,-52,13,-29,39,-119,55,62,-43,-82,-40,-89,-59,112,-120,40,8,9,-81,-62,-6,84,-63,80,-2,-82,-17,-47,100,-64,100,5,13,-128,-81,-122,100,87,29,-100,-49,6,53,-103,52,86,4,-41,17,-126,63,16,79,-89,92,-123,120,34,-102,77,90,-65,-62,101,-36,63,-19,-125,113,-18,-120,-85,-50,55,-34,-69,101,-108,-46,106,-31,12,37,21,-53,-64,122,121,-73,109,-74,-74,-110,-122,54,6,31,114,-20,-63,-25,111,69,119,80,-24,-25,87,-11,-113,-76,-103,111,10,2,94,-22,124,-117,90,52,-85,92,15,-76,-24,-74,102,-57,-47,86,-77,67,-110,95,64,-118,-84,-113,-1,-123,5,5,-108,-28,-33,47,20,-126,58,-45,34,-128,57,-44,-23,-124,123,-13,-125,-87,-75,-60,-124,125,-127,-105,-77,63,-103,122,-3,-106,-99,51,4,65,-115,105,-115,98,-36,32,110,-24,-33,84,76,10,29,22,-85,45,-126,-108,30,-56,-121,47,-121,-114,82,-34,-21,-107,-46,60,-78,29,2,-87,109,-68,-25,-84,80,106,-62,-64,-73,-72,42,29,-46,10,-43,76,-12,-121,-5,39,86,73,74,-32,-115,-99,112,-10,-68,-38,-18,103,22,-122,-119,-52,-76,-124,13,127,47,1,-29,26,-108,-17,-86,52,-28,-81,-35,-1,-99,68,94,12,97,-24,-98,70,63,-96,-58,-37,105,-48,-62,107,-113,12,121,42,105,-7,112,86,-18,116,117,82,123,-54,2,-110,76,-118,54,57,82,68,92,22,76,-109,96,-71,-88,56,81,108,-8,76,-98,-104,-80,-116,77,-44,16,1,-103,-127,32,-25,-109,-127,-6,83,123,33,56,38,8,4,89,40,-116,77,-109,28,12,-88,89,-65,-27,-87,22,-37,62,23,68,15,30,-43,-49,-42,-32,-74,-11,104,-24,-78,-20,50,-9,96,-73,90,116,-68,-43,47,2,-84,-115,2,-39,3,-17,-21,-114,-104,38,114,-68,23,-97,-96,-25,68,-39,93,80,-117,-27,-96,-21,23,-50,-109,44,75,38,-8,-16,-99,-110,-29,34,-128,117,-4,53,-77,-110,-35,77,100,-117,-4,-101,-40,108,-86,65,-44,15,-63,-83,80,-50,34,-61,113,18,-29,-31,25,-128,-4,-105,89,120,3,-107,-29,31,-38,26,102,-7,-6,-34,-44,-2,25,-23,-30,108,25,124,100,-48,-46,-60,-71,62,-118,-89,58,-73,96,-128,73,-87,-99,63,-24,124,-86,38,34,-51,27,-71,53,117,99,-7,121,-9,-35,-108,-64,-105,99,-42,-6,72,-22,-19,36,107,-109,90,-27,32,-112,76,106,-81,-63,-57,-29,-11,-24,-118,77,-80,111,-52,48,-37,123,67,-124,-64,-101,34,100,-62,-37,113,-68,122,43,112,-86,-110,64,-33,-17,29,38,-90,107,40,-58,91,23,64,58,-101,94,-22,78,-36,48,-8,-49,28,15,-90,36,103,45,127,-89,-84,-56,-27,103,45,-112,121,104,-13,118,24,-84,-66,122,121,12,-78,-2,22,-59,92,7,116,92,-115,62,-3,-126,-24,113,122,-71,0,-68,-105,59,-62,18,110,-24,13,48,50,8,19,64,-127,74,-46,-86,-99,14,-115,-18,-124,-42,51,-27,-26,-119,-99,97,82,-47,47,117,78,-59,-109,-13,-61,-49,12,-86,-91,47,-64,-71,-79,67,-33,56,6,-33,-29,-76,-16,95,94,-76,-72,45,27,-117,-99,27,-37,47,-58,69,-90,100,107,23,-44,-76,-50,-9,113,20,44,121,-125,100,43,81,45,-66,104,-65,-31,-54,-81,-13,20,-54,-23,-35,37,44,78,61,-102,-106,46,-79,-52,-59,57,-18,28,81,-110,-94,44,83,-43,-51,19,-78,7,80,99,59,-61,100,21,96,100,-55,-108,-90,-41,94,-37,53,14,48,116,-4,111,-9,-32,88,-61,-15,79,36,-55,67,-35,38,13,-82,-61,-61,-70,14,34,30,-99,4,-29,41,-94,14,-58,45,90,-24,-63,54,3,110,113,-18,36,-5,39,82,121,-101,-81,107,-57,-4,-51,114,-77,105,-82,-15,83,-53,44,14,51,-58,-44,106,-79,-21,-106,-47,114,-91,-76,-55,81,-128,94,118,90,2,116,-69,103,14,-62,-35,-32,127,117,77,87,-115,-16,-3,-104,-67,-39,-91,61,-5,-34,-62,102,-123,89,-38,111,-2,92,-29,-2,-66,124,107,98,-74,-93,-58,-65,-103,-38,-23,88,82,99,76,67,56,-62,-121,-17,-80,-77,-4,-45,77,-85,-75,116,7,0,76,71,-104,-70,98,-66,26,44,27,63,-44,-97,-13,37,-7,8,-125,11,100,47,77,112,73,67,68,-96,23,-35,48,-56,-11,29,-78,116,-72,123,39,-21,10,-21,47,18,40,-7,-8,1,-50,18,35,-103,-99,-49,7,-10,84,34,-11,-62,-105,38,-55,-101,-46,-103,-3,44,-90,-78,-71,-103,70,-60,-93,59,48,3,60,11,-112,-44,88,102,52,-77,-90,46,101,47,32,-19,-78,8,-36,-66,60,-71,39,-100,103,127,-95,109,11,87,-71,-106,-118,72,73,119,37,-41,68,-41,38,-84,110,-63,77,112,72,-90,63,125,76,46,95,101,95,8,18,77,2,2,114,99,-88,65,13,48,11,28,99,32,101,-94,84,19,-48,4,5,-26,105,-14,-36,68,-20,-43,8,28,-98,97,-89,-47,102,-67,-41,49,20,50,-118,-121,-74,82,-68,81,102,7,99,-89,85,2,71,9,-104,124,81,-110,17,73,-32,81,-15,7,119,116,-26,-12,39,-43,96,-68,3,-88,-93,-56,-36,66,77,102,-80,1,-44,-81,63,83,-80,29,56,-124,-60,80,96,126,-74,53,-16,-117,6,52,-57,45,20,2,-33,34,27,-16,21,127,76,-105,56,68,6,-26,-21,35,-108,46,10,-58,80,-100,-77,63,-10,111,71,-22,-3,95,104,-90,-38,-11,-104,-31,111,-113,26,-4,-2,-30,-2,58,100,-112,49,-76,101,-40,-106,-45,-126,39,-24,5,-97,-90,-84,-113,-77,-18,41,63,-25,42,16,-85,90,-4,-80,-2,-117,21,-75,-35,28,-118,-20,45,83,88,122,30,-78,-127,54,-13,96,34,9,103,-88,92,120,-59,-87,48,86,116,-36,-38,-65,103,104,-70,-1,90,66,-35,71,-54,-7,-107,-3,-78,-49,-105,-87,82,22,29,-3,-13,23,108,87,-65,-39,78,37,-13,-19,59,6,83,118,85,3,58,5,-113,-23,-47,58,83,25,-85,-80,87,86,84,-75,-111,106,-89,-17,71,32,-81,106,-30,-125,-50,95,-74,-14,-86,-78,102,53,-66,89,95,-35,39,-83,32,-86,-56,103,71,110,-79,-97,-107,-24,29,-19,84,103,87,48,-13,-14,-40,17,-64,-74,21,74,-29,2,53,-84,4,-113,50,66,92,26,5,34,9,-126,109,67,19,116,85,-87,-53,12,-99,87,63,100,-80,-62,85,-99,60,-6,-80,-59,17,-56,-111,-7,-114,21,-13,-110,-115,112,70,-70,-40,-47,64,87,74,59,52,-96,-79,-61,12,32,-119,57,80,27,89,16,-95,-78,23,90,-14,-42,-117,-49,40,-2,-122,-94,-47,101,-47,43,-94,22,96,7,-7,30,78,-110,-19,-66,-86,4,-83,118,-105,83,46,-104,75,88,20,-82,-106,-80,-71,52,121,117,-39,77,3,105,-112,49,54,15,33,61,-48,6,-76,2,-101,-54,8,-50,-36,-105,-55,126,2,76,10,95,44,-85,-53,3,-75,-42,-102,6,-70,-9,88,91,33,84,-18,-28,21,33,-65,-97,-87,73,103,-96,-67,93,39,-58,-49,92,-48,-75,54,61,123,-29,-68,16,-84,-90,14,-84,-100,-37,82,57,-61,84,63,101,9,-97,-124,-31,102,98,-57,-77,26,-110,-16,102,119,80,-38,-54,-35,-45,-115,-114,123,-35,-99,111,-52,10,-99,-112,-16,99,30,-50,109,-66,70,48,-62,-45,37,-25,125,22,19,54,61,116,-52,108,70,120,9,-56,71,-8,-64,-5,-99,-7,65,-60,23,13,79,-63,-79,96,22,89,61,-41,-51,51,88,-61,-12,45,15,-71,-9,51,29,-105,-82,33,13,-29,-73,43,123,33,-86,-90,41,106,10,-124,52,11,114,82,-60,30,-47,-118,-6,117,-33,-5,1,-57,0,-60,27,-17,21,46,-83,-121,98,-59,92,4,-21,-109,-88,75,-40,80,97,-32,9,127,-2,-15,109,17,-55,-53,-94,65,79,64,-29,-24,-123,-121,-109,-99,-43,10,-111,-79,-124,68,-55,-83,-85,103,112,-122,-101,29,0,97,-61,-67,95,10,-86,53,-42,-119,12,-42,-24,20,3,123,87,74,-12,-102,105,-6,85,10,116,24,40,96,-5,-7,19,43,-104,121,32,7,-6,16,91,-70,80,39,62,44,29,-114,68,51,50,-51,17,-120,27,-52,-43,109,49,0,-13,74,26,83,-44,-108,96,99,5,-33,-69,-35,-80,47,-13,-117,-65,-78,110,61,-75,107,88,-100,-55,-64,-73,-29,65,26,-86,77,-54,127,-56,-77,61,65,10,-18,-57,28,2,-63,125,-116,88,12,-112,106,78,-36,4,-98,63,-57,83,-32,40,-19,-72,36,-59,3,10,-114,26,-1,-87,32,-36,13,8,-112,124,-50,-1,-28,-47,63,10,-28,69,-42,-101,15,-89,19,59,-76,115,14,68,-83,68,-2,-19,19,-93,31,61,29,116,121,-80,-84,115,69,75,-22,68,-51,-27,-106,105,-109,-48,-65,54,123,100,-13,-110,-79,103,-28,10,124,91,114,95,13,39,-34,-101,-128,-121,-18,-35,-102,101,-127,74,-107,-100,-19,-84,-56,-33,109,-48,29,-65,-86,-26,-111,-119,113,-35,-95,-24,125,-85,-105,9,-76,2,11,90,22,48,44,-2,76,-11,72,91,-93,79,-28,92,-39,-23,50,-34,91,56,-101,-86,3,-113,53,46,52,-108,25,57,117,-108,-59,105,-127,-108,65,-92,15,-71,-23,114,108,120,-36,77,-23,54,-100,-65,112,118,69,-118,-78,-43,-56,94,-47,30,-49,-111,-17,-109,-105,-41,-25,-80,-38,111,40,11,112,-95,-68,-13,-103,-46,-91,108,32,52,-76,-30,39,-52,-57,-15,-63,-48,-23,-57,27,29,117,-74,-112,20,109,24,4,25,-64,125,-1,-63,-29,-25,-89,83,-3,28,-63,30,47,1,-1,-29,22,24,43,-18,69,19,90,-37,27,-51,69,98,-13,-96,72,61,44,-103,72,74,92,83,98,94,92,79,-26,115,60,-73,-73,-98,34,-90,58,51,-77,-51,67,-124,-50,28,-54,-43,-111,35,-97,-50,22,83,98,29,13,-44,56,65,66,-31,-111,79,124,-28,-72,118,-88,116,-125,-66,-120,78,-79,-42,90,-115,-123,-19,-98,-86,68,40,-91,125,65,91,-111,114,90,5,-68,-52,97,59,64,102,107,1,25,-64,64,-21,29,115,15,-8,74,10,-104,-99,35,-94,20,43,-22,-44,23,-106,104,54,72,49,-12,40,33,-12,-108,-85,-48,-123,-111,-105,-107,-116,54,-25,-17,46,26,32,-31,42,-21,30,20,94,-33,35,-30,33,15,28,40,98,83,-102,-88,11,-8,95,-73,-109,81,77,-44,115,-36,86,43,-16,-98,-72,-33,6,-18,-27,-116,-113,14,-91,-17,28,-64,-1,-58,119,-16,109,-8,-17,108,-58,43,-54,-80,-75,117,-58,-72,-51,4,-33,20,123,-97,-15,41,93,24,-86,-87,-123,-40,2,-111,57,60,11,-45,83,-43,-62,-125,-97,-51,-12,94,-74,-37,-123,-31,2,18,8,37,-1,-105,40,43,40,-63,77,-53,86,-95,-96,120,107,-67,18,38,-70,111,14,-109,98,-72,60,7,-121,-10,-128,36,101,20,126,-72,-29,-11,95,27,-74,-51,-115,18,-101,16,-59,-43,68,38,106,-110,38,-122,-46,-61,77,-110,-23,62,-33,32,-96,38,53,84,-80,34,-115,91,-19,106,35,7,18,-51,88,109,-114,-121,51,-76,-43,-87,-46,15,-55,83,74,-38,-3,43,82,-5,85,-100,-55,127,117,-75,90,92,106,-41,-39,-120,-41,35,5,83,126,62,-105,-33,117,-81,69,110,43,-122,43,100,45,-46,-104,-2,21,75,27,90,-82,80,110,24,-40,113,64,-79,110,97,-121,-14,-128,-60,-30,-91,7,-89,36,85,57,-17,15,11,91,-98,64,38,-96,67,-71,0,44,-8,119,123,38,-122,45,7,-6,-92,-111,-67,27,-95,-126,86,40,46,30,90,-123,105,127,81,-70,4,-123,86,21,-125,-12,-25,-119,42,22,46,78,50,-123,-112,-83,-19,86,-33,-109,104,-28,111,69,-48,61,53,-80,-102,56,105,88,74,6,-49,123,88,60,9,122,-32,94,-60,-80,73,-27,-9,113,34,-66,-93,-117,-35,51,36,45,-95,88,95,4,-22,98,-38,102,119,-40,-115,82,-80,88,77,-97,-49,99,10,-71,-3,-82,-124,-27,25,74,-9,21,-33,77,-43,44,-15,112,100,85,-124,90,-10,83,59,64,-108,-89,-1,77,-14,-74,84,-128,-11,41,74,80,95,-69,3,-86,-111,-26,-34,-54,-37,81,112,-40,-44,32,-83,-55,-62,52,-33,127,106,-69,17,-70,48,-34,0,-92,44,-110,22,113,-51,30,73,30,86,89,-90,-95,69,30,125,54,4,6,3,-80,-76,16,53,-67,-27,-42,-105,-98,-32,-66,-93,126,107,45,-110,19,125,54,121,102,52,-121,119,103,49,-32,90,-115,60,54,-77,-94,59,-119,42,-42,-6,106,-5,-90,-6,-74,-32,-81,113,-103,-69,-126,119,-90,7,24,52,115,-52,-96,59,74,-113,32,69,5,127,-38,-91,126,-126,74,-90,94,50,-39,-117,-22,-102,-106,-98,109,52,122,12,-111,123,-100,-87,35,-54,14,-89,126,-119,88,-107,62,-88,56,95,9,-95,-106,-25,69,84,-67,35,-42,-76,-61,-99,-88,-82,-24,-20,-26,75,109,74,27,-100,-55,-77,72,-6,52,76,96,-100,67,53,5,111,48,-16,38,89,3,-1,-115,59,-19,-16,-34,-61,-94,-115,-16,90,-110,116,65,-121,-117,104,109,-107,-26,-72,123,108,-49,55,36,-100,91,59,-93,-7,40,77,-91,84,80,102,-108,-113,-104,-22,-64,-90,-57,-37,-63,78,33,-95,-78,102,20,-105,94,24,59,-81,-39,120,54,-40,-56,-45,9,-107,-104,74,72,29,-45,91,-18,-106,11,91,-51,62,-87,-109,70,126,-49,-117,119,-89,-117,79,-124,-95,-93,21,108,122,39,18,48,3,-107,30,-99,-19,103,-91,83,-110,41,107,-78,99,-23,58,-99,39,50,-47,89,126,-119,58,123,31,7,23,43,-17,64,65,93,7,-26,-107,50,-11,-63,-24,-39,2,-55,-119,68,6,119,-90,-16,-92,93,111,-79,-89,78,-4,95,-7,-65,32,-100,35,-20,76,114,-126,-69,-13,-127,-43,-11,62,-107,77,10,114,-76,94,85,-97,99,50,-76,-57,-72,-117,86,9,28,124,14,-108,26,19,37,83,38,-125,21,-56,-42,51,-69,-3,-108,51,70,15,33,-125,-36,-122,-34,126,29,25,103,9,66,-126,54,-54,105,-9,-124,59,-105,78,76,3,101,-94,-67,-71,90,-7,62,-77,94,26,49,-14,-112,55,67,92,-26,97,80,-36,-13,106,33,-111,-110,51,-12,118,21,-75,-25,14,75,2,-109,123,-11,98,77,109,-47,6,22,-38,124,-100,61,27,-124,89,-54,-108,-28,123,-99,-24,-77,115,70,105,-32,49,-83,-99,-29,87,-11,79,26,77,-83,-22,-38,-13,-56,-82,10,-66,4,-69,-26,-19,-7,91,-58,35,101,-31,80,-5,-37,53,-73,-126,90,-76,20,-51,-1,55,51,-93,96,-39,-81,-64,-111,65,-47,46,-87,-65,-89,100,-36,-5,-9,-2,81,-37,-97,98,-25,117,-75,79,-81,-118,112,76,-105,120,34,-116,23,-125,-13,77,-73,87,-115,-108,-44,19,-96,-103,89,-56,-60,52,-3,-105,-59,37,-43,124,76,-2,25,57,92,-57,113,-20,22,79,32,122,48,115,-85,-6,-35,-103,9,13,93,-26,-123,-98,109,7,29,4,92,-54,-89,52,-92,74,8,55,13,97,-49,87,-26,-28,-11,14,72,-29,112,-82,12,4,50,-24,63,-112,84,74,122,23,57,-58,-125,20,-85,104,-32,125,126,-86,50,-83,14,-82,107,-124,26,101,-55,-118,-72,-100,-105,102,-111,-76,123,47,103,10,-14,-109,56,-70,104,27,-18,-33,30,41,-56,122,-117,-56,-76,-45,49,41,-34,-45,-35,100,77,-36,-24,0,102,88,123,11,116,47,-1,-9,-3,78,127,-108,33,64,27,-115,30,110,-105,-92,-15,56,21,20,-70,15,47,127,9,-21,122,83,105,117,21,10,-5,31,-91,-126,63,-7,-128,-20,46,106,22,3,-102,96,110,-106,71,-93,-52,112,121,-117,-74,-49,-7,118,121,78,76,-94,93,108,52,-67,-10,-103,54,62,109,5,81,-90,-100,24,109,22,30,-48,-36,-61,-36,119,120,-47,-92,112,-125,-41,-7,-11,-106,50,-23,32,84,-125,79,-36,-6,68,41,-97,-102,-51,-72,114,-105,126,-127,-13,53,-112,-71,38,44,-98,0,93,123,-60,-19,69,108,-68,-106,-68,-53,-55,-21,-37,118,-117,-121,52,-52,88,-36,63,-82,-72,-77,-25,68,115,112,62,-124,-71,122,-68,30,42,110,98,-42,27,22,-112,22,-56,-64,74,72,-92,32,-119,-50,-69,-64,-106,-59,83,9,125,20,49,-65,-128,-33,102,-28,46,97,28,74,-47,-59,-32,-113,-96,33,-54,20,-18,7,107,-61,51,6,104,23,15,-128,123,-92,-12,-75,0,-37,-89,-17,-14,-106,126,-5,-25,57,39,-66,102,82,32,28,97,-78,33,93,125,53,4,-74,-102,121,-51,-126,84,57,34,127,22,97,4,-24,88,-23,-65,-63,89,85,119,-99,97,6,94,-107,-69,18,107,-79,-25,-71,68,14,-16,-75,-21,30,-20,106,98,71,38,105,48,-41,110,-45,-70,68,8,-42,-82,110,29,-32,71,60,-77,-53,-20,6,-94,-90,88,107,28,74,58,-95,-19,26,-63,-73,88,4,21,125,82,-71,16,85,107,-67,-48,119,-17,27,-63,49,102,-78,-20,31,98,125,64,56,-100,23,-82,-89,-65,10,49,-105,-38,18,48,-50,-114,-23,87,71,-84,-28,-101,-65,34,-112,-18,38,-80,-120,-95,90,-79,-27,92,28,8,63,49,30,3,-85,-111,-114,52,-111,-53,42,-118,22,119,35,65,21,-8,3,72,-89,-111,-121,-29,45,-125,53,-122,-24,49,-64,-80,-107,-23,125,-84,-91,-115,102,26,124,-9,-72,67,-57,29,-34,57,15,-2,-14,16,-84,5,-95,115,-97,15,-58,39,2,-24,80,-37,55,-62,-43,24,38,11,-110,-76,54,-58,-109,112,24,-65,6,-127,-94,78,107,-67,21,-23,16,-29,62,48,-53,46,41,-123,-39,51,-82,114,83,14,93,41,-59,69,-23,-17,50,-113,-41,-117,40,-95,2,4,45,23,75,-110,-90,74,-18,77,9,113,97,66,-102,-76,-16,78,2,49,-105,71,-105,94,-43,74,-86,-89,71,126,117,-51,-72,73,-27,-100,116,17,-60,-83,-55,42,-45,-37,91,-100,-75,-51,-11,90,41,102,-99,-108,-8,28,114,-24,-41,127,36,-23,118,-44,8,-41,48,-62,-127,-89,124,3,89,-1,19,38,-64,-128,123,121,14,-99,-79,-19,23,88,-53,-80,-35,119,38,51,84,-104,-50,-103,10,-41,-39,-88,-118,-37,-55,46,-41,123,1,-94,-50,-24,119,-86,-110,93,59,51,-56,71,-48,0,-110,4,-4,-56,-99,-99,-31,29,-21,-65,-23,116,1,93,3,25,-29,95,-1,-109,33,77,21,-116,78,40,-124,14,-114,-50,35,116,-19,-52,112,26,-110,47,-120,72,-36,19,-97,-53,-28,-64,71,4,104,101,-2,44,-26,-102,-4,-18,8,30,-35,6,39,-93,-39,44,-3,-92,16,-87,-38,51,-87,-82,79,17,-20,28,-18,-118,-21,-19,-18,127,-48,19,-43,36,93,42,-46,-34,-70,-121,-51,-128,83,20,-19,120,37,-8,118,58,30,-95,63,-108,-55,-1,-80,78,1,34,37,71,-16,8,20,-55,8,-15,122,107,-125,-21,111,38,75,87,12,-20,-77,115,26,-102,-86,94,-85,-97,-109,29,95,-48,-22,-117,-104,-28,-94,91,-65,51,-79,-51,-90,97,112,3,59,73,16,-119,-88,-21,52,4,-66,-107,85,-114,71,87,-68,116,11,-3,-123,-22,81,-77,-72,108,19,118,-18,-54,21,-35,24,1,76,9,72,-58,-31,-1,-124,-19,121,-47,71,118,-83,-12,54,40,-125,45,23,-121,-46,81,-16,-73,-127,56,-117,-112,-99,-128,-81,51,52,10,27,97,67,112,67,-1,-97,-94,-42,27,91,-28,-9,-82,-112,50,12,108,3,-42,86,22,115,-72,74,3,-17,28,38,79,-29,113,32,-27,-61,-87,-99,119,-53,112,-82,-17,100,-111,80,112,-106,72,94,-124,12,-29,-88,95,54,-107,-123,64,-3,124,-83,-63,120,-91,-46,-117,123,-21,-108,-65,-26,-63,-115,-54,126,81,27,80,-6,-56,71,-91,-22,46,23,-39,26,42,61,74,46,0,-56,28,28,-75,66,-20,45,-72,-86,36,-73,-41,14,115,97,102,20,55,46,-120,-26,-18,-24,-46,99,47,-2,10,-57,24,10,90,43,123,10,-90,112,99,-16,54,-3,107,-72,-84,-125,30,112,127,76,-107,114,-120,49,-117,-9,-109,116,-103,52,-108,-37,-68,-2,-107,24,-110,6,-53,-6,44,13,66,-92,29,34,-57,-41,-49,45,47,99,-15,-11,-104,127,-110,3,68,24,-97,-97,49,89,-9,-1,-53,-6,-18,-36,-18,-108,-97,-118,-104,21,-11,-55,-16,59,-72,-118,-23,87,-79,-118,-49,31,116,-62,40,88,-7,-18,-91,-36,54,28,103,44,-16,-121,-2,-122,17,38,44,91,-70,52,110,29,-53,-88,-102,-101,-91,85,115,-50,33,-24,-66,-43,-14,126,-30,81,34,88,51,-85,-37,123,64,-74,25,-82,-17,124,40,-74,63,14,-41,52,-65,-118,78,24,-15,-91,-115,-89,121,93,-28,49,-28,14,-37,-49,-100,93,-7,98,-99,86,23,-111,114,58,-26,5,22,-20,-51,-29,21,-67,57,39,5,-79,-87,94,26,-36,77,-69,127,114,31,-69,62,-44,127,-26,-84,-119,34,70,-108,53,-125,7,-12,-76,121,-125,-85,-19,-43,-121,34,-59,-4,-54,12,-89,67,-38,15,100,-44,-92,34,-7,38,-19,110,-45,6,-45,17,121,-71,36,-46,-32,53,117,82,36,101,-47,7,-108,-71,-25,117,-112,104,93,115,-116,-90,55,8,-4,109,-83,104,-54,64,14,60,89,6,-70,109,115,27,26,-74,77,48,1,-26,-21,82,-50,-39,-87,-115,-26,-41,11,17,46,-84,102,65,-5,67,24,19,-43,-105,-11,77,-44,-30,20,-11,44,-71,-84,2,98,95,-9,40,-111,-95,112,-96,85,-102,-53,113,-73,68,12,84,75,72,-59,63,-35,-81,-58,0,-67,-13,5,-14,-37,-45,72,-90,89,49,12,120,34,-37,123,-104,113,-75,25,-100,-113,58,-99,11,-58,41,64,-93,43,53,-90,-75,92,122,-39,-26,14,-108,-81,18,-125,33,41,10,53,-74,-77,69,89,65,72,-12,13,40,105,44,-20,-109,-37,-64,-47,36,-98,-62,-38,-56,-112,-53,-96,60,29,58,-84,104,36,-103,37,-93,38,19,107,-120,24,-122,38,35,-8,-4,-65,7,9,-61,-33,48,0,-99,10,-61,104,108,-83,122,14,23,89,104,107,-100,31,-111,-45,-5,16,-6,84,-15,-105,-27,-28,-31,-86,-119,35,-106,-19,-45,-5,38,113,-14,70,-100,118,39,102,59,44,90,-47,59,-28,-94,-85,75,1,-124,-45,-90,36,86,-45,-16,19,122,-57,-111,11,-53,19,-36,-32,79,123,114,-124,-116,67,-110,-3,47,-19,-21,-33,63,-121,14,50,30,-11,-94,-10,-41,65,7,18,13,-3,106,73,116,2,-7,31,-6,113,-15,117,-121,60,68,117,-101,-57,-15,-27,114,36,-27,-34,29,-100,79,19,12,-27,-14,-4,-120,116,-83,124,2,110,-37,67,99,-43,-103,-64,-31,-30,-100,-25,-94,-16,-62,-80,12,-128,-64,-3,0,95,102,-61,-42,51,93,-74,18,70,98,-60,-67,-2,-89,52,-35,0,-80,-70,39,16,-115,69,-115,127,39,65,-4,-67,-43,22,127,-83,59,99,91,-33,115,-86,4,-5,107,-68,-40,-56,20,37,94,31,-62,-100,-85,83,14,-65,-7,106,61,-70,-77,87,104,-59,-23,-108,125,-119,-39,-102,-126,96,6,72,61,-127,88,-57,111,-62,65,68,-32,-78,5,-65,61,46,97,125,-47,16,81,-20,-77,66,44,116,-80,-18,14,-77,-88,60,111,1,93,-64,-55,97,53,26,80,-23,20,-52,73,55,42,-13,-85,-17,-11,-54,-31,-109,-102,64,-87,104,-105,-121,86,67,32,44,72,-84,-67,-62,-54,28,-61,-46,-124,-100,-120,-49,53,-102,-113,-19,-54,-114,-115,127,27,-21,-27,-44,-86,-126,108,110,-120,85,67,-58,-91,-128,-68,10,-64,-65,-33,67,-32,41,-17,45,-121,-78,-114,74,117,26,56,-125,69,-117,43,52,-38,-19,-42,-4,110,95,-89,35,82,-83,54,-37,-39,-24,103,37,-65,-5,120,4,64,-88,69,54,-23,104,-100,-73,-80,-126,77,-18,-15,27,45,1,-40,51,108,-74,-69,121,-45,27,110,-74,43,60,68,-79,-7,-111,-1,-63,-59,0,-90,96,-12,103,58,39,-18,88,-62,-26,-19,-111,51,73,-82,50,-84,-126,-23,-110,11,4,-11,49,-54,-69,-50,-27,65,20,-19,-27,75,-46,-98,-42,-74,53,-23,10,-59,-99,106,-87,-83,-4,-2,95,-12,85,58,-12,-9,88,-2,86,35,-81,5,-120,-87,-9,-40,78,-9,76,-32,-101,80,-98,97,24,-56,25,109,74,99,15,-78,-15,98,-17,-102,-79,69,74,123,94,59,104,-85,-80,-123,-19,84,-124,44,-87,95,-64,-120,105,-27,-71,-92,116,-110,-26,-101,-123,87,11,62,-79,-79,-91,98,9,-36,-112,-113,94,87,-29,108,38,47,116,-110,-6,-11,-118,-67,93,-31,-36,46,-53,117,-24,82,-76,121,7,108,-107,84,-39,-82,75,-31,51,78,-92,-69,61,26,-67,-127,-49,-37,-67,17,78,-47,-31,68,77,116,105,-74,45,42,-59,-109,-89,-10,-26,64,-28,109,114,80,-71,-64,56,-75,16,-50,-20,96,-23,-39,42,-84,46,94,61,-100,-43,-63,35,54,110,37,48,54,9,32,-40,17,-100,33,-33,-103,-90,-86,5,21,45,-75,89,45,-78,-18,-55,-97,23,-15,-5,-108,-41,-102,-9,10,42,-36,-28,-17,-84,-53,-76,117,104,80,-112,-10,87,51,32,96,-87,-15,47,-44,-16,44,-55,-34,-122,-65,89,-59,61,93,-70,-10,-124,-64,-65,-118,64,-88,-100,-68,26,-44,51,-51,-112,53,-38,43,48,-60,-55,-101,116,-42,-89,-59,-47,-41,37,-122,61,109,-97,-94,-99,85,-128,11,120,-32,-71,59,-84,50,-26,-111,118,-10,-74,-105,85,-63,75,-73,96,-122,108,12,-2,122,2,22,-128,-8,15,-50,20,14,-58,-99,-91,62,66,32,19,112,-38,-9,-101,-40,50,68,58,-117,51,94,-18,112,19,88,-47,73,-109,81,67,-49,121,-67,-113,52,-116,-38,-53,18,83,124,34,-116,66,74,-47,-96,-64,76,-125,74,97,36,-53,-30,118,14,-23,97,-10,-87,-54,-103,-22,-122,-6,80,-82,-44,-59,-56,65,-66,-65,-73,-84,82,-66,127,-63,24,-26,38,105,-109,110,62,-17,-51,15,-123,-96,-122,-111,114,-52,122,120,-49,-51,-19,28,-11,-22,-55,77,54,99,-121,30,36,19,-84,-53,59,-118,-127,-18,81,-94,-75,101,106,94,5,35,87,-114,84,-93,112,-55,34,84,82,-100,102,114,38,-66,41,89,-73,-107,-67,16,-119,61,22,119,7,-103,-84,34,-116,20,67,-57,61,-38,-94,-96,-51,-44,54,10,-62,15,108,-68,-123,25,-122,67,-41,1,-77,67,-4,3,-120,8,106,86,-26,71,10,-19,121,52,29,84,52,-27,73,81,9,35,-73,-15,-62,100,-19,93,5,-30,31,-71,-43,-63,10,3,-103,-41,10,-16,94,101,-8,-11,44,105,-113,87,21,-75,30,-79,-44,55,-113,-105,36,42,-100,-128,93,-122,-99,-72,-86,90,-9,-106,29,-58,33,85,45,-49,-115,38,-114,-76,115,-13,43,77,-82,23,-3,117,93,101,-1,-89,-71,-113,123,5,3,-64,36,69,-124,97,65,-109,-62,106,33,81,-46,-40,-33,28,-89,-67,117,29,-110,98,-36,102,47,91,55,-67,-34,57,31,-124,13,99,108,-9,105,99,40,-95,-64,114,-108,-60,-4,-28,-1,-126,-1,121,-80,103,-4,-104,-78,-92,20,120,113,-19,-46,-13,11,-105,110,19,-82,76,-85,89,-103,107,-35,-14,-56,-92,-95,83,10,123,-73,113,-82,-53,-128,-6,44,-64,126,44,-63,67,-25,45,-69,48,-76,47,6,89,115,-17,-100,-92,-106,33,-79,-60,44,74,106,-90,-120,-107,-59,89,33,96,66,70,-104,102,-35,-4,14,101,99,-3,-120,105,122,35,48,-125,7,101,-95,86,-39,-8,90,-112,127,-77,13,-36,27,-83,48,-10,-40,102,97,50,-48,-111,110,45,-72,-4,-86,33,-13,126,95,67,-1,-4,-66,-91,119,67,-32,35,-124,-36,31,25,118,21,-2,-24,126,49,-102,74,100,-127,-15,89,84,-83,-17,-25,-54,35,-123,28,-98,52,-27,75,-45,-116,85,-112,-43,104,51,36,-84,82,-122,35,98,-20,-17,-62,-99,92,92,-26,85,108,-70,-118,-78,-85,-56,-2,-60,-115,54,-77,-8,-28,-57,-81,-16,-57,-92,40,89,-58,-19,-125,-31,-90,44,-117,-88,46,-12,96,-93,112,-67,50,-41,0,81,-26,-128,117,-53,65,-85,54,105,-124,-84,-5,-16,13,101,92,-51,-115,98,109,40,-23,43,-41,-28,-45,-10,18,5,-125,48,-116,111,-54,19,20,33,82,30,-123,55,120,3,79,-32,-55,70,90,-33,60,121,1,-28,77,-64,22,-95,37,-40,83,33,-107,-72,-96,-47,59,-76,117,-34,-13,-81,-38,117,36,-106,93,33,-86,-118,81,-71,-49,-126,-74,-61,66,73,-91,80,-98,-56,-31,60,4,36,-104,24,-53,-106,44,-120,5,90,79,83,-88,34,71,-32,-78,-50,-39,-42,-21,98,60,86,79,6,43,-27,32,-6,57,-54,-98,71,23,-60,22,-126,-86,64,-28,-128,-40,63,53,-31,-124,-98,13,-98,-81,-52,107,-46,71,34,-9,108,-50,9,16,64,93,-6,11,125,2,45,18,15,-15,116,111,109,-47,-107,-17,127,-19,125,-95,97,-79,41,56,44,46,-8,-12,86,36,-56,-92,4,-111,127,76,95,77,75,87,67,91,5,-35,89,43,-80,47,-84,11,0,-33,-44,-73,-104,46,-48,-28,-38,49,105,-30,-95,102,-112,-62,-1,72,-54,-56,49,85,47,41,114,42,-67,-97,9,7,113,-85,-22,58,90,25,118,-111,-62,-47,-81,-5,42,65,-111,89,-126,-46,-22,45,118,25,-29,74,-62,-77,124,-1,123,123,-46,-74,-24,-115,-5,-111,-82,24,-1,109,-70,-13,-1,37,121,-66,-119,-36,19,-61,-62,-6,82,-103,48,94,-24,15,-106,90,13,124,-94,16,83,-38,98,-30,-101,52,105,-13,3,-98,58,111,-61,-16,-32,-47,5,41,28,-126,86,5,22,77,-34,-55,64,100,-104,44,59,121,70,-7,110,-12,-19,68,-124,30,-97,105,17,14,-100,-48,56,26,108,-78,-56,-3,81,58,-14,-73,-83,51,-51,-116,-20,114,55,49,106,-64,-75,24,57,18,-113,74,-86,-14,109,-124,-21,-121,-78,46,-104,62,-39,34,-47,-110,77,-107,-23,43,-82,32,-111,-75,1,33,78,60,56,-6,120,-90,-92,-35,77,11,-42,-81,-123,64,-78,-43,118,52,-62,-96,53,8,70,-64,41,6,80,-20,-104,-124,-101,90,-24,-17,-11,99,105,88,122,-114,67,-122,69,7,56,23,67,61,74,-65,0,-50,-29,21,-76,84,85,-42,-60,103,-102,107,-24,-110,61,-102,102,-27,-81,-110,4,-79,-9,0,58,-38,62,94,-99,-44,64,76,8,-74,-118,-96,102,-40,112,-81,83,-72,97,-9,-102,-126,101,62,-44,-122,-107,25,-35,107,-100,-124,-65,1,109,-102,0,-96,37,-84,26,-67,91,46,83,-23,16,57,-70,75,-14,-123,-72,-102,38,79,-78,25,-121,-112,58,-9,-128,-70,30,-40,-51,122,27,-92,-8,119,-115,-125,71,-40,115,54,104,71,65,120,-95,14,-96,-69,-89,13,-56,2,26,71,-70,87,126,11,-6,94,-31,110,43,97,-22,-83,-93,-79,34,-116,-102,44,43,-54,-65,81,89,51,76,42,-28,18,115,-33,108,-17,88,61,101,-42,27,39,-20,120,-2,-83,26,-100,67,-13,27,-60,-120,-15,-7,59,-39,-53,107,-54,-44,-123,-110,104,-119,122,-90,102,-51,1,-85,30,-75,82,-94,6,39,-92,3,60,-2,2,43,-71,-110,-55,-102,116,116,-128,-85,70,48,93,-83,-127,82,-35,119,109,-107,48,-23,-8,-127,95,81,88,-109,-45,73,46,89,-107,15,-11,-108,-67,66,108,59,-80,25,-64,108,-29,53,72,75,23,-29,-9,7,-30,103,-6,29,-63,57,54,74,-115,-3,116,-54,68,-31,-13,-115,85,120,-69,-79,-44,75,117,-28,-67,121,-46,56,-83,114,-86,11,7,121,119,-49,7,87,-117,-105,21,50,9,65,-122,-13,16,127,100,121,-43,56,45,59,18,-70,-17,43,-40,-19,123,-22,56,35,-16,55,67,-23,-60,12,101,48,68,25,118,103,-85,-7,42,-52,-32,-11,-44,31,71,-72,-15,114,75,112,-37,8,-32,69,-21,-30,-78,106,9,-109,-15,37,-106,65,127,47,115,24,-119,-103,-20,-8,95,90,-7,113,37,-103,-113,87,-79,92,-11,31,-49,-21,-64,89,62,91,-109,65,-2,62,-48,-55,-25,86,29,-81,0,-23,-5,-4,58,65,123,-121,-108,119,-104,117,-68,52,118,75,-19,-64,-126,72,73,-121,-91,42,-104,0,-1,-103,-104,16,-109,-50,-29,-32,109,-9,-19,-105,-103,-50,77,-123,-23,-99,-95,58,-14,-90,-21,-38,24,-74,94,-121,-98,110,95,4,-48,122,-69,21,23,57,-50,76,-112,32,48,-38,116,-62,-54,-57,-39,-32,121,60,-67,-41,-107,31,29,65,122,90,107,-128,126,101,115,76,-109,-59,-58,-52,56,-114,-115,102,19,55,-53,-83,-61,-103,-26,-63,123,113,14,-83,-59,59,-104,3,7,-1,-39,-51,61,25,36,-84,-30,65,69,-66,-75,66,29,9,-128,99,-70,-18,1,-68,-22,-96,41,14,-54,11,-5,62,-115,-87,-40,57,-53,-117,70,-12,32,-123,31,-44,-63,16,-43,-34,126,-82,-115,68,-121,98,-68,4,-80,5,35,35,-53,17,70,34,14,125,-122,80,80,50,113,-39,52,-34,7,89,-87,-118,-25,-94,58,118,-69,-112,55,17,116,53,33,-84,22,-49,55,48,48,-102,78,76,-55,112,101,-75,-55,63,32,98,19,79,95,-13,67,113,15,-22,-123,51,34,114,-10,88,-62,59,88,23,53,109,-42,24,-21,61,25,-34,24,50,24,6,-95,-102,-85,65,127,62,-59,41,55,-67,-99,11,78,61,-108,64,58,-54,21,-119,76,-9,64,23,-48,-82,54,6,52,103,59,123,-35,55,24,35,-68,-56,-39,-74,32,17,-29,-7,37,62,-103,-58,19,-37,-123,28,-53,30,101,46,88,-127,14,72,27,-124,8,94,-56,-90,-97,-80,-17,90,-32,-12,107,92,-110,0,54,-36,-69,37,-95,-74,98,-57,-72,-38,79,-8,-31,77,122,-62,-118,68,-6,90,109,-1,121,114,91,-51,-58,73,13,-110,40,59,-25,-121,-65,31,-87,25,35,-72,-22,52,-60,15,-117,-37,26,-15,-32,99,94,-94,-53,117,-7,-108,10,-82,-55,-58,-28,-6,122,103,121,31,-68,11,-26,60,-66,-97,81,117,65,90,73,-11,102,-56,104,12,-75,20,-116,76,-116,-115,32,74,-46,94,105,53,74,-8,-21,45,-2,-65,108,-5,39,94,62,20,-61,36,-97,10,8,54,-117,61,40,-123,24,-16,63,24,-4,11,28,61,-104,127,-46,-90,114,72,-70,-105,-7,60,-51,-35,-5,71,-113,102,-66,-83,111,52,-128,6,100,114,84,-77,-52,50,-94,-33,56,55,-114,44,91,63,113,-5,127,66,-73,55,68,13,-76,10,-95,94,93,-124,28,-82,-117,37,31,-27,-36,-72,-31,-66,69,56,-8,-123,-102,76,-113,40,18,95,47,76,-90,73,-84,-46,-75,55,25,7,-95,38,-34,72,18,-84,-104,62,-92,-5,-77,-67,85,16,122,63,-31,64,97,-23,-55,-63,11,-90,-105,-80,57,5,-60,10,34,56,-39,-102,-104,-87,-85,23,-96,121,75,32,10,7,61,45,19,-110,106,58,-50,67,49,76,19,81,19,-65,-25,16,-79,80,96,125,107,93,-119,-43,13,15,-76,-127,-29,38,-29,-95,-43,-92,-120,-126,22,-39,-34,-81,-91,43,113,-13,-7,105,94,126,100,-79,77,7,25,-99,113,115,-125,26,2,-5,106,-89,76,-106,-70,-92,-71,-104,48,-16,88,-21,123,82,-58,109,7,-47,-62,-62,121,-75,122,-100,-103,51,86,95,101,-99,115,27,-8,-97,-109,50,-68,-15,64,126,76,-94,-94,87,-13,-45,11,62,-27,35,126,-56,-115,12,39,54,108,-127,-17,-76,-95,61,-98,-10,-14,-65,-52,87,9,45,-66,-110,114,-65,-54,-7,-115,-126,86,32,-21,24,97,-117,-50,-52,49,-106,-116,53,-39,15,112,99,90,111,34,24,-70,16,80,-85,-29,113,-90,-21,69,120,-111,47,73,110,-36,108,21,-117,-72,-63,-15,84,-65,13,-40,-96,57,-15,44,126,-114,51,1,105,40,-20,77,76,44,34,-115,-28,-114,22,-108,-96,110,-128,42,69,87,-68,-96,-57,89,66,-86,-32,43,-14,41,-114,16,106,-27,-22,23,23,16,-57,72,-53,116,9,59,44,20,46,29,77,-42,-17,-119,-66,1,-75,-88,33,-94,107,78,-28,-125,-96,-27,-71,-43,-52,-74,-126,-86,-77,33,37,22,-105,124,-5,80,-124,65,29,14,-23,2,13,102,-11,-86,0,24,76,-18,63,-66,111,5,-15,76,-125,126,-82,-92,43,-3,-59,-126,-99,-46,37,-76,10,-127,-80,21,98,24,-62,-99,62,-51,85,70,43,-112,-97,111,-111,120,-54,-56,-52,-93,-30,53,-107,53,53,21,-104,-97,-30,89,25,-54,-62,54,88,-83,74,109,120,85,15,48,76,76,-74,50,-36,-52,-99,-112,121,54,18,-75,-40,30,-64,-72,110,28,-7,45,-91,-65,115,-67,-20,22,107,14,103,-71,-102,92,-33,33,-72,-4,92,100,110,-70,91,-27,-52,-63,116,64,-124,50,-37,-48,-93,-23,51,56,-77,87,55,61,-37,-23,-96,19,-73,79,119,3,-34,31,65,86,-127,-120,21,-39,-117,-78,-18,109,89,-33,-42,49,5,-28,65,40,52,-99,-27,114,-28,42,36,38,-46,-36,-88,-8,-94,45,116,-120,48,-109,78,-22,-20,50,74,11,-11,-16,-73,-127,45,109,24,28,-113,102,-33,109,111,-70,-40,33,-112,81,19,40,6,9,65,-25,-38,45,122,-57,-69,-65,-28,37,86,42,-113,119,11,60,-114,4,69,125,93,-60,-52,-58,-72,76,-8,93,77,69,107,-42,-84,-28,100,38,41,-119,-115,-114,-80,-111,95,-113,-122,37,-10,-118,-21,-6,-45,87,-30,88,44,54,101,95,-29,122,124,-101,-72,92,28,-74,6,-29,83,-48,67,43,-92,94,-69,-99,20,124,22,13,-76,-104,-46,-74,-83,-61,48,-81,-115,93,7,-85,-125,-81,-37,81,-28,-85,-14,-79,10,74,86,91,65,127,-66,87,-30,24,126,45,114,-32,-7,-25,-9,-45,-113,28,-53,-106,19,53,85,65,91,-67,-107,-106,-103,-31,49,27,59,-52,113,119,90,125,126,-13,90,7,58,-93,78,-124,-59,80,-59,34,105,-49,-100,-119,-126,-86,73,-54,22,-71,88,112,36,60,-9,88,-96,-113,-70,-83,-105,126,36,-9,118,-33,58,-47,-17,29,-86,98,13,-103,-106,79,69,-102,37,-104,-35,97,53,-99,38,72,100,-88,121,112,116,26,-32,-105,-98,97,82,-125,64,81,-81,12,68,-86,-56,-80,5,123,21,48,-122,-99,50,10,-98,94,-30,51,-86,-97,-24,-95,109,-11,61,-1,-24,-103,-125,-28,-101,73,-111,-32,-41,75,117,96,-9,36,68,-34,121,-122,-83,-42,84,41,-116,-101,-29,-51,-104,-32,65,-37,-49,-117,-22,106,110,-20,73,-5,-105,59,-96,-79,-47,-115,-115,-103,83,5,-104,-126,97,94,39,107,1,-105,-91,-103,-70,-92,121,82,89,-85,-103,-5,122,-43,-10,94,-59,-116,-12,72,-73,54,17,-43,71,127,-7,-125,-31,-57,126,56,-96,-37,36,112,-80,-42,26,-118,81,124,59,96,-36,-31,8,-49,-80,83,62,-52,38,-106,122,-112,93,32,-47,-67,56,41,-120,110,43,-44,-31,119,-64,98,54,76,64,-28,122,95,-7,63,-41,-48,-95,76,71,-94,125,-82,-91,59,65,125,20,109,-42,23,78,3,-91,-29,-19,-84,37,-21,59,-80,-84,-50,-77,-46,-42,75,6,-14,-46,-102,-81,-94,-102,-68,91,-26,-85,-61,-43,-128,-84,-55,87,-45,-67,90,-24,91,-20,117,81,-2,124,65,-113,124,54,-116,-106,41,106,-12,55,6,-93,7,31,-44,54,-50,-16,-119,-17,-23,14,88,22,-41,-9,-3,52,78,-33,-61,-16,114,-101,-57,46,-113,-76,112,121,-82,2,-3,-50,117,-74,104,67,64,-45,84,-36,125,30,11,-16,40,-69,83,-80,115,-127,-72,-41,103,-16,71,-33,-38,22,-39,-81,54,72,-73,20,-105,65,61,97,57,-122,23,106,-111,-87,-72,-97,115,89,113,57,38,-67,-25,-29,-93,116,-123,113,-68,-111,92,46,-25,27,-44,-11,79,101,-30,12,-89,-29,82,68,22,-17,-52,71,105,52,85,-112,-72,34,-109,17,86,-55,42,-90,22,67,119,43,-80,-14,51,40,-73,85,-51,102,95,28,-44,82,-28,-74,127,-104,31,58,-27,92,-125,-125,80,47,-47,24,-24,37,-71,123,91,49,102,67,-42,-111,97,41,48,-111,-45,81,-31,72,-64,38,-118,70,-114,-102,42,7,-87,-41,-9,-54,118,-48,121,-105,19,-28,-109,-84,-108,110,-55,-107,122,-74,99,69,100,85,-105,83,-66,-78,-8,-51,-88,-102,40,-5,-9,-110,3,-36,-20,120,-121,-97,-53,-37,-80,-46,-101,85,-61,-46,-22,117,-80,-120,64,-3,120,-46,-117,-121,-122,-53,-9,15,127,-29,11,-32,9,11,-87,86,15,57,-59,100,-90,64,-47,121,-34,-43,52,91,-116,-35,122,117,122,-90,115,-128,112,29,66,-73,39,95,-107,44,124,-31,18,-104,102,59,78,-14,-47,-30,41,-21,26,18,122,-19,43,-66,59,28,105,45,-3,98,-77,60,100,81,-22,8,3,80,105,-87,62,116,-21,83,31,-95,112,-114,-126,-58,8,121,-65,46,-112,-94,79,-128,112,24,99,-114,83,28,-104,89,-18,-121,-10,16,-73,-18,-97,69,-94,-81,-18,108,-86,53,-87,-17,-30,99,-23,54,1,-111,11,-52,-63,112,-55,-125,60,56,70,4,-103,114,89,114,-80,53,-50,49,90,-97,-54,-89,126,-17,110,-99,-30,-9,-71,95,74,63,92,-38,26,111,61,37,53,-76,27,110,-96,101,63,21,-99,121,68,-10,-124,-17,32,-83,-19,-92,-72,-26,-78,108,105,-80,115,60,-10,52,-74,-46,-77,-70,123,109,-77,-48,57,-54,-30,-37,22,-90,66,-41,112,-125,-1,89,120,-93,68,-103,-97,1,7,94,116,-108,39,-102,-7,-113,79,-90,56,-76,-8,38,27,123,-40,-111,87,-47,105,114,77,-9,-69,54,-109,34,-25,85,-65,-16,106,-94,-75,-103,87,12,-123,101,-41,-3,-1,-7,48,-46,56,-1,92,-18,-4,120,-46,110,96,81,21,92,-37,-54,36,121,-18,86,-55,118,101,87,55,49,79,-96,-28,19,56,71,-27,-127,110,104,107,30,65,-128,-107,110,-20,-57,112,-103,-41,88,12,113,117,-5,46,33,-20,-115,-113,-106,-19,101,-120,5,-125,-89,-107,-33,-116,-69,107,-85,-101,-39,44,31,-69,108,-124,-2,67,15,37,32,41,0,-20,78,59,79,-8,-80,-50,-82,-115,-6,12,1,-30,-85,-90,7,-61,96,-81,99,97,51,123,-107,-68,-102,127,-82,58,23,11,42,62,-82,-51,-59,-40,73,76,0,66,-42,103,-104,59,25,-48,-25,-99,55,-9,43,123,82,-108,53,-32,-20,-4,-36,39,23,-48,100,-1,-114,20,-108,74,114,-12,83,111,-77,89,-14,-37,74,6,126,-52,29,109,62,110,-108,38,-32,55,36,-92,-16,88,60,-84,0,-3,96,-50,36,3,-111,92,-3,-13,-23,19,-122,-32,-35,43,-48,52,5,62,78,27,-86,-59,-114,-19,60,-111,-75,0,-120,122,125,77,-128,-124,11,-112,29,74,18,15,43,82,58,63,-69,-26,-90,63,125,25,122,39,48,-64,-103,-107,41,-105,-122,84,46,-95,-57,39,36,76,-3,19,-21,-57,-56,-47,34,-30,-41,-128,-47,-10,66,118,37,119,48,76,97,95,-119,-71,17,66,-128,47,96,15,83,-48,117,-22,-43,-68,-44,-128,102,17,-16,62,-34,85,79,80,-11,-2,123,-123,-68,-36,126,98,-5,99,-56,71,76,23,45,69,38,28,-9,-96,-80,-107,-9,-87,1,53,69,-10,-69,-74,-107,-38,83,-7,-46,105,-117,-30,49,-126,-29,-55,35,56,-18,-4,95,119,-9,-114,9,29,-32,-19,-55,-123,72,-30,-17,-56,-117,121,-92,-18,-11,67,-71,33,28,-9,92,48,-100,-7,-120,-18,-37,16,-105,-18,106,98,124,45,-45,46,90,-39,-120,-67,120,125,88,-12,125,-42,114,-84,-8,-63,-17,-109,41,80,-57,19,82,9,-87,-4,-58,-52,-60,-76,20,41,43,126,-19,-110,-26,32,-107,126,8,-74,29,108,59,28,71,-39,-12,100,-82,89,118,97,-96,-77,-41,31,4,-119,-38,85,-23,7,116,53,-115,-35,117,-67,-122,75,109,18,50,115,99,97,-72,-94,-48,-22,-122,-21,-22,81,47,108,51,-68,-115,109,7,91,-56,11,-6,12,-15,-62,2,26,-100,52,111,5,60,-52,82,110,93,-116,-31,-62,-2,83,113,10,20,-82,-58,-78,0,52,-108,-67,121,20,-18,79,90,79,94,35,88,68,92,20,46,67,79,-21,-23,27,68,-50,-9,-16,-113,-76,30,-35,-86,-10,17,-102,-88,-89,-112,-99,-67,-123,-108,84,110,-9,-92,-57,73,31,-107,98,60,111,-82,-127,88,45,64,116,-125,29,-115,-33,-81,-127,-121,109,112,126,126,-76,37,56,39,-45,-35,-53,69,-74,94,58,62,35,-120,-17,9,29,-92,-66,-110,-71,-96,-52,-25,-55,-98,23,102,115,-84,-115,3,29,83,61,27,-40,38,-8,-102,95,-83,-115,96,-2,-90,74,0,-13,-39,98,-119,117,-78,-87,36,98,-30,-96,-110,-122,-105,0,-113,-23,-115,86,31,-86,21,-91,54,15,-29,112,120,-128,18,-35,-67,15,77,33,115,-18,74,-51,126,99,-6,46,37,-13,-33,-47,92,-88,-108,-43,-25,-74,59,-67,-89,9,8,92,-126,-82,22,88,-51,-48,41,-111,-55,103,-36,-41,29,-11,-6,30,67,25,-109,-47,-43,-120,-15,-40,-69,-120,19,-113,-61,78,-21,-121,-127,125,30,-20,95,16,122,10,111,-37,107,-77,43,-97,-98,106,-121,-86,-94,-104,-39,86,10,-44,99,-14,37,-52,113,-37,-49,-44,10,-61,-55,2,-107,36,78,52,115,76,83,54,125,86,20,97,36,55,18,-114,-49,83,-48,-23,-90,83,69,-73,57,-128,-85,-16,-11,49,84,-15,9,83,4,-60,100,126,-41,-81,80,-16,114,-2,-92,60,28,77,118,102,45,86,50,79,29,1,81,126,53,15,79,-110,-113,-87,-55,-95,-46,75,-29,-56,88,-90,-17,-4,-24,-57,4,-101,-38,-86,54,-80,26,70,-97,-112,-53,-57,-58,-97,-38,2,-30,30,-53,60,102,-113,-78,9,39,-9,28,-37,69,-11,98,-78,11,-9,-38,54,-27,65,-86,101,-82,102,-36,-66,-55,-123,-1,107,94,41,-103,-47,-21,26,-40,-57,43,127,127,121,124,-126,-104,105,-121,-39,9,-107,121,125,-67,-79,64,-77,88,-47,-96,-78,27,-19,41,-57,36,39,-54,101,46,-27,-48,-95,-60,27,77,-26,-23,-52,122,-101,101,-96,44,-48,-7,-109,23,53,65,17,-119,52,-15,110,-49,-124,-17,62,-122,-91,95,-56,-100,-81,77,-10,30,-124,34,79,-9,117,85,-70,3,-64,24,-29,-78,-106,97,46,-16,35,54,-44,117,52,-29,54,68,-120,-11,111,81,0,-123,-4,-42,5,-69,34,51,-113,-116,-108,-91,34,126,-56,126,74,-20,-98,20,75,87,-63,-123,-85,6,-70,8,72,-60,-25,-78,19,62,-32,13,6,-48,-83,20,-20,70,-30,-114,48,-107,-60,99,-10,101,-50,7,116,-33,15,-73,41,27,-82,-117,-56,-25,10,9,85,108,44,20,-69,92,28,-61,116,-55,1,-25,31,75,-68,-21,21,-3,22,41,-111,-22,25,25,12,-32,-10,84,41,-3,-11,96,-83,85,-33,-59,74,107,-80,-40,-102,123,-28,18,-93,115,-66,117,-128,-88,-10,-99,101,58,-3,-51,-47,40,4,-36,50,28,-57,-126,-91,100,44,-47,36,-124,117,-46,-47,109,-65,112,-43,51,-48,-116,51,-113,-106,71,115,-123,-111,-82,-18,-126,10,94,98,-39,-50,-60,-58,-14,43,-124,18,25,98,-99,86,77,35,-85,-58,-127,10,-23,79,60,119,28,3,-11,-44,7,-70,108,115,-122,58,66,-96,55,76,-2,-1,15,98,-121,84,-120,94,121,-80,-58,84,110,92,107,-125,-61,75,-4,-94,-52,-7,3,84,96,12,-48,-16,-25,-36,6,-91,70,-80,-22,91,61,-82,-77,83,111,-47,22,-82,65,28,119,63,-71,94,-53,-74,-119,57,-103,-81,12,-26,-73,-113,124,100,-91,-102,-90,24,113,11,3,-18,-4,-50,-73,72,-2,-16,121,94,-70,106,-62,-105,-50,4,-46,-34,-52,-31,-15,-89,62,-11,-78,43,-36,-104,-118,-68,87,-106,-2,-86,112,-51,3,-24,120,-78,-20,14,44,-58,103,-70,-15,10,93,9,15,-66,-75,74,-106,-117,-65,-8,16,-10,-31,107,-114,125,-44,-84,-75,26,-97,2,12,-27,-117,80,45,-115,-29,8,97,-74,108,75,-60,17,-119,1,-14,10,-14,-18,81,-81,11,8,29,-110,122,122,-24,-35,-120,113,-78,86,27,-31,87,-89,76,9,-114,-29,-75,-43,-12,-70,-118,-94,-1,70,62,-56,34,-32,-99,-126,-15,97,-38,-86,88,-37,20,94,119,103,64,41,-44,-66,-78,33,22,-67,120,-109,84,-106,-62,-34,12,104,36,-88,21,-35,52,-78,74,37,6,121,70,-78,-109,26,8,-18,42,102,-104,22,25,87,120,-8,125,-90,-82,127,-100,1,6,102,-72,78,-42,-100,-59,-87,-125,-13,-86,34,43,-12,-109,-61,13,36,87,-108,29,33,24,-124,-36,-114,34,-88,114,-41,21,-115,-71,-3,-108,36,-31,19,57,-95,97,-114,46,-121,-102,114,77,76,82,79,11,124,-82,-124,-50,31,92,113,-100,-102,27,-88,122,4,-87,7,102,118,30,-98,-84,72,-73,24,-112,-97,-125,-29,58,-101,52,48,82,111,78,71,88,-40,-58,-28,11,-94,125,-6,12,-18,50,-62,78,-18,-62,102,29,127,80,-31,-126,7,114,-25,-100,-116,120,-75,69,25,26,124,-23,-68,-15,-79,-5,-14,108,4,11,-69,-41,75,59,-72,113,26,-66,48,-4,103,57,71,-94,-2,14,-28,-36,22,-8,-25,39,-51,25,99,91,70,63,11,-124,69,46,-34,-21,99,-70,-110,-90,32,116,34,-74,82,43,-104,-56,31,-117,-43,67,12,-72,115,-84,-62,-9,21,-30,105,82,94,86,12,40,-47,-39,40,-114,-67,-89,-72,-64,-62,-124,-105,32,95,-124,-41,-14,48,26,8,-116,-57,24,-45,-45,-75,-40,-111,-118,107,116,66,-97,-57,-79,-96,-85,-55,49,-55,-32,-87,-76,-12,42,-85,85,-16,75,-41,-112,49,-29,-28,-124,-10,-60,62,-2,-112,15,-36,-33,81,-95,117,120,51,99,-64,30,11,106,-21,-42,43,-59,51,117,12,45,3,-116,110,88,104,60,67,102,-74,108,80,-58,-108,28,38,-108,16,63,100,-24,-36,-1,70,97,7,32,118,-112,-122,-31,-36,106,10,115,-89,35,58,-15,-5,63,19,-123,-99,-11,-94,108,-18,-13,70,-12,-1,126,-15,-9,-25,113,111,66,-59,81,-88,-114,97,-121,-76,16,8,72,62,3,-107,106,-43,92,-91,63,60,-90,-61,96,-9,93,-24,-17,-22,38,-24,29,-27,-36,-25,117,99,-10,76,66,-77,-71,33,-87,100,48,-13,-122,-49,56,-104,72,72,-84,103,72,115,-10,45,19,-22,52,-97,-77,-107,50,-81,-93,-79,102,-71,46,73,6,-21,-52,5,-96,32,112,15,-44,-4,110,5,-26,-85,89,-87,35,73,-17,59,-95,-5,-123,94,127,-83,9,-122,-64,-58,-72,-111,33,-91,-82,56,63,1,6,-67,-106,-55,26,-12,-105,-32,115,-38,-95,118,117,67,-17,95,99,120,-75,2,28,-113,-105,117,-15,111,22,-46,116,25,-91,40,44,84,37,-4,-66,-125,15,69,-14,49,-12,-11,87,-68,20,91,110,117,125,-65,-34,-36,84,-29,-87,-27,60,-66,-118,-125,49,69,81,54,7,-119,53,-23,-60,-9,22,-116,-125,-58}
+
+#define IP4_WEIGHT {18,-44,-120,40,104,61,29,-56,-12,78,-75,-19,-34,92,-80,21,60,107,62,11,58,94,-6,-32,-92,-118,106,-105,-104,47,-20,24,43,-116,-108,0,53,-50,-5,-26,43,48,-80,-73,-86,-38,115,111,78,-101,94,-20,94,-61,100,-111,76,-55,13,-81,39,118,70,94,-125,71,54,60,-70,-14,-121,51,63,-121,-121,107,-69,-74,-106,-38,-61,110,60,-28,-43,-116,83,62,26,103,-125,88,94,111,120,-39,-79,-85,-45,-90,121,-121,-97,109,112,34,-97,12,-93,97,90,-45,-59,-105,28,-10,0,-122,-87,-62,-100,-21,35,-115,-26,-37,6,108,-15,118,-41,97,-26,-74,94,34,26,-84,-65,86,1,73,67,59,-99,-67,115,-43,-26,-21,-21,37,106,-80,109,-107,-71,-20,64,-2,-20,115,83,-49,53,-102,-46,121,-75,108,-106,-59,35,45,-102,-41,51,22,25,122,-58,-116,-7,-2,-55,19,-126,-76,-103,80,-34,110,15,82,-73,93,15,-52,117,62,-46,-16,62,67,-19,-39,-27,-12,-89,-100,-37,-41,59,-127,111,99,-15,-57,-79,-43,20,52,-31,13,-12,99,-30,-69,-31,124,-36,-89,43,-1,120,-79,43,-15,-19,89,46,54,113,24,49,85,-17,-119,116,-46,11,-59,94,67,119,110,-57,-1,113,-94,32,-38,110,-14,-81,77,-53,111,118,-13,-19,-53,4,-20,18,108,121,-97,30,-121,117,-35,-31,54,24,119,-74,16,101,3,125,-59,-12,14,52,-65,65,107,60,17,-38,-53,21,-118,76,-112,-53,-108,-38,26,-58,19,91,106,-63,95,98,-4,63,111,-74,37,-47,60,-115,-44,29,-57,73,63,-51,9,-84,22,22,81,-87,-65,-126,7,-93,110,-127,-70,-27,-63,-12,-118,63,-26,-113,45,107,-69,79,111,56,55,-2,108,103,-48,113,120,25,-55,43,-122,-41,40,124,63,88,-78,29,24,93,44,122,-67,107,-34,14,-69,-72,108,93,-37,116,90,-24,-76,67,26,-103,127,88,-48,115,-80,-97,96,62,-1,-22,-123,-65,10,-61,-54,-17,21,-14,-49,116,113,10,88,124,-112,-119,89,88,119,30,-24,-119,-115,-95,58,57,68,-17,-27,-60,59,-64,-26,-127,-35,31,-9,4,-89,18,109,8,-90,88,22,18,45,-123,88,-80,-66,-76,109,25,47,-51,-90,75,-24,-109,-42,19,-72,-8,78,2,-84,-47,68,33,94,-98,-122,-109,82,102,55,66,-23,19,76,40,106,71,-121,-42,-2,76,93,3,123,-111,83,117,-52,8,105,121,2,-4,-18,-4,-19,-125,80,36,29,25,123,-72,-41,38,83,105,-71,-64,47,-127,-82,31,-43,-99,101,73,91,-51,60,3,9,-27,77,124,-3,-96,15,74,35,-29,2,116,-4,75,38,54,-119,8,93,53,46,-18,49,40,-30,-111,-62,97,-8,-96,82,30,22,21,97,97,-35,-12,28,-118,-12,95,40,-16,110,29,-58,87,29,58,41,46,8,105,-108,-29,36,84,-87,-118,-124,53,125,-117,106,-83,21,11,60,-31,-5,114,93,96,-112,-127,49,-126,69,-75,-41,64,60,-98,31,2,-73,94,-100,-44,91,-115,94,12,75,-23,81,46,-89,-116,-25,-47,107,-77,-10,62,-69,-70,75,-41,53,-82,79,104,-7,-106,-1,73,-32,74,-113,-91,-47,-115,66,-96,121,26,111,7,51,-55,20,126,-75,63,-23,14,16,-124,-39,-48,-84,81,14,-27,-56,-41,-13,-43,120,33,98,31,-50,-6,15,-107,-33,41,26,-9,121,18,8,-106,-46,64,127,60,39,-59,-30,-5,-119,-19,-104,-79,-38,86,-121,85,-17,21,44,49,-73,89,73,91,-36,-120,-22,26,-69,-17,-102,-71,103,63,125,105,15,103,-20,-122,-62,-8,61,-116,-78,-116,11,-80,-80,-58,-119,87,-15,99,-111,-87,-84,65,-47,-38,-44,-26,69,-14,-37,-27,-90,-97,29,-4,38,52,-87,109,-72,-50,61,-110,82,-44,8,63,92,-70,-10,-124,69,15,80,83,109,111,25,-47,-110,104,66,32,-16,104,-31,-52,-41,18,102,-70,-49,22,-109,-16,122,62,125,-123,121,-61,-2,92,-90,-81,109,74,5,98,-125,-92,72,101,-120,60,10,-13,80,94,-25,45,-43,58,53,-80,-13,38,-56,-77,-44,-37,46,76,1,-103,-93,74,63,-62,38,-82,73,-124,48,67,-59,-26,116,109,75,70,-30,25,85,76,66,25,-18,-113,106,25,-83,81,-50,-104,-44,-53,-68,124,112,78,99,96,-126,-125,44,33,-75,-29,-60,-6,-26,-84,-61,118,-4,-9,-126,-46,-57,-119,-127,105,21,-120,-121,-33,105,-70,-124,-108,-111,54,-35,-30,57,-101,-79,-48,-65,-108,77,22,44,111,68,-91,-111,41,112,110,56,118,0,-49,62,-54,83,52,-94,38,-14,105,27,78,66,14,106,102,41,24,53,-40,60,59,-124,56,68,-119,102,-70,-119,-101,-25,-95,69,-45,-55,-38,57,-122,106,-96,122,33,-5,61,104,77,122,88,99,126,-74,46,-52,-3,-38,-101,74,-30,96,116,-51,-21,68,74,2,17,71,-124,47,-35,107,-23,64,24,49,41,-50,-23,88,19,-30,10,-96,3,-14,100,-116,55,-91,84,100,-54,125,67,-40,-124,53,10,-126,45,21,-84,13,2,-62,-47,54,72,82,-50,-2,-66,103,-61,-20,-17,59,54,-110,-1,96,-70,-57,123,-111,-94,-125,3,14,37,123,-86,-44,-9,109,-101,-128,113,-104,80,-94,-87,111,120,-7,3,-49,-51,49,-32,40,33,-62,18,-94,-57,-71,-92,-52,3,105,-86,-104,123,1,-93,-73,52,108,38,52,40,2,-44,-62,91,5,-48,114,-61,-40,-128,-93,-88,-91,-115,62,-24,-30,-85,-43,104,102,49,10,-52,25,-52,-94,-20,-103,-25,84,-56,-103,51,-110,26,1,-82,-102,32,126,-108,78,-108,30,86,-17,-23,-112,-32,32,80,-112,-86,-115,8,24,9,-121,-125,91,-73,14,-69,-95,-2,101,-109,1,-49,-110,84,25,24,66,-72,54,108,4,-36,95,126,-63,56,99,-103,-35,-80,5,3,-61,-8,-10,-10,78,-73,72,42,-83,-115,84,97,-66,20,-66,-46,-57,-99,78,-120,120,30,-88,-29,118,15,-110,-52,-92,25,113,-30,92,-94,-29,90,105,89,-110,48,-44,-1,-96,-1,64,115,-3,57,24,-39,118,-2,81,37,15,-47,-14,89,48,-69,-32,-95,-114,-77,33,-103,-127,-82,-9,-100,14,-38,-76,-63,51,59,-31,-8,-75,-37,76,-32,69,101,40,26,80,-23,-110,-23,-84,-67,4,-31,122,65,101,-83,111,-112,-123,124,-56,67,12,-23,-43,-47,55,-87,66,19,21,-12,54,-105,100,35,-89,-80,-76,-85,-61,-9,33,107,42,120,-49,-117,19,-80,-65,-71,86,106,77,-34,-50,108,42,21,65,69,127,-38,-27,-77,120,-28,97,24,-20,89,-66,-63,-17,-110,43,-43,-117,112,-126,28,36,103,0,-68,115,-69,107,-99,53,94,9,-105,-27,70,2,47,80,95,-83,28,119,59,95,16,17,-16,15,-6,4,82,-94,-89,64,-49,-122,88,21,47,50,-21,29,121,-47,-83,-113,-78,-25,-101,9,-36,72,28,-68,23,-67,-98,-24,-101,-98,-28,-89,115,-101,-89,82,102,-124,40,125,23,97,-113,-58,-7,-90,28,35,83,-53,-26,-119,-108,-83,97,-74,6,-40,101,8,11,79,117,-65,-15,-10,-72,-99,-98,101,80,127,95,60,-116,79,2,60,-62,104,15,-29,46,-79,-92,-118,-43,73,107,-43,67,-73,-67,44,74,-111,117,-127,-98,26,113,-41,59,79,45,-60,-30,114,18,54,-124,-52,21,-26,10,-82,-72,-70,-126,-97,108,-19,-52,10,120,-111,102,18,99,49,-128,-17,91,83,-72,-19,-3,45,-104,14,-46,-76,3,112,-41,47,122,-77,-35,121,44,-45,-123,-60,-58,43,-23,41,84,69,-2,50,-69,-98,-11,112,-11,98,-36,67,-33,51,-17,-95,-45,-126,-69,-52,81,101,-38,68,75,-109,-78,107,0,45,67,-37,-100,-55,12,105,11,-24,3,-70,-16,-97,-63,52,97,46,54,77,-22,35,125,93,58,-61,66,-61,-79,-58,-43,-45,-49,-63,-98,12,41,54,-63,-36,48,-33,-110,-36,-76,-48,73,-33,-87,-81,-49,93,-6,4,-78,50,-88,-30,-33,10,30,102,-94,38,97,73,-109,104,6,37,94,-124,56,-106,-18,70,63,10,-31,-90,-113,-116,84,4,50,-18,-27,54,125,-86,-119,33,-127,0,-128,-77,-65,-63,64,26,-79,60,-25,76,5,-5,101,69,59,26,67,121,-26,-79,-91,-49,-87,66,71,-22,7,-73,-51,-114,-18,-72,40,-87,-55,69,0,-22,-23,-96,-115,29,-119,68,-102,124,120,-6,74,5,-111,-85,-99,16,-28,-92,-34,87,-42,-36,123,-52,59,103,-77,43,-80,0,-86,83,-81,96,-15,124,41,-62,-22,77,43,4,71,104,-62,-98,-13,-99,107,80,-121,72,54,-63,-13,10,78,-108,-95,-90,122,88,-92,-119,95,-117,-76,76,-115,52,-10,122,-108,-13,101,12,36,63,26,39,36,-72,-80,107,82,119,-57,-7,-118,-91,-55,-54,11,-30,-44,77,-93,58,-25,102,11,80,-62,111,-33,29,105,-63,-98,51,-77,3,-6,52,39,-50,-80,-5,-50,93,-103,-123,-77,79,-58,-101,-122,116,-20,-16,-45,110,93,-11,57,44,3,107,-118,32,126,-90,24,-60,-25,60,64,80,124,-22,-95,-57,-47,15,-46,-28,26,42,-91,83,74,42,1,78,113,-76,14,33,16,-16,37,89,108,74,20,-93,23,60,107,-22,-117,111,52,-97,-15,86,-127,9,-17,28,78,53,-17,5,123,-78,-120,-76,69,-76,-98,-42,-64,-17,-99,-113,13,120,126,-88,-35,20,10,44,84,-35,74,12,81,99,55,31,115,18,-125,110,2,-82,-110,-94,23,-4,110,84,-122,40,-3,-75,62,-62,34,2,-120,42,-24,-10,124,-46,111,-99,-11,57,126,41,-38,-14,6,27,109,27,72,-29,106,96,82,-69,60,42,92,127,-24,96,53,15,-18,-104,-79,-70,-102,102,-36,-84,32,-119,2,-77,-53,79,7,-24,84,115,103,54,60,-7,19,-49,-7,114,-7,89,1,-64,80,107,-22,-5,-2,-63,-26,-51,-108,9,-111,17,-40,-51,58,108,-55,-68,-117,-51,13,4,-17,-33,-110,-95,99,-117,-23,-71,46,69,4,119,103,31,-117,6,76,-36,106,-124,-30,23,76,80,39,6,18,-3,78,3,-118,-52,23,-100,69,-91,112,40,-16,18,-55,75,-77,126,-87,103,-23,50,7,106,-16,126,41,-127,72,75,105,77,-19,112,67,-102,-69,0,53,-72,-95,53,-4,-56,30,47,38,-60,100,-127,-16,-16,-97,-15,46,90,23,45,-18,29,-111,-38,73,-112,44,115,-93,-32,-104,97,86,69,64,61,-68,-10,-112,60,19,32,87,69,55,-4,123,-105,-28,-82,-1,80,-92,-77,52,-38,76,56,81,-40,-14,115,3,-14,-59,-115,-39,-124,-78,32,69,5,-123,50,70,34,61,-57,-108,-22,127,-13,81,35,-35,34,68,-125,-120,109,89,-21,88,107,-114,99,110,-19,-54,90,87,-32,-81,115,-27,-82,-92,65,-126,64,-94,-90,36,-93,-45,-121,26,-114,-111,118,70,10,-3,106,80,-101,47,125,-12,39,88,-81,10,-25,43,33,-72,114,-109,10,98,-98,-115,-88,96,-43,-80,91,28,105,-122,85,123,-58,26,-26,103,-121,20,-62,101,-88,-113,-36,-88,-66,-58,-46,87,125,-100,93,79,-108,103,-19,-45,-19,29,40,33,49,-48,-15,0,70,122,121,118,86,6,49,111,-26,-67,-28,102,-83,86,50,-86,-124,-104,-28,35,42,126,-128,-87,-70,-109,-94,52,-25,123,-3,-6,18,-49,-120,-62,-89,-37,99,94,109,-85,100,62,-107,-126,-116,110,10,113,-19,-52,-101,84,-44,93,96,-110,-26,65,-45,28,5,-49,-78,-48,62,127,-53,120,-96,67,127,34,91,49,57,-67,107,-85,60,-60,-6,-80,-77,96,127,50,-52,-34,-52,-8,-119,-60,-76,89,-64,-1,34,-25,99,-47,45,-46,-47,3,-85,100,-94,-14,59,12,47,-74,-49,103,-6,-29,6,-25,-2,-23,91,-79,-1,-11,108,0,-44,-48,56,75,-71,-29,-35,-100,-100,54,-62,-77,-46,-56,-3,-98,90,-126,124,1,-26,75,104,101,-113,68,-127,-88,4,39,-106,95,-67,127,-15,-36,23,-71,52,-118,-67,9,10,-12,-51,-77,104,-22,-39,-106,53,34,-67,-35,-38,84,87,-124,41,-98,-74,-103,-125,95,38,-31,3,-89,-107,-106,-24,-90,-58,18,14,-41,-9,-86,-93,-39,83,23,36,-56,75,-119,80,10,109,45,57,-36,-123,113,-68,7,13,35,32,-17,28,118,-119,52,-37,-102,-18,-1,-98,48,-69,6,-97,37,-4,-59,15,40,3,101,91,-31,5,-9,105,-9,-33,-31,-71,46,-99,-71,70,-77,-38,-7,-112,73,42,-2,98,53,48,-1,76,-117,58,-62,117,-127,-66,-120,-33,33,2,-35,67,-100,-117,-82,115,76,15,33,-125,-5,49,91,-111,84,27,24,-89,-87,-72,-35,-49,100,74,65,-71,52,-67,-128,114,41,-63,82,127,0,8,117,5,126,-108,87,8,20,-76,-102,123,71,-73,-37,36,104,-71,-50,-56,41,-26,-62,-105,31,70,18,8,16,-122,-52,-127,11,-100,-109,-35,-86,40,29,-78,-58,-84,117,88,102,18,-45,115,-54,32,-36,51,-66,20,107,38,-119,26,56,52,-77,65,126,78,-113,85,-92,-35,-70,-41,-47,43,-72,-79,-67,-24,-66,-7,-9,62,-77,56,75,67,98,-47,43,-78,-116,-2,49,65,53,20,102,113,-4,-12,-36,8,103,51,-79,-37,-90,49,50,-118,62,107,-120,4,79,-17,61,36,61,96,-117,123,1,51,-15,17,11,-108,39,-87,53,36,-19,-69,126,-72,-91,-90,123,-27,-51,-40,79,-61,127,-62,41,11,14,-67,32,-109,-70,47,38,-1,76,-17,-120,61,-104,73,31,-37,35,-26,106,-83,-53,18,-18,18,-21,59,93,-31,-85,75,-127,19,66,10,4,-62,45,-109,13,44,-74,-25,13,-47,18,30,-59,-96,19,-113,68,46,-5,91,-110,-115,-18,65,-90,25,-75,-21,1,-88,-91,13,93,-61,24,85,28,-17,55,86,27,-14,-60,108,-110,-18,68,113,-64,64,58,52,0,32,70,-52,-97,-100,-9,111,43,-88,13,0,-112,34,-104,108,-125,-9,-32,110,65,-64,92,66,106,113,-116,-35,3,121,-91,13,-75,-44,91,-88,37,-84,-16,-117,-1,-49,13,81,21,33,113,15,-83,27,-77,46,-17,-19,-115,-37,-95,28,83,22,-56,106,66,-57,63,125,53,-23,69,49,-25,-15,-120,106,-86,40,-107,-76,-96,43,101,98,55,4,-116,-89,-26,60,51,-21,106,53,2,86,83,-119,47,42,-49,110,-5,-50,27,36,-75,52,-59,-71,124,28,60,6,63,52,63,-67,16,14,83,65,-58,23,30,49,-27,-66,-26,-39,-88,-46,-81,-123,-61,-18,42,60,-22,-61,-60,66,92,-83,111,100,-72,116,65,-100,103,111,116,50,-5,111,72,101,-88,18,-65,8,-78,87,39,54,113,-70,-44,-128,-70,29,112,63,-52,-48,12,-27,95,93,-31,9,55,-70,-109,-42,-71,122,-46,-115,-58,21,-27,125,9,-82,53,-22,-50,-71,125,50,-6,45,50,-14,-72,95,51,-74,104,-86,57,65,-39,6,-10,-76,-23,103,127,17,-95,10,21,-52,87,24,-128,-36,95,95,21,-96,-14,-44,-8,74,-119,-123,61,-24,-102,107,0,126,83,51,27,-17,43,-95,24,79,-106,115,-64,124,8,-75,-96,118,-84,69,3,122,-97,122,96,-106,14,65,-118,-64,-82,51,-29,-78,-80,121,-66,74,-82,106,82,77,-28,78,-119,121,56,-45,-120,96,-116,-70,-13,41,-109,-91,-55,-49,-31,27,90,-77,-36,97,-78,91,95,-91,-116,-17,-42,111,112,-51,68,53,-21,87,64,106,-82,62,92,-68,-38,-25,-77,-109,-121,5,75,-108,-55,-38,-14,-87,74,-96,-62,12,-97,-91,126,-71,24,-45,97,-19,93,42,-10,-97,-5,79,6,-80,77,-111,-78,18,42,-61,-99,-40,39,-69,64,77,-123,-30,82,127,-39,66,-17,96,-82,-117,56,83,46,46,27,10,-70,77,16,22,114,24,-88,16,118,116,66,-70,114,-89,80,-25,-84,19,111,70,-86,10,-20,-114,80,-95,-15,-77,-88,-1,-121,26,-82,95,-104,-120,-7,123,-20,46,69,59,-76,-41,97,68,100,75,-12,24,-23,79,82,-115,81,-125,-69,-100,-46,-112,-3,44,-108,-121,-55,95,-48,-22,-10,-60,53,48,22,89,16,77,-40,112,-54,-110,79,-99,-51,94,59,-50,31,-55,34,60,64,-5,-103,-10,-58,-10,-115,84,23,112,96,75,87,-79,-106,55,71,-92,85,4,-76,53,-77,-33,-8,63,118,-84,24,98,107,88,-22,-88,-60,99,-41,-36,46,-89,34,-23,78,56,38,-66,-14,123,-80,-6,84,52,-56,67,60,-20,117,115,121,-126,-101,29,-8,22,-108,125,39,-77,55,-31,89,29,123,-46,6,-88,40,26,25,65,15,77,103,-35,-39,62,-58,-118,-25,-50,117,79,-26,-10,64,94,-19,24,44,-79,-67,-114,-114,-31,69,111,14,-52,-71,-21,50,-107,-7,19,-33,110,36,-22,95,63,-95,-71,-38,124,73,-114,120,22,106,-102,-88,47,-5,-18,98,-69,-41,-26,28,-101,-21,-44,-31,-26,-127,85,-41,-105,-31,-50,-120,22,88,111,33,-114,82,-104,71,126,41,46,-53,-12,93,-77,53,-55,-50,90,54,-38,-63,60,-68,-13,40,77,-28,-128,31,-81,-80,34,55,-5,-17,-110,-48,101,96,61,-8,-29,94,30,-128,13,26,43,-6,-60,115,107,-89,-69,54,13,106,107,-62,-57,36,-40,96,114,98,19,-28,14,-48,-50,-60,-64,90,108,-4,-97,75,-54,-71,-107,60,-101,-104,92,-17,-63,25,-60,48,103,113,59,24,51,32,-101,79,42,71,-83,89,65,-26,121,-115,5,-21,-68,-38,28,-91,4,-120,-110,7,122,-70,102,22,89,-58,-42,-57,-51,105,-112,33,21,-114,-110,62,123,76,-6,-83,-14,95,-46,-116,-55,-12,-88,-48,49,84,-64,95,42,114,-8,-126,-67,-112,-20,-94,76,9,-96,-38,-85,54,41,55,127,-46,-121,-38,72,-52,-89,7,117,-95,-97,-113,95,111,89,-105,36,61,120,46,79,-38,-97,96,62,24,90,-111,43,55,14,88,-58,-126,79,-69,48,26,121,25,-89,42,56,-43,109,-81,-50,31,-114,20,62,-88,-53,94,35,69,-1,-93,69,-96,-35,102,12,-86,-44,-79,-49,120,-103,54,-97,126,-96,97,-18,80,-111,-10,2,39,102,-74,-43,-68,-17,11,-89,87,6,-104,-9,53,28,102,-36,-71,-26,-83,-127,-68,-126,32,-96,66,34,87,83,-50,-98,50,-98,-81,-97,75,-48,-60,71,20,-9,108,-74,8,0,124,74,-57,112,1,118,120,-66,-27,-59,15,81,-121,52,-10,42,87,-89,57,31,-1,-74,-47,-89,-92,-123,-50,115,-29,126,-20,-107,51,28,-70,-20,38,-37,67,-114,49,110,-124,-109,-73,-72,7,64,32,101,-51,-98,52,-109,100,-2,-76,-107,-3,122,-89,51,-57,34,-38,-101,-9,47,92,-104,-38,-122,22,15,-18,27,9,47,-58,-20,102,-63,49,85,-71,65,-57,24,-78,-19,27,-113,-112,-48,108,81,-96,99,-9,109,-121,2,-127,122,-47,-67,89,-45,-17,-29,-59,44,-81,55,37,18,40,-11,-69,27,-39,5,-82,-97,0,61,-45,11,-70,31,-104,-3,-98,114,-67,21,-88,117,46,104,115,75,49,18,95,-8,-17,24,55,22,-97,114,31,11,10,-63,-76,39,57,-46,-62,34,68,42,-94,-109,-60,-41,-66,-86,26,-65,-67,124,97,59,118,55,-50,103,-25,-99,-77,55,-104,16,-50,51,-13,-28,91,53,-17,-82,24,73,-54,24,36,-63,-108,-121,-120,-61,118,77,-122,51,-88,104,-31,-115,14,118,29,101,22,76,59,-92,63,122,-66,-48,-7,30,-15,-30,-41,11,2,91,-5,86,75,-110,-87,71,9,18,101,-51,-17,-43,-83,37,-42,-86,-102,-115,106,-108,14,-41,34,65,57,-13,93,-89,25,-69,54,15,12,114,-99,-104,-36,-48,19,-101,-105,-51,51,-112,93,-2,69,122,24,-26,-14,-83,95,-43,77,20,-7,-29,-111,8,115,-102,-67,-97,107,79,46,112,115,-58,-20,-88,98,-30,90,25,75,-47,110,3,-8,94,70,47,22,-103,51,72,58,-12,7,-50,-91,-54,37,27,-38,-50,-112,31,-14,-76,118,30,-109,48,-123,33,70,-95,-2,-7,-111,-75,32,-89,-47,-6,49,112,73,-7,-65,-76,25,67,111,76,-29,-93,8,-95,45,-79,15,-56,23,-96,-58,85,83,84,-70,7,20,-52,106,122,-96,-84,23,33,-101,35,20,73,8,85,112,-86,-30,-14,-93,-30,-8,-39,-89,-27,-36,-107,48,127,-79,-77,49,103,-38,-112,31,-22,68,100,118,-43,57,74,-76,-127,-35,99,101,105,-26,85,-93,44,-1,68,11,85,93,13,-99,-85,39,12,-51,44,-33,-78,12,-63,98,-92,-67,-109,25,-86,64,-58,-5,76,-64,31,-68,-121,-90,126,52,20,-128,-28,120,-117,82,113,-41,27,-128,-39,-86,71,-102,59,30,78,74,94,103,-95,56,41,-128,30,113,46,-11,117,-96,48,-85,-28,30,76,104,-73,101,-89,-25,-79,-22,-103,3,2,83,34,2,-26,-20,52,-82,18,36,90,127,25,13,-21,8,-3,-38,112,-85,-79,-32,26,-72,15,-94,-5,-92,9,-4,-26,98,-26,112,69,-21,-84,-105,-102,-112,46,-60,99,31,-17,3,15,-83,-24,-123,-6,-47,-120,35,-100,125,35,96,-33,22,70,5,89,86,38,64,-55,29,55,126,-125,17,52,113,53,-82,-3,62,-80,89,104,34,77,83,-65,-4,89,2,-114,51,43,-28,-27,-94,-41,68,-37,-85,-36,93,74,-120,-63,109,-70,102,36,-93,-8,44,77,-92,114,50,88,16,99,-67,-9,64,-43,-64,53,19,-9,-70,89,-57,-81,114,-99,5,87,-100,-101,66,75,-120,-70,-31,74,85,-44,-37,108,-32,92,80,-16,123,100,-102,99,-38,102,30,112,-89,102,96,-6,-90,-80,-9,9,2,-40,-114,-128,46,119,52,-47,87,-41,-81,-112,-15,-107,79,15,45,-88,108,-22,19,27,105,-53,82,59,72,36,118,123,-93,-44,99,-8,-98,105,33,76,-46,93,-110,-51,64,-80,-58,-103,87,26,-4,-54,-93,83,70,20,-13,76,-52,21,-13,127,-93,-7,19,102,17,23,41,14,93,76,7,94,54,-81,67,-52,-61,-23,-92,9,-127,-125,99,-128,88,63,-118,110,-24,-76,-53,123,-79,-65,71,59,55,22,-64,-111,48,25,-79,-45,-102,-78,-85,-53,-67,100,0,72,-71,98,56,-6,-46,40,30,19,-42,127,-54,40,58,34,-6,21,-78,12,2,-42,58,-44,-112,-113,-55,62,-14,-25,-127,-40,85,-80,-72,8,29,-27,73,-36,-32,-21,34,-46,84,75,-123,72,-41,-92,41,-12,41,109,106,47,123,20,-73,-38,117,44,69,-119,-102,49,-97,9,-89,-128,-53,60,-65,-43,-39,-118,-33,28,-41,58,-41,111,-25,110,-58,105,90,20,70,39,-21,50,-114,-104,26,-98,96,-16,74,-85,-68,-35,-80,63,58,98,119,21,-124,118,-77,-11,-125,23,-101,-9,8,-61,92,-28,-112,30,-57,93,-49,32,-48,92,87,-96,-29,52,103,-97,-27,57,116,77,-25,-107,-77,114,-96,47,-79,-58,8,-72,-50,99,-113,-80,24,-19,-83,69,-6,92,-5,-115,17,21,-28,-43,55,39,-60,-55,76,-127,40,-43,106,-35,-6,-79,25,19,-59,121,112,-57,-111,4,80,-39,-77,-103,-89,-113,-38,43,61,-125,41,-105,-127,28,-33,124,-50,58,69,2,99,-31,-88,-83,-21,90,-56,-49,83,-119,113,56,38,92,61,-74,-2,101,-73,-53,26,-95,32,119,-23,-114,-7,116,114,-52,49,81,-88,-102,76,-73,50,38,5,-63,-49,-126,69,-124,-47,-13,-53,11,-42,-97,46,83,29,112,41,125,35,46,58,-17,-43,-2,-5,-34,-96,49,29,-13,-80,-82,-112,13,67,-17,84,96,38,81,49,65,117,23,-97,-60,49,-43,-34,-74,52,3,93,-93,-26,-88,-54,5,-113,-73,123,4,-95,17,103,-41,64,23,-90,-35,50,-112,16,26,-104,-119,-41,5,95,60,-31,58,109,-71,-26,-118,28,-71,-126,-93,-50,30,85,71,-31,-92,-48,-65,-48,-51,-52,112,-2,-75,74,-24,41,121,-20,97,122,-49,-73,55,104,-95,38,23,-83,119,-22,-118,45,-37,-105,55,-122,-4,52,34,25,47,37,102,89,125,-12,7,85,-6,-92,107,13,97,117,60,15,17,79,-16,18,20,-80,-3,-23,-70,-125,-81,52,105,88,-111,81,124,-40,28,-36,-44,-57,-96,-49,-5,1,77,-37,-73,-107,-79,18,71,-124,-70,32,53,33,-83,-34,43,59,71,-55,-53,78,33,-125,20,-97,44,15,59,80,-20,65,-72,93,88,23,-3,-44,117,68,-125,64,123,-30,-89,126,59,38,32,-31,-27,125,98,12,-43,-5,40,-59,98,124,-104,125,-48,-74,62,-104,35,73,19,-8,60,43,-6,-62,47,-3,100,37,-125,-100,49,14,20,-15,76,29,-125,95,-74,-85,-56,8,58,70,94,-60,-112,-37,-50,73,78,19,23,-56,82,37,22,92,-40,63,-49,116,113,41,-11,-5,46,-123,45,27,82,106,102,24,85,60,-108,63,-67,53,-126,124,114,-14,-108,64,-6,-27,-19,-101,102,-68,93,-45,-4,69,-109,-27,112,-111,-64,93,-36,-128,-78,-16,-79,-4,-117,-8,-40,87,-79,-62,-51,123,70,-39,-94,-91,15,18,11,-82,100,-104,-59,13,42,98,-51,110,102,-76,40,71,117,-81,-120,-120,79,-17,44,-128,-51,-41,-48,76,123,-20,-44,111,71,-41,-86,123,5,80,124,55,73,-76,-32,21,5,-43,-65,34,-46,-55,-108,-24,111,110,59,-128,59,58,116,-86,-34,85,-61,-111,45,-125,-47,-37,79,48,-56,102,-96,-94,-90,-127,-17,-109,-95,-52,16,-77,40,108,-85,-93,10,-25,-94,31,-59,-2,95,-26,-28,-88,120,30,-69,123,42,90,67,123,86,-24,-9,116,12,81,-92,88,-86,10,-77,104,-75,-119,-43,63,-95,-16,54,-111,-3,-54,-7,-96,112,-68,68,-113,-88,3,-37,-40,55,80,-128,62,-32,-13,74,-48,-21,-64,118,-78,19,-41,-75,-10,97,64,-126,-81,20,-79,-112,86,-20,127,56,125,-84,69,73,65,-53,101,118,-15,-30,-62,52,105,-59,-54,-87,-48,99,-116,-120,-107,-40,87,87,-108,-19,49,71,-98,58,86,-125,-55,-31,-38,91,-76,77,-119,-62,52,123,23,85,120,49,122,-19,47,-83,86,-15,-69,-86,-118,-56,-121,21,-74,-82,119,-39,59,87,-45,-38,19,-67,-13,-91,-84,1,54,-96,-58,-122,100,-118,-97,73,94,20,23,-30,-4,-7,-72,-30,-38,22,-121,-36,-85,50,114,95,8,45,-85,-89,93,30,-105,35,-53,87,-41,93,117,17,-61,-61,-113,10,-52,-99,89,107,69,48,-27,80,-75,-104,119,-76,-30,125,-37,24,55,8,31,-14,75,122,13,33,-13,-37,98,101,-51,27,-49,85,-51,-15,18,92,24,37,-122,-30,110,83,-17,101,12,-54,111,-7,4,-82,90,-91,97,-99,29,-75,73,-46,106,45,68,68,-35,-28,99,-74,74,-70,-111,-63,21,-22,86,-122,-80,-93,50,14,-105,82,45,-41,102,-38,-9,-84,-94,-89,-18,-50,74,120,90,-17,52,-63,-83,-17,124,-118,43,-82,-80,123,-119,-106,75,98,0,-76,61,107,-72,80,-27,-70,-100,77,100,89,-18,-49,93,-52,-68,-46,103,-69,-9,13,-65,39,-89,49,-52,-88,-77,-29,-33,-119,-105,96,-128,5,86,55,-94,-43,29,48,109,73,-76,62,-11,-82,-32,122,-88,-16,29,-40,-69,-59,52,33,77,67,63,-89,-106,112,59,-67,38,-33,-115,-120,81,8,6,-92,69,87,107,40,9,9,-31,-68,-117,-81,-110,113,44,-62,-85,-23,77,-6,84,-126,80,-45,105,75,-62,-8,-63,58,-2,34,-48,38,107,-16,-82,-128,-47,-44,-113,-99,121,-29,-17,57,100,-23,12,-110,42,34,-64,-124,5,-13,105,-128,112,-4,100,123,13,-125,-7,117,86,53,-128,-87,-122,-60,-18,-77,117,-35,-81,-75,100,-124,116,-110,82,77,87,125,-100,-105,123,100,2,-4,29,-127,-49,-77,-54,-117,-110,-101,6,63,-103,122,76,-40,54,-86,53,-103,52,-3,-118,108,57,65,86,-106,-41,51,82,-44,92,-63,4,-99,17,4,68,15,22,-83,-126,65,16,105,76,80,96,34,63,-115,79,-115,-109,-50,-71,-61,-89,98,-123,32,-88,113,81,-29,92,-36,120,110,56,18,108,-31,34,-24,77,84,-8,25,-98,-4,-102,-33,90,76,76,-128,-104,-105,-65,10,101,22,-80,89,77,3,-62,29,-36,-85,-116,120,-44,-107,63,45,-125,-108,16,-29,-103,-38,-19,-126,113,30,1,31,-127,26,-18,-56,-85,47,32,102,-109,-6,-120,-121,-50,-121,-25,-7,-127,-34,55,-114,-69,-34,-6,-44,123,25,-34,82,101,-21,83,-2,33,-23,-108,-107,106,60,56,-30,8,25,-46,-46,-31,-78,38,108,4,124,12,29,21,-87,89,100,-116,-46,37,2,-53,109,40,-48,77,-60,-64,-68,121,-84,-109,-71,12,-118,122,-25,-73,80,28,62,-88,-89,109,106,-74,-64,89,58,-27,96,-74,-62,-110,-73,-65,-73,-87,-128,-122,-72,6,29,22,73,62,-99,54,42,31,-46,-37,-87,23,63,114,10,-63,76,68,-24,30,-86,-20,-43,-25,-12,15,124,-43,38,111,-121,119,39,-49,34,-32,27,69,-5,80,86,-42,-51,-74,-71,-24,73,87,-32,-11,53,-24,99,-25,74,-11,-115,104,117,-78,-7,-113,-99,-103,-10,-20,121,-9,-35,-76,112,111,-68,50,-9,96,-108,10,-38,94,103,-73,-64,116,99,2,-18,-22,22,90,-105,-68,-42,124,-122,90,-52,-43,-6,2,-22,-117,-119,52,-76,47,72,-84,-19,-85,-124,15,127,-115,36,-39,-109,92,13,-76,47,2,107,3,90,-24,1,102,26,-17,-27,-114,-112,-74,-29,-57,-108,-21,32,-104,76,-47,-17,-77,52,38,106,-68,-63,86,-86,67,-28,114,-81,23,-57,-110,-81,64,-1,-97,-29,-25,-24,95,-35,-118,-99,-96,-11,68,-118,-84,68,-1,12,-39,77,80,111,-113,94,-123,97,93,-80,-117,-52,5,-24,-108,70,-27,48,-21,123,5,-98,-28,63,-96,-37,23,67,-33,-96,-50,-124,47,-58,-109,-64,20,-37,44,-101,34,95,-62,-76,-57,39,-51,10,100,94,-37,-72,-4,-21,114,-21,113,45,122,-117,-77,47,-82,40,-68,27,43,-99,105,18,-15,-7,112,27,-110,47,83,-8,44,-50,-86,-37,64,-58,-53,1,14,18,-33,69,29,100,51,35,-44,-99,-17,-90,38,107,-58,-103,106,-49,-90,23,40,-76,-79,7,-106,84,107,-44,-58,-50,-21,-10,-47,34,91,-9,64,20,114,-11,-76,-105,23,113,58,44,-91,-62,-55,38,-101,121,-22,100,81,-55,94,-46,94,-125,78,43,-128,-101,118,-103,-36,81,-8,-66,90,-3,116,-90,48,45,-49,104,2,44,-69,-78,28,-65,-90,-54,103,-71,-62,70,15,-31,36,-81,14,-103,-35,-60,103,-13,127,-54,-32,-93,117,48,45,20,-89,-23,127,59,77,3,-84,-35,-27,44,87,60,-16,-112,-56,37,103,78,-115,11,-3,-44,45,61,121,-106,-104,88,-39,52,-112,-102,104,46,-67,102,-91,-77,-13,-79,24,-59,61,-90,-34,101,118,-52,-84,57,-5,46,-62,47,-66,-18,121,81,102,32,89,-78,122,28,12,-110,-123,-19,-38,8,-78,-94,22,83,111,-36,92,60,-2,44,-59,-43,-2,-66,-29,-71,92,-51,116,-78,-2,39,124,103,7,19,92,7,-66,-100,107,127,-115,80,-3,59,98,-95,-93,11,62,99,-126,-61,-74,109,-58,87,-24,100,122,96,-65,-71,-38,-118,113,21,-71,100,-103,-106,-23,72,0,-55,-105,-90,88,73,99,37,-68,-108,59,-41,82,119,76,-41,-62,94,110,53,67,68,-62,38,18,-37,-24,14,56,-41,-121,-84,13,48,50,-4,-17,110,-77,77,48,116,8,111,-80,-63,-4,112,19,-9,-127,88,-45,72,-85,63,64,-32,74,-61,77,-90,-75,125,-46,-15,-99,36,116,76,0,95,-86,79,14,-55,7,46,76,101,-115,67,-124,38,71,95,-70,18,-18,-35,-42,13,-104,8,98,77,51,-82,-26,-61,-66,2,44,114,-27,-61,-119,-70,26,2,27,99,-99,14,82,30,63,-88,-97,13,97,34,-47,-99,-44,65,-13,48,47,4,78,41,37,11,8,99,117,-29,-59,-94,-7,28,-125,32,-109,14,-61,45,11,101,47,84,-13,-58,-49,90,100,-94,77,19,12,-24,-91,54,112,-48,67,5,-86,-63,47,3,73,4,68,-26,-64,110,-79,-18,-96,105,-35,-36,-71,113,67,36,23,-14,48,68,-33,-5,6,82,-56,-20,29,8,56,39,-33,121,-11,-43,-78,28,-29,-101,116,-98,-76,-81,-72,97,-16,107,123,-89,-47,-84,-67,-77,-107,105,29,49,102,-113,-41,-18,-24,-112,-19,54,49,41,50,-25,84,15,87,61,20,63,-118,42,103,33,48,-48,-121,16,82,90,-13,6,-40,2,-74,-85,-68,-4,-14,-76,17,-101,81,-80,7,-117,-64,-54,21,-50,102,-2,99,21,-74,8,74,-36,-89,-75,2,28,-29,-105,53,126,85,-35,71,-118,2,-55,-84,2,9,-20,124,83,4,76,50,95,-104,45,81,88,-113,10,66,44,-110,122,73,-78,92,-85,5,3,17,30,-32,-127,26,-53,34,-75,81,54,7,96,9,-42,109,6,-15,-13,119,34,-126,-102,67,-70,116,9,-12,-88,19,-9,85,91,-26,103,39,92,116,88,-87,33,-43,120,-68,-87,-53,84,-99,-28,96,-59,3,48,12,-18,87,21,-88,86,-56,-36,63,33,-80,-97,-93,116,-36,-38,100,-65,-62,-87,66,-65,102,104,85,73,60,-96,77,103,-80,-70,-99,103,-6,-67,1,-1,-81,66,-80,93,17,-58,-44,90,63,-35,-59,39,-56,-49,83,71,29,-7,-111,92,-114,-75,-80,-54,56,-107,-7,-48,21,54,-124,-3,80,-49,-13,61,-115,-29,-60,-78,96,-105,-110,123,112,-68,126,-87,53,22,70,16,-40,-90,-74,82,-16,29,-70,-84,-47,14,-117,-3,52,23,64,-84,74,-37,6,-13,-57,108,87,-100,59,82,45,87,2,-39,52,57,-79,84,20,-65,-33,78,-96,-61,-61,63,34,37,-16,-19,12,101,-119,-97,27,-13,21,59,32,9,57,-124,127,6,-105,118,80,-31,89,98,76,83,56,85,27,102,16,-57,68,3,-26,5,-95,-77,23,-110,6,58,-21,-113,-78,26,90,-16,35,-23,46,58,-14,102,-117,80,-108,-47,10,83,-42,119,-49,-38,-58,25,-100,-80,40,-54,-122,-45,80,-85,-77,87,-2,-35,-94,-115,63,86,111,-75,-47,-114,-47,-35,-10,84,71,-111,101,123,43,-99,-22,106,95,-17,-94,111,96,10,-3,-89,104,71,22,-52,7,-99,-90,32,-11,106,-7,-112,78,99,-38,-81,-104,-30,30,-16,-110,30,-31,-125,-113,95,-19,-50,-86,-66,111,-50,26,-74,-66,109,4,70,-4,-14,-30,-78,-83,48,-105,-45,-2,-86,-2,102,118,-62,83,37,58,53,-112,89,46,-25,75,22,100,-66,49,95,-104,125,88,19,-76,-35,-40,-83,20,54,-106,116,101,39,-106,32,-82,61,-80,-52,-45,-86,39,103,-71,108,121,120,-126,-56,-24,71,52,70,117,9,5,110,-39,-56,-97,-79,77,71,-90,-97,3,-8,-64,-102,-99,-6,59,-100,115,112,-5,105,-7,85,-76,-65,14,118,65,10,23,24,68,69,68,-78,-60,116,13,40,-83,-118,-2,-43,79,96,-79,-7,-19,-56,-93,-47,-63,-5,96,19,19,94,31,30,22,43,61,121,61,-49,116,-17,89,-104,-41,32,29,-111,121,-109,-51,7,88,16,-80,-105,115,-25,51,-6,-61,91,-84,-41,69,-80,-12,-70,15,39,75,-38,68,40,45,80,-71,62,-22,111,-51,11,-9,44,29,-114,-27,112,105,-68,51,29,-105,68,-106,-95,-109,-13,-82,51,13,-51,-48,-103,54,-91,33,50,-29,17,-65,-46,123,108,-73,-120,123,-52,100,32,-110,-76,43,27,33,-43,-13,52,-79,-30,-86,109,41,0,103,39,10,-57,-90,49,106,-13,-28,-52,124,-15,10,74,52,83,91,-63,95,-23,-124,26,11,-44,114,-48,13,-57,114,-108,-60,99,39,27,-101,117,82,96,30,5,-34,29,-128,-74,-47,-33,-6,-35,-121,-112,-35,109,-118,-69,117,-80,-18,20,-102,24,-33,47,1,-117,101,4,74,-64,-5,-13,-57,-65,-127,25,-107,125,0,-78,27,61,-100,-1,-84,-29,-60,110,-17,-75,-19,-63,-56,-25,21,107,-83,-100,-33,-89,-48,-3,46,88,-121,-55,109,83,29,28,98,-64,92,-29,-65,-63,-26,47,-59,-73,4,65,-86,30,-111,1,-21,26,-88,77,-119,-1,-35,22,-109,-86,75,-54,113,-29,-95,24,-40,127,97,-77,-24,43,-85,69,80,-56,-32,61,125,-18,-105,19,9,65,-2,-18,9,90,2,27,127,10,-15,-57,-76,-37,11,-51,109,28,-55,-63,90,69,48,-13,17,2,-53,125,22,98,44,-96,-94,-116,79,12,-2,72,-11,44,65,88,64,-112,76,61,72,-103,-29,106,-123,-36,91,72,79,92,-24,78,-121,4,-93,74,-28,83,-109,-98,-43,-57,92,98,-23,92,-99,63,10,83,-39,94,50,79,-111,-32,-124,-19,-34,-26,56,60,-79,40,68,-72,91,115,-101,-73,-55,36,-85,3,-86,-73,-113,34,-83,-59,103,10,3,-98,53,-90,112,-114,-101,-1,46,58,-108,-77,-122,26,29,-87,52,51,25,-51,0,32,-61,13,57,67,-108,-50,97,-36,-67,8,117,-124,-59,28,95,-112,-86,-50,105,-54,-108,-111,10,124,53,-1,-127,-43,65,35,-42,-28,12,63,-92,-97,-71,22,-119,-47,-42,10,15,-50,-23,83,-24,-28,3,-42,114,98,120,13,20,69,123,-101,108,29,-36,-44,87,15,77,56,74,-89,-23,65,-12,19,54,66,-31,-16,79,-8,-43,111,-46,-48,-111,109,124,-17,-87,69,15,61,-28,108,118,43,-55,53,74,-102,-72,-58,-88,-54,83,-80,-38,56,116,-80,-66,117,-3,105,82,74,-125,-75,-120,-58,43,88,-5,6,78,-72,-42,4,85,-49,-55,88,-79,-51,90,-33,-100,123,127,60,-115,20,-19,-97,117,9,90,-32,-123,123,-98,-15,-75,122,92,94,-86,41,40,24,106,-60,-39,73,68,93,-91,-86,-41,-80,-120,-27,125,-87,91,-40,-41,-9,5,34,65,-123,-111,2,35,113,83,-66,114,-111,5,60,126,-93,-105,-35,90,57,-68,11,62,-117,-33,51,-52,-45,59,-43,117,36,69,-95,97,83,64,-62,-81,45,110,88,102,-125,1,-51,43,95,43,-22,107,-97,25,-12,-122,4,100,98,-64,94,-21,-37,45,-38,-104,119,64,-74,29,-123,-46,102,-2,-40,115,-31,-8,18,21,-115,27,-80,15,2,74,8,75,82,90,88,10,37,-99,-105,-82,77,110,-49,-104,-1,35,40,80,-97,24,99,-94,43,43,-63,-40,10,64,-3,20,40,-22,77,113,-71,-79,-82,-44,-53,-106,-95,110,-124,-121,25,23,86,104,-96,97,-27,-14,74,54,120,49,-67,-128,-9,-30,-33,72,107,-12,18,-60,21,-91,77,40,38,-12,111,7,-43,36,-15,33,-70,-108,14,-89,44,85,112,-85,-109,-123,-72,57,100,15,-124,-48,98,-111,60,-17,85,11,90,-105,7,-116,-10,91,-10,64,59,-107,-121,54,-128,-98,83,38,64,-25,36,46,20,-96,-108,-71,-1,-17,101,26,126,67,-89,0,77,32,-72,42,-11,44,-14,119,84,-31,-29,-21,95,-8,-74,123,-128,30,27,94,-51,38,-11,45,74,20,-74,-33,-115,-122,41,7,80,35,18,33,16,-6,95,-111,3,-30,-101,15,-59,-92,-69,-67,-86,28,-43,98,38,27,-111,-126,-34,40,68,83,106,-95,-26,86,-54,-102,-110,11,-122,40,-37,30,112,-88,38,-8,-46,46,81,90,-40,95,-61,-109,-110,-123,-44,127,-83,-73,77,81,-23,105,32,81,-55,77,62,115,32,-70,-62,-123,-33,-44,-33,-36,-96,4,52,86,127,86,38,-16,84,21,106,-12,17,43,53,-98,-80,-125,-69,-25,-70,-72,34,6,91,-119,48,22,0,-33,-115,-18,-19,42,-34,46,-92,-27,106,-113,7,78,44,-123,22,-116,35,14,18,50,-110,-112,113,-91,-51,28,109,-83,-51,86,73,-17,88,-64,-114,-19,30,-33,30,-1,-121,-109,86,-58,51,104,89,119,-76,-28,-90,-95,-100,30,-77,-23,-14,-99,55,69,-55,125,72,58,-112,39,67,54,-6,6,76,50,92,89,97,4,52,3,96,-47,-26,126,80,-80,-100,16,53,-119,-36,123,106,-76,67,53,5,58,-13,31,33,-67,111,-42,-16,7,-111,43,51,-27,48,-105,38,23,-110,-17,-12,-98,89,-66,-1,64,118,93,-75,-32,3,-93,-115,65,21,7,-25,126,59,45,-16,-26,14,50,2,107,-19,-110,-34,-107,75,-11,-109,19,-61,54,-115,-63,123,-39,98,125,-94,121,-16,-24,-11,2,77,102,90,-121,116,-55,109,68,6,52,-110,119,65,-119,-47,6,22,103,-121,-32,104,119,-38,-16,-100,49,-117,90,109,-90,124,-92,61,-115,-107,54,-72,93,27,-79,89,60,-26,-77,123,111,-124,-89,-54,-94,108,-119,55,78,-108,95,123,59,-49,42,36,-4,-28,-7,-99,-42,-100,106,59,-65,-24,-100,115,-6,91,-5,-93,32,-77,35,70,-90,-7,-74,77,-20,105,114,49,-6,40,-32,-91,76,-32,-126,-83,-81,84,-103,102,-69,-99,-127,87,113,80,-69,-108,-13,-29,-43,-11,-126,-113,-90,-22,-11,79,-107,77,119,-104,7,-64,62,26,77,-83,24,-90,115,-37,10,-22,-76,-13,52,-57,-52,-63,114,-38,94,-56,-96,78,74,-95,85,-82,99,-66,59,33,-113,-78,-97,10,50,4,32,102,5,-105,-76,-69,-72,-19,69,20,127,94,-57,-26,-117,-7,-38,24,126,-81,86,91,28,35,-91,59,-126,-39,9,-58,124,101,74,120,94,-40,14,-31,26,-5,-90,54,50,-56,-108,80,19,-37,-39,-45,-22,-107,37,53,38,-126,-117,9,-102,-104,83,-73,-125,90,-106,74,109,29,21,-76,-42,-51,-98,72,52,-45,-56,20,51,-1,122,91,-111,-106,-69,55,-108,-93,12,-18,123,11,-3,51,51,96,-100,91,35,62,70,-39,33,-64,-87,-51,-54,-87,15,-81,-125,-111,14,-109,126,126,-36,65,-34,46,-89,70,-119,-49,-122,-47,126,-87,88,-117,62,-89,29,-65,103,100,-107,119,-88,-117,25,-89,9,-36,56,79,9,-95,66,-5,54,-2,95,-124,-95,-93,-126,-9,-54,81,-106,21,69,122,105,-37,-124,98,-25,108,84,39,-9,-97,59,-25,-67,18,-42,3,-105,117,76,79,35,48,-76,-107,78,-75,3,-81,-61,30,-88,-19,101,-118,-67,76,-99,-99,-82,103,-94,112,-71,-105,-24,-91,-26,-110,90,120,62,-116,-20,83,75,41,-7,34,-77,23,109,107,94,-125,74,-78,26,-13,27,99,49,77,-73,100,-115,-36,0,88,123,-65,87,77,-108,-24,93,-23,-60,-63,-44,0,-96,88,-19,89,108,119,19,102,-103,123,69,85,-68,-99,89,11,-60,47,-106,97,-53,94,-56,116,52,-1,-68,6,-55,-107,-3,-9,-59,78,-21,-69,118,107,-105,-3,37,127,-37,18,-117,-79,-43,-108,76,64,-121,-25,-52,68,124,33,-2,27,52,-71,88,14,25,-115,92,110,-36,-16,-82,-21,57,30,-57,-105,63,-75,-72,30,113,-92,22,56,-77,-20,68,98,-20,-15,79,21,-25,106,115,71,32,20,48,15,112,38,-124,48,122,-70,115,47,62,105,-71,-41,-85,127,-35,-21,122,110,30,-70,-6,9,-103,122,-68,-45,42,68,9,83,93,117,110,8,-42,-82,13,105,-26,21,98,-42,27,110,-123,10,109,31,22,29,22,71,-98,-5,7,-91,-112,-32,-56,60,29,-126,92,-7,-64,-77,72,-20,4,63,-54,-128,74,-53,-92,6,-89,-20,-92,106,32,-94,-50,88,52,46,74,22,-119,-90,-69,107,8,3,13,96,-64,28,-59,58,55,-102,97,110,-106,74,83,-95,-49,-106,-26,-93,9,-19,20,-63,87,71,-28,-52,125,26,49,-73,-11,112,72,-117,-65,88,-33,21,14,121,-29,-74,-128,4,102,125,112,-49,12,118,-28,82,97,16,-82,-7,4,121,46,-71,28,85,50,78,63,-94,74,107,-59,-48,-24,76,-112,93,-47,-67,-32,119,84,108,122,-67,-113,-17,33,-63,74,52,23,-10,-96,27,-54,49,57,-103,-125,62,20,102,7,-20,-58,54,20,109,-18,-78,107,31,-85,5,-32,-90,-61,98,6,64,104,81,125,-100,51,125,104,56,126,24,50,22,23,-100,-128,-82,-86,109,-83,30,15,23,123,-89,14,-48,107,-61,-92,-65,-75,49,-82,-36,-124,-36,-12,10,0,-105,26,119,-55,-47,-37,-38,-17,48,101,120,-118,-92,-89,18,-14,-50,-72,112,-105,-41,-106,-114,-5,87,-100,-125,102,-7,126,-23,-25,71,-111,-11,123,50,57,-84,-66,-101,-76,-106,47,-23,39,-28,102,-65,103,32,-14,-125,82,34,28,-18,10,84,-109,79,32,-112,97,38,56,-36,104,68,-78,-80,93,-95,-70,-6,27,41,33,-120,125,90,-18,-97,30,-51,53,-79,-74,92,-33,-102,41,-72,4,-27,-102,28,-56,114,-117,126,121,8,-126,49,122,-105,-56,-127,-51,63,84,30,-76,-13,49,-112,57,3,127,-111,-45,53,41,-71,34,-85,22,-114,-34,38,97,52,-45,44,4,-111,-35,-98,-24,-53,42,74,22,-89,-19,-119,112,-21,-118,-86,119,71,-52,-88,26,52,35,126,21,-51,-110,4,-120,-107,65,117,-8,-72,47,-66,72,85,3,73,-89,-100,-36,-114,-97,87,72,-27,-111,116,19,71,-53,-68,-121,17,45,-83,-28,116,71,-3,-29,-60,-125,-55,-64,11,4,-123,53,42,-24,-37,104,-22,-2,-77,-122,-45,49,91,101,81,44,-72,-64,-100,-107,-51,-26,108,-4,118,-80,-75,-23,-11,-102,19,-18,-18,125,90,-91,102,8,-54,-35,-35,-84,41,-115,-99,30,21,6,24,102,-108,124,28,39,1,-39,9,26,-8,-9,114,-93,76,44,72,-72,-24,-57,127,-3,-58,16,-1,67,-41,29,36,-92,-31,-87,-124,-34,-23,15,-44,-38,-19,-87,-47,57,118,-2,8,51,121,-82,71,-14,-41,-84,-62,79,118,-20,-12,16,48,5,-127,17,-83,28,54,-95,-89,-97,3,-18,40,-21,45,115,124,15,89,-118,-125,-19,23,-58,-1,2,38,-18,-121,-48,81,39,19,-24,-64,127,-46,19,-16,80,-128,55,121,-43,-73,93,56,-37,123,-62,14,36,-127,42,-117,-43,-99,38,-19,-46,-112,-70,-128,24,-79,11,23,-34,-99,-121,-81,-110,88,54,-80,-51,51,83,10,-76,-53,-58,-35,-128,52,20,27,-109,119,24,51,-19,97,37,112,112,38,-65,84,120,67,-8,67,6,-104,-94,-103,118,-1,30,-94,-127,-50,78,10,58,-97,-95,-42,107,-41,21,-88,63,27,-55,-28,-67,-39,-23,-118,-108,91,-1,-9,16,-37,62,46,-80,-82,1,50,-29,-55,48,-41,78,-112,34,12,-53,123,41,-94,37,108,-16,-42,46,1,-123,-50,71,3,8,86,-39,-24,-82,-86,20,22,8,-72,51,119,114,-110,-55,115,-15,74,83,93,93,51,122,3,-125,28,14,59,41,-56,107,-17,-21,38,-59,71,-23,0,111,79,75,113,69,-48,-17,-110,38,-29,87,32,50,4,-41,-56,12,-27,-77,-87,-113,-4,-117,-99,-20,-61,115,-99,40,-99,2,29,26,119,-86,112,-95,-31,4,-21,-102,-53,94,-82,45,-65,75,116,-85,-17,-109,-111,23,-23,-110,1,-97,100,29,80,-90,93,-18,25,95,112,-22,72,74,3,77,-29,-48,-106,-117,94,9,95,97,-109,-104,-124,-94,-29,113,-1,66,33,-28,12,91,-88,-102,77,-16,-116,-65,95,-79,-107,-76,21,78,78,51,54,-51,-123,2,40,-105,14,-90,64,112,124,49,-124,71,-114,97,-3,3,-83,-105,-50,59,-63,94,35,73,120,-43,116,16,-91,-46,-18,123,-97,-26,84,-119,72,-117,-108,-21,-118,-84,75,34,-59,-108,-104,-26,-11,70,63,53,-81,-65,21,-63,-55,-108,-35,-125,-58,-115,-16,126,-72,7,0,-76,-13,-54,59,81,-118,-12,-67,121,5,27,-23,-6,-79,-125,-14,-19,-45,80,87,-56,-118,-85,-37,-43,72,71,-49,-22,116,-121,-90,-59,49,-91,31,46,-62,34,89,-4,12,23,40,26,-7,-54,120,-89,-37,-39,88,42,-18,12,34,67,123,61,-91,46,54,-38,-104,100,-75,74,-36,0,28,15,113,-44,25,-56,103,28,-16,-92,-100,-7,58,28,44,-75,-121,34,-113,38,-99,66,-2,45,17,-19,11,-45,41,-20,-122,-72,38,110,-58,6,64,-86,44,-73,-70,-45,-93,121,53,36,91,-41,52,17,43,-71,-90,14,110,97,-53,36,-75,-32,122,115,29,102,-88,-46,92,53,-39,20,-102,46,-91,117,-26,36,-108,55,-101,-120,85,82,14,101,-81,-26,115,-24,33,-47,18,-108,33,-18,-50,-46,-24,7,-125,-71,41,99,-66,-2,-14,-25,10,-112,-74,47,-43,10,126,117,53,104,-77,-57,-30,10,34,93,69,-116,65,24,81,90,88,115,89,-90,72,43,51,10,-37,55,-12,-4,40,123,-85,-90,123,8,13,109,105,112,64,-16,25,-83,44,-54,-109,99,-74,54,-82,104,-20,64,-37,-3,-17,-72,40,14,-64,89,36,107,124,-84,-74,60,-47,6,-98,-125,63,112,-41,-70,-62,115,-56,30,14,127,52,109,-38,27,-112,76,-65,114,78,26,-53,77,60,-107,-118,-120,24,-74,-96,48,29,49,-15,-9,-115,1,58,-21,104,-117,-91,-109,-89,-26,-84,82,36,116,121,52,-28,-50,-103,-87,-93,-103,93,-108,49,-39,37,-115,38,-37,-28,-2,-37,-26,19,11,-120,-68,14,-107,-49,-41,107,17,24,24,-100,6,-7,46,-122,102,35,-110,93,-53,98,-84,38,65,-8,-6,-99,13,23,-5,-4,24,7,44,86,66,-111,67,-65,19,9,-92,114,34,-26,-43,-61,-11,48,29,58,-57,5,-105,-33,77,0,-41,22,45,-51,-44,-99,20,-61,-49,-20,47,-29,-30,10,-11,104,99,21,-11,57,44,108,-84,122,-15,-67,-104,39,-71,-83,2,14,127,5,3,-87,98,23,-9,104,-110,-79,68,94,95,89,40,107,24,26,-97,77,-111,-100,112,-111,-97,-36,49,-69,-95,31,-96,-45,89,127,-1,31,85,-5,-53,-6,-9,114,-53,-69,-102,16,113,84,-6,62,-73,-15,-18,-44,68,-105,-36,127,12,-27,-28,-42,-86,93,-121,-19,67,51,-31,51,-119,-74,86,-111,32,73,35,18,-19,98,44,-82,-84,-84,-106,70,-45,-60,72,50,-67,-126,-5,-67,113,-89,-62,-23,28,11,38,-2,-14,52,-54,-110,-61,4,70,-35,118,-80,-46,-11,-100,-54,-100,0,39,-70,-124,49,-120,-69,102,39,44,-115,-49,-50,-102,65,59,16,90,69,53,-27,-113,20,-47,-115,-28,39,-19,-19,-114,75,59,127,-94,65,-54,-27,-115,-46,-85,-4,1,-43,127,-98,-21,-74,75,-67,-124,22,27,-42,-27,53,-45,127,36,59,-44,-23,-126,-59,-90,-83,86,99,-86,10,108,-99,-45,91,19,115,110,106,85,-83,-16,-33,122,-86,-120,-87,67,-4,-57,4,11,107,-58,-2,-128,-12,-111,-5,-53,-68,-91,95,-68,85,19,-40,-32,20,10,58,-65,-9,-36,-56,79,37,-64,-12,-33,88,123,94,-124,-62,67,-2,41,35,114,31,-116,-100,-32,86,-17,-81,67,-85,-3,14,45,5,-78,-87,-110,83,47,-65,-121,-120,-114,-9,-19,-7,-33,61,74,-40,26,-9,-21,106,63,-70,117,78,56,76,-121,-77,50,104,-125,-32,-117,80,14,87,30,-59,69,-101,43,-98,-11,-23,-10,125,52,97,-19,-56,-94,-108,-41,-119,-38,24,-42,25,65,-39,18,-126,-4,109,95,99,7,-102,13,96,110,74,-89,15,-3,6,73,61,35,-78,-83,98,106,72,116,-127,82,-15,54,-17,2,88,31,111,-37,-102,-24,69,-7,-57,-6,-62,-39,-79,103,74,113,65,117,-32,37,123,-5,59,-15,68,-121,-78,-65,94,120,104,60,5,117,61,4,-85,-88,-123,68,-65,-101,46,64,-80,69,-19,-57,97,-27,-47,54,84,104,44,-15,125,114,16,-23,-124,-100,-87,36,81,-34,-77,-73,95,-126,-120,-27,-20,29,66,-80,-64,77,105,-100,44,19,-80,-18,-27,27,-92,79,116,12,-18,-15,-71,45,116,-27,14,-4,-88,1,-110,51,-101,-14,-77,-120,60,-40,-26,108,-123,116,111,124,93,-74,87,121,62,-83,1,2,-64,-69,11,-45,-79,110,-55,67,53,27,-79,-74,98,-37,97,99,26,110,-91,43,9,-43,80,-64,20,60,-36,-79,-113,-103,-23,-31,-52,68,-112,-7,94,-30,73,-25,42,-111,87,-63,108,-100,55,-94,-13,-1,-29,-59,38,-16,-85,-80,-11,0,47,96,-110,-62,-17,12,-54,-90,116,-12,-6,-128,-31,-3,-102,103,-11,39,-67,-64,-109,0,64,58,-118,-18,93,95,-87,88,-31,102,104,-62,-36,-61,-105,-26,46,-53,93,-24,-10,-54,121,-22,29,117,-70,82,-124,-103,52,-122,84,-76,-64,7,-118,-6,52,-82,73,121,-65,108,64,80,-27,-44,81,-107,-88,-39,-68,-59,9,65,-73,84,-100,-82,26,-56,35,-66,-15,75,-44,51,-51,-65,-62,-84,-19,-31,51,78,-112,-73,100,82,93,-92,53,61,43,-66,5,-63,31,-69,-38,26,48,127,-30,24,-71,-67,-60,-49,-101,-26,-43,105,10,-127,-55,-37,116,38,-63,-109,3,-67,-42,78,-59,110,-103,-17,10,17,-89,-47,-47,62,-41,-51,-16,-31,-41,77,-122,15,94,-96,-8,68,37,116,61,-123,101,-122,-11,105,109,45,-94,-111,44,-52,-113,-74,-97,42,-99,114,105,122,87,-59,85,-89,11,120,21,-51,30,-109,-128,-10,120,-49,-75,-19,-79,-26,-32,-28,59,28,-44,-22,-113,64,-71,109,-84,-11,55,-55,-105,114,50,-71,-111,77,36,99,-100,80,-26,-64,118,54,42,-121,-128,56,-10,16,-105,30,93,19,-99,-75,-74,-50,85,36,-122,-84,-72,-20,-63,-23,-73,-53,-86,-118,-9,96,75,-39,96,59,90,-127,-106,42,-122,46,12,-18,29,-94,33,-84,108,94,-2,81,-58,-75,85,61,122,-43,22,101,45,94,-115,-100,2,-63,-128,106,-49,5,38,35,-8,110,-50,35,-114,-114,115,54,15,37,20,87,-76,84,-13,48,14,9,-99,-93,43,-55,-82,54,-58,32,-91,112,77,34,23,-40,62,-100,32,84,-3,-100,93,17,66,33,19,82,117,102,101,-33,112,-90,-9,114,-1,-66,-71,-103,-38,-86,-101,38,-89,41,-113,5,-40,45,68,89,123,-107,3,21,50,-75,58,-73,5,-67,-64,89,-117,-78,94,16,36,61,-124,45,51,-18,-18,-119,69,22,97,-55,112,23,88,119,65,-103,-62,-97,19,-15,-47,7,-109,-84,106,-5,73,-41,81,34,33,20,-46,-108,-109,-102,67,-116,81,67,-40,-9,-49,42,-67,-57,-33,-38,-89,10,121,-36,-113,61,28,-94,-67,-28,52,-84,-38,-96,117,-44,-110,-17,-116,-53,-53,-51,29,54,98,-76,18,104,124,10,-36,15,47,117,83,80,34,-62,102,108,91,-112,-116,87,74,-68,55,25,-34,-10,66,51,-47,-123,-67,-122,57,32,-96,-87,76,67,31,1,13,96,-64,-15,-125,-41,-124,-77,99,47,74,-16,36,67,108,3,105,-44,97,44,-53,-4,-9,-120,99,-55,-30,-122,14,8,40,86,-64,-34,118,-65,-23,106,-95,-26,114,89,97,71,-108,-59,-10,10,-60,61,-87,-19,-4,-28,-32,-126,-124,-123,109,120,-107,-1,35,-1,-36,55,-47,3,-17,121,31,103,118,79,127,-55,125,-80,25,-4,21,-32,-19,70,-95,-104,-2,-92,126,90,97,60,41,-78,-24,20,49,-33,-79,121,56,120,-102,-19,100,1,44,77,-8,113,74,-46,-127,-28,46,-64,-12,-13,-15,-105,84,22,86,37,-56,11,89,110,-83,-95,36,-40,-92,19,-17,76,-54,83,4,-107,127,-82,-25,-85,35,33,-111,-72,76,89,-123,107,-98,-96,95,59,75,-103,28,-35,52,-47,77,-76,87,-14,-27,-92,-45,117,67,-13,5,-56,75,-95,-116,-34,91,-81,-35,83,85,123,-43,-38,89,36,-80,10,-112,-73,104,117,43,-106,47,113,51,-53,-84,93,-84,-86,0,-82,36,-128,82,33,11,-118,-33,-6,-122,-64,98,81,-44,-49,-104,44,35,126,-20,-71,-73,-126,46,44,-17,67,-99,-74,-48,66,-38,-63,-62,-25,92,-61,-28,73,49,45,92,48,85,-91,105,-98,-95,-69,-26,-76,108,80,-30,-56,102,47,-70,89,-78,-31,-112,4,-1,6,-118,115,-85,60,-62,36,72,-17,-56,-92,-60,-104,-54,-53,49,-100,-2,-106,-115,24,-56,-106,85,33,54,-60,-8,44,47,5,114,-79,-77,44,-28,-120,41,90,42,74,-57,-90,-16,79,-67,-88,9,106,-81,-120,-57,83,-97,34,7,-107,-92,89,89,71,113,-78,-22,-59,40,33,-58,-32,-85,-50,58,96,-19,70,-31,-39,90,-21,118,66,-125,-104,-90,-42,25,98,-111,102,44,-4,-88,60,-62,79,-81,-35,-117,14,46,86,-47,6,-5,101,-12,-3,-93,43,42,32,-111,99,96,-120,112,-27,65,-6,89,105,-67,35,-41,57,-126,-98,-22,122,50,48,0,-54,-46,71,45,-125,81,101,-128,23,118,22,-29,7,-26,-95,117,-60,25,-126,74,86,-53,-8,-85,-86,-62,-28,124,-39,65,90,54,64,-77,-128,-1,-112,105,-77,-84,-40,123,53,-46,127,-124,13,-5,63,123,-31,-74,-36,-16,-83,101,-124,-24,13,-5,27,13,48,92,-98,-115,-98,-111,-10,-51,102,98,-81,-82,107,-1,-40,-115,97,109,-52,24,-46,109,50,40,-111,43,71,-70,-9,-1,-48,-23,110,-41,34,-13,108,37,45,-28,-4,-10,-50,121,16,-119,-72,-45,-86,18,9,-66,64,-36,33,5,126,48,93,19,11,-62,-13,-125,95,-116,-6,-61,125,-6,67,111,-4,19,2,82,18,48,-1,-54,-66,20,45,-103,15,94,-91,33,-15,-24,119,82,116,15,67,30,111,-106,90,80,124,-104,71,66,120,59,13,-20,-94,-124,65,108,-95,-80,16,-101,-38,-24,14,25,-69,108,83,90,98,-17,-96,-64,-89,-29,-30,-11,52,105,13,53,2,75,-101,99,105,88,-56,72,26,23,-13,122,-98,67,71,-29,87,7,3,-114,58,-122,-70,-9,126,-30,111,69,-16,56,11,103,94,29,-61,7,-32,23,-6,-6,-31,-63,-47,67,41,74,110,57,97,74,5,61,28,-65,43,54,-22,-115,-126,0,5,-29,-83,-3,-79,-54,86,-50,22,21,-93,116,34,68,77,-76,-55,85,-116,-31,44,-115,-34,84,64,-42,-102,-13,43,85,100,-60,44,-102,-54,120,81,-79,-104,103,59,107,-65,-69,89,-44,121,-24,-7,61,51,75,42,-28,70,-110,110,-102,76,117,-28,-67,-12,102,68,-81,18,121,-33,56,-19,-27,-124,-110,115,-46,108,-83,30,4,105,-9,-17,114,61,11,-97,-79,17,0,88,-86,101,7,14,58,-48,62,-42,121,39,-49,-100,-38,56,94,27,119,-20,7,26,-99,-78,64,120,87,-83,-105,108,-44,-56,76,-2,-117,26,21,-3,8,58,-118,-100,50,-13,65,81,-74,-14,-96,67,9,27,-122,-73,102,51,112,-60,-13,-15,127,-83,-40,-51,-81,-120,16,-7,100,-116,83,114,97,59,121,-53,56,-20,-72,55,-9,-39,-43,107,45,49,-102,-64,101,-54,59,-123,-70,106,-126,-75,62,-44,18,-110,-17,24,-44,18,-107,104,43,122,-19,57,-122,-113,25,-119,-40,-90,123,74,-35,-14,-100,102,-22,1,35,-86,107,109,-124,-51,56,-85,-16,-124,-65,-121,109,30,55,82,-23,-21,1,-78,-102,-75,67,-94,-60,46,0,62,37,6,12,-92,48,-104,-96,-39,-84,39,101,3,68,34,26,-110,91,60,25,2,103,-47,-67,77,46,-2,118,43,-85,-107,83,43,16,-71,-7,-55,-52,-23,-23,-82,57,-110,42,-102,-32,32,-70,-75,-14,116,-11,-128,31,-111,75,1,-123,116,-44,-85,71,33,-72,60,38,70,-72,93,114,78,-102,56,79,48,-15,-83,75,-6,-78,-90,-121,-127,112,-35,8,120,25,-92,-112,82,-37,119,-32,-35,58,11,-128,109,69,48,-30,77,-9,-42,-70,-107,-21,-23,-78,-81,30,64,-51,-8,106,95,-109,-123,-40,-78,122,-127,9,81,-15,-43,27,52,-8,88,37,-45,65,118,-92,-62,119,-109,-106,73,127,-96,-115,8,71,46,47,-107,24,53,-125,70,-40,89,115,15,-119,-64,115,-11,-103,41,54,-108,-20,6,104,-67,-8,95,102,-7,55,15,73,-123,-110,90,19,113,-53,-22,13,51,40,37,-83,-113,-103,34,59,-10,-121,-103,-61,87,-26,114,-25,88,-65,-79,-63,-11,113,-62,31,88,25,92,123,31,14,59,-87,23,35,-49,-83,-64,59,53,-72,-42,52,-21,-59,89,-104,109,-22,24,-60,62,3,-109,-1,-21,15,25,-37,91,7,65,-39,61,-117,-34,26,-2,-51,-48,25,24,-15,24,99,62,61,-55,36,50,-32,6,94,-25,-84,29,65,-95,-94,-85,117,86,-30,-81,69,-102,-53,65,-7,0,-66,-5,66,127,-108,-59,-82,-23,-75,-4,29,62,10,41,-55,58,9,123,99,55,-58,-99,-6,65,-128,-121,-70,-67,-28,11,122,-108,-18,-104,-68,78,103,-108,31,119,1,117,-22,61,121,64,-68,-68,-96,118,14,58,11,21,60,52,41,75,-54,-54,-26,-119,-66,-19,11,-126,62,76,-97,64,117,-64,-5,72,-115,-9,81,23,65,73,-87,-91,57,-48,90,54,-11,-121,-40,42,-53,-82,73,6,102,-104,-117,-1,-12,52,-56,59,12,0,70,-103,32,103,104,123,-75,-104,-123,-109,-44,-35,20,24,76,16,31,-50,-63,55,-116,35,-116,-29,16,109,-34,-68,-115,-39,74,-32,-43,-9,126,-56,32,-74,-46,-19,-82,-103,68,32,94,-29,53,-105,-115,-50,-121,17,105,-7,74,77,98,-23,4,37,-8,-103,45,-123,-68,-99,-80,62,-21,-58,-2,-95,5,-14,35,19,-65,-123,-5,58,35,-90,-53,-37,108,28,39,-21,17,24,34,-53,94,101,20,-38,70,-74,14,30,62,46,-61,94,125,-98,80,88,36,14,10,-121,-122,110,80,-127,-97,72,8,95,50,-48,-39,27,54,8,61,4,113,122,52,-124,-117,94,40,-69,-34,23,89,-56,-123,-97,-16,21,7,57,-87,-90,24,-80,63,-50,-118,-112,-94,-17,24,-32,11,76,-25,32,58,90,-4,-12,28,48,118,116,-112,107,61,-110,127,-38,-69,-62,55,92,-104,0,-46,-54,17,-39,53,54,-90,-69,72,-57,116,-32,33,-36,114,37,-70,121,-84,-67,-49,-95,-105,98,60,60,22,-41,55,-74,-7,-57,-51,-107,48,29,-102,-72,-35,79,71,31,48,65,78,-38,-5,-8,-113,122,76,107,112,-31,102,122,-83,90,-55,-128,101,77,-66,-62,111,126,-75,115,63,-118,52,-6,6,101,-55,76,32,68,-128,90,100,-109,98,-58,79,109,114,121,-77,-59,19,-52,95,-1,84,114,-52,56,-13,91,50,-114,67,-51,-94,-115,113,-58,-33,56,-92,-114,-126,80,-125,-29,-82,55,-120,44,22,-85,126,113,-92,91,-39,113,-81,-90,43,69,-59,63,-34,-5,-91,-21,-3,120,-126,127,43,-73,-13,-111,-99,73,37,66,113,55,-7,47,-46,110,-76,68,105,-76,126,-36,10,21,-80,13,94,10,100,108,-127,-117,21,-95,-79,93,7,-72,98,-15,-62,94,77,-124,25,-63,24,84,-99,28,-99,-117,115,-65,62,-40,85,-82,113,37,-125,13,-51,-96,70,31,26,-36,-5,57,43,44,-97,-27,2,-72,106,-15,-112,126,111,-31,-89,69,-106,-114,-111,1,-54,-66,76,56,-70,51,120,105,-56,-8,-92,-102,-104,40,-52,77,-30,-123,-71,76,48,-20,-93,76,53,-113,-16,18,-21,44,-107,-115,53,40,88,95,123,34,53,-28,21,47,82,-90,109,-114,-104,-108,-30,76,-58,73,7,22,-97,-96,89,-84,-47,-75,-62,110,25,42,-62,-46,-62,55,121,-128,-54,69,54,25,-75,-95,-100,87,88,-96,74,7,122,38,-103,-68,-83,-57,109,-34,51,18,95,89,120,-86,15,72,86,-84,101,66,85,-32,48,-104,-99,-92,27,43,76,41,-74,62,115,-5,-8,-14,76,-114,50,-77,-97,85,50,16,-36,-27,-99,-67,-109,16,-68,106,-52,-22,-112,122,-15,-31,126,23,121,16,18,63,64,64,76,23,54,-57,-75,97,-94,-55,87,72,-40,116,-64,-23,-94,-63,-13,-53,30,9,-72,11,-45,-105,62,59,110,20,-7,-90,11,-80,-27,44,28,46,45,57,35,-60,-56,29,-91,-42,115,5,126,10,-115,77,-65,-17,-67,34,12,-39,54,-119,-20,1,107,56,39,-102,108,-66,22,-75,14,-104,-127,-85,-76,-88,103,-94,-102,-87,-17,23,-95,33,-71,107,92,-96,61,75,-10,78,-33,-125,-72,121,-98,32,-14,-28,33,-96,-4,10,-65,61,87,-27,92,-43,110,7,-52,45,9,-71,100,-52,-70,19,45,106,-110,-74,91,-86,-52,-110,-66,58,114,-126,-27,-77,-63,-50,-65,49,-7,33,116,22,-124,67,-54,76,-115,37,64,-105,50,19,-126,19,32,124,-37,80,-93,81,86,-65,-21,-5,-48,-124,-23,-25,24,-79,-117,65,51,14,-77,16,97,80,-50,29,56,-23,87,96,-52,107,-106,2,55,102,-37,125,49,93,-116,13,61,-11,-23,-119,53,13,15,-86,-96,24,-73,-43,-39,15,112,0,19,76,79,-76,99,-29,111,-18,119,-66,-34,-127,90,38,34,63,3,111,31,-29,24,5,65,-95,-70,-15,86,-43,16,76,-127,-120,6,-39,83,97,-31,-99,126,21,-29,-117,-48,53,-57,38,56,-78,67,109,-92,72,-96,-88,36,-18,43,89,94,100,-37,121,112,-33,-69,49,20,112,-80,26,26,-42,-99,5,124,116,-42,-32,-118,-28,22,40,-76,-105,81,97,59,65,13,52,-104,-98,124,82,96,-99,-46,114,-83,-125,-36,81,8,-27,-74,-28,-61,64,-31,-81,-49,42,48,38,-115,12,-80,-86,62,36,-81,-46,93,68,83,-56,-52,-36,7,-8,-125,-80,38,123,122,-88,-85,-94,-81,5,-106,21,-112,45,-37,-120,-28,48,93,-99,-47,116,81,48,-85,-122,32,50,-67,-109,-14,-22,10,10,56,94,-120,78,-79,-20,74,-98,41,-30,110,50,86,11,65,51,43,-97,-31,74,91,-11,127,-86,-44,-24,119,-16,-66,-127,-30,-95,-64,-11,54,-73,87,45,24,109,98,61,76,109,126,28,114,-1,64,-103,122,24,45,-113,-32,-24,-28,-125,95,102,-7,109,-9,-28,-7,73,-41,-33,-25,111,-45,-101,63,-111,-48,-70,-113,33,-53,-32,-95,75,71,-40,28,-112,-106,-41,76,117,-94,81,19,40,85,96,125,36,-91,19,53,6,65,-9,-82,68,59,9,91,-25,-107,-34,65,-122,20,65,-67,-38,-106,121,125,-83,109,45,-103,-57,49,-42,-42,41,78,122,-31,-69,27,84,23,-116,3,-65,59,37,113,-101,-91,-51,-19,-28,-52,86,119,-29,-29,-104,-84,42,90,119,126,-32,37,-37,59,-113,125,11,-13,65,-21,-49,-80,60,90,4,58,-117,-84,106,-77,-114,7,69,-93,-22,-50,110,-46,125,78,-60,-59,-20,-42,-5,6,93,-124,-52,80,73,75,-105,-14,-58,-59,76,105,59,-46,-79,-81,-72,34,-8,-49,-96,-102,-47,-94,93,-100,69,-126,-115,-102,-103,91,77,-119,107,-86,-115,-68,83,-26,-42,73,-28,22,5,-85,-126,-43,-84,-54,100,-71,-104,-61,97,-128,38,88,-119,36,94,-84,107,87,41,112,-115,60,39,-55,1,-45,-114,-9,-111,-96,-105,-67,-103,-24,-80,88,95,-113,-91,90,-70,91,-113,-70,37,-105,-92,-20,82,81,-122,-83,-10,126,121,117,89,-2,-118,36,-6,118,-85,124,-5,-113,-21,-9,-45,-33,-103,65,122,124,87,58,88,-17,-43,54,94,-106,-30,-47,44,29,-10,-116,-59,41,54,-86,95,13,-116,106,72,55,101,98,-29,-103,-12,-12,-73,6,122,-106,-101,69,54,-93,-43,31,124,79,-72,-102,17,7,71,-44,92,37,127,54,28,-104,-7,-50,-74,-35,-125,-16,-119,28,-23,82,122,63,122,-38,-17,-44,14,-28,117,92,-90,26,88,-74,-41,-104,115,111,112,37,22,127,-9,31,-128,61,29,53,-3,58,78,92,66,-76,39,110,52,-27,-33,-125,-73,27,95,-96,-61,-125,114,47,-107,101,124,21,-16,80,-101,-47,44,63,-31,-99,-57,24,-113,37,18,121,102,-10,46,-24,-76,-71,-104,68,59,-124,112,123,-82,49,78,-17,-47,-83,121,91,2,102,-14,32,-30,-19,-3,67,117,-111,41,-92,26,-26,-50,-42,-74,97,-21,-72,18,-78,104,41,64,-111,122,108,43,-80,67,48,-45,-45,-19,105,-66,115,84,81,125,72,59,60,105,52,-36,-31,30,-64,28,-10,45,-74,11,38,40,70,-3,-46,-77,-70,-16,-118,-69,-114,98,-77,60,123,83,-102,115,7,100,109,-22,-48,-80,42,-127,-87,81,-77,8,57,-72,-41,103,-54,3,-54,105,-37,-41,-9,-16,118,80,-30,-87,22,71,-48,-38,-105,62,-90,-21,-41,-33,121,22,19,116,66,83,112,-39,-28,54,-84,31,-125,112,89,-81,-109,72,-108,-95,-1,-114,120,-73,110,-105,-107,-126,-93,8,-103,20,-55,65,122,-58,68,121,-97,61,-74,57,69,-65,1,-112,94,97,99,-122,100,46,7,-94,116,23,85,-111,83,79,-108,112,-102,106,-105,-87,-66,-128,39,24,-7,-72,-78,115,-51,99,-113,83,-90,-97,-8,89,-88,-114,79,28,56,113,-102,38,-5,-104,-76,-18,38,57,40,-67,-9,89,-8,-121,27,-25,-110,-93,-36,-10,123,-73,-111,-29,3,116,-20,16,-40,-18,87,-123,120,-68,-97,-97,-47,-94,114,113,-121,-111,-53,69,105,-81,77,92,-37,-25,-46,-18,-9,-86,54,46,-80,27,-101,108,-69,53,-109,-44,85,79,-46,-87,34,-30,85,-11,-61,101,-22,-17,-25,99,-65,-30,117,-89,-120,-23,-16,1,-94,12,-80,-29,64,54,106,-111,-75,82,-3,22,-46,11,-103,-63,12,68,120,-17,-117,-52,87,112,-123,-52,-121,105,-53,-55,101,60,-3,71,-122,52,-9,-125,-41,56,-1,85,15,-72,-29,70,-7,-103,-46,-112,127,34,11,4,48,114,56,-109,-32,86,11,89,-1,-80,-18,17,9,-55,-87,114,92,53,-4,42,86,22,57,-50,120,90,110,-90,15,67,-59,49,-46,-97,96,119,100,-80,64,-54,81,126,92,43,-90,-14,-47,-89,21,-17,-37,51,121,-73,-43,110,-54,-30,121,40,-34,85,52,-99,36,-9,-18,-51,91,-71,86,102,-116,95,-55,95,-35,74,118,101,-114,55,-108,-48,-60,-22,20,87,20,49,74,117,-76,-43,41,79,114,-28,83,-68,43,-128,-19,-96,-12,19,111,-44,126,102,-110,56,-77,-27,-14,17,-26,62,-107,71,89,-127,-37,-16,32,-34,126,110,74,107,126,85,8,80,29,104,6,30,-52,79,-74,-11,108,65,29,-107,62,-2,59,-123,71,-128,109,110,110,123,28,-68,-39,-20,-108,112,-32,-36,-12,98,-82,-57,38,-103,55,126,100,-5,89,-41,36,12,-16,99,118,71,-96,88,-92,113,88,-56,97,76,-77,117,60,46,0,23,-41,69,4,-5,-84,33,-3,45,31,38,-119,-20,96,-113,36,28,-38,-96,-23,-115,-50,-106,3,-9,85,-80,7,-19,-111,-120,-3,-107,116,-87,-115,101,92,5,-13,-9,53,1,-35,-125,-23,-107,-122,53,117,-10,-122,-89,19,-33,-32,69,-67,-69,75,-116,-35,107,-48,-74,109,-38,50,-69,43,-85,52,-107,18,83,115,-101,5,44,78,-7,99,105,-72,-39,62,31,27,-46,97,-117,-94,-69,-86,-124,-114,-30,-48,-126,-122,108,-59,-2,-19,49,-22,-29,-21,67,60,37,-75,-55,-22,56,47,15,-111,32,0,35,81,-18,108,41,-120,-20,125,-4,51,119,-115,0,122,78,77,95,-68,-9,109,59,-128,-8,11,-114,7,29,-56,79,-124,-80,-112,9,91,-32,11,-50,29,-115,18,-19,-6,-123,-15,-82,74,-6,15,-55,12,72,-62,12,43,-30,58,-30,2,-56,-100,1,82,-85,63,-17,26,-117,52,-90,-69,-61,-90,121,111,-18,60,7,-26,96,63,-92,5,-11,-52,-81,125,97,122,67,82,33,93,99,25,51,39,-71,110,28,-116,123,48,-68,-103,-9,-31,48,-2,-107,-64,-102,-107,92,-62,-100,83,127,41,58,-122,-7,113,-18,20,-82,-105,23,84,-120,10,-37,-82,11,46,62,-57,16,-58,-18,0,42,-95,-82,39,-105,-78,106,52,-51,36,-40,-3,98,-108,45,121,-59,76,73,19,124,-67,-45,20,76,-21,66,-56,46,-18,-39,90,0,-57,-42,-47,90,79,-120,79,103,34,59,-41,-67,94,125,88,-104,-30,25,-128,120,35,88,68,-48,-47,-99,66,-12,92,-42,46,-25,-10,55,118,125,20,114,67,-9,37,123,48,-84,79,-63,-23,43,119,82,76,-8,-21,-17,27,-108,97,-32,-119,-109,68,80,-9,53,95,-20,-71,41,-50,-57,-16,-4,17,39,-128,19,-113,9,30,-36,66,23,47,82,-76,-87,-35,-48,96,-4,-86,100,15,-58,-10,-1,83,-52,17,-102,37,-89,-33,-2,-23,60,122,-88,-13,-112,-47,-92,-52,28,-101,-99,92,-123,-108,77,101,102,44,-67,-88,-108,-43,118,-96,45,-48,84,-25,-9,59,86,-7,79,23,110,-74,-92,-67,50,-109,29,53,-57,-89,31,8,1,65,126,-119,73,9,-107,92,81,17,53,52,98,-126,111,22,15,-15,-110,-49,60,-82,-82,88,79,110,-113,-124,-127,-51,45,41,-87,-17,-95,-122,88,-48,64,-111,-55,62,-46,-91,116,-55,29,-36,75,95,-56,-100,-125,103,-115,-41,-29,-56,88,-81,-33,29,-127,-6,-90,77,-4,30,-81,-11,-121,30,-17,-10,-24,-124,109,67,126,-109,-57,34,-101,-9,112,25,126,-47,4,79,-38,117,-76,-43,56,-15,-86,85,-80,3,37,-120,39,-40,54,-70,26,-64,-45,-69,-53,19,70,24,-112,-78,-35,-120,69,-113,-97,-29,-53,-106,-74,-61,58,-21,-57,97,-97,-16,94,78,62,-121,-58,46,-38,35,35,-127,-17,30,2,54,30,117,-120,125,9,-20,-30,-44,-53,52,29,95,-66,122,60,-29,-113,68,-92,16,-110,10,102,54,-78,-120,-71,111,-52,107,9,-11,-9,81,-96,-37,-25,-77,39,111,28,0,-55,43,23,-98,-37,-123,-11,-42,-98,-97,102,106,69,-4,98,5,115,-121,-115,-94,-78,-69,-9,51,-84,-86,3,-104,11,34,-38,-113,29,-39,61,10,54,-116,65,-91,83,86,27,-44,-27,-108,-86,34,-40,99,-8,37,101,126,102,126,38,-14,-102,-52,-82,-56,-36,74,95,113,-115,-49,-66,-20,-123,20,-83,-37,96,-44,-55,-98,-1,75,-2,10,74,-55,107,87,41,-123,-90,-61,0,2,94,-63,-103,-85,-13,-107,98,78,-47,6,26,8,-39,36,-119,52,-21,-70,-40,72,117,115,-87,83,-57,-60,127,-78,-78,76,36,54,43,-25,127,19,98,125,-96,20,121,62,-126,13,-30,86,-110,97,124,-32,-104,6,-122,36,0,18,105,-48,-39,20,-105,55,-113,-114,-121,-83,9,-20,-23,-49,86,-48,-107,70,125,-114,-115,83,31,-23,121,-30,-67,48,-86,-90,-91,69,-79,-107,-77,99,21,83,54,-73,64,-60,88,-10,15,57,112,-85,-47,101,-78,7,-29,-128,120,-16,-96,-50,27,116,-128,-11,-35,84,-19,-33,-57,-73,18,49,-67,-15,41,15,36,41,15,9,33,4,39,27,101,-117,77,83,115,-60,-54,-82,46,-56,-18,100,-51,-41,-27,-25,-95,9,74,126,126,-81,-48,10,-60,85,99,80,27,108,-6,-16,77,44,46,114,-26,20,-69,15,28,-121,107,-59,125,-125,92,98,-61,84,-114,-87,-44,-13,116,-120,1,121,-84,-86,26,43,-55,94,-25,-80,-75,34,-97,-12,31,-58,-68,110,2,-109,-27,13,75,84,-21,92,12,-61,-117,36,21,107,22,-61,80,87,-115,29,-3,-125,41,75,45,-108,-29,33,-111,-4,25,-52,8,24,-74,-36,-22,-94,25,-7,97,-124,108,-114,12,3,-10,96,75,34,17,114,-32,84,84,12,-60,-88,-119,-41,41,-48,-11,-25,1,21,10,-71,-3,-16,96,-36,-14,-115,-14,-3,-83,6,-33,70,-18,-108,-81,-31,85,-91,-59,-80,81,36,11,19,74,-22,-80,61,8,57,-110,97,107,91,-40,-82,29,-95,122,-114,-102,-77,-28,111,122,46,-35,-102,123,83,18,-47,-24,-121,-120,114,-93,22,-66,65,113,77,86,82,115,-82,117,28,-78,76,27,79,-128,119,-10,-71,-31,11,-89,-82,-88,63,-99,94,87,124,76,-124,101,-53,-3,-119,9,-50,-29,92,58,-74,-51,57,-114,31,-75,113,-47,-103,4,12,-43,-100,-70,27,40,-81,-36,-26,-12,-102,-118,-88,50,-73,-57,124,-94,122,70,-87,28,-113,-126,100,-1,4,62,7,-91,-91,44,-90,-56,102,-32,30,100,-102,-47,24,34,118,-99,-98,36,113,117,3,-126,-84,97,-73,-124,11,-46,-18,-15,72,-38,24,-47,-4,-65,-73,-86,-112,-37,-125,109,-50,112,72,88,-97,20,-29,-43,-2,-48,121,94,58,103,52,51,-16,-116,94,119,-101,64,48,51,-70,-106,-62,41,82,-66,78,-113,106,71,-105,-44,111,-78,71,115,-50,-111,-46,33,88,-67,-58,-123,4,-82,-34,22,-40,120,-28,-18,-52,10,-15,-109,11,-106,125,-126,-31,94,-89,84,-94,-62,-6,98,62,-50,-78,-34,12,104,50,-39,-11,-60,43,12,-18,36,-62,-58,-36,43,-118,-88,78,-35,-62,-14,-104,-124,-68,21,-18,52,102,18,87,98,-2,-78,29,37,80,25,-106,-99,-86,74,127,6,-31,86,112,35,3,121,-126,-78,114,77,-51,-85,-24,70,7,-109,-25,-58,120,10,-20,26,-100,-18,120,-127,-78,-23,14,8,-116,42,-75,79,44,119,103,102,69,22,26,60,-58,28,-70,-104,25,25,124,3,-15,-44,93,87,-23,-8,-15,-11,10,7,9,120,-68,125,-79,-70,15,115,-75,-90,-5,127,108,108,-66,-122,74,-82,-14,-100,4,58,-106,-96,-65,1,11,102,-41,66,-117,55,-8,6,-69,-72,75,76,16,78,59,-2,-10,-42,-72,-1,-31,-100,113,26,-66,48,-4,103,57,71,-94,-2,14,-28,-36,22,-8,-25,39,-51,25,99,91,70,63,11,-124,69,46,-34,-21,99,-70,-110,-90,32,116,34,-74,82,43,-104,-56,31,-117,-43,67,12,-72,115,-84,-62,-9,21,-30,105,82,94,86,12,40,-47,-39,40,-114,-67,-89,-72,-64,-62,-124,-105,32,95,-124,-41,-14,48,26,8,-116,-57,24,-45,-45,-75,-40,-111,-118,107,116,66,-97,-57,-79,-96,-85,-55,49,-55,-32,-87,-76,-12,42,-85,85,-16,75,-41,-112,49,-29,-28,-124,-10,-60,62,-2,-112,15,-36,-33,81,-95,117,120,51,99,-64,30,11,106,-21,-42,43,-59,51,117,12,45,3,-116,110,88,104,60,67,102,-74,108,80,-58,-108,28,38,-108,16,63,100,-24,-36,-1,70,97,7,32,118,-112,-122,-31,-36,106,10,115,-89,35,58,-15,-5,63,19,-123,-99,-11,-94,108,-18,-13,70,-12,-1,126,-15,-9,-25,113,111,66,-59,81,-88,-114,97,-121,-76,16,8,72,62,3,-107,106,-43,92,-91,63,60,-90,-61,96,-9,93,-24,-17,-22,38,-24,29,-27,-36,-25,117,99,-10,76,66,-77,-71,33,-87,100,48,-13,-122,-49,56,-104,72,72,-84,103,72,115,-10,45,19,-22,52,-97,-77,-107,50,-81,-93,-79,102,-71,46,73,6,-21,-52,5,-96,32,112,15,-44,-4,110,5,-26,-85,89,-87,35,73,-17,59,-95,-5,-123,94,127,-83,9,-122,-64,-58,-72,-111,33,-91,-82,56,63,1,6,-67,-106,-55,26,-12,-105,-32,115,-38,-95,118,117,67,-17,95,99,120,-75,2,28,-113,-105,117,-15,111,22,-46,116,25,-91,40,44,84,37,-4,-66,-125,15,69,-14,49,-12,-11,87,-68,20,91,110,117,125,-65,-34,-36,84,-29,-87,-27,60,-66,-118,-125,49,69,81,54,7,-119,53,-23,-60,-9,22,-116,-125,-58}
+
+#define IP4_q7_q15_WEIGHT {18,-44,-12,78,104,61,-34,92,-120,40,-75,-19,29,-56,-80,21,60,107,-92,-118,58,94,-104,47,62,11,106,-105,-6,-32,-20,24,43,-116,43,48,53,-50,-86,-38,-108,0,-80,-73,-5,-26,115,111,78,-101,76,-55,94,-61,39,118,94,-20,13,-81,100,-111,70,94,-125,71,63,-121,-70,-14,-69,-74,54,60,-121,107,-121,51,-106,-38,-61,110,26,103,-43,-116,94,111,60,-28,-125,88,83,62,120,-39,-79,-85,112,34,121,-121,-93,97,-45,-90,-97,12,-97,109,90,-45,-59,-105,-100,-21,0,-122,-26,-37,28,-10,35,-115,-87,-62,6,108,-15,118,26,-84,-26,-74,1,73,-41,97,-65,86,94,34,67,59,-99,-67,106,-80,-26,-21,-71,-20,115,-43,109,-107,-21,37,64,-2,-20,115,-75,108,53,-102,35,45,83,-49,-106,-59,-46,121,-102,-41,51,22,-55,19,-58,-116,-103,80,25,122,-126,-76,-7,-2,-34,110,15,82,-46,-16,15,-52,-19,-39,-73,93,62,67,117,62,-27,-12,-89,-100,-15,-57,59,-127,20,52,-37,-41,-79,-43,111,99,-31,13,-12,99,43,-1,-31,124,43,-15,-30,-69,120,-79,-36,-89,-19,89,46,54,116,-46,49,85,94,67,113,24,11,-59,-17,-119,119,110,-57,-1,-81,77,32,-38,118,-13,113,-94,-53,111,110,-14,-19,-53,4,-20,117,-35,121,-97,24,119,18,108,-31,54,30,-121,-74,16,101,3,65,107,-12,14,-38,-53,125,-59,60,17,52,-65,21,-118,76,-112,91,106,-38,26,98,-4,-53,-108,-63,95,-58,19,63,111,-74,37,73,63,-115,-44,-84,22,-47,60,-51,9,29,-57,22,81,-87,-65,-27,-63,-93,110,63,-26,-126,7,-12,-118,-127,-70,-113,45,107,-69,103,-48,56,55,25,-55,79,111,113,120,-2,108,43,-122,-41,40,93,44,88,-78,107,-34,124,63,122,-67,29,24,14,-69,-72,108,67,26,116,90,88,-48,93,-37,-103,127,-24,-76,115,-80,-97,96,-61,-54,-22,-123,-14,-49,62,-1,-17,21,-65,10,116,113,10,88,30,-24,-119,89,-95,58,124,-112,-119,-115,88,119,57,68,-17,-27,31,-9,-64,-26,18,109,-60,59,4,-89,-127,-35,8,-90,88,22,-76,109,-123,88,-51,-90,18,45,25,47,-80,-66,75,-24,-109,-42,-47,68,-8,78,-98,-122,19,-72,33,94,2,-84,-109,82,102,55,71,-121,19,76,76,93,66,-23,-42,-2,40,106,3,123,-111,83,8,105,117,-52,121,2,-4,-18,-4,-19,-125,80,38,83,25,123,-64,47,36,29,105,-71,-72,-41,-127,-82,31,-43,3,9,73,91,124,-3,-99,101,-27,77,-51,60,-96,15,74,35,54,-119,116,-4,53,46,-29,2,8,93,75,38,-18,49,40,-30,30,22,97,-8,97,-35,-111,-62,21,97,-96,82,-12,28,-118,-12,87,29,-16,110,46,8,95,40,58,41,29,-58,105,-108,-29,36,-117,106,-118,-124,11,60,84,-87,-83,21,53,125,-31,-5,114,93,-75,-41,-127,49,-98,31,96,-112,64,60,-126,69,2,-73,94,-100,-23,81,-115,94,-116,-25,-44,91,46,-89,12,75,-47,107,-77,-10,-82,79,-70,75,-106,-1,62,-69,104,-7,-41,53,73,-32,74,-113,26,111,-115,66,-55,20,-91,-47,7,51,-96,121,126,-75,63,-23,81,14,-124,-39,-41,-13,14,16,-27,-56,-48,-84,-43,120,33,98,41,26,-6,15,18,8,31,-50,-9,121,-107,-33,-106,-46,64,127,-19,-104,-59,-30,86,-121,60,39,-79,-38,-5,-119,85,-17,21,44,-120,-22,89,73,-17,-102,49,-73,26,-69,91,-36,-71,103,63,125,-8,61,103,-20,-116,11,105,15,-116,-78,-122,-62,-80,-80,-58,-119,65,-47,99,-111,-26,69,87,-15,-38,-44,-87,-84,-14,-37,-27,-90,109,-72,-4,38,-110,82,-97,29,-50,61,52,-87,-44,8,63,92,83,109,-124,69,-47,-110,-70,-10,111,25,15,80,104,66,32,-16,-70,-49,-52,-41,-16,122,104,-31,22,-109,18,102,62,125,-123,121,74,5,92,-90,-92,72,-61,-2,98,-125,-81,109,101,-120,60,10,58,53,94,-25,38,-56,-13,80,-80,-13,45,-43,-77,-44,-37,46,-62,38,-103,-93,-124,48,76,1,-82,73,74,63,67,-59,-26,116,76,66,70,-30,-113,106,109,75,25,-18,25,85,25,-83,81,-50,78,99,-53,-68,-125,44,-104,-44,96,-126,124,112,33,-75,-29,-60,-9,-126,-84,-61,-119,-127,-6,-26,-46,-57,118,-4,105,21,-120,-121,54,-35,-70,-124,-101,-79,-33,105,-30,57,-108,-111,-48,-65,-108,77,41,112,111,68,118,0,22,44,110,56,-91,-111,-49,62,-54,83,78,66,38,-14,102,41,52,-94,14,106,105,27,24,53,-40,60,-70,-119,56,68,-95,69,59,-124,-101,-25,-119,102,-45,-55,-38,57,61,104,-96,122,88,99,-122,106,77,122,33,-5,126,-74,46,-52,116,-51,-101,74,74,2,-3,-38,-21,68,-30,96,17,71,-124,47,-23,64,-35,107,24,49,41,-50,-23,88,19,-30,55,-91,3,-14,-54,125,10,-96,84,100,100,-116,67,-40,-124,53,2,-62,45,21,72,82,10,-126,-47,54,-84,13,-50,-2,-66,103,-1,96,-17,59,123,-111,-61,-20,-70,-57,54,-110,-94,-125,3,14,-101,-128,-86,-44,80,-94,37,123,113,-104,-9,109,-87,111,120,-7,33,-62,-51,49,-57,-71,3,-49,18,-94,-32,40,-92,-52,3,105,52,108,123,1,40,2,-86,-104,38,52,-93,-73,-44,-62,91,5,-88,-91,-61,-40,-24,-30,-48,114,-115,62,-128,-93,-85,-43,104,102,-20,-103,-52,25,-56,-103,49,10,-25,84,-52,-94,51,-110,26,1,-108,30,32,126,-23,-112,-82,-102,86,-17,-108,78,-32,32,80,-112,-125,91,8,24,-69,-95,-86,-115,-73,14,9,-121,-2,101,-109,1,-72,54,84,25,-36,95,-49,-110,108,4,24,66,126,-63,56,99,-8,-10,-80,5,-73,72,-103,-35,-10,78,3,-61,42,-83,-115,84,-99,78,20,-66,30,-88,97,-66,-120,120,-46,-57,-29,118,15,-110,-94,-29,25,113,89,-110,-52,-92,90,105,-30,92,48,-44,-1,-96,-39,118,115,-3,37,15,-1,64,-2,81,57,24,-47,-14,89,48,-103,-127,-95,-114,-100,14,-69,-32,-82,-9,-77,33,-38,-76,-63,51,-32,69,-8,-75,26,80,59,-31,101,40,-37,76,-23,-110,-23,-84,-83,111,-31,122,124,-56,-67,4,-112,-123,65,101,67,12,-23,-43,-12,54,-87,66,35,-89,-47,55,-105,100,19,21,-80,-76,-85,-61,-117,19,107,42,-71,86,-9,33,-80,-65,120,-49,106,77,-34,-50,-38,-27,21,65,-28,97,108,42,-77,120,69,127,24,-20,89,-66,112,-126,-110,43,103,0,-63,-17,28,36,-43,-117,-68,115,-69,107,70,2,94,9,95,-83,-99,53,47,80,-105,-27,28,119,59,95,82,-94,-16,15,-49,-122,16,17,-89,64,-6,4,88,21,47,50,-78,-25,121,-47,-36,72,-21,29,-101,9,-83,-113,28,-68,23,-67,115,-101,-101,-98,102,-124,-98,-24,-89,82,-28,-89,40,125,23,97,83,-53,-7,-90,-108,-83,-113,-58,-26,-119,28,35,97,-74,6,-40,-15,-10,11,79,-98,101,101,8,-72,-99,117,-65,80,127,95,60,15,-29,2,60,-92,-118,-116,79,46,-79,-62,104,-43,73,107,-43,117,-127,-67,44,113,-41,67,-73,-98,26,74,-111,59,79,45,-60,21,-26,18,54,-72,-70,-30,114,10,-82,-124,-52,-126,-97,108,-19,120,-111,-52,10,102,18,99,49,-128,-17,91,83,-46,-76,-3,45,-41,47,-72,-19,3,112,-104,14,122,-77,-35,121,-23,41,-123,-60,-2,50,44,-45,84,69,-58,43,-69,-98,-11,112,-17,-95,-36,67,-69,-52,-11,98,-45,-126,-33,51,81,101,-38,68,67,-37,-78,107,12,105,75,-109,-100,-55,0,45,11,-24,3,-70,54,77,-63,52,125,93,-16,-97,-22,35,97,46,58,-61,66,-61,-98,12,-43,-45,-63,-36,-79,-58,41,54,-49,-63,48,-33,-110,-36,-49,93,73,-33,-78,50,-76,-48,-6,4,-87,-81,-88,-30,-33,10,-109,104,-94,38,94,-124,30,102,6,37,97,73,56,-106,-18,70,84,4,-31,-90,-27,54,63,10,50,-18,-113,-116,125,-86,-119,33,64,26,-128,-77,-25,76,-127,0,-79,60,-65,-63,5,-5,101,69,-91,-49,67,121,71,-22,59,26,-87,66,-26,-79,7,-73,-51,-114,0,-22,40,-87,-115,29,-18,-72,-23,-96,-55,69,-119,68,-102,124,-99,16,74,5,-34,87,120,-6,-28,-92,-111,-85,-42,-36,123,-52,-86,83,-77,43,-15,124,59,103,-81,96,-80,0,41,-62,-22,77,-13,-99,71,104,-121,72,43,4,107,80,-62,-98,54,-63,-13,10,-92,-119,-95,-90,-76,76,78,-108,95,-117,122,88,-115,52,-10,122,26,39,101,12,-80,107,-108,-13,36,-72,36,63,82,119,-57,-7,-44,77,-55,-54,-25,102,-118,-91,-93,58,11,-30,11,80,-62,111,-77,3,105,-63,39,-50,-33,29,-6,52,-98,51,-80,-5,-50,93,-122,116,-77,79,-45,110,-103,-123,-20,-16,-58,-101,93,-11,57,44,24,-60,-118,32,64,80,3,107,-25,60,126,-90,124,-22,-95,-57,-91,83,-46,-28,1,78,-47,15,74,42,26,42,113,-76,14,33,20,-93,37,89,107,-22,16,-16,23,60,108,74,-117,111,52,-97,78,53,-127,9,123,-78,-15,86,-17,5,-17,28,-120,-76,69,-76,13,120,-64,-17,-35,20,-98,-42,126,-88,-99,-113,10,44,84,-35,115,18,81,99,2,-82,74,12,-125,110,55,31,-110,-94,23,-4,62,-62,-122,40,-120,42,110,84,34,2,-3,-75,-24,-10,124,-46,-38,-14,-11,57,109,27,111,-99,6,27,126,41,72,-29,106,96,-24,96,60,42,-18,-104,82,-69,53,15,92,127,-79,-70,-102,102,-53,79,32,-119,84,115,-36,-84,7,-24,2,-77,103,54,60,-7,1,-64,-7,114,-22,-5,19,-49,80,107,-7,89,-2,-63,-26,-51,-111,17,-108,9,-40,-51,58,108,-55,-68,-117,-51,99,-117,-17,-33,46,69,13,4,-23,-71,-110,-95,4,119,103,31,-30,23,76,-36,39,6,-117,6,76,80,106,-124,18,-3,78,3,112,40,23,-100,-55,75,-118,-52,-16,18,69,-91,-77,126,-87,103,41,-127,7,106,105,77,-23,50,72,75,-16,126,-19,112,67,-102,-4,-56,53,-72,38,-60,-69,0,30,47,-95,53,100,-127,-16,-16,-18,29,46,90,73,-112,-97,-15,-111,-38,23,45,44,115,-93,-32,-68,-10,86,69,19,32,-104,97,-112,60,64,61,87,69,55,-4,-92,-77,-28,-82,76,56,123,-105,52,-38,-1,80,81,-40,-14,115,-78,32,-59,-115,-123,50,3,-14,69,5,-39,-124,70,34,61,-57,-35,34,127,-13,-120,109,-108,-22,68,-125,81,35,89,-21,88,107,87,-32,110,-19,-27,-82,-114,99,-81,115,-54,90,-92,65,-126,64,26,-114,36,-93,70,10,-94,-90,-111,118,-45,-121,-3,106,80,-101,10,-25,-12,39,-72,114,47,125,43,33,88,-81,-109,10,98,-98,28,105,96,-43,123,-58,-115,-88,-122,85,-80,91,26,-26,103,-121,-88,-66,101,-88,87,125,20,-62,-58,-46,-113,-36,-100,93,79,-108,33,49,-45,-19,0,70,103,-19,-48,-15,29,40,122,121,118,86,102,-83,111,-26,-86,-124,6,49,86,50,-67,-28,-104,-28,35,42,52,-25,-87,-70,-6,18,126,-128,123,-3,-109,-94,-49,-120,-62,-89,62,-107,94,109,110,10,-37,99,-126,-116,-85,100,113,-19,-52,-101,65,-45,93,96,-49,-78,84,-44,28,5,-110,-26,-48,62,127,-53,49,57,67,127,-85,60,120,-96,-67,107,34,91,-60,-6,-80,-77,-8,-119,50,-52,89,-64,96,127,-60,-76,-34,-52,-1,34,-25,99,100,-94,-46,-47,12,47,-47,45,-14,59,3,-85,-74,-49,103,-6,-79,-1,-25,-2,0,-44,-29,6,-11,108,-23,91,-48,56,75,-71,-77,-46,-100,-100,-98,90,-29,-35,-56,-3,54,-62,-126,124,1,-26,-88,4,101,-113,95,-67,75,104,39,-106,68,-127,127,-15,-36,23,-12,-51,-118,-67,-22,-39,-71,52,-77,104,9,10,-106,53,34,-67,-98,-74,84,87,95,38,-35,-38,-103,-125,-124,41,-31,3,-89,-107,-41,-9,-90,-58,-39,83,-106,-24,-86,-93,18,14,23,36,-56,75,-36,-123,10,109,7,13,-119,80,113,-68,45,57,35,32,-17,28,-1,-98,52,-37,6,-97,118,-119,48,-69,-102,-18,37,-4,-59,15,101,91,40,3,-31,5,-9,105,-9,-33,-31,-71,-7,-112,-71,70,-2,98,46,-99,73,42,-77,-38,53,48,-1,76,-120,-33,-62,117,-35,67,-117,58,33,2,-127,-66,-100,-117,-82,115,91,-111,33,-125,24,-89,76,15,84,27,-5,49,-87,-72,-35,-49,-128,114,65,-71,82,127,100,74,41,-63,52,-67,0,8,117,5,-102,123,87,8,-37,36,126,-108,71,-73,20,-76,104,-71,-50,-56,18,8,-62,-105,-52,-127,41,-26,16,-122,31,70,11,-100,-109,-35,117,88,29,-78,-45,115,-86,40,102,18,-58,-84,-54,32,-36,51,56,52,107,38,126,78,-66,20,-77,65,-119,26,-113,85,-92,-35,-67,-24,-47,43,-9,62,-70,-41,-66,-7,-72,-79,-77,56,75,67,49,65,43,-78,102,113,98,-47,53,20,-116,-2,-4,-12,-36,8,50,-118,-79,-37,-120,4,103,51,62,107,-90,49,79,-17,61,36,-15,17,-117,123,39,-87,61,96,11,-108,1,51,53,36,-19,-69,-51,-40,-91,-90,127,-62,126,-72,79,-61,123,-27,41,11,14,-67,76,-17,-70,47,-104,73,32,-109,-120,61,38,-1,31,-37,35,-26,-21,59,-53,18,-85,75,106,-83,93,-31,-18,18,-127,19,66,10,-74,-25,45,-109,18,30,4,-62,13,-47,13,44,-59,-96,19,-113,-18,65,-5,91,-75,-21,68,46,-90,25,-110,-115,1,-88,-91,13,55,86,24,85,-60,108,93,-61,27,-14,28,-17,-110,-18,68,113,70,-52,58,52,-9,111,-64,64,-97,-100,0,32,43,-88,13,0,-32,110,-104,108,92,66,-112,34,65,-64,-125,-9,106,113,-116,-35,91,-88,-91,13,-16,-117,3,121,37,-84,-75,-44,-1,-49,13,81,-77,46,113,15,-115,-37,21,33,-17,-19,-83,27,-95,28,83,22,53,-23,66,-57,-25,-15,-56,106,69,49,63,125,-120,106,-86,40,55,4,-96,43,-26,60,-107,-76,-116,-89,101,98,51,-21,106,53,-49,110,83,-119,27,36,2,86,-5,-50,47,42,-75,52,-59,-71,63,-67,60,6,83,65,124,28,16,14,63,52,-58,23,30,49,-81,-123,-26,-39,42,60,-27,-66,-61,-18,-88,-46,-22,-61,-60,66,65,-100,111,100,116,50,92,-83,103,111,-72,116,-5,111,72,101,39,54,-65,8,-44,-128,-88,18,113,-70,-78,87,-70,29,112,63,-31,9,12,-27,-109,-42,-52,-48,55,-70,95,93,-71,122,-46,-115,53,-22,-27,125,125,50,-58,21,-50,-71,9,-82,-6,45,50,-14,51,-74,-72,95,104,-86,57,65,-39,6,-10,-76,21,-52,127,17,-128,-36,-23,103,87,24,-95,10,95,95,21,-96,61,-24,-8,74,0,126,-14,-44,-102,107,-119,-123,83,51,27,-17,-64,124,24,79,-96,118,43,-95,8,-75,-106,115,-84,69,3,122,-118,-64,96,-106,-29,-78,-97,122,-82,51,14,65,-80,121,-66,74,-119,121,82,77,-120,96,-82,106,56,-45,-28,78,-116,-70,-13,41,90,-77,-55,-49,-78,91,-109,-91,-36,97,-31,27,95,-91,-116,-17,-21,87,112,-51,-82,62,-42,111,64,106,68,53,92,-68,-38,-25,-55,-38,-121,5,74,-96,-77,-109,-14,-87,75,-108,-62,12,-97,-91,93,42,24,-45,-5,79,126,-71,-10,-97,97,-19,6,-80,77,-111,39,-69,42,-61,-123,-30,-78,18,64,77,-99,-40,82,127,-39,66,46,46,-82,-117,-70,77,-17,96,27,10,56,83,16,22,114,24,114,-89,118,116,-84,19,-88,16,80,-25,66,-70,111,70,-86,10,-88,-1,80,-95,-82,95,-20,-114,-121,26,-15,-77,-104,-120,-7,123,97,68,69,59,-12,24,-20,46,100,75,-76,-41,-23,79,82,-115,-3,44,-69,-100,-55,95,81,-125,-108,-121,-46,-112,-48,-22,-10,-60,-40,112,22,89,79,-99,53,48,-54,-110,16,77,-51,94,59,-50,-103,-10,34,60,-115,84,31,-55,-58,-10,64,-5,23,112,96,75,85,4,-106,55,-77,-33,87,-79,-76,53,71,-92,-8,63,118,-84,-60,99,107,88,46,-89,24,98,-41,-36,-22,-88,34,-23,78,56,84,52,-14,123,60,-20,38,-66,-56,67,-80,-6,117,115,121,-126,39,-77,-8,22,89,29,-101,29,55,-31,-108,125,123,-46,6,-88,103,-35,25,65,-58,-118,40,26,-39,62,15,77,-25,-50,117,79,44,-79,64,94,-114,-31,-26,-10,-67,-114,-19,24,69,111,14,-52,-33,110,50,-107,95,63,-71,-21,36,-22,-7,19,-95,-71,-38,124,-88,47,120,22,98,-69,73,-114,-5,-18,106,-102,-41,-26,28,-101,-41,-105,-31,-26,-120,22,-21,-44,-31,-50,-127,85,88,111,33,-114,-53,-12,71,126,53,-55,82,-104,93,-77,41,46,-50,90,54,-38,-28,-128,-68,-13,-80,34,-63,60,31,-81,40,77,55,-5,-17,-110,94,30,96,61,26,43,-48,101,-128,13,-8,-29,-6,-60,115,107,-62,-57,54,13,96,114,-89,-69,36,-40,106,107,98,19,-28,14,-4,-97,-60,-64,-71,-107,-48,-50,75,-54,90,108,60,-101,-104,92,25,-60,-17,-63,48,103,113,59,24,51,32,-101,-26,121,71,-83,-21,-68,79,42,-115,5,89,65,-38,28,-91,4,22,89,7,122,-57,-51,-120,-110,-58,-42,-70,102,105,-112,33,21,-83,-14,62,123,-116,-55,-114,-110,95,-46,76,-6,-12,-88,-48,49,-126,-67,95,42,-94,76,84,-64,-112,-20,114,-8,9,-96,-38,-85,-38,72,55,127,7,117,54,41,-52,-89,-46,-121,-95,-97,-113,95,46,79,-105,36,96,62,111,89,-38,-97,61,120,24,90,-111,43,-69,48,88,-58,25,-89,55,14,26,121,-126,79,42,56,-43,109,-88,-53,31,-114,69,-1,-81,-50,94,35,20,62,-93,69,-96,-35,120,-103,-86,-44,126,-96,102,12,54,-97,-79,-49,97,-18,80,-111,-68,-17,39,102,87,6,-10,2,11,-89,-74,-43,-104,-9,53,28,-68,-126,-71,-26,66,34,102,-36,32,-96,-83,-127,87,83,-50,-98,-60,71,-81,-97,108,-74,50,-98,20,-9,75,-48,8,0,124,74,-27,-59,1,118,-121,52,-57,112,15,81,120,-66,-10,42,87,-89,-92,-123,-1,-74,-29,126,57,31,-50,115,-47,-89,-20,-107,51,28,49,110,38,-37,-73,-72,-70,-20,-124,-109,67,-114,7,64,32,101,-76,-107,52,-109,-89,51,-51,-98,-3,122,100,-2,-57,34,-38,-101,22,15,92,-104,9,47,-9,47,-18,27,-38,-122,-58,-20,102,-63,-78,-19,-71,65,-112,-48,49,85,27,-113,-57,24,108,81,-96,99,-47,-67,-121,2,-17,-29,-9,109,89,-45,-127,122,-59,44,-81,55,-39,5,40,-11,0,61,37,18,-82,-97,-69,27,-45,11,-70,31,-88,117,-98,114,115,75,-104,-3,46,104,-67,21,49,18,95,-8,31,11,55,22,-76,39,-17,24,10,-63,-97,114,57,-46,-62,34,-66,-86,-94,-109,-67,124,68,42,26,-65,-60,-41,97,59,118,55,-104,16,-25,-99,-13,-28,-50,103,-50,51,-77,55,91,53,-17,-82,-108,-121,-54,24,118,77,24,73,-120,-61,36,-63,-122,51,-88,104,22,76,14,118,63,122,-31,-115,59,-92,29,101,-66,-48,-7,30,-5,86,-41,11,-87,71,-15,-30,75,-110,2,91,9,18,101,-51,-102,-115,-83,37,14,-41,-17,-43,106,-108,-42,-86,34,65,57,-13,12,114,25,-69,-36,-48,93,-89,-99,-104,54,15,19,-101,-105,-51,24,-26,93,-2,95,-43,51,-112,-14,-83,69,122,77,20,-7,-29,107,79,115,-102,115,-58,-111,8,46,112,-67,-97,-20,-88,98,-30,75,-47,90,25,110,3,-8,94,70,47,22,-103,-91,-54,58,-12,-38,-50,51,72,37,27,7,-50,-112,31,-14,-76,70,-95,-109,48,-111,-75,118,30,-2,-7,-123,33,32,-89,-47,-6,25,67,73,-7,-29,-93,49,112,111,76,-65,-76,8,-95,45,-79,83,84,23,-96,20,-52,15,-56,-70,7,-58,85,106,122,-96,-84,8,85,-101,35,-30,-14,23,33,112,-86,20,73,-93,-30,-8,-39,-79,-77,-36,-107,-38,-112,-89,-27,49,103,48,127,31,-22,68,100,-35,99,57,74,-26,85,118,-43,101,105,-76,-127,-93,44,-1,68,39,12,93,13,-33,-78,11,85,-51,44,-99,-85,12,-63,98,-92,-5,76,25,-86,-68,-121,-67,-109,-64,31,64,-58,-90,126,52,20,-41,27,120,-117,-86,71,-128,-28,-128,-39,82,113,-102,59,30,78,-128,30,103,-95,-11,117,74,94,113,46,56,41,-96,48,-85,-28,-25,-79,104,-73,3,2,30,76,-22,-103,101,-89,83,34,2,-26,127,25,-82,18,8,-3,-20,52,13,-21,36,90,-38,112,-85,-79,-92,9,-72,15,98,-26,-32,26,-4,-26,-94,-5,112,69,-21,-84,31,-17,-112,46,-83,-24,-105,-102,3,15,-60,99,-123,-6,-47,-120,22,70,125,35,86,38,35,-100,5,89,96,-33,64,-55,29,55,-82,-3,17,52,89,104,126,-125,62,-80,113,53,34,77,83,-65,-28,-27,2,-114,68,-37,-4,89,-94,-41,51,43,-85,-36,93,74,-93,-8,109,-70,-92,114,-120,-63,44,77,102,36,50,88,16,99,19,-9,64,-43,-57,-81,-67,-9,-70,89,-64,53,114,-99,5,87,-31,74,66,75,-37,108,-100,-101,85,-44,-120,-70,-32,92,80,-16,30,112,-102,99,96,-6,123,100,-89,102,-38,102,-90,-80,-9,9,52,-47,-114,-128,-81,-112,2,-40,87,-41,46,119,-15,-107,79,15,105,-53,108,-22,72,36,45,-88,82,59,19,27,118,123,-93,-44,-46,93,-98,105,64,-80,99,-8,-110,-51,33,76,-58,-103,87,26,-13,76,-93,83,-13,127,-4,-54,-52,21,70,20,-93,-7,19,102,7,94,41,14,67,-52,17,23,54,-81,93,76,-61,-23,-92,9,-118,110,99,-128,-53,123,-127,-125,-24,-76,88,63,-79,-65,71,59,-79,-45,-64,-111,-85,-53,55,22,-102,-78,48,25,-67,100,0,72,30,19,56,-6,-54,40,-71,98,-42,127,-46,40,58,34,-6,21,-112,-113,2,-42,-14,-25,-78,12,-55,62,58,-44,-127,-40,85,-80,29,-27,-72,8,73,-36,-32,-21,34,-46,84,75,41,109,-41,-92,123,20,-123,72,106,47,41,-12,-73,-38,117,44,-89,-128,-102,49,-65,-43,69,-119,-53,60,-97,9,-39,-118,-33,28,-58,105,-41,111,70,39,-41,58,90,20,-25,110,-21,50,-114,-104,-68,-35,96,-16,58,98,26,-98,-80,63,74,-85,119,21,-124,118,8,-61,-125,23,-112,30,-77,-11,92,-28,-101,-9,-57,93,-49,32,103,-97,87,-96,116,77,-48,92,-27,57,-29,52,-25,-107,-77,114,-50,99,-79,-58,24,-19,-96,47,-113,-80,8,-72,-83,69,-6,92,55,39,17,21,76,-127,-5,-115,-60,-55,-28,-43,40,-43,106,-35,112,-57,25,19,80,-39,-6,-79,-111,4,-59,121,-77,-103,-89,-113,-127,28,61,-125,-50,58,-38,43,-33,124,41,-105,69,2,99,-31,83,-119,-21,90,38,92,-88,-83,113,56,-56,-49,61,-74,-2,101,-23,-114,26,-95,114,-52,-73,-53,-7,116,32,119,49,81,-88,-102,-49,-126,50,38,-47,-13,76,-73,69,-124,5,-63,-53,11,-42,-97,35,46,29,112,-43,-2,46,83,58,-17,41,125,-5,-34,-96,49,67,-17,-80,-82,38,81,29,-13,84,96,-112,13,49,65,117,23,52,3,49,-43,-26,-88,-97,-60,93,-93,-34,-74,-54,5,-113,-73,64,23,-95,17,50,-112,123,4,-90,-35,103,-41,16,26,-104,-119,109,-71,95,60,28,-71,-41,5,-26,-118,-31,58,-126,-93,-50,30,-48,-51,-31,-92,-2,-75,85,71,-52,112,-48,-65,74,-24,41,121,104,-95,122,-49,-83,119,-20,97,38,23,-73,55,-22,-118,45,-37,25,47,-122,-4,89,125,-105,55,37,102,52,34,-12,7,85,-6,15,17,13,97,18,20,-92,107,79,-16,117,60,-80,-3,-23,-70,81,124,52,105,-36,-44,-125,-81,-40,28,88,-111,-57,-96,-49,-5,18,71,-37,-73,32,53,1,77,-124,-70,-107,-79,33,-83,-34,43,-125,20,-55,-53,15,59,59,71,-97,44,78,33,80,-20,65,-72,68,-125,23,-3,-30,-89,93,88,64,123,-44,117,126,59,38,32,-5,40,125,98,124,-104,-31,-27,-59,98,12,-43,125,-48,-74,62,43,-6,73,19,-3,100,-104,35,-62,47,-8,60,37,-125,-100,49,95,-74,-15,76,8,58,14,20,-85,-56,29,-125,70,94,-60,-112,-56,82,73,78,92,-40,-37,-50,37,22,19,23,63,-49,116,113,27,82,-5,46,24,85,41,-11,106,102,-123,45,60,-108,63,-67,124,114,53,-126,-14,-108,64,-6,-27,-19,-101,102,-27,112,-45,-4,93,-36,-68,93,-111,-64,69,-109,-128,-78,-16,-79,-62,-51,-8,-40,-39,-94,-4,-117,123,70,87,-79,-91,15,18,11,98,-51,-104,-59,-76,40,-82,100,110,102,13,42,71,117,-81,-120,-41,-48,-17,44,-20,-44,-120,79,76,123,-128,-51,111,71,-41,-86,-76,-32,80,124,-43,-65,123,5,21,5,55,73,34,-46,-55,-108,58,116,110,59,85,-61,-24,111,-86,-34,-128,59,-111,45,-125,-47,-94,-90,48,-56,-109,-95,-37,79,-127,-17,102,-96,-52,16,-77,40,31,-59,-93,10,-26,-28,108,-85,-2,95,-25,-94,-88,120,30,-69,-24,-9,90,67,81,-92,123,42,116,12,123,86,88,-86,10,-77,-16,54,-119,-43,-54,-7,104,-75,-111,-3,63,-95,-96,112,-68,68,80,-128,3,-37,-13,74,-113,-88,62,-32,-40,55,-48,-21,-64,118,64,-126,-41,-75,-79,-112,-78,19,-81,20,-10,97,86,-20,127,56,101,118,69,73,-62,52,125,-84,-15,-30,65,-53,105,-59,-54,-87,87,87,-116,-120,49,71,-48,99,-108,-19,-107,-40,-98,58,86,-125,-119,-62,-38,91,23,85,-55,-31,52,123,-76,77,120,49,122,-19,-118,-56,86,-15,-74,-82,47,-83,-121,21,-69,-86,119,-39,59,87,-84,1,19,-67,-58,-122,-45,-38,54,-96,-13,-91,100,-118,-97,73,-72,-30,23,-30,-121,-36,94,20,-38,22,-4,-7,-85,50,114,95,-105,35,-85,-89,-41,93,8,45,-53,87,93,30,117,17,-61,-61,69,48,-52,-99,-75,-104,-113,10,-27,80,89,107,119,-76,-30,125,75,122,55,8,-13,-37,-37,24,13,33,31,-14,98,101,-51,27,24,37,-51,-15,110,83,-49,85,-122,-30,18,92,-17,101,12,-54,97,-99,4,-82,73,-46,111,-7,29,-75,90,-91,106,45,68,68,-111,-63,99,-74,86,-122,-35,-28,21,-22,74,-70,-80,-93,50,14,-9,-84,45,-41,-18,-50,-105,82,-94,-89,102,-38,74,120,90,-17,43,-82,-83,-17,-119,-106,52,-63,-80,123,124,-118,75,98,0,-76,-100,77,-72,80,-18,-49,61,107,100,89,-27,-70,93,-52,-68,-46,-89,49,-9,13,-77,-29,103,-69,-52,-88,-65,39,-33,-119,-105,96,29,48,86,55,-76,62,-128,5,109,73,-94,-43,-11,-82,-32,122,52,33,29,-40,63,-89,-88,-16,77,67,-69,-59,-106,112,59,-67,6,-92,-115,-120,107,40,38,-33,69,87,81,8,9,9,-31,-68,-110,113,-117,-81,44,-62,-85,-23,77,-6,84,-126,-63,58,105,75,-48,38,80,-45,-2,34,-62,-8,107,-16,-82,-128,-17,57,-113,-99,12,-110,-47,-44,100,-23,121,-29,42,34,-64,-124,100,123,105,-128,-7,117,5,-13,13,-125,112,-4,86,53,-128,-87,-81,-75,-18,-77,116,-110,-122,-60,100,-124,117,-35,82,77,87,125,29,-127,123,100,-54,-117,-100,-105,-49,-77,2,-4,-110,-101,6,63,53,-103,76,-40,-118,108,-103,122,52,-3,54,-86,57,65,86,-106,4,-99,82,-44,68,15,-41,51,17,4,92,-63,22,-83,-126,65,63,-115,76,80,-109,-50,16,105,79,-115,96,34,-71,-61,-89,98,92,-36,-88,113,56,18,-123,32,120,110,81,-29,108,-31,34,-24,-102,-33,-8,25,76,-128,77,84,90,76,-98,-4,-104,-105,-65,10,-62,29,-80,89,-116,120,101,22,-36,-85,77,3,-44,-107,63,45,-19,-126,16,-29,1,31,-125,-108,113,30,-103,-38,-127,26,-18,-56,-120,-121,32,102,-25,-7,-85,47,-50,-121,-109,-6,-127,-34,55,-114,-34,82,-6,-44,83,-2,-69,-34,101,-21,123,25,33,-23,-108,-107,-46,-46,56,-30,38,108,106,60,-31,-78,8,25,4,124,12,29,37,2,89,100,40,-48,21,-87,-53,109,-116,-46,77,-60,-64,-68,122,-25,-109,-71,28,62,121,-84,-73,80,12,-118,-88,-89,109,106,-74,-62,89,58,-65,-73,-74,-64,-110,-73,-27,96,-87,-128,-122,-72,54,42,22,73,-37,-87,6,29,31,-46,62,-99,23,63,114,10,-20,-43,68,-24,15,124,-63,76,-25,-12,30,-86,-43,38,111,-121,69,-5,-49,34,-42,-51,119,39,80,86,-32,27,-74,-71,-24,73,-25,74,-11,53,104,117,87,-32,-11,-115,-24,99,-78,-7,-113,-99,-76,112,-20,121,50,-9,-103,-10,111,-68,-9,-35,96,-108,10,-38,2,-18,-73,-64,90,-105,94,103,-22,22,116,99,-68,-42,124,-122,-117,-119,-43,-6,47,72,90,-52,52,-76,2,-22,-84,-19,-85,-124,92,13,-115,36,2,107,15,127,-76,47,-39,-109,3,90,-24,1,-74,-29,-17,-27,-21,32,102,26,-57,-108,-114,-112,-104,76,-47,-17,86,-86,38,106,114,-81,-77,52,67,-28,-68,-63,23,-57,-110,-81,95,-35,-97,-29,-96,-11,64,-1,-118,-99,-25,-24,68,-118,-84,68,-113,94,-39,77,93,-80,-1,12,-123,97,80,111,-117,-52,5,-24,5,-98,-27,48,-96,-37,-108,70,-28,63,-21,123,23,67,-33,-96,47,-58,-50,-124,-109,-64,20,-37,44,-101,34,95,100,94,-57,39,-4,-21,-62,-76,-37,-72,-51,10,114,-21,113,45,-68,27,-77,47,105,18,122,-117,43,-99,-82,40,-15,-7,112,27,-86,-37,83,-8,-53,1,-110,47,64,-58,44,-50,14,18,-33,69,-17,-90,51,35,-58,-103,29,100,38,107,-44,-99,106,-49,-90,23,107,-44,-79,7,-21,-10,40,-76,-58,-50,-106,84,-47,34,91,-9,23,113,114,-11,-91,-62,64,20,58,44,-76,-105,-55,38,-101,121,94,-125,81,-55,-128,-101,-22,100,78,43,94,-46,118,-103,-36,81,48,45,90,-3,2,44,-8,-66,-49,104,116,-90,-69,-78,28,-65,15,-31,103,-71,14,-103,-90,-54,36,-81,-62,70,-35,-60,103,-13,45,20,-32,-93,127,59,127,-54,-89,-23,117,48,77,3,-84,-35,-56,37,87,60,-115,11,-27,44,103,78,-16,-112,-3,-44,45,61,-112,-102,-104,88,-67,102,121,-106,104,46,-39,52,-91,-77,-13,-79,118,-52,61,-90,-5,46,24,-59,-84,57,-34,101,-62,47,-66,-18,122,28,102,32,-123,-19,121,81,12,-110,89,-78,-38,8,-78,-94,-2,44,111,-36,-2,-66,22,83,-59,-43,92,60,-29,-71,92,-51,7,19,-2,39,-66,-100,116,-78,92,7,124,103,107,127,-115,80,62,99,98,-95,-74,109,-3,59,-126,-61,-93,11,-58,87,-24,100,113,21,-65,-71,-103,-106,122,96,-71,100,-38,-118,-23,72,0,-55,-68,-108,88,73,82,119,-105,-90,59,-41,99,37,76,-41,-62,94,18,-37,67,68,56,-41,110,53,-24,14,-62,38,-121,-84,13,48,48,116,-17,110,-80,-63,50,-4,8,111,-77,77,-4,112,19,-9,64,-32,-45,72,77,-90,-127,88,74,-61,-85,63,-75,125,-46,-15,-86,79,116,76,7,46,-99,36,14,-55,0,95,76,101,-115,67,-18,-35,71,95,-104,8,-124,38,-42,13,-70,18,98,77,51,-82,-27,-61,-66,2,26,2,-26,-61,-119,-70,44,114,27,99,-99,14,97,34,63,-88,-44,65,82,30,-47,-99,-97,13,-13,48,47,4,117,-29,37,11,-7,28,78,41,-59,-94,8,99,-125,32,-109,14,-13,-58,11,101,100,-94,-61,45,-49,90,47,84,77,19,12,-24,-86,-63,112,-48,73,4,-91,54,47,3,67,5,68,-26,-64,110,-71,113,-96,105,23,-14,-79,-18,67,36,-35,-36,48,68,-33,-5,56,39,-56,-20,-11,-43,6,82,-33,121,29,8,-78,28,-29,-101,-76,-81,116,-98,-72,97,-16,107,123,-89,-47,-84,102,-113,-107,105,-24,-112,-67,-77,-41,-18,29,49,-19,54,49,41,20,63,84,15,103,33,50,-25,-118,42,87,61,48,-48,-121,16,-74,-85,-13,6,-14,-76,82,90,-68,-4,-40,2,17,-101,81,-80,102,-2,-64,-54,-74,8,7,-117,99,21,21,-50,74,-36,-89,-75,85,-35,-29,-105,2,-55,2,28,71,-118,53,126,-84,2,9,-20,-104,45,4,76,-113,10,124,83,81,88,50,95,66,44,-110,122,17,30,92,-85,26,-53,73,-78,-32,-127,5,3,34,-75,81,54,-15,-13,9,-42,-126,-102,7,96,119,34,109,6,67,-70,116,9,-26,103,19,-9,116,88,-12,-88,39,92,85,91,-87,33,-43,120,96,-59,-53,84,12,-18,-68,-87,3,48,-99,-28,87,21,-88,86,-93,116,63,33,100,-65,-56,-36,-36,-38,-80,-97,-62,-87,66,-65,77,103,85,73,-99,103,102,104,-80,-70,60,-96,-6,-67,1,-1,-44,90,-80,93,-59,39,-81,66,63,-35,17,-58,-56,-49,83,71,-80,-54,-111,92,-7,-48,29,-7,56,-107,-114,-75,21,54,-124,-3,-60,-78,-13,61,-110,123,80,-49,96,-105,-115,-29,112,-68,126,-87,-74,82,70,16,-70,-84,53,22,-16,29,-40,-90,-47,14,-117,-3,6,-13,64,-84,87,-100,52,23,-57,108,74,-37,59,82,45,87,20,-65,52,57,-96,-61,2,-39,-33,78,-79,84,-61,63,34,37,27,-13,12,101,32,9,-16,-19,21,59,-119,-97,57,-124,127,6,76,83,80,-31,27,102,-105,118,56,85,89,98,16,-57,68,3,6,58,-95,-77,-78,26,-26,5,-21,-113,23,-110,90,-16,35,-23,-108,-47,-14,102,-42,119,46,58,10,83,-117,80,-49,-38,-58,25,80,-85,40,-54,-2,-35,-100,-80,-77,87,-122,-45,-94,-115,63,86,-10,84,-47,-114,101,123,111,-75,71,-111,-47,-35,43,-99,-22,106,-3,-89,-94,111,22,-52,95,-17,104,71,96,10,7,-99,-90,32,-38,-81,-7,-112,30,-16,-11,106,-104,-30,78,99,-110,30,-31,-125,111,-50,-19,-50,-66,109,-113,95,26,-74,-86,-66,4,70,-4,-14,-2,-86,-83,48,118,-62,-30,-78,-2,102,-105,-45,83,37,58,53,100,-66,46,-25,-104,125,-112,89,49,95,75,22,88,19,-76,-35,101,39,20,54,-82,61,-40,-83,-106,32,-106,116,-80,-52,-45,-86,-126,-56,-71,108,52,70,39,103,-24,71,121,120,117,9,5,110,-97,-79,-39,-56,77,71,-90,-97,3,-8,-64,-102,-5,105,59,-100,-76,-65,-99,-6,-7,85,115,112,14,118,65,10,-60,116,68,69,-83,-118,23,24,13,40,68,-78,-2,-43,79,96,-63,-5,-19,-56,19,94,-79,-7,96,19,-93,-47,31,30,22,43,89,-104,61,-49,29,-111,61,121,-41,32,116,-17,121,-109,-51,7,51,-6,-80,-105,-84,-41,88,16,-61,91,115,-25,69,-80,-12,-70,45,80,75,-38,-22,111,15,39,-71,62,68,40,-51,11,-9,44,51,29,-27,112,-106,-95,29,-114,-105,68,105,-68,-109,-13,-82,51,33,50,-48,-103,-65,-46,13,-51,-29,17,54,-91,123,108,-73,-120,43,27,100,32,-13,52,123,-52,33,-43,-110,-76,-79,-30,-86,109,-90,49,103,39,-28,-52,41,0,106,-13,10,-57,124,-15,10,74,-124,26,91,-63,114,-48,52,83,11,-44,95,-23,13,-57,114,-108,82,96,39,27,-34,29,-60,99,30,5,-101,117,-128,-74,-47,-33,-118,-69,-121,-112,-18,20,-6,-35,117,-80,-35,109,-102,24,-33,47,-5,-13,101,4,-127,25,1,-117,-57,-65,74,-64,-107,125,0,-78,-60,110,-100,-1,-19,-63,27,61,-17,-75,-84,-29,-56,-25,21,107,46,88,-33,-89,109,83,-83,-100,-121,-55,-48,-3,29,28,98,-64,-59,-73,-65,-63,-86,30,92,-29,4,65,-26,47,-111,1,-21,26,-109,-86,-119,-1,113,-29,-88,77,75,-54,-35,22,-95,24,-40,127,80,-56,-24,43,125,-18,97,-77,-32,61,-85,69,-105,19,9,65,127,10,9,90,-76,-37,-2,-18,-15,-57,2,27,11,-51,109,28,17,2,90,69,22,98,-55,-63,-53,125,48,-13,44,-96,-94,-116,65,88,-2,72,76,61,79,12,64,-112,-11,44,72,-103,-29,106,-24,78,91,72,-93,74,-123,-36,-121,4,79,92,-28,83,-109,-98,-99,63,92,98,-39,94,-43,-57,10,83,-23,92,50,79,-111,-32,-79,40,-34,-26,91,115,-124,-19,68,-72,56,60,-101,-73,-55,36,-83,-59,-86,-73,3,-98,-85,3,103,10,-113,34,53,-90,112,-114,-122,26,46,58,52,51,-101,-1,29,-87,-108,-77,25,-51,0,32,97,-36,57,67,117,-124,-61,13,-67,8,-108,-50,-59,28,95,-112,10,124,105,-54,-127,-43,-86,-50,53,-1,-108,-111,65,35,-42,-28,-119,-47,-92,-97,15,-50,12,63,-42,10,-71,22,-23,83,-24,-28,20,69,114,98,108,29,3,-42,123,-101,120,13,-36,-44,87,15,74,-89,77,56,-23,65,-12,19,54,66,-31,-16,-111,109,-43,111,-87,69,79,-8,124,-17,-46,-48,15,61,-28,108,-72,-58,-55,53,83,-80,118,43,-88,-54,74,-102,-38,56,116,-80,-125,-75,-3,105,43,88,-66,117,-120,-58,82,74,-5,6,78,-72,-79,-51,85,-49,-100,123,-42,4,90,-33,-55,88,127,60,-115,20,-123,123,117,9,-75,122,-19,-97,-98,-15,90,-32,92,94,-86,41,68,93,106,-60,-41,-80,40,24,-91,-86,-39,73,-120,-27,125,-87,65,-123,-41,-9,35,113,91,-40,-111,2,5,34,83,-66,114,-111,90,57,126,-93,62,-117,5,60,-68,11,-105,-35,-33,51,-52,-45,97,83,117,36,-81,45,59,-43,64,-62,69,-95,110,88,102,-125,107,-97,43,95,-122,4,1,-51,25,-12,43,-22,100,98,-64,94,64,-74,45,-38,-46,102,-21,-37,29,-123,-104,119,-2,-40,115,-31,15,2,21,-115,75,82,-8,18,74,8,27,-80,90,88,10,37,-104,-1,-82,77,80,-97,-99,-105,35,40,110,-49,24,99,-94,43,20,40,-40,10,113,-71,43,-63,-22,77,64,-3,-79,-82,-44,-53,23,86,110,-124,97,-27,-106,-95,104,-96,-121,25,-14,74,54,120,72,107,-128,-9,-60,21,49,-67,-12,18,-30,-33,-91,77,40,38,33,-70,7,-43,-89,44,-12,111,-108,14,36,-15,85,112,-85,-109,-48,98,57,100,-17,85,-123,-72,-111,60,15,-124,11,90,-105,7,-107,-121,91,-10,-98,83,-116,-10,54,-128,64,59,38,64,-25,36,-17,101,-96,-108,67,-89,46,20,26,126,-71,-1,0,77,32,-72,-31,-29,44,-14,-8,-74,42,-11,-21,95,119,84,123,-128,30,27,20,-74,38,-11,-122,41,94,-51,-33,-115,45,74,7,80,35,18,-30,-101,-6,95,-92,-69,33,16,15,-59,-111,3,-67,-86,28,-43,40,68,27,-111,-95,-26,98,38,83,106,-126,-34,86,-54,-102,-110,-88,38,40,-37,46,81,11,-122,-8,-46,30,112,90,-40,95,-61,-73,77,-123,-44,105,32,-109,-110,81,-23,127,-83,81,-55,77,62,-44,-33,-70,-62,4,52,115,32,-36,-96,-123,-33,86,127,86,38,43,53,21,106,-125,-69,-16,84,-98,-80,-12,17,-25,-70,-72,34,-33,-115,-119,48,42,-34,6,91,-18,-19,22,0,46,-92,-27,106,-116,35,78,44,50,-110,-113,7,14,18,-123,22,-112,113,-91,-51,-17,88,-83,-51,-19,30,28,109,-64,-114,86,73,-33,30,-1,-121,-58,51,-109,86,104,89,119,-76,-28,-90,-95,-100,69,-55,-23,-14,58,-112,30,-77,125,72,-99,55,39,67,54,-6,4,52,50,92,-47,-26,6,76,3,96,89,97,126,80,-80,-100,-76,67,-119,-36,58,-13,16,53,53,5,123,106,31,33,-67,111,-27,48,7,-111,23,-110,-42,-16,-105,38,43,51,-17,-12,-98,89,-32,3,64,118,65,21,-66,-1,-93,-115,93,-75,7,-25,126,59,107,-19,-26,14,-107,75,45,-16,-110,-34,50,2,-11,-109,19,-61,125,-94,-63,123,-24,-11,54,-115,121,-16,-39,98,2,77,102,90,52,-110,-55,109,-119,-47,-121,116,119,65,68,6,6,22,103,-121,49,-117,119,-38,-90,124,-32,104,90,109,-16,-100,-92,61,-115,-107,60,-26,93,27,111,-124,54,-72,-77,123,-79,89,-89,-54,-94,108,59,-49,78,-108,-4,-28,-119,55,42,36,95,123,-7,-99,-42,-100,-6,91,-65,-24,32,-77,106,59,-5,-93,-100,115,35,70,-90,-7,-6,40,-20,105,76,-32,-74,77,-32,-91,114,49,-126,-83,-81,84,113,80,-69,-99,-13,-29,-103,102,-69,-108,-127,87,-43,-11,-126,-113,119,-104,-11,79,62,26,-90,-22,7,-64,-107,77,77,-83,24,-90,52,-57,10,-22,114,-38,115,-37,-52,-63,-76,-13,94,-56,-96,78,59,33,85,-82,-97,10,74,-95,-113,-78,99,-66,50,4,32,102,69,20,-76,-69,-57,-26,5,-105,127,94,-72,-19,-117,-7,-38,24,-91,59,86,91,9,-58,126,-81,-126,-39,28,35,124,101,74,120,-90,54,14,-31,-108,80,94,-40,50,-56,26,-5,19,-37,-39,-45,-117,9,37,53,83,-73,-22,-107,-102,-104,38,-126,-125,90,-106,74,-98,72,21,-76,-56,20,109,29,52,-45,-42,-51,51,-1,122,91,12,-18,-69,55,-3,51,-111,-106,123,11,-108,-93,51,96,-100,91,-87,-51,70,-39,15,-81,35,62,-54,-87,33,-64,-125,-111,14,-109,-89,70,-36,65,-122,-47,126,126,-119,-49,-34,46,126,-87,88,-117,-107,119,29,-65,25,-89,62,-89,-88,-117,103,100,9,-36,56,79,95,-124,66,-5,-126,-9,9,-95,-95,-93,54,-2,-54,81,-106,21,-25,108,105,-37,-9,-97,69,122,84,39,-124,98,59,-25,-67,18,35,48,-105,117,78,-75,-42,3,-76,-107,76,79,3,-81,-61,30,-99,-99,101,-118,-94,112,-88,-19,-82,103,-67,76,-71,-105,-24,-91,-20,83,90,120,-7,34,-26,-110,75,41,62,-116,-77,23,109,107,74,-78,94,-125,26,-13,27,99,49,77,-73,100,87,77,0,88,93,-23,-115,-36,-108,-24,123,-65,-60,-63,-44,0,19,102,-19,89,69,85,-96,88,-103,123,108,119,-68,-99,89,11,-56,116,-106,97,-68,6,-60,47,52,-1,-53,94,-55,-107,-3,-9,-105,-3,-21,-69,-37,18,-59,78,37,127,118,107,-117,-79,-43,-108,124,33,-121,-25,52,-71,76,64,-2,27,-52,68,88,14,25,-115,57,30,-36,-16,63,-75,92,110,-57,-105,-82,-21,-72,30,113,-92,-20,-15,-77,-20,-25,106,22,56,79,21,68,98,115,71,32,20,122,-70,112,38,62,105,48,15,115,47,-124,48,-71,-41,-85,127,-6,9,122,110,-68,-45,-35,-21,-103,122,30,-70,42,68,9,83,13,105,110,8,98,-42,93,117,-26,21,-42,-82,27,110,-123,10,-98,-5,22,29,-112,-32,109,31,7,-91,22,71,-56,60,29,-126,4,63,-64,-77,74,-53,92,-7,-54,-128,72,-20,-92,6,-89,-20,52,46,32,-94,-119,-90,-92,106,74,22,-50,88,-69,107,8,3,55,-102,-64,28,-106,74,13,96,97,110,-59,58,83,-95,-49,-106,87,71,9,-19,125,26,-26,-93,-28,-52,20,-63,49,-73,-11,112,14,121,-65,88,-128,4,72,-117,-29,-74,-33,21,102,125,112,-49,-82,-7,-28,82,46,-71,12,118,4,121,97,16,28,85,50,78,-24,76,74,107,-47,-67,63,-94,-112,93,-59,-48,-32,119,84,108,74,52,-113,-17,-96,27,122,-67,23,-10,33,-63,-54,49,57,-103,-58,54,20,102,-18,-78,-125,62,20,109,7,-20,107,31,-85,5,104,81,-61,98,51,125,-32,-90,125,-100,6,64,104,56,126,24,-86,109,23,-100,15,23,50,22,-83,30,-128,-82,123,-89,14,-48,-82,-36,-92,-65,-12,10,107,-61,-124,-36,-75,49,0,-105,26,119,101,120,-37,-38,-89,18,-55,-47,-118,-92,-17,48,-14,-50,-72,112,-100,-125,-106,-114,126,-23,-105,-41,102,-7,-5,87,-25,71,-111,-11,-76,-106,57,-84,39,-28,123,50,47,-23,-66,-101,102,-65,103,32,10,84,82,34,32,-112,-14,-125,-109,79,28,-18,97,38,56,-36,-70,-6,-78,-80,33,-120,104,68,27,41,93,-95,125,90,-18,-97,-33,-102,53,-79,4,-27,30,-51,41,-72,-74,92,-102,28,-56,114,122,-105,121,8,-51,63,-117,126,-56,-127,-126,49,84,30,-76,-13,-45,53,57,3,34,-85,49,-112,41,-71,127,-111,22,-114,-34,38,-45,44,97,52,4,-111,-35,-98,-24,-53,42,74,-118,-86,-19,-119,-52,-88,22,-89,119,71,112,-21,26,52,35,126,65,117,-110,4,47,-66,21,-51,-8,-72,-120,-107,72,85,3,73,72,-27,-36,-114,19,71,-89,-100,-111,116,-97,87,-53,-68,-121,17,-29,-60,-28,116,-64,11,45,-83,-125,-55,71,-3,4,-123,53,42,-122,-45,104,-22,101,81,-24,-37,49,91,-2,-77,44,-72,-64,-100,-80,-75,-26,108,-102,19,-107,-51,-23,-11,-4,118,-18,-18,125,90,-84,41,8,-54,30,21,-91,102,-115,-99,-35,-35,6,24,102,-108,26,-8,39,1,-93,76,124,28,-9,114,-39,9,44,72,-72,-24,67,-41,-3,-58,-92,-31,-57,127,29,36,16,-1,-87,-124,-34,-23,57,118,-38,-19,51,121,15,-44,-2,8,-87,-47,-82,71,-14,-41,16,48,79,118,17,-83,-84,-62,5,-127,-20,-12,28,54,-95,-89,115,124,-18,40,-118,-125,-97,3,15,89,-21,45,-19,23,-58,-1,39,19,-18,-121,127,-46,2,38,-24,-64,-48,81,19,-16,80,-128,-37,123,-43,-73,36,-127,55,121,-62,14,93,56,42,-117,-43,-99,24,-79,-46,-112,-34,-99,38,-19,11,23,-70,-128,-121,-81,-110,88,-76,-53,-51,51,-128,52,54,-80,-58,-35,83,10,20,27,-109,119,112,38,-19,97,120,67,24,51,-65,84,37,112,-8,67,6,-104,-127,-50,118,-1,58,-97,-94,-103,78,10,30,-94,-95,-42,107,-41,-67,-39,63,27,-108,91,21,-88,-23,-118,-55,-28,-1,-9,16,-37,-29,-55,-80,-82,78,-112,62,46,48,-41,1,50,34,12,-53,123,46,1,37,108,71,3,41,-94,-123,-50,-16,-42,8,86,-39,-24,51,119,20,22,-55,115,-82,-86,114,-110,8,-72,-15,74,83,93,14,59,122,3,107,-17,93,51,41,-56,-125,28,-21,38,-59,71,69,-48,111,79,38,-29,-23,0,-17,-110,75,113,87,32,50,4,-113,-4,12,-27,-20,-61,-41,-56,-117,-99,-77,-87,115,-99,40,-99,-95,-31,26,119,-102,-53,2,29,4,-21,-86,112,94,-82,45,-65,23,-23,-85,-17,-97,100,75,116,-110,1,-109,-111,29,80,-90,93,74,3,95,112,-48,-106,-18,25,77,-29,-22,72,-117,94,9,95,113,-1,-104,-124,-28,12,97,-109,66,33,-94,-29,91,-88,-102,77,-76,21,-65,95,51,54,-16,-116,78,78,-79,-107,-51,-123,2,40,49,-124,-90,64,97,-3,-105,14,71,-114,112,124,3,-83,-105,-50,94,35,59,-63,73,120,-43,116,16,-91,-46,-18,-117,-108,-26,84,-84,75,123,-97,-21,-118,-119,72,34,-59,-108,-104,-65,21,70,63,-108,-35,-26,-11,-63,-55,53,-81,-125,-58,-115,-16,-54,59,7,0,-12,-67,126,-72,81,-118,-76,-13,121,5,27,-23,80,87,-125,-14,-85,-37,-6,-79,-56,-118,-19,-45,-43,72,71,-49,-91,31,-121,-90,34,89,-22,116,46,-62,-59,49,-4,12,23,40,-39,88,-54,120,12,34,26,-7,42,-18,-89,-37,67,123,61,-91,74,-36,-38,-104,15,113,46,54,0,28,100,-75,-44,25,-56,103,28,44,-92,-100,34,-113,28,-16,-75,-121,-7,58,38,-99,66,-2,-20,-122,-19,11,110,-58,45,17,-72,38,-45,41,6,64,-86,44,36,91,-45,-93,17,43,-73,-70,-41,52,121,53,-71,-90,14,110,115,29,36,-75,-46,92,97,-53,102,-88,-32,122,53,-39,20,-102,55,-101,117,-26,82,14,46,-91,-120,85,36,-108,101,-81,-26,115,-18,-50,-47,18,7,-125,-24,33,-46,-24,-108,33,-71,41,99,-66,47,-43,-25,10,117,53,-2,-14,10,126,-112,-74,104,-77,-57,-30,24,81,93,69,115,89,10,34,90,88,-116,65,-90,72,43,51,123,-85,55,-12,8,13,10,-37,-90,123,-4,40,109,105,112,64,99,-74,-83,44,104,-20,-16,25,54,-82,-54,-109,64,-37,-3,-17,107,124,14,-64,60,-47,-72,40,-84,-74,89,36,6,-98,-125,63,30,14,-70,-62,109,-38,112,-41,127,52,115,-56,27,-112,76,-65,-107,-118,26,-53,-74,-96,114,78,-120,24,77,60,48,29,49,-15,-117,-91,1,58,-26,-84,-9,-115,-109,-89,-21,104,82,36,116,121,-103,93,-50,-103,-39,37,52,-28,-108,49,-87,-93,-115,38,-37,-28,-68,14,-26,19,-41,107,-2,-37,-107,-49,11,-120,17,24,24,-100,-110,93,46,-122,-84,38,6,-7,-53,98,102,35,65,-8,-6,-99,44,86,-5,-4,67,-65,13,23,66,-111,24,7,19,9,-92,114,29,58,-43,-61,-105,-33,34,-26,-57,5,-11,48,77,0,-41,22,-49,-20,-44,-99,-30,10,45,-51,47,-29,20,-61,-11,104,99,21,-15,-67,44,108,-71,-83,-11,57,-104,39,-84,122,2,14,127,5,-110,-79,98,23,95,89,3,-87,68,94,-9,104,40,107,24,26,-97,-36,-111,-100,-95,31,-97,77,49,-69,112,-111,-96,-45,89,127,-9,114,85,-5,-102,16,-1,31,-53,-69,-53,-6,113,84,-6,62,-18,-44,-73,-15,68,-105,-36,127,12,-27,-28,-42,-31,51,-121,-19,86,-111,-86,93,-119,-74,67,51,32,73,35,18,-106,70,44,-82,72,50,-19,98,-45,-60,-84,-84,-67,-126,-5,-67,38,-2,-62,-23,-54,-110,113,-89,-14,52,28,11,-61,4,70,-35,-100,0,-46,-11,-124,49,118,-80,39,-70,-100,-54,-120,-69,102,39,59,16,-49,-50,53,-27,44,-115,90,69,-102,65,-113,20,-47,-115,59,127,-19,-19,-54,-27,-28,39,-94,65,-114,75,-115,-46,-85,-4,75,-67,127,-98,27,-42,1,-43,-124,22,-21,-74,-27,53,-45,127,-90,-83,-44,-23,-86,10,36,59,86,99,-126,-59,108,-99,-45,91,-16,-33,110,106,-120,-87,19,115,122,-86,85,-83,67,-4,-57,4,-111,-5,-58,-2,-91,95,11,107,-53,-68,-128,-12,-68,85,19,-40,-36,-56,10,58,-64,-12,-32,20,79,37,-65,-9,-33,88,123,94,114,31,67,-2,-32,86,-124,-62,-116,-100,41,35,-17,-81,67,-85,-110,83,45,5,-121,-120,-3,14,47,-65,-78,-87,-114,-9,-19,-7,-21,106,74,-40,117,78,-33,61,63,-70,26,-9,56,76,-121,-77,14,87,-125,-32,69,-101,50,104,30,-59,-117,80,43,-98,-11,-23,-94,-108,52,97,-38,24,-10,125,-41,-119,-19,-56,-42,25,65,-39,7,-102,-4,109,110,74,18,-126,13,96,95,99,-89,15,-3,6,106,72,35,-78,82,-15,73,61,116,-127,-83,98,54,-17,2,88,-7,-57,-37,-102,-39,-79,31,111,-6,-62,-24,69,103,74,113,65,-15,68,37,123,-65,94,117,-32,-121,-78,-5,59,120,104,60,5,68,-65,4,-85,64,-80,117,61,-101,46,-88,-123,69,-19,-57,97,-15,125,54,84,-23,-124,-27,-47,114,16,104,44,-100,-87,36,81,-27,-20,-73,95,-80,-64,-34,-77,29,66,-126,-120,77,105,-100,44,79,116,-18,-27,-15,-71,19,-80,12,-18,27,-92,45,116,-27,14,-14,-77,1,-110,-40,-26,-4,-88,-120,60,51,-101,108,-123,116,111,-83,1,-74,87,-69,11,124,93,2,-64,121,62,-45,-79,110,-55,-37,97,27,-79,110,-91,67,53,99,26,-74,98,43,9,-43,80,-103,-23,60,-36,68,-112,-64,20,-31,-52,-79,-113,-7,94,-30,73,-100,55,-111,87,-1,-29,-25,42,-94,-13,-63,108,-59,38,-16,-85,-62,-17,0,47,-90,116,-80,-11,12,-54,96,-110,-12,-6,-128,-31,-64,-109,103,-11,58,-118,-3,-102,0,64,39,-67,-18,93,95,-87,102,104,88,-31,-62,-36,-61,-105,-26,46,-53,93,117,-70,-54,121,-103,52,-24,-10,82,-124,-22,29,-122,84,-76,-64,121,-65,-6,52,80,-27,7,-118,108,64,-82,73,-44,81,-107,-88,84,-100,-59,9,-56,35,-39,-68,-82,26,65,-73,-66,-15,75,-44,-31,51,-65,-62,-73,100,51,-51,78,-112,-84,-19,82,93,-92,53,-69,-38,-66,5,127,-30,61,43,26,48,-63,31,24,-71,-67,-60,-127,-55,-26,-43,38,-63,-49,-101,-37,116,105,10,-109,3,-67,-42,17,-89,110,-103,62,-41,78,-59,-47,-47,-17,10,-51,-16,-31,-41,68,37,15,94,-123,101,77,-122,116,61,-96,-8,-122,-11,105,109,-74,-97,-111,44,114,105,45,-94,42,-99,-52,-113,122,87,-59,85,-109,-128,120,21,-49,-75,-89,11,-10,120,-51,30,-19,-79,-26,-32,64,-71,28,-44,-11,55,-28,59,109,-84,-22,-113,-55,-105,114,50,80,-26,77,36,54,42,-71,-111,-64,118,99,-100,-121,-128,56,-10,-75,-74,30,93,36,-122,16,-105,-50,85,19,-99,-84,-72,-20,-63,96,75,-53,-86,59,90,-23,-73,-39,96,-118,-9,-127,-106,42,-122,-84,108,-18,29,81,-58,46,12,94,-2,-94,33,-75,85,61,122,-100,2,101,45,106,-49,-43,22,-63,-128,94,-115,5,38,35,-8,54,15,35,-114,87,-76,110,-50,37,20,-114,115,84,-13,48,14,54,-58,-93,43,112,77,9,-99,32,-91,-55,-82,34,23,-40,62,17,66,84,-3,82,117,-100,32,33,19,-100,93,102,101,-33,112,-103,-38,114,-1,38,-89,-90,-9,-86,-101,-66,-71,41,-113,5,-40,21,50,89,123,-73,5,45,68,-75,58,-107,3,-67,-64,89,-117,45,51,16,36,-119,69,-78,94,-18,-18,61,-124,22,97,-55,112,-97,19,119,65,7,-109,23,88,-15,-47,-103,-62,-84,106,-5,73,-108,-109,34,33,-116,81,-41,81,-102,67,20,-46,67,-40,-9,-49,10,121,-57,-33,61,28,42,-67,-36,-113,-38,-89,-94,-67,-28,52,-17,-116,-96,117,-51,29,-84,-38,-53,-53,-44,-110,54,98,-76,18,117,83,10,-36,-62,102,104,124,80,34,15,47,108,91,-112,-116,-10,66,-68,55,-123,-67,87,74,51,-47,25,-34,-122,57,32,-96,96,-64,67,31,-41,-124,-87,76,-15,-125,1,13,-77,99,47,74,-44,97,67,108,-4,-9,-16,36,44,-53,3,105,-120,99,-55,-30,-34,118,8,40,106,-95,-122,14,-65,-23,86,-64,-26,114,89,97,-59,-10,71,-108,10,-60,61,-87,-19,-4,-28,-32,-1,35,-123,109,55,-47,-126,-124,-1,-36,120,-107,3,-17,121,31,-80,25,79,127,-32,-19,103,118,-4,21,-55,125,70,-95,-104,-2,-78,-24,90,97,-33,-79,-92,126,20,49,60,41,121,56,120,-102,113,74,1,44,-28,46,-19,100,-46,-127,77,-8,-64,-12,-13,-15,11,89,22,86,-95,36,-105,84,110,-83,37,-56,-40,-92,19,-17,-82,-25,83,4,33,-111,76,-54,-85,35,-107,127,-72,76,89,-123,-103,28,-96,95,-47,77,107,-98,-35,52,59,75,-76,87,-14,-27,-56,75,117,67,-34,91,-92,-45,-95,-116,-13,5,-81,-35,83,85,10,-112,-38,89,117,43,123,-43,-73,104,36,-80,-106,47,113,51,-82,36,93,-84,33,11,-53,-84,-128,82,-86,0,-118,-33,-6,-122,44,35,81,-44,-71,-73,-64,98,126,-20,-49,-104,-126,46,44,-17,-63,-62,-74,-48,-61,-28,67,-99,-25,92,66,-38,73,49,45,92,-69,-26,-91,105,80,-30,48,85,-76,108,-98,-95,-56,102,47,-70,6,-118,-31,-112,60,-62,89,-78,115,-85,4,-1,36,72,-17,-56,-100,-2,-104,-54,24,-56,-92,-60,-106,-115,-53,49,-106,85,33,54,-79,-77,44,47,-120,41,-60,-8,44,-28,5,114,90,42,74,-57,106,-81,79,-67,83,-97,-90,-16,-120,-57,-88,9,34,7,-107,-92,-59,40,71,113,-32,-85,89,89,33,-58,-78,-22,-50,58,96,-19,66,-125,-39,90,-42,25,70,-31,-104,-90,-21,118,98,-111,102,44,-35,-117,60,-62,86,-47,-4,-88,14,46,79,-81,6,-5,101,-12,99,96,43,42,-27,65,-3,-93,-120,112,32,-111,-6,89,105,-67,122,50,57,-126,-54,-46,35,-41,48,0,-98,-22,71,45,-125,81,7,-26,23,118,-60,25,101,-128,-95,117,22,-29,-126,74,86,-53,-39,65,-86,-62,64,-77,-8,-85,90,54,-28,124,-128,-1,-112,105,127,-124,-40,123,63,123,-77,-84,13,-5,53,-46,-31,-74,-36,-16,27,13,-124,-24,-98,-115,-83,101,48,92,13,-5,-98,-111,-10,-51,-40,-115,-81,-82,-52,24,102,98,97,109,107,-1,-46,109,50,40,-48,-23,71,-70,34,-13,-111,43,110,-41,-9,-1,108,37,45,-28,-72,-45,-50,121,9,-66,-4,-10,-86,18,16,-119,64,-36,33,5,-13,-125,93,19,-6,-61,126,48,95,-116,11,-62,125,-6,67,111,-1,-54,2,82,45,-103,-4,19,-66,20,18,48,15,94,-91,33,119,82,-15,-24,116,15,67,30,111,-106,90,80,13,-20,71,66,65,108,124,-104,-94,-124,120,59,-95,-80,16,-101,83,90,14,25,-96,-64,-38,-24,98,-17,-69,108,-89,-29,-30,-11,-101,99,13,53,-56,72,52,105,105,88,2,75,26,23,-13,122,3,-114,71,-29,-70,-9,-98,67,58,-122,87,7,126,-30,111,69,-61,7,11,103,-6,-6,-16,56,-32,23,94,29,-31,-63,-47,67,5,61,110,57,43,54,41,74,28,-65,97,74,-22,-115,-126,0,86,-50,-83,-3,-93,116,5,-29,22,21,-79,-54,34,68,77,-76,-34,84,-116,-31,-102,-13,-55,85,64,-42,44,-115,43,85,100,-60,-104,103,-54,120,-65,-69,44,-102,59,107,81,-79,89,-44,121,-24,70,-110,51,75,76,117,-7,61,110,-102,42,-28,-28,-67,-12,102,-19,-27,18,121,115,-46,68,-81,-124,-110,-33,56,108,-83,30,4,-97,-79,-17,114,88,-86,105,-9,17,0,61,11,101,7,14,58,-100,-38,-42,121,27,119,-48,62,56,94,39,-49,-20,7,26,-99,108,-44,120,87,-2,-117,-78,64,-56,76,-83,-105,26,21,-3,8,81,-74,-100,50,67,9,58,-118,-14,-96,-13,65,27,-122,-73,102,-83,-40,-60,-13,-120,16,51,112,-51,-81,-15,127,-7,100,-116,83,-20,-72,59,121,-39,-43,114,97,55,-9,-53,56,107,45,49,-102,106,-126,-54,59,-44,18,-64,101,-75,62,-123,-70,-110,-17,24,-44,57,-122,104,43,-119,-40,18,-107,-113,25,122,-19,-90,123,74,-35,-86,107,102,-22,-51,56,-14,-100,109,-124,1,35,-85,-16,-124,-65,-21,1,30,55,-75,67,-121,109,-78,-102,82,-23,-94,-60,46,0,-104,-96,6,12,39,101,62,37,-39,-84,-92,48,3,68,34,26,-47,-67,60,25,-2,118,-110,91,77,46,2,103,43,-85,-107,83,-23,-23,-71,-7,-110,42,43,16,-82,57,-55,-52,-102,-32,32,-70,-111,75,116,-11,116,-44,-75,-14,1,-123,-128,31,-85,71,33,-72,78,-102,70,-72,48,-15,60,38,56,79,93,114,-83,75,-6,-78,120,25,-127,112,82,-37,-90,-121,-92,-112,-35,8,119,-32,-35,58,77,-9,109,69,-107,-21,11,-128,-42,-70,48,-30,-23,-78,-81,30,-123,-40,-8,106,-127,9,64,-51,-78,122,95,-109,81,-15,-43,27,118,-92,88,37,-109,-106,52,-8,-62,119,-45,65,73,127,-96,-115,53,-125,46,47,89,115,8,71,70,-40,-107,24,15,-119,-64,115,41,54,-11,-103,-108,-20,6,104,-67,-8,95,102,90,19,15,73,-22,13,-7,55,113,-53,-123,-110,51,40,37,-83,-103,-61,34,59,114,-25,-113,-103,87,-26,-10,-121,88,-65,-79,-63,92,123,-62,31,59,-87,-11,113,31,14,88,25,23,35,-49,-83,-21,-59,53,-72,109,-22,-64,59,89,-104,-42,52,24,-60,62,3,91,7,-21,15,61,-117,-109,-1,65,-39,25,-37,-34,26,-2,-51,62,61,24,-15,50,-32,-48,25,-55,36,24,99,6,94,-25,-84,86,-30,-95,-94,-102,-53,29,65,-81,69,-85,117,65,-7,0,-66,-23,-75,127,-108,62,10,-5,66,-4,29,-59,-82,41,-55,58,9,65,-128,55,-58,-67,-28,123,99,-121,-70,-99,-6,11,122,-108,-18,119,1,78,103,61,121,-104,-68,117,-22,-108,31,64,-68,-68,-96,52,41,58,11,-54,-26,118,14,75,-54,21,60,-119,-66,-19,11,-64,-5,76,-97,-9,81,-126,62,72,-115,64,117,23,65,73,-87,-121,-40,-48,90,-82,73,-91,57,42,-53,54,-11,6,102,-104,-117,0,70,52,-56,103,104,-1,-12,-103,32,59,12,123,-75,-104,-123,16,31,-35,20,55,-116,-109,-44,-50,-63,24,76,35,-116,-29,16,-32,-43,-68,-115,-56,32,109,-34,-9,126,-39,74,-74,-46,-19,-82,-105,-115,32,94,17,105,-103,68,-50,-121,-29,53,-7,74,77,98,-123,-68,37,-8,62,-21,-23,4,-99,-80,-103,45,-58,-2,-95,5,58,35,19,-65,-37,108,-14,35,-90,-53,-123,-5,28,39,-21,17,-38,70,-53,94,30,62,24,34,-74,14,101,20,46,-61,94,125,-121,-122,88,36,-127,-97,-98,80,110,80,14,10,72,8,95,50,4,113,27,54,-124,-117,-48,-39,122,52,8,61,94,40,-69,-34,21,7,-56,-123,-90,24,23,89,57,-87,-97,-16,-80,63,-50,-118,76,-25,-17,24,90,-4,-112,-94,32,58,-32,11,-12,28,48,118,-38,-69,107,61,92,-104,116,-112,-62,55,-110,127,0,-46,-54,17,-57,116,54,-90,-36,114,-39,53,-32,33,-69,72,37,-70,121,-84,60,22,-95,-105,-74,-7,-67,-49,-41,55,98,60,-57,-51,-107,48,31,48,-72,-35,-38,-5,29,-102,65,78,79,71,-8,-113,122,76,90,-55,-31,102,77,-66,107,112,-128,101,122,-83,-62,111,126,-75,101,-55,-118,52,68,-128,115,63,76,32,-6,6,90,100,-109,98,-59,19,109,114,-1,84,-58,79,-52,95,121,-77,114,-52,56,-13,-114,67,91,50,-51,-94,-115,113,-58,-33,56,-92,55,-120,80,-125,-85,126,-114,-126,44,22,-29,-82,113,-92,91,-39,63,-34,-90,43,-21,-3,113,-81,-5,-91,69,-59,120,-126,127,43,66,113,-111,-99,47,-46,-73,-13,55,-7,73,37,110,-76,68,105,13,94,-36,10,108,-127,-76,126,10,100,21,-80,-117,21,-95,-79,94,77,-72,98,-63,24,93,7,-124,25,-15,-62,84,-99,28,-99,-82,113,-65,62,13,-51,-117,115,37,-125,-40,85,-96,70,31,26,-27,2,57,43,-15,-112,-36,-5,-72,106,44,-97,126,111,-31,-89,-66,76,-114,-111,51,120,69,-106,56,-70,1,-54,105,-56,-8,-92,-123,-71,40,-52,-20,-93,-102,-104,76,48,77,-30,76,53,-113,-16,40,88,44,-107,34,53,18,-21,95,123,-115,53,-28,21,47,82,76,-58,-114,-104,22,-97,-90,109,73,7,-108,-30,-96,89,-84,-47,-46,-62,110,25,-128,-54,-75,-62,55,121,42,-62,69,54,25,-75,7,122,87,88,-68,-83,-95,-100,38,-103,-96,74,-57,109,-34,51,72,86,89,120,66,85,18,95,-84,101,-86,15,-32,48,-104,-99,62,115,43,76,-14,76,-92,27,-5,-8,41,-74,-114,50,-77,-97,-67,-109,16,-36,106,-52,85,50,16,-68,-27,-99,-22,-112,122,-15,63,64,23,121,23,54,-31,126,64,76,16,18,-57,-75,97,-94,-23,-94,72,-40,-53,30,-55,87,-63,-13,116,-64,9,-72,11,-45,-90,11,59,110,44,28,-105,62,-80,-27,20,-7,46,45,57,35,5,126,29,-91,77,-65,-60,-56,10,-115,-42,115,-17,-67,34,12,56,39,-119,-20,-66,22,-39,54,-102,108,1,107,-75,14,-104,-127,-87,-17,-88,103,33,-71,-85,-76,23,-95,-94,-102,107,92,-96,61,121,-98,78,-33,-28,33,75,-10,32,-14,-125,-72,-96,-4,10,-65,7,-52,-27,92,-71,100,61,87,45,9,-43,110,-52,-70,19,45,-110,-66,-74,91,-126,-27,106,-110,58,114,-86,-52,-77,-63,-50,-65,67,-54,33,116,37,64,49,-7,76,-115,22,-124,-105,50,19,-126,81,86,124,-37,-5,-48,19,32,-65,-21,80,-93,-124,-23,-25,24,16,97,65,51,29,56,-79,-117,80,-50,14,-77,-23,87,96,-52,125,49,2,55,13,61,107,-106,93,-116,102,-37,-11,-23,-119,53,-43,-39,-86,-96,0,19,13,15,15,112,24,-73,76,79,-76,99,-127,90,-18,119,63,3,-29,111,38,34,-66,-34,111,31,-29,24,-95,-70,5,65,-15,86,-43,16,76,-127,-120,6,21,-29,97,-31,53,-57,-39,83,-117,-48,-99,126,38,56,-78,67,-18,43,72,-96,100,-37,109,-92,89,94,-88,36,121,112,-33,-69,-42,-99,112,-80,116,-42,49,20,5,124,26,26,-32,-118,-28,22,65,13,-105,81,-98,124,40,-76,52,-104,97,59,82,96,-99,-46,-27,-74,-125,-36,64,-31,114,-83,-28,-61,81,8,-81,-49,42,48,36,-81,12,-80,68,83,38,-115,-46,93,-86,62,-56,-52,-36,7,-88,-85,-80,38,5,-106,-8,-125,-94,-81,123,122,21,-112,45,-37,116,81,48,93,-122,32,-120,-28,48,-85,-99,-47,50,-67,-109,-14,78,-79,10,56,-98,41,-22,10,-20,74,94,-120,-30,110,50,86,74,91,51,43,-86,-44,11,65,-11,127,-97,-31,-24,119,-16,-66,-73,87,-95,-64,109,98,-127,-30,45,24,-11,54,61,76,109,126,24,45,-1,64,-24,-28,28,114,-113,-32,-103,122,-125,95,102,-7,-33,-25,-28,-7,-101,63,109,-9,111,-45,73,-41,-111,-48,-70,-113,-40,28,-32,-95,-41,76,33,-53,-112,-106,75,71,117,-94,81,19,19,53,96,125,-9,-82,40,85,6,65,36,-91,68,59,9,91,65,-67,-34,65,121,125,-25,-107,-38,-106,-122,20,-83,109,45,-103,122,-31,-42,-42,84,23,-57,49,-69,27,41,78,-116,3,-65,59,-28,-52,-101,-91,-29,-29,37,113,86,119,-51,-19,-104,-84,42,90,-113,125,-32,37,65,-21,119,126,11,-13,-37,59,-49,-80,60,90,-114,7,-117,-84,-22,-50,4,58,69,-93,106,-77,110,-46,125,78,93,-124,-20,-42,73,75,-60,-59,-52,80,-5,6,-105,-14,-58,-59,-72,34,59,-46,-96,-102,76,105,-8,-49,-79,-81,-47,-94,93,-100,77,-119,-115,-102,-115,-68,69,-126,107,-86,-103,91,83,-26,-42,73,-84,-54,5,-85,-104,-61,-28,22,100,-71,-126,-43,97,-128,38,88,41,112,94,-84,39,-55,-119,36,-115,60,107,87,1,-45,-114,-9,-80,88,-105,-67,-91,90,-111,-96,95,-113,-103,-24,-70,91,-113,-70,-122,-83,-92,-20,121,117,37,-105,-10,126,82,81,89,-2,-118,36,-21,-9,-85,124,-103,65,-6,118,-45,-33,-5,-113,122,124,87,58,-30,-47,-43,54,-10,-116,88,-17,44,29,94,-106,-59,41,54,-86,101,98,-116,106,-12,-12,95,13,-29,-103,72,55,-73,6,122,-106,124,79,54,-93,17,7,-101,69,-72,-102,-43,31,71,-44,92,37,28,-104,127,54,-7,-50,-74,-35,-125,-16,-119,28,-17,-44,122,63,117,92,-23,82,14,-28,122,-38,-90,26,88,-74,22,127,115,111,-128,61,-41,-104,-9,31,112,37,29,53,-3,58,52,-27,66,-76,-73,27,78,92,-33,-125,39,110,95,-96,-61,-125,-16,80,-107,101,44,63,114,47,-101,-47,124,21,-31,-99,-57,24,46,-24,18,121,-104,68,-113,37,-76,-71,102,-10,59,-124,112,123,121,91,78,-17,-14,32,-82,49,2,102,-47,-83,-30,-19,-3,67,-50,-42,41,-92,-21,-72,117,-111,-74,97,26,-26,18,-78,104,41,67,48,122,108,-19,105,64,-111,-45,-45,43,-80,-66,115,84,81,-36,-31,59,60,28,-10,125,72,30,-64,105,52,45,-74,11,38,-16,-118,-3,-46,98,-77,40,70,-69,-114,-77,-70,60,123,83,-102,-80,42,100,109,81,-77,115,7,-127,-87,-22,-48,8,57,-72,-41,-41,-9,3,-54,80,-30,103,-54,-16,118,105,-37,-87,22,71,-48,-33,121,62,-90,116,66,-38,-105,22,19,-21,-41,83,112,-39,-28,-81,-109,31,-125,-95,-1,54,-84,72,-108,112,89,-114,120,-73,110,20,-55,-126,-93,-58,68,-105,-107,65,122,8,-103,121,-97,61,-74,97,99,-65,1,46,7,57,69,-122,100,-112,94,-94,116,23,85,106,-105,79,-108,-128,39,-111,83,-87,-66,112,-102,24,-7,-72,-78,-97,-8,99,-113,-114,79,115,-51,89,-88,83,-90,28,56,113,-102,57,40,-104,-76,89,-8,38,-5,-67,-9,-18,38,-121,27,-25,-110,-29,3,-10,123,16,-40,-93,-36,116,-20,-73,-111,-18,87,-123,120,113,-121,-97,-47,69,105,-68,-97,-111,-53,-94,114,-81,77,92,-37,46,-80,-18,-9,108,-69,-25,-46,27,-101,-86,54,53,-109,-44,85,-11,-61,-87,34,-17,-25,79,-46,101,-22,-30,85,99,-65,-30,117,12,-80,-23,-16,54,106,-89,-120,-29,64,1,-94,-111,-75,82,-3,68,120,11,-103,-52,87,22,-46,-17,-117,-63,12,112,-123,-52,-121,71,-122,-55,101,-125,-41,105,-53,52,-9,60,-3,56,-1,85,15,-112,127,70,-7,4,48,-72,-29,34,11,-103,-46,114,56,-109,-32,17,9,89,-1,114,92,86,11,-55,-87,-80,-18,53,-4,42,86,-90,15,-50,120,49,-46,22,57,67,-59,90,110,-97,96,119,100,43,-90,-54,81,-89,21,-80,64,-14,-47,126,92,-17,-37,51,121,40,-34,110,-54,-99,36,-73,-43,85,52,-30,121,-9,-18,-51,91,102,-116,-71,86,95,-55,95,-35,74,118,101,-114,87,20,-48,-60,117,-76,55,-108,49,74,-22,20,-43,41,79,114,-96,-12,-68,43,-44,126,-28,83,19,111,-128,-19,102,-110,56,-77,71,89,17,-26,-16,32,-27,-14,-127,-37,62,-107,-34,126,110,74,104,6,85,8,79,-74,107,126,30,-52,80,29,-11,108,65,29,-128,109,-2,59,123,28,-107,62,110,110,-123,71,-68,-39,-20,-108,-57,38,-36,-12,126,100,112,-32,-103,55,98,-82,-5,89,-41,36,88,-92,99,118,-56,97,12,-16,113,88,71,-96,76,-77,117,60,-5,-84,23,-41,45,31,46,0,33,-3,69,4,38,-119,-20,96,-115,-50,28,-38,-9,85,-113,36,-106,3,-96,-23,-80,7,-19,-111,101,92,-107,116,-9,53,-120,-3,5,-13,-87,-115,1,-35,-125,-23,-89,19,53,117,69,-67,-107,-122,-33,-32,-10,-122,-69,75,-116,-35,-69,43,-74,109,-107,18,107,-48,-85,52,-38,50,83,115,-101,5,-39,62,-7,99,-46,97,44,78,31,27,105,-72,-117,-94,-69,-86,108,-59,-30,-48,49,-22,-124,-114,-2,-19,-126,-122,-29,-21,67,60,15,-111,-55,-22,35,81,37,-75,32,0,56,47,-18,108,41,-120,0,122,-4,51,95,-68,-20,125,78,77,119,-115,-9,109,59,-128,79,-124,-114,7,9,91,-8,11,-80,-112,29,-56,-32,11,-50,29,-82,74,-19,-6,-55,12,-115,18,-6,15,-123,-15,72,-62,12,43,1,82,-30,2,-17,26,-30,58,-85,63,-56,-100,-117,52,-90,-69,7,-26,121,111,-92,5,-61,-90,96,63,-18,60,-11,-52,-81,125,99,25,67,82,-71,110,97,122,51,39,33,93,28,-116,123,48,-107,-64,-9,-31,92,-62,-68,-103,-102,-107,48,-2,-100,83,127,41,-82,-105,-7,113,-120,10,58,-122,23,84,-18,20,-37,-82,11,46,42,-95,16,-58,-105,-78,62,-57,-82,39,-18,0,106,52,-51,36,-59,76,98,-108,124,-67,-40,-3,73,19,45,121,-45,20,76,-21,0,-57,46,-18,90,79,66,-56,-42,-47,-39,90,-120,79,103,34,-104,-30,-67,94,120,35,59,-41,25,-128,125,88,88,68,-48,-47,-25,-10,-12,92,125,20,-99,66,55,118,-42,46,114,67,-9,37,43,119,-84,79,-8,-21,123,48,82,76,-63,-23,-17,27,-108,97,53,95,-109,68,41,-50,-32,-119,-20,-71,80,-9,-57,-16,-4,17,-36,66,19,-113,82,-76,39,-128,23,47,9,30,-87,-35,-48,96,100,15,-4,-86,-58,-10,-1,83,-52,17,-102,37,-88,-13,-2,-23,-92,-52,-89,-33,-112,-47,60,122,28,-101,-99,92,-67,-88,77,101,118,-96,-123,-108,-108,-43,102,44,45,-48,84,-25,110,-74,86,-7,50,-109,-9,59,-92,-67,79,23,29,53,-57,-89,73,9,1,65,81,17,31,8,-107,92,126,-119,53,52,98,-126,60,-82,15,-15,79,110,111,22,-82,88,-110,-49,-113,-124,-127,-51,88,-48,-87,-17,-55,62,45,41,64,-111,-95,-122,-46,-91,116,-55,-125,103,75,95,-29,-56,29,-36,-115,-41,-56,-100,88,-81,-33,29,-81,-11,-90,77,-17,-10,-127,-6,-121,30,-4,30,-24,-124,109,67,112,25,-57,34,4,79,126,-109,126,-47,-101,-9,-38,117,-76,-43,37,-120,-86,85,54,-70,56,-15,39,-40,-80,3,26,-64,-45,-69,-35,-120,70,24,-97,-29,-53,19,69,-113,-112,-78,-53,-106,-74,-61,94,78,-57,97,-58,46,58,-21,62,-121,-97,-16,-38,35,35,-127,-120,125,2,54,-30,-44,-17,30,9,-20,30,117,-53,52,29,95,-92,16,60,-29,102,54,-66,122,-110,10,-113,68,-78,-120,-71,111,-96,-37,9,-11,39,111,-52,107,-25,-77,-9,81,28,0,-55,43,-98,-97,-37,-123,69,-4,23,-98,102,106,-11,-42,98,5,115,-121,-84,-86,-78,-69,11,34,-115,-94,3,-104,-9,51,-38,-113,29,-39,83,86,54,-116,-27,-108,61,10,27,-44,65,-91,-86,34,-40,99,38,-14,101,126,-82,-56,-8,37,-102,-52,102,126,-36,74,95,113,-83,-37,-66,-20,-55,-98,-115,-49,96,-44,-123,20,-1,75,-2,10,-90,-61,107,87,94,-63,74,-55,0,2,41,-123,-103,-85,-13,-107,-39,36,-47,6,-21,-70,98,78,-119,52,26,8,-40,72,117,115,-78,76,-57,-60,43,-25,-87,83,36,54,127,-78,127,19,98,125,-30,86,121,62,124,-32,-96,20,-110,97,-126,13,-104,6,-122,36,-105,55,105,-48,-121,-83,0,18,-113,-114,-39,20,9,-20,-23,-49,-115,83,-107,70,121,-30,86,-48,31,-23,125,-114,-67,48,-86,-90,21,83,-79,-107,64,-60,-91,69,54,-73,-77,99,88,-10,15,57,-29,-128,-47,101,-96,-50,112,-85,120,-16,-78,7,27,116,-128,-11,18,49,-19,-33,41,15,-35,84,-67,-15,-57,-73,36,41,15,9,77,83,39,27,-54,-82,33,4,115,-60,101,-117,46,-56,-18,100,74,126,-27,-25,-48,10,-51,-41,126,-81,-95,9,-60,85,99,80,-6,-16,27,108,77,44,46,114,-26,20,-69,15,92,98,107,-59,-114,-87,28,-121,-61,84,125,-125,-44,-13,116,-120,-55,94,-84,-86,-75,34,1,121,-25,-80,26,43,-97,-12,31,-58,75,84,2,-109,12,-61,-68,110,-21,92,-27,13,-117,36,21,107,-3,-125,80,87,45,-108,22,-61,41,75,-115,29,-29,33,-111,-4,-22,-94,8,24,97,-124,25,-52,25,-7,-74,-36,108,-114,12,3,-32,84,75,34,-60,-88,-10,96,84,12,17,114,-119,-41,41,-48,-3,-16,1,21,-14,-115,-11,-25,96,-36,10,-71,-14,-3,-83,6,85,-91,-18,-108,81,36,-33,70,-59,-80,-81,-31,11,19,74,-22,107,91,8,57,29,-95,-80,61,-40,-82,-110,97,122,-114,-102,-77,123,83,122,46,-24,-121,-28,111,18,-47,-35,-102,-120,114,-93,22,115,-82,113,77,-78,76,-66,65,117,28,86,82,27,79,-128,119,-88,63,-31,11,87,124,-10,-71,-99,94,-89,-82,76,-124,101,-53,58,-74,9,-50,-114,31,-3,-119,-51,57,-29,92,-75,113,-47,-103,40,-81,-43,-100,-12,-102,4,12,-36,-26,-70,27,-118,-88,50,-73,28,-113,-94,122,-1,4,-57,124,-126,100,70,-87,62,7,-91,-91,100,-102,-56,102,34,118,44,-90,-47,24,-32,30,-99,-98,36,113,-124,11,-126,-84,-15,72,117,3,-46,-18,97,-73,-38,24,-47,-4,109,-50,-86,-112,88,-97,-65,-73,112,72,-37,-125,20,-29,-43,-2,51,-16,94,58,119,-101,-48,121,-116,94,103,52,64,48,51,-70,-113,106,41,82,-44,111,-106,-62,71,-105,-66,78,-78,71,115,-50,-123,4,33,88,22,-40,-111,-46,-82,-34,-67,-58,120,-28,-18,-52,-126,-31,-109,11,84,-94,10,-15,94,-89,-106,125,-62,-6,98,62,-39,-11,-34,12,12,-18,-50,-78,-60,43,104,50,36,-62,-58,-36,-14,-104,-88,78,21,-18,43,-118,-124,-68,-35,-62,52,102,18,87,25,-106,-78,29,74,127,98,-2,-99,-86,37,80,6,-31,86,112,77,-51,121,-126,70,7,35,3,-85,-24,-78,114,-109,-25,-58,120,-127,-78,26,-100,8,-116,10,-20,-23,14,-18,120,42,-75,79,44,60,-58,102,69,-104,25,119,103,28,-70,22,26,25,124,3,-15,-11,10,87,-23,120,-68,-44,93,7,9,-8,-15,125,-79,-70,15,108,-66,-90,-5,-82,-14,115,-75,-122,74,127,108,-100,4,58,-106,66,-117,1,11,6,-69,-96,-65,55,-8,102,-41,-72,75,76,16,-2,-10,78,59,-42,-72,-1,-31,-100,113,26,-66,48,-4,103,57,71,-94,-2,14,-28,-36,22,-8,-25,39,-51,25,99,91,70,63,11,-124,69,46,-34,-21,99,-70,-110,-90,32,116,34,-74,82,43,-104,-56,31,-117,-43,67,12,-72,115,-84,-62,-9,21,-30,105,82,94,86,12,40,-47,-39,40,-114,-67,-89,-72,-64,-62,-124,-105,32,95,-124,-41,-14,48,26,8,-116,-57,24,-45,-45,-75,-40,-111,-118,107,116,66,-97,-57,-79,-96,-85,-55,49,-55,-32,-87,-76,-12,42,-85,85,-16,75,-41,-112,49,-29,-28,-124,-10,-60,62,-2,-112,15,-36,-33,81,-95,117,120,51,99,-64,30,11,106,-21,-42,43,-59,51,117,12,45,3,-116,110,88,104,60,67,102,-74,108,80,-58,-108,28,38,-108,16,63,100,-24,-36,-1,70,97,7,32,118,-112,-122,-31,-36,106,10,115,-89,35,58,-15,-5,63,19,-123,-99,-11,-94,108,-18,-13,70,-12,-1,126,-15,-9,-25,113,111,66,-59,81,-88,-114,97,-121,-76,16,8,72,62,3,-107,106,-43,92,-91,63,60,-90,-61,96,-9,93,-24,-17,-22,38,-24,29,-27,-36,-25,117,99,-10,76,66,-77,-71,33,-87,100,48,-13,-122,-49,56,-104,72,72,-84,103,72,115,-10,45,19,-22,52,-97,-77,-107,50,-81,-93,-79,102,-71,46,73,6,-21,-52,5,-96,32,112,15,-44,-4,110,5,-26,-85,89,-87,35,73,-17,59,-95,-5,-123,94,127,-83,9,-122,-64,-58,-72,-111,33,-91,-82,56,63,1,6,-67,-106,-55,26,-12,-105,-32,115,-38,-95,118,117,67,-17,95,99,120,-75,2,28,-113,-105,117,-15,111,22,-46,116,25,-91,40,44,84,37,-4,-66,-125,15,69,-14,49,-12,-11,87,-68,20,91,110,117,125,-65,-34,-36,84,-29,-87,-27,60,-66,-118,-125,49,69,81,54,7,-119,53,-23,-60,-9,22,-116,-125,-58}
+
+#define IP4_WEIGHT_Q15 {18,-12,-44,78,104,-34,61,92,-120,-75,40,-19,29,-80,-56,21,60,-92,107,-118,58,-104,94,47,62,106,11,-105,-6,-20,-32,24,43,43,-116,48,53,-86,-50,-38,-108,-80,0,-73,-5,115,-26,111,78,76,-101,-55,94,39,-61,118,94,13,-20,-81,100,70,-111,94,-125,63,71,-121,-70,-69,-14,-74,54,-121,60,107,-121,-106,51,-38,-61,26,110,103,-43,94,-116,111,60,-125,-28,88,83,120,62,-39,-79,112,-85,34,121,-93,-121,97,-45,-97,-90,12,-97,90,109,-45,-59,-100,-105,-21,0,-26,-122,-37,28,35,-10,-115,-87,6,-62,108,-15,26,118,-84,-26,1,-74,73,-41,-65,97,86,94,67,34,59,-99,106,-67,-80,-26,-71,-21,-20,115,109,-43,-107,-21,64,37,-2,-20,-75,115,108,53,35,-102,45,83,-106,-49,-59,-46,-102,121,-41,51,-55,22,19,-58,-103,-116,80,25,-126,122,-76,-7,-34,-2,110,15,-46,82,-16,15,-19,-52,-39,-73,62,93,67,117,-27,62,-12,-89,-15,-100,-57,59,20,-127,52,-37,-79,-41,-43,111,-31,99,13,-12,43,99,-1,-31,43,124,-15,-30,120,-69,-79,-36,-19,-89,89,46,116,54,-46,49,94,85,67,113,11,24,-59,-17,119,-119,110,-57,-81,-1,77,32,118,-38,-13,113,-53,-94,111,110,-19,-14,-53,4,117,-20,-35,121,24,-97,119,18,-31,108,54,30,-74,-121,16,101,65,3,107,-12,-38,14,-53,125,60,-59,17,52,21,-65,-118,76,91,-112,106,-38,98,26,-4,-53,-63,-108,95,-58,63,19,111,-74,73,37,63,-115,-84,-44,22,-47,-51,60,9,29,22,-57,81,-87,-27,-65,-63,-93,63,110,-26,-126,-12,7,-118,-127,-113,-70,45,107,103,-69,-48,56,25,55,-55,79,113,111,120,-2,43,108,-122,-41,93,40,44,88,107,-78,-34,124,122,63,-67,29,14,24,-69,-72,67,108,26,116,88,90,-48,93,-103,-37,127,-24,115,-76,-80,-97,-61,96,-54,-22,-14,-123,-49,62,-17,-1,21,-65,116,10,113,10,30,88,-24,-119,-95,89,58,124,-119,-112,-115,88,57,119,68,-17,31,-27,-9,-64,18,-26,109,-60,4,59,-89,-127,8,-35,-90,88,-76,22,109,-123,-51,88,-90,18,25,45,47,-80,75,-66,-24,-109,-47,-42,68,-8,-98,78,-122,19,33,-72,94,2,-109,-84,82,102,71,55,-121,19,76,76,93,66,-42,-23,-2,40,3,106,123,-111,8,83,105,117,121,-52,2,-4,-18,-4,-19,-125,38,80,83,25,-64,123,47,36,105,29,-71,-72,-127,-41,-82,31,3,-43,9,73,124,91,-3,-99,-27,101,77,-51,-96,60,15,74,54,35,-119,116,53,-4,46,-29,8,2,93,75,-18,38,49,40,30,-30,22,97,97,-8,-35,-111,21,-62,97,-96,-12,82,28,-118,87,-12,29,-16,46,110,8,95,58,40,41,29,105,-58,-108,-29,-117,36,106,-118,11,-124,60,84,-83,-87,21,53,-31,125,-5,114,-75,93,-41,-127,-98,49,31,96,64,-112,60,-126,2,69,-73,94,-23,-100,81,-115,-116,94,-25,-44,46,91,-89,12,-47,75,107,-77,-82,-10,79,-70,-106,75,-1,62,104,-69,-7,-41,73,53,-32,74,26,-113,111,-115,-55,66,20,-91,7,-47,51,-96,126,121,-75,63,81,-23,14,-124,-41,-39,-13,14,-27,16,-56,-48,-43,-84,120,33,41,98,26,-6,18,15,8,31,-9,-50,121,-107,-106,-33,-46,64,-19,127,-104,-59,86,-30,-121,60,-79,39,-38,-5,85,-119,-17,21,-120,44,-22,89,-17,73,-102,49,26,-73,-69,91,-71,-36,103,63,-8,125,61,103,-116,-20,11,105,-116,15,-78,-122,-80,-62,-80,-58,65,-119,-47,99,-26,-111,69,87,-38,-15,-44,-87,-14,-84,-37,-27,109,-90,-72,-4,-110,38,82,-97,-50,29,61,52,-44,-87,8,63,83,92,109,-124,-47,69,-110,-70,111,-10,25,15,104,80,66,32,-70,-16,-49,-52,-16,-41,122,104,22,-31,-109,18,62,102,125,-123,74,121,5,92,-92,-90,72,-61,98,-2,-125,-81,101,109,-120,60,58,10,53,94,38,-25,-56,-13,-80,80,-13,45,-77,-43,-44,-37,-62,46,38,-103,-124,-93,48,76,-82,1,73,74,67,63,-59,-26,76,116,66,70,-113,-30,106,109,25,75,-18,25,25,85,-83,81,78,-50,99,-53,-125,-68,44,-104,96,-44,-126,124,33,112,-75,-29,-9,-60,-126,-84,-119,-61,-127,-6,-46,-26,-57,118,105,-4,21,-120,54,-121,-35,-70,-101,-124,-79,-33,-30,105,57,-108,-48,-111,-65,-108,41,77,112,111,118,68,0,22,110,44,56,-91,-49,-111,62,-54,78,83,66,38,102,-14,41,52,14,-94,106,105,24,27,53,-40,-70,60,-119,56,-95,68,69,59,-101,-124,-25,-119,-45,102,-55,-38,61,57,104,-96,88,122,99,-122,77,106,122,33,126,-5,-74,46,116,-52,-51,-101,74,74,2,-3,-21,-38,68,-30,17,96,71,-124,-23,47,64,-35,24,107,49,41,-50,-23,88,19,55,-30,-91,3,-54,-14,125,10,84,-96,100,100,67,-116,-40,-124,2,53,-62,45,72,21,82,10,-47,-126,54,-84,-50,13,-2,-66,-1,103,96,-17,123,59,-111,-61,-70,-20,-57,54,-94,-110,-125,3,-101,14,-128,-86,80,-44,-94,37,113,123,-104,-9,-87,109,111,120,33,-7,-62,-51,-57,49,-71,3,18,-49,-94,-32,-92,40,-52,3,52,105,108,123,40,1,2,-86,38,-104,52,-93,-44,-73,-62,91,-88,5,-91,-61,-24,-40,-30,-48,-115,114,62,-128,-85,-93,-43,104,-20,102,-103,-52,-56,25,-103,49,-25,10,84,-52,51,-94,-110,26,-108,1,30,32,-23,126,-112,-82,86,-102,-17,-108,-32,78,32,80,-125,-112,91,8,-69,24,-95,-86,-73,-115,14,9,-2,-121,101,-109,-72,1,54,84,-36,25,95,-49,108,-110,4,24,126,66,-63,56,-8,99,-10,-80,-73,5,72,-103,-10,-35,78,3,42,-61,-83,-115,-99,84,78,20,30,-66,-88,97,-120,-66,120,-46,-29,-57,118,15,-94,-110,-29,25,89,113,-110,-52,90,-92,105,-30,48,92,-44,-1,-39,-96,118,115,37,-3,15,-1,-2,64,81,57,-47,24,-14,89,-103,48,-127,-95,-100,-114,14,-69,-82,-32,-9,-77,-38,33,-76,-63,-32,51,69,-8,26,-75,80,59,101,-31,40,-37,-23,76,-110,-23,-83,-84,111,-31,124,122,-56,-67,-112,4,-123,65,67,101,12,-23,-12,-43,54,-87,35,66,-89,-47,-105,55,100,19,-80,21,-76,-85,-117,-61,19,107,-71,42,86,-9,-80,33,-65,120,106,-49,77,-34,-38,-50,-27,21,-28,65,97,108,-77,42,120,69,24,127,-20,89,112,-66,-126,-110,103,43,0,-63,28,-17,36,-43,-68,-117,115,-69,70,107,2,94,95,9,-83,-99,47,53,80,-105,28,-27,119,59,82,95,-94,-16,-49,15,-122,16,-89,17,64,-6,88,4,21,47,-78,50,-25,121,-36,-47,72,-21,-101,29,9,-83,28,-113,-68,23,115,-67,-101,-101,102,-98,-124,-98,-89,-24,82,-28,40,-89,125,23,83,97,-53,-7,-108,-90,-83,-113,-26,-58,-119,28,97,35,-74,6,-15,-40,-10,11,-98,79,101,101,-72,8,-99,117,80,-65,127,95,15,60,-29,2,-92,60,-118,-116,46,79,-79,-62,-43,104,73,107,117,-43,-127,-67,113,44,-41,67,-98,-73,26,74,59,-111,79,45,21,-60,-26,18,-72,54,-70,-30,10,114,-82,-124,-126,-52,-97,108,120,-19,-111,-52,102,10,18,99,49,-128,-17,91,-46,83,-76,-3,-41,45,47,-72,3,-19,112,-104,122,14,-77,-35,-23,121,41,-123,-2,-60,50,44,84,-45,69,-58,-69,43,-98,-11,-17,112,-95,-36,-69,67,-52,-11,-45,98,-126,-33,81,51,101,-38,67,68,-37,-78,12,107,105,75,-100,-109,-55,0,11,45,-24,3,54,-70,77,-63,125,52,93,-16,-22,-97,35,97,58,46,-61,66,-98,-61,12,-43,-63,-45,-36,-79,41,-58,54,-49,48,-63,-33,-110,-49,-36,93,73,-78,-33,50,-76,-6,-48,4,-87,-88,-81,-30,-33,-109,10,104,-94,94,38,-124,30,6,102,37,97,56,73,-106,-18,84,70,4,-31,-27,-90,54,63,50,10,-18,-113,125,-116,-86,-119,64,33,26,-128,-25,-77,76,-127,-79,0,60,-65,5,-63,-5,101,-91,69,-49,67,71,121,-22,59,-87,26,66,-26,7,-79,-73,-51,0,-114,-22,40,-115,-87,29,-18,-23,-72,-96,-55,-119,69,68,-102,-99,124,16,74,-34,5,87,120,-28,-6,-92,-111,-42,-85,-36,123,-86,-52,83,-77,-15,43,124,59,-81,103,96,-80,41,0,-62,-22,-13,77,-99,71,-121,104,72,43,107,4,80,-62,54,-98,-63,-13,-92,10,-119,-95,-76,-90,76,78,95,-108,-117,122,-115,88,52,-10,26,122,39,101,-80,12,107,-108,36,-13,-72,36,82,63,119,-57,-44,-7,77,-55,-25,-54,102,-118,-93,-91,58,11,11,-30,80,-62,-77,111,3,105,39,-63,-50,-33,-6,29,52,-98,-80,51,-5,-50,-122,93,116,-77,-45,79,110,-103,-20,-123,-16,-58,93,-101,-11,57,24,44,-60,-118,64,32,80,3,-25,107,60,126,124,-90,-22,-95,-91,-57,83,-46,1,-28,78,-47,74,15,42,26,113,42,-76,14,20,33,-93,37,107,89,-22,16,23,-16,60,108,-117,74,111,52,78,-97,53,-127,123,9,-78,-15,-17,86,5,-17,-120,28,-76,69,13,-76,120,-64,-35,-17,20,-98,126,-42,-88,-99,10,-113,44,84,115,-35,18,81,2,99,-82,74,-125,12,110,55,-110,31,-94,23,62,-4,-62,-122,-120,40,42,110,34,84,2,-3,-24,-75,-10,124,-38,-46,-14,-11,109,57,27,111,6,-99,27,126,72,41,-29,106,-24,96,96,60,-18,42,-104,82,53,-69,15,92,-79,127,-70,-102,-53,102,79,32,84,-119,115,-36,7,-84,-24,2,103,-77,54,60,1,-7,-64,-7,-22,114,-5,19,80,-49,107,-7,-2,89,-63,-26,-111,-51,17,-108,-40,9,-51,58,108,-55,-68,-117,99,-51,-117,-17,46,-33,69,13,-23,4,-71,-110,4,-95,119,103,-30,31,23,76,39,-36,6,-117,76,6,80,106,18,-124,-3,78,112,3,40,23,-55,-100,75,-118,-16,-52,18,69,-77,-91,126,-87,41,103,-127,7,105,106,77,-23,72,50,75,-16,-19,126,112,67,-4,-102,-56,53,38,-72,-60,-69,30,0,47,-95,100,53,-127,-16,-18,-16,29,46,73,90,-112,-97,-111,-15,-38,23,44,45,115,-93,-68,-32,-10,86,19,69,32,-104,-112,97,60,64,87,61,69,55,-92,-4,-77,-28,76,-82,56,123,52,-105,-38,-1,81,80,-40,-14,-78,115,32,-59,-123,-115,50,3,69,-14,5,-39,70,-124,34,61,-35,-57,34,127,-120,-13,109,-108,68,-22,-125,81,89,35,-21,88,87,107,-32,110,-27,-19,-82,-114,-81,99,115,-54,-92,90,65,-126,26,64,-114,36,70,-93,10,-94,-111,-90,118,-45,-3,-121,106,80,10,-101,-25,-12,-72,39,114,47,43,125,33,88,-109,-81,10,98,28,-98,105,96,123,-43,-58,-115,-122,-88,85,-80,26,91,-26,103,-88,-121,-66,101,87,-88,125,20,-58,-62,-46,-113,-100,-36,93,79,33,-108,49,-45,0,-19,70,103,-48,-19,-15,29,122,40,121,118,102,86,-83,111,-86,-26,-124,6,86,49,50,-67,-104,-28,-28,35,52,42,-25,-87,-6,-70,18,126,123,-128,-3,-109,-49,-94,-120,-62,62,-89,-107,94,110,109,10,-37,-126,99,-116,-85,113,100,-19,-52,65,-101,-45,93,-49,96,-78,84,28,-44,5,-110,-48,-26,62,127,49,-53,57,67,-85,127,60,120,-67,-96,107,34,-60,91,-6,-80,-8,-77,-119,50,89,-52,-64,96,-60,127,-76,-34,-1,-52,34,-25,100,99,-94,-46,12,-47,47,-47,-14,45,59,3,-74,-85,-49,103,-79,-6,-1,-25,0,-2,-44,-29,-11,6,108,-23,-48,91,56,75,-77,-71,-46,-100,-98,-100,90,-29,-56,-35,-3,54,-126,-62,124,1,-88,-26,4,101,95,-113,-67,75,39,104,-106,68,127,-127,-15,-36,-12,23,-51,-118,-22,-67,-39,-71,-77,52,104,9,-106,10,53,34,-98,-67,-74,84,95,87,38,-35,-103,-38,-125,-124,-31,41,3,-89,-41,-107,-9,-90,-39,-58,83,-106,-86,-24,-93,18,23,14,36,-56,-36,75,-123,10,7,109,13,-119,113,80,-68,45,35,57,32,-17,-1,28,-98,52,6,-37,-97,118,48,-119,-69,-102,37,-18,-4,-59,101,15,91,40,-31,3,5,-9,105,-9,-33,-31,-7,-71,-112,-71,-2,70,98,46,73,-99,42,-77,53,-38,48,-1,-120,76,-33,-62,-35,117,67,-117,33,58,2,-127,-100,-66,-117,-82,91,115,-111,33,24,-125,-89,76,84,15,27,-5,-87,49,-72,-35,-128,-49,114,65,82,-71,127,100,41,74,-63,52,0,-67,8,117,-102,5,123,87,-37,8,36,126,71,-108,-73,20,104,-76,-71,-50,18,-56,8,-62,-52,-105,-127,41,16,-26,-122,31,11,70,-100,-109,117,-35,88,29,-45,-78,115,-86,102,40,18,-58,-54,-84,32,-36,56,51,52,107,126,38,78,-66,-77,20,65,-119,-113,26,85,-92,-67,-35,-24,-47,-9,43,62,-70,-66,-41,-7,-72,-77,-79,56,75,49,67,65,43,102,-78,113,98,53,-47,20,-116,-4,-2,-12,-36,50,8,-118,-79,-120,-37,4,103,62,51,107,-90,79,49,-17,61,-15,36,17,-117,39,123,-87,61,11,96,-108,1,53,51,36,-19,-51,-69,-40,-91,127,-90,-62,126,79,-72,-61,123,41,-27,11,14,76,-67,-17,-70,-104,47,73,32,-120,-109,61,38,31,-1,-37,35,-21,-26,59,-53,-85,18,75,106,93,-83,-31,-18,-127,18,19,66,-74,10,-25,45,18,-109,30,4,13,-62,-47,13,-59,44,-96,19,-18,-113,65,-5,-75,91,-21,68,-90,46,25,-110,1,-115,-88,-91,55,13,86,24,-60,85,108,93,27,-61,-14,28,-110,-17,-18,68,70,113,-52,58,-9,52,111,-64,-97,64,-100,0,43,32,-88,13,-32,0,110,-104,92,108,66,-112,65,34,-64,-125,106,-9,113,-116,91,-35,-88,-91,-16,13,-117,3,37,121,-84,-75,-1,-44,-49,13,-77,81,46,113,-115,15,-37,21,-17,33,-19,-83,-95,27,28,83,53,22,-23,66,-25,-57,-15,-56,69,106,49,63,-120,125,106,-86,55,40,4,-96,-26,43,60,-107,-116,-76,-89,101,51,98,-21,106,-49,53,110,83,27,-119,36,2,-5,86,-50,47,-75,42,52,-59,63,-71,-67,60,83,6,65,124,16,28,14,63,-58,52,23,30,-81,49,-123,-26,42,-39,60,-27,-61,-66,-18,-88,-22,-46,-61,-60,65,66,-100,111,116,100,50,92,103,-83,111,-72,-5,116,111,72,39,101,54,-65,-44,8,-128,-88,113,18,-70,-78,-70,87,29,112,-31,63,9,12,-109,-27,-42,-52,55,-48,-70,95,-71,93,122,-46,53,-115,-22,-27,125,125,50,-58,-50,21,-71,9,-6,-82,45,50,51,-14,-74,-72,104,95,-86,57,65,-39,6,-10,21,-76,-52,127,-128,17,-36,-23,87,103,24,-95,95,10,95,21,61,-96,-24,-8,0,74,126,-14,-102,-44,107,-119,83,-123,51,27,-64,-17,124,24,-96,79,118,43,8,-95,-75,-106,-84,115,69,3,-118,122,-64,96,-29,-106,-78,-97,-82,122,51,14,-80,65,121,-66,-119,74,121,82,-120,77,96,-82,56,106,-45,-28,-116,78,-70,-13,90,41,-77,-55,-78,-49,91,-109,-36,-91,97,-31,95,27,-91,-116,-21,-17,87,112,-82,-51,62,-42,64,111,106,68,92,53,-68,-38,-55,-25,-38,-121,74,5,-96,-77,-14,-109,-87,75,-62,-108,12,-97,93,-91,42,24,-5,-45,79,126,-10,-71,-97,97,6,-19,-80,77,39,-111,-69,42,-123,-61,-30,-78,64,18,77,-99,82,-40,127,-39,46,66,46,-82,-70,-117,77,-17,27,96,10,56,16,83,22,114,114,24,-89,118,-84,116,19,-88,80,16,-25,66,111,-70,70,-86,-88,10,-1,80,-82,-95,95,-20,-121,-114,26,-15,-104,-77,-120,-7,97,123,68,69,-12,59,24,-20,100,46,75,-76,-23,-41,79,82,-3,-115,44,-69,-55,-100,95,81,-108,-125,-121,-46,-48,-112,-22,-10,-40,-60,112,22,79,89,-99,53,-54,48,-110,16,-51,77,94,59,-103,-50,-10,34,-115,60,84,31,-58,-55,-10,64,23,-5,112,96,85,75,4,-106,-77,55,-33,87,-76,-79,53,71,-8,-92,63,118,-60,-84,99,107,46,88,-89,24,-41,98,-36,-22,34,-88,-23,78,84,56,52,-14,60,123,-20,38,-56,-66,67,-80,117,-6,115,121,39,-126,-77,-8,89,22,29,-101,55,29,-31,-108,123,125,-46,6,103,-88,-35,25,-58,65,-118,40,-39,26,62,15,-25,77,-50,117,44,79,-79,64,-114,94,-31,-26,-67,-10,-114,-19,69,24,111,14,-33,-52,110,50,95,-107,63,-71,36,-21,-22,-7,-95,19,-71,-38,-88,124,47,120,98,22,-69,73,-5,-114,-18,106,-41,-102,-26,28,-41,-101,-105,-31,-120,-26,22,-21,-31,-44,-50,-127,88,85,111,33,-53,-114,-12,71,53,126,-55,82,93,-104,-77,41,-50,46,90,54,-28,-38,-128,-68,-80,-13,34,-63,31,60,-81,40,55,77,-5,-17,94,-110,30,96,26,61,43,-48,-128,101,13,-8,-6,-29,-60,115,-62,107,-57,54,96,13,114,-89,36,-69,-40,106,98,107,19,-28,-4,14,-97,-60,-71,-64,-107,-48,75,-50,-54,90,60,108,-101,-104,25,92,-60,-17,48,-63,103,113,59,24,51,32,-26,-101,121,71,-21,-83,-68,79,-115,42,5,89,-38,65,28,-91,22,4,89,7,-57,122,-51,-120,-58,-110,-42,-70,105,102,-112,33,-83,21,-14,62,-116,123,-55,-114,95,-110,-46,76,-12,-6,-88,-48,-126,49,-67,95,-94,42,76,84,-112,-64,-20,114,9,-8,-96,-38,-38,-85,72,55,7,127,117,54,-52,41,-89,-46,-95,-121,-97,-113,46,95,79,-105,96,36,62,111,-38,89,-97,61,24,120,90,-111,-69,43,48,88,25,-58,-89,55,26,14,121,-126,42,79,56,-43,-88,109,-53,31,69,-114,-1,-81,94,-50,35,20,-93,62,69,-96,120,-35,-103,-86,126,-44,-96,102,54,12,-97,-79,97,-49,-18,80,-68,-111,-17,39,87,102,6,-10,11,2,-89,-74,-104,-43,-9,53,-68,28,-126,-71,66,-26,34,102,32,-36,-96,-83,87,-127,83,-50,-60,-98,71,-81,108,-97,-74,50,20,-98,-9,75,8,-48,0,124,-27,74,-59,1,-121,118,52,-57,15,112,81,120,-10,-66,42,87,-92,-89,-123,-1,-29,-74,126,57,-50,31,115,-47,-20,-89,-107,51,49,28,110,38,-73,-37,-72,-70,-124,-20,-109,67,7,-114,64,32,-76,101,-107,52,-89,-109,51,-51,-3,-98,122,100,-57,-2,34,-38,22,-101,15,92,9,-104,47,-9,-18,47,27,-38,-58,-122,-20,102,-78,-63,-19,-71,-112,65,-48,49,27,85,-113,-57,108,24,81,-96,-47,99,-67,-121,-17,2,-29,-9,89,109,-45,-127,-59,122,44,-81,-39,55,5,40,0,-11,61,37,-82,18,-97,-69,-45,27,11,-70,-88,31,117,-98,115,114,75,-104,46,-3,104,-67,49,21,18,95,31,-8,11,55,-76,22,39,-17,10,24,-63,-97,57,114,-46,-62,-66,34,-86,-94,-67,-109,124,68,26,42,-65,-60,97,-41,59,118,-104,55,16,-25,-13,-99,-28,-50,-50,103,51,-77,91,55,53,-17,-108,-82,-121,-54,118,24,77,24,-120,73,-61,36,-122,-63,51,-88,22,104,76,14,63,118,122,-31,59,-115,-92,29,-66,101,-48,-7,-5,30,86,-41,-87,11,71,-15,75,-30,-110,2,9,91,18,101,-102,-51,-115,-83,14,37,-41,-17,106,-43,-108,-42,34,-86,65,57,12,-13,114,25,-36,-69,-48,93,-99,-89,-104,54,19,15,-101,-105,24,-51,-26,93,95,-2,-43,51,-14,-112,-83,69,77,122,20,-7,107,-29,79,115,115,-102,-58,-111,46,8,112,-67,-20,-97,-88,98,75,-30,-47,90,110,25,3,-8,94,70,47,22,-91,-103,-54,58,-38,-12,-50,51,37,72,27,7,-112,-50,31,-14,70,-76,-95,-109,-111,48,-75,118,-2,30,-7,-123,32,33,-89,-47,25,-6,67,73,-29,-7,-93,49,111,112,76,-65,8,-76,-95,45,83,-79,84,23,20,-96,-52,15,-70,-56,7,-58,106,85,122,-96,8,-84,85,-101,-30,35,-14,23,112,33,-86,20,-93,73,-30,-8,-79,-39,-77,-36,-38,-107,-112,-89,49,-27,103,48,31,127,-22,68,-35,100,99,57,-26,74,85,118,101,-43,105,-76,-93,-127,44,-1,39,68,12,93,-33,13,-78,11,-51,85,44,-99,12,-85,-63,98,-5,-92,76,25,-68,-86,-121,-67,-64,-109,31,64,-90,-58,126,52,-41,20,27,120,-86,-117,71,-128,-128,-28,-39,82,-102,113,59,30,-128,78,30,103,-11,-95,117,74,113,94,46,56,-96,41,48,-85,-25,-28,-79,104,3,-73,2,30,-22,76,-103,101,83,-89,34,2,127,-26,25,-82,8,18,-3,-20,13,52,-21,36,-38,90,112,-85,-92,-79,9,-72,98,15,-26,-32,-4,26,-26,-94,112,-5,69,-21,31,-84,-17,-112,-83,46,-24,-105,3,-102,15,-60,-123,99,-6,-47,22,-120,70,125,86,35,38,35,5,-100,89,96,64,-33,-55,29,-82,55,-3,17,89,52,104,126,62,-125,-80,113,34,53,77,83,-28,-65,-27,2,68,-114,-37,-4,-94,89,-41,51,-85,43,-36,93,-93,74,-8,109,-92,-70,114,-120,44,-63,77,102,50,36,88,16,19,99,-9,64,-57,-43,-81,-67,-70,-9,89,-64,114,53,-99,5,-31,87,74,66,-37,75,108,-100,85,-101,-44,-120,-32,-70,92,80,30,-16,112,-102,96,99,-6,123,-89,100,102,-38,-90,102,-80,-9,52,9,-47,-114,-81,-128,-112,2,87,-40,-41,46,-15,119,-107,79,105,15,-53,108,72,-22,36,45,82,-88,59,19,118,27,123,-93,-46,-44,93,-98,64,105,-80,99,-110,-8,-51,33,-58,76,-103,87,-13,26,76,-93,-13,83,127,-4,-52,-54,21,70,-93,20,-7,19,7,102,94,41,67,14,-52,17,54,23,-81,93,-61,76,-23,-92,-118,9,110,99,-53,-128,123,-127,-24,-125,-76,88,-79,63,-65,71,-79,59,-45,-64,-85,-111,-53,55,-102,22,-78,48,-67,25,100,0,30,72,19,56,-54,-6,40,-71,-42,98,127,-46,58,40,34,-6,-112,21,-113,2,-14,-42,-25,-78,-55,12,62,58,-127,-44,-40,85,29,-80,-27,-72,73,8,-36,-32,-21,34,-46,84,41,75,109,-41,123,-92,20,-123,106,72,47,41,-73,-12,-38,117,-89,44,-128,-102,-65,49,-43,69,-53,-119,60,-97,-39,9,-118,-33,-58,28,105,-41,70,111,39,-41,90,58,20,-25,-21,110,50,-114,-68,-104,-35,96,58,-16,98,26,-80,-98,63,74,119,-85,21,-124,8,118,-61,-125,-112,23,30,-77,92,-11,-28,-101,-57,-9,93,-49,103,32,-97,87,116,-96,77,-48,-27,92,57,-29,-25,52,-107,-77,-50,114,99,-79,24,-58,-19,-96,-113,47,-80,8,-83,-72,69,-6,55,92,39,17,76,21,-127,-5,-60,-115,-55,-28,40,-43,-43,106,112,-35,-57,25,80,19,-39,-6,-111,-79,4,-59,-77,121,-103,-89,-127,-113,28,61,-50,-125,58,-38,-33,43,124,41,69,-105,2,99,83,-31,-119,-21,38,90,92,-88,113,-83,56,-56,61,-49,-74,-2,-23,101,-114,26,114,-95,-52,-73,-7,-53,116,32,49,119,81,-88,-49,-102,-126,50,-47,38,-13,76,69,-73,-124,5,-53,-63,11,-42,35,-97,46,29,-43,112,-2,46,58,83,-17,41,-5,125,-34,-96,67,49,-17,-80,38,-82,81,29,84,-13,96,-112,49,13,65,117,52,23,3,49,-26,-43,-88,-97,93,-60,-93,-34,-54,-74,5,-113,64,-73,23,-95,50,17,-112,123,-90,4,-35,103,16,-41,26,-104,109,-119,-71,95,28,60,-71,-41,-26,5,-118,-31,-126,58,-93,-50,-48,30,-51,-31,-2,-92,-75,85,-52,71,112,-48,74,-65,-24,41,104,121,-95,122,-83,-49,119,-20,38,97,23,-73,-22,55,-118,45,25,-37,47,-122,89,-4,125,-105,37,55,102,52,-12,34,7,85,15,-6,17,13,18,97,20,-92,79,107,-16,117,-80,60,-3,-23,81,-70,124,52,-36,105,-44,-125,-40,-81,28,88,-57,-111,-96,-49,18,-5,71,-37,32,-73,53,1,-124,77,-70,-107,33,-79,-83,-34,-125,43,20,-55,15,-53,59,59,-97,71,44,78,80,33,-20,65,68,-72,-125,23,-30,-3,-89,93,64,88,123,-44,126,117,59,38,-5,32,40,125,124,98,-104,-31,-59,-27,98,12,125,-43,-48,-74,43,62,-6,73,-3,19,100,-104,-62,35,47,-8,37,60,-125,-100,95,49,-74,-15,8,76,58,14,-85,20,-56,29,70,-125,94,-60,-56,-112,82,73,92,78,-40,-37,37,-50,22,19,63,23,-49,116,27,113,82,-5,24,46,85,41,106,-11,102,-123,60,45,-108,63,124,-67,114,53,-14,-126,-108,64,-6,-27,-19,-101,-27,102,112,-45,93,-4,-36,-68,-111,93,-64,69,-128,-109,-78,-16,-62,-79,-51,-8,-39,-40,-94,-4,123,-117,70,87,-91,-79,15,18,98,11,-51,-104,-76,-59,40,-82,110,100,102,13,71,42,117,-81,-41,-120,-48,-17,-20,44,-44,-120,76,79,123,-128,111,-51,71,-41,-76,-86,-32,80,-43,124,-65,123,21,5,5,55,34,73,-46,-55,58,-108,116,110,85,59,-61,-24,-86,111,-34,-128,-111,59,45,-125,-94,-47,-90,48,-109,-56,-95,-37,-127,79,-17,102,-52,-96,16,-77,31,40,-59,-93,-26,10,-28,108,-2,-85,95,-25,-88,-94,120,30,-24,-69,-9,90,81,67,-92,123,116,42,12,123,88,86,-86,10,-16,-77,54,-119,-54,-43,-7,104,-111,-75,-3,63,-96,-95,112,-68,80,68,-128,3,-13,-37,74,-113,62,-88,-32,-40,-48,55,-21,-64,64,118,-126,-41,-79,-75,-112,-78,-81,19,20,-10,86,97,-20,127,101,56,118,69,-62,73,52,125,-15,-84,-30,65,105,-53,-59,-54,87,-87,87,-116,49,-120,71,-48,-108,99,-19,-107,-98,-40,58,86,-119,-125,-62,-38,23,91,85,-55,52,-31,123,-76,120,77,49,122,-118,-19,-56,86,-74,-15,-82,47,-121,-83,21,-69,119,-86,-39,59,-84,87,1,19,-58,-67,-122,-45,54,-38,-96,-13,100,-91,-118,-97,-72,73,-30,23,-121,-30,-36,94,-38,20,22,-4,-85,-7,50,114,-105,95,35,-85,-41,-89,93,8,-53,45,87,93,117,30,17,-61,69,-61,48,-52,-75,-99,-104,-113,-27,10,80,89,119,107,-76,-30,75,125,122,55,-13,8,-37,-37,13,24,33,31,98,-14,101,-51,24,27,37,-51,110,-15,83,-49,-122,85,-30,18,-17,92,101,12,97,-54,-99,4,73,-82,-46,111,29,-7,-75,90,106,-91,45,68,-111,68,-63,99,86,-74,-122,-35,21,-28,-22,74,-80,-70,-93,50,-9,14,-84,45,-18,-41,-50,-105,-94,82,-89,102,74,-38,120,90,43,-17,-82,-83,-119,-17,-106,52,-80,-63,123,124,75,-118,98,0,-100,-76,77,-72,-18,80,-49,61,100,107,89,-27,93,-70,-52,-68,-89,-46,49,-9,-77,13,-29,103,-52,-69,-88,-65,-33,39,-119,-105,29,96,48,86,-76,55,62,-128,109,5,73,-94,-11,-43,-82,-32,52,122,33,29,63,-40,-89,-88,77,-16,67,-69,-106,-59,112,59,6,-67,-92,-115,107,-120,40,38,69,-33,87,81,9,8,9,-31,-110,-68,113,-117,44,-81,-62,-85,-23,77,-6,84,-63,-126,58,105,-48,75,38,80,-2,-45,34,-62,107,-8,-16,-82,-17,-128,57,-113,12,-99,-110,-47,100,-44,-23,121,42,-29,34,-64,100,-124,123,105,-7,-128,117,5,13,-13,-125,112,86,-4,53,-128,-81,-87,-75,-18,116,-77,-110,-122,100,-60,-124,117,82,-35,77,87,29,125,-127,123,-54,100,-117,-100,-49,-105,-77,2,-110,-4,-101,6,53,63,-103,76,-118,-40,108,-103,52,122,-3,54,57,-86,65,86,4,-106,-99,82,68,-44,15,-41,17,51,4,92,22,-63,-83,-126,63,65,-115,76,-109,80,-50,16,79,105,-115,96,-71,34,-61,-89,92,98,-36,-88,56,113,18,-123,120,32,110,81,108,-29,-31,34,-102,-24,-33,-8,76,25,-128,77,90,84,76,-98,-104,-4,-105,-65,-62,10,29,-80,-116,89,120,101,-36,22,-85,77,-44,3,-107,63,-19,45,-126,16,1,-29,31,-125,113,-108,30,-103,-127,-38,26,-18,-120,-56,-121,32,-25,102,-7,-85,-50,47,-121,-109,-127,-6,-34,55,-34,-114,82,-6,83,-44,-2,-69,101,-34,-21,123,33,25,-23,-108,-46,-107,-46,56,38,-30,108,106,-31,60,-78,8,4,25,124,12,37,29,2,89,40,100,-48,21,-53,-87,109,-116,77,-46,-60,-64,122,-68,-25,-109,28,-71,62,121,-73,-84,80,12,-88,-118,-89,109,-74,106,-62,89,-65,58,-73,-74,-110,-64,-73,-27,-87,96,-128,-122,54,-72,42,22,-37,73,-87,6,31,29,-46,62,23,-99,63,114,-20,10,-43,68,15,-24,124,-63,-25,76,-12,30,-43,-86,38,111,69,-121,-5,-49,-42,34,-51,119,80,39,86,-32,-74,27,-71,-24,-25,73,74,-11,104,53,117,87,-11,-32,-115,-24,-78,99,-7,-113,-76,-99,112,-20,50,121,-9,-103,111,-10,-68,-9,96,-35,-108,10,2,-38,-18,-73,90,-64,-105,94,-22,103,22,116,-68,99,-42,124,-117,-122,-119,-43,47,-6,72,90,52,-52,-76,2,-84,-22,-19,-85,92,-124,13,-115,2,36,107,15,-76,127,47,-39,3,-109,90,-24,-74,1,-29,-17,-21,-27,32,102,-57,26,-108,-114,-104,-112,76,-47,86,-17,-86,38,114,106,-81,-77,67,52,-28,-68,23,-63,-57,-110,95,-81,-35,-97,-96,-29,-11,64,-118,-1,-99,-25,68,-24,-118,-84,-113,68,94,-39,93,77,-80,-1,-123,12,97,80,-117,111,-52,5,5,-24,-98,-27,-96,48,-37,-108,-28,70,63,-21,23,123,67,-33,47,-96,-58,-50,-109,-124,-64,20,-37,44,-101,34,100,95,94,-57,-4,39,-21,-62,-37,-76,-72,-51,114,10,-21,113,-68,45,27,-77,105,47,18,122,43,-117,-99,-82,-15,40,-7,112,-86,27,-37,83,-53,-8,1,-110,64,47,-58,44,14,-50,18,-33,-17,69,-90,51,-58,35,-103,29,38,100,107,-44,106,-99,-49,-90,107,23,-44,-79,-21,7,-10,40,-58,-76,-50,-106,-47,84,34,91,23,-9,113,114,-91,-11,-62,64,58,20,44,-76,-55,-105,38,-101,94,121,-125,81,-128,-55,-101,-22,78,100,43,94,118,-46,-103,-36,48,81,45,90,2,-3,44,-8,-49,-66,104,116,-69,-90,-78,28,15,-65,-31,103,14,-71,-103,-90,36,-54,-81,-62,-35,70,-60,103,45,-13,20,-32,127,-93,59,127,-89,-54,-23,117,77,48,3,-84,-56,-35,37,87,-115,60,11,-27,103,44,78,-16,-3,-112,-44,45,-112,61,-102,-104,-67,88,102,121,104,-106,46,-39,-91,52,-77,-13,118,-79,-52,61,-5,-90,46,24,-84,-59,57,-34,-62,101,47,-66,122,-18,28,102,-123,32,-19,121,12,81,-110,89,-38,-78,8,-78,-2,-94,44,111,-2,-36,-66,22,-59,83,-43,92,-29,60,-71,92,7,-51,19,-2,-66,39,-100,116,92,-78,7,124,107,103,127,-115,62,80,99,98,-74,-95,109,-3,-126,59,-61,-93,-58,11,87,-24,113,100,21,-65,-103,-71,-106,122,-71,96,100,-38,-23,-118,72,0,-68,-55,-108,88,82,73,119,-105,59,-90,-41,99,76,37,-41,-62,18,94,-37,67,56,68,-41,110,-24,53,14,-62,-121,38,-84,13,48,48,116,-17,-80,110,-63,50,8,-4,111,-77,-4,77,112,19,64,-9,-32,-45,77,72,-90,-127,74,88,-61,-85,-75,63,125,-46,-86,-15,79,116,7,76,46,-99,14,36,-55,0,76,95,101,-115,-18,67,-35,71,-104,95,8,-124,-42,38,13,-70,98,18,77,51,-27,-82,-61,-66,26,2,2,-26,-119,-61,-70,44,27,114,99,-99,97,14,34,63,-44,-88,65,82,-47,30,-99,-97,-13,13,48,47,117,4,-29,37,-7,11,28,78,-59,41,-94,8,-125,99,32,-109,-13,14,-58,11,100,101,-94,-61,-49,45,90,47,77,84,19,12,-86,-24,-63,112,73,-48,4,-91,47,54,3,67,68,5,-26,-64,-71,110,113,-96,23,105,-14,-79,67,-18,36,-35,48,-36,68,-33,56,-5,39,-56,-11,-20,-43,6,-33,82,121,29,-78,8,28,-29,-76,-101,-81,116,-72,-98,97,-16,107,123,-89,-47,102,-84,-113,-107,-24,105,-112,-67,-41,-77,-18,29,-19,49,54,49,20,41,63,84,103,15,33,50,-118,-25,42,87,48,61,-48,-121,-74,16,-85,-13,-14,6,-76,82,-68,90,-4,-40,17,2,-101,81,102,-80,-2,-64,-74,-54,8,7,99,-117,21,21,74,-50,-36,-89,85,-75,-35,-29,2,-105,-55,2,71,28,-118,53,-84,126,2,9,-104,-20,45,4,-113,76,10,124,81,83,88,50,66,95,44,-110,17,122,30,92,26,-85,-53,73,-32,-78,-127,5,34,3,-75,81,-15,54,-13,9,-126,-42,-102,7,119,96,34,109,67,6,-70,116,-26,9,103,19,116,-9,88,-12,39,-88,92,85,-87,91,33,-43,96,120,-59,-53,12,84,-18,-68,3,-87,48,-99,87,-28,21,-88,-93,86,116,63,100,33,-65,-56,-36,-36,-38,-80,-62,-97,-87,66,77,-65,103,85,-99,73,103,102,-80,104,-70,60,-6,-96,-67,1,-44,-1,90,-80,-59,93,39,-81,63,66,-35,17,-56,-58,-49,83,-80,71,-54,-111,-7,92,-48,29,56,-7,-107,-114,21,-75,54,-124,-60,-3,-78,-13,-110,61,123,80,96,-49,-105,-115,112,-29,-68,126,-74,-87,82,70,-70,16,-84,53,-16,22,29,-40,-47,-90,14,-117,6,-3,-13,64,87,-84,-100,52,-57,23,108,74,59,-37,82,45,20,87,-65,52,-96,57,-61,2,-33,-39,78,-79,-61,84,63,34,27,37,-13,12,32,101,9,-16,21,-19,59,-119,57,-97,-124,127,76,6,83,80,27,-31,102,-105,56,118,85,89,16,98,-57,68,6,3,58,-95,-78,-77,26,-26,-21,5,-113,23,90,-110,-16,35,-108,-23,-47,-14,-42,102,119,46,10,58,83,-117,-49,80,-38,-58,80,25,-85,40,-2,-54,-35,-100,-77,-80,87,-122,-94,-45,-115,63,-10,86,84,-47,101,-114,123,111,71,-75,-111,-47,43,-35,-99,-22,-3,106,-89,-94,22,111,-52,95,104,-17,71,96,7,10,-99,-90,-38,32,-81,-7,30,-112,-16,-11,-104,106,-30,78,-110,99,30,-31,111,-125,-50,-19,-66,-50,109,-113,26,95,-74,-86,4,-66,70,-4,-2,-14,-86,-83,118,48,-62,-30,-2,-78,102,-105,83,-45,37,58,100,53,-66,46,-104,-25,125,-112,49,89,95,75,88,22,19,-76,101,-35,39,20,-82,54,61,-40,-106,-83,32,-106,-80,116,-52,-45,-126,-86,-56,-71,52,108,70,39,-24,103,71,121,117,120,9,5,-97,110,-79,-39,77,-56,71,-90,-97,3,-8,-64,-5,-102,105,59,-76,-100,-65,-99,-7,-6,85,115,14,112,118,65,-60,10,116,68,-83,69,-118,23,13,24,40,68,-2,-78,-43,79,-63,96,-5,-19,19,-56,94,-79,96,-7,19,-93,31,-47,30,22,89,43,-104,61,29,-49,-111,61,-41,121,32,116,121,-17,-109,-51,51,7,-6,-80,-84,-105,-41,88,-61,16,91,115,69,-25,-80,-12,45,-70,80,75,-22,-38,111,15,-71,39,62,68,-51,40,11,-9,51,44,29,-27,-106,112,-95,29,-105,-114,68,105,-109,-68,-13,-82,33,51,50,-48,-65,-103,-46,13,-29,-51,17,54,123,-91,108,-73,43,-120,27,100,-13,32,52,123,33,-52,-43,-110,-79,-76,-30,-86,-90,109,49,103,-28,39,-52,41,106,0,-13,10,124,-57,-15,10,-124,74,26,91,114,-63,-48,52,11,83,-44,95,13,-23,-57,114,82,-108,96,39,-34,27,29,-60,30,99,5,-101,-128,117,-74,-47,-118,-33,-69,-121,-18,-112,20,-6,117,-35,-80,-35,-102,109,24,-33,-5,47,-13,101,-127,4,25,1,-57,-117,-65,74,-107,-64,125,0,-60,-78,110,-100,-19,-1,-63,27,-17,61,-75,-84,-56,-29,-25,21,46,107,88,-33,109,-89,83,-83,-121,-100,-55,-48,29,-3,28,98,-59,-64,-73,-65,-86,-63,30,92,4,-29,65,-26,-111,47,1,-21,-109,26,-86,-119,113,-1,-29,-88,75,77,-54,-35,-95,22,24,-40,80,127,-56,-24,125,43,-18,97,-32,-77,61,-85,-105,69,19,9,127,65,10,9,-76,90,-37,-2,-15,-18,-57,2,11,27,-51,109,17,28,2,90,22,69,98,-55,-53,-63,125,48,44,-13,-96,-94,65,-116,88,-2,76,72,61,79,64,12,-112,-11,72,44,-103,-29,-24,106,78,91,-93,72,74,-123,-121,-36,4,79,-28,92,83,-109,-99,-98,63,92,-39,98,94,-43,10,-57,83,-23,50,92,79,-111,-79,-32,40,-34,91,-26,115,-124,68,-19,-72,56,-101,60,-73,-55,-83,36,-59,-86,3,-73,-98,-85,103,3,10,-113,53,34,-90,112,-122,-114,26,46,52,58,51,-101,29,-1,-87,-108,25,-77,-51,0,97,32,-36,57,117,67,-124,-61,-67,13,8,-108,-59,-50,28,95,10,-112,124,105,-127,-54,-43,-86,53,-50,-1,-108,65,-111,35,-42,-119,-28,-47,-92,15,-97,-50,12,-42,63,10,-71,-23,22,83,-24,20,-28,69,114,108,98,29,3,123,-42,-101,120,-36,13,-44,87,74,15,-89,77,-23,56,65,-12,19,54,66,-31,-111,-16,109,-43,-87,111,69,79,124,-8,-17,-46,15,-48,61,-28,-72,108,-58,-55,83,53,-80,118,-88,43,-54,74,-38,-102,56,116,-125,-80,-75,-3,43,105,88,-66,-120,117,-58,82,-5,74,6,78,-79,-72,-51,85,-100,-49,123,-42,90,4,-33,-55,127,88,60,-115,-123,20,123,117,-75,9,122,-19,-98,-97,-15,90,92,-32,94,-86,68,41,93,106,-41,-60,-80,40,-91,24,-86,-39,-120,73,-27,125,65,-87,-123,-41,35,-9,113,91,-111,-40,2,5,83,34,-66,114,90,-111,57,126,62,-93,-117,5,-68,60,11,-105,-33,-35,51,-52,97,-45,83,117,-81,36,45,59,64,-43,-62,69,110,-95,88,102,107,-125,-97,43,-122,95,4,1,25,-51,-12,43,100,-22,98,-64,64,94,-74,45,-46,-38,102,-21,29,-37,-123,-104,-2,119,-40,115,15,-31,2,21,75,-115,82,-8,74,18,8,27,90,-80,88,10,-104,37,-1,-82,80,77,-97,-99,35,-105,40,110,24,-49,99,-94,20,43,40,-40,113,10,-71,43,-22,-63,77,64,-79,-3,-82,-44,23,-53,86,110,97,-124,-27,-106,104,-95,-96,-121,-14,25,74,54,72,120,107,-128,-60,-9,21,49,-12,-67,18,-30,-91,-33,77,40,33,38,-70,7,-89,-43,44,-12,-108,111,14,36,85,-15,112,-85,-48,-109,98,57,-17,100,85,-123,-111,-72,60,15,11,-124,90,-105,-107,7,-121,91,-98,-10,83,-116,54,-10,-128,64,38,59,64,-25,-17,36,101,-96,67,-108,-89,46,26,20,126,-71,0,-1,77,32,-31,-72,-29,44,-8,-14,-74,42,-21,-11,95,119,123,84,-128,30,20,27,-74,38,-122,-11,41,94,-33,-51,-115,45,7,74,80,35,-30,18,-101,-6,-92,95,-69,33,15,16,-59,-111,-67,3,-86,28,40,-43,68,27,-95,-111,-26,98,83,38,106,-126,86,-34,-54,-102,-88,-110,38,40,46,-37,81,11,-8,-122,-46,30,90,112,-40,95,-73,-61,77,-123,105,-44,32,-109,81,-110,-23,127,81,-83,-55,77,-44,62,-33,-70,4,-62,52,115,-36,32,-96,-123,86,-33,127,86,43,38,53,21,-125,106,-69,-16,-98,84,-80,-12,-25,17,-70,-72,-33,34,-115,-119,42,48,-34,6,-18,91,-19,22,46,0,-92,-27,-116,106,35,78,50,44,-110,-113,14,7,18,-123,-112,22,113,-91,-17,-51,88,-83,-19,-51,30,28,-64,109,-114,86,-33,73,30,-1,-58,-121,51,-109,104,86,89,119,-76,-28,-90,-95,69,-100,-55,-23,58,-14,-112,30,125,-77,72,-99,39,55,67,54,4,-6,52,50,-47,92,-26,6,3,76,96,89,126,97,80,-80,-76,-100,67,-119,58,-36,-13,16,53,53,5,123,31,106,33,-67,-27,111,48,7,23,-111,-110,-42,-105,-16,38,43,-17,51,-12,-98,-32,89,3,64,65,118,21,-66,-93,-1,-115,93,7,-75,-25,126,107,59,-19,-26,-107,14,75,45,-110,-16,-34,50,-11,2,-109,19,125,-61,-94,-63,-24,123,-11,54,121,-115,-16,-39,2,98,77,102,52,90,-110,-55,-119,109,-47,-121,119,116,65,68,6,6,22,103,49,-121,-117,119,-90,-38,124,-32,90,104,109,-16,-92,-100,61,-115,60,-107,-26,93,111,27,-124,54,-77,-72,123,-79,-89,89,-54,-94,59,108,-49,78,-4,-108,-28,-119,42,55,36,95,-7,123,-99,-42,-6,-100,91,-65,32,-24,-77,106,-5,59,-93,-100,35,115,70,-90,-6,-7,40,-20,76,105,-32,-74,-32,77,-91,114,-126,49,-83,-81,113,84,80,-69,-13,-99,-29,-103,-69,102,-108,-127,-43,87,-11,-126,119,-113,-104,-11,62,79,26,-90,7,-22,-64,-107,77,77,-83,24,52,-90,-57,10,114,-22,-38,115,-52,-37,-63,-76,94,-13,-56,-96,59,78,33,85,-97,-82,10,74,-113,-95,-78,99,50,-66,4,32,69,102,20,-76,-57,-69,-26,5,127,-105,94,-72,-117,-19,-7,-38,-91,24,59,86,9,91,-58,126,-126,-81,-39,28,124,35,101,74,-90,120,54,14,-108,-31,80,94,50,-40,-56,26,19,-5,-37,-39,-117,-45,9,37,83,53,-73,-22,-102,-107,-104,38,-125,-126,90,-106,-98,74,72,21,-56,-76,20,109,52,29,-45,-42,51,-51,-1,122,12,91,-18,-69,-3,55,51,-111,123,-106,11,-108,51,-93,96,-100,-87,91,-51,70,15,-39,-81,35,-54,62,-87,33,-125,-64,-111,14,-89,-109,70,-36,-122,65,-47,126,-119,126,-49,-34,126,46,-87,88,-107,-117,119,29,25,-65,-89,62,-88,-89,-117,103,9,100,-36,56,95,79,-124,66,-126,-5,-9,9,-95,-95,-93,54,-54,-2,81,-106,-25,21,108,105,-9,-37,-97,69,84,122,39,-124,59,98,-25,-67,35,18,48,-105,78,117,-75,-42,-76,3,-107,76,3,79,-81,-61,-99,30,-99,101,-94,-118,112,-88,-82,-19,103,-67,-71,76,-105,-24,-20,-91,83,90,-7,120,34,-26,75,-110,41,62,-77,-116,23,109,74,107,-78,94,26,-125,-13,27,99,49,77,-73,87,100,77,0,93,88,-23,-115,-108,-36,-24,123,-60,-65,-63,-44,19,0,102,-19,69,89,85,-96,-103,88,123,108,-68,119,-99,89,-56,11,116,-106,-68,97,6,-60,52,47,-1,-53,-55,94,-107,-3,-105,-9,-3,-21,-37,-69,18,-59,37,78,127,118,-117,107,-79,-43,124,-108,33,-121,52,-25,-71,76,-2,64,27,-52,88,68,14,25,57,-115,30,-36,63,-16,-75,92,-57,110,-105,-82,-72,-21,30,113,-20,-92,-15,-77,-25,-20,106,22,79,56,21,68,115,98,71,32,122,20,-70,112,62,38,105,48,115,15,47,-124,-71,48,-41,-85,-6,127,9,122,-68,110,-45,-35,-103,-21,122,30,42,-70,68,9,13,83,105,110,98,8,-42,93,-26,117,21,-42,27,-82,110,-123,-98,10,-5,22,-112,29,-32,109,7,31,-91,22,-56,71,60,29,4,-126,63,-64,74,-77,-53,92,-54,-7,-128,72,-92,-20,6,-89,52,-20,46,32,-119,-94,-90,-92,74,106,22,-50,-69,88,107,8,55,3,-102,-64,-106,28,74,13,97,96,110,-59,83,58,-95,-49,87,-106,71,9,125,-19,26,-26,-28,-93,-52,20,49,-63,-73,-11,14,112,121,-65,-128,88,4,72,-29,-117,-74,-33,102,21,125,112,-82,-49,-7,-28,46,82,-71,12,4,118,121,97,28,16,85,50,-24,78,76,74,-47,107,-67,63,-112,-94,93,-59,-32,-48,119,84,74,108,52,-113,-96,-17,27,122,23,-67,-10,33,-54,-63,49,57,-58,-103,54,20,-18,102,-78,-125,20,62,109,7,107,-20,31,-85,104,5,81,-61,51,98,125,-32,125,-90,-100,6,104,64,56,126,-86,24,109,23,15,-100,23,50,-83,22,30,-128,123,-82,-89,14,-82,-48,-36,-92,-12,-65,10,107,-124,-61,-36,-75,0,49,-105,26,101,119,120,-37,-89,-38,18,-55,-118,-47,-92,-17,-14,48,-50,-72,-100,112,-125,-106,126,-114,-23,-105,102,-41,-7,-5,-25,87,71,-111,-76,-11,-106,57,39,-84,-28,123,47,50,-23,-66,102,-101,-65,103,10,32,84,82,32,34,-112,-14,-109,-125,79,28,97,-18,38,56,-70,-36,-6,-78,33,-80,-120,104,27,68,41,93,125,-95,90,-18,-33,-97,-102,53,4,-79,-27,30,41,-51,-72,-74,-102,92,28,-56,122,114,-105,121,-51,8,63,-117,-56,126,-127,-126,84,49,30,-76,-45,-13,53,57,34,3,-85,49,41,-112,-71,127,22,-111,-114,-34,-45,38,44,97,4,52,-111,-35,-98,-24,-53,42,-118,74,-86,-19,-52,-119,-88,22,119,-89,71,112,26,-21,52,35,65,126,117,-110,47,4,-66,21,-8,-51,-72,-120,72,-107,85,3,72,73,-27,-36,19,-114,71,-89,-111,-100,116,-97,-53,87,-68,-121,-29,17,-60,-28,-64,116,11,45,-125,-83,-55,71,4,-3,-123,53,-122,42,-45,104,101,-22,81,-24,49,-37,91,-2,44,-77,-72,-64,-80,-100,-75,-26,-102,108,19,-107,-23,-51,-11,-4,-18,118,-18,125,-84,90,41,8,30,-54,21,-91,-115,102,-99,-35,6,-35,24,102,26,-108,-8,39,-93,1,76,124,-9,28,114,-39,44,9,72,-72,67,-24,-41,-3,-92,-58,-31,-57,29,127,36,16,-87,-1,-124,-34,57,-23,118,-38,51,-19,121,15,-2,-44,8,-87,-82,-47,71,-14,16,-41,48,79,17,118,-83,-84,5,-62,-127,-20,28,-12,54,-95,115,-89,124,-18,-118,40,-125,-97,15,3,89,-21,-19,45,23,-58,39,-1,19,-18,127,-121,-46,2,-24,38,-64,-48,19,81,-16,80,-37,-128,123,-43,36,-73,-127,55,-62,121,14,93,42,56,-117,-43,24,-99,-79,-46,-34,-112,-99,38,11,-19,23,-70,-121,-128,-81,-110,-76,88,-53,-51,-128,51,52,54,-58,-80,-35,83,20,10,27,-109,112,119,38,-19,120,97,67,24,-65,51,84,37,-8,112,67,6,-127,-104,-50,118,58,-1,-97,-94,78,-103,10,30,-95,-94,-42,107,-67,-41,-39,63,-108,27,91,21,-23,-88,-118,-55,-1,-28,-9,16,-29,-37,-55,-80,78,-82,-112,62,48,46,-41,1,34,50,12,-53,46,123,1,37,71,108,3,41,-123,-94,-50,-16,8,-42,86,-39,51,-24,119,20,-55,22,115,-82,114,-86,-110,8,-15,-72,74,83,14,93,59,122,107,3,-17,93,41,51,-56,-125,-21,28,38,-59,69,71,-48,111,38,79,-29,-23,-17,0,-110,75,87,113,32,50,-113,4,-4,12,-20,-27,-61,-41,-117,-56,-99,-77,115,-87,-99,40,-95,-99,-31,26,-102,119,-53,2,4,29,-21,-86,94,112,-82,45,23,-65,-23,-85,-97,-17,100,75,-110,116,1,-109,29,-111,80,-90,74,93,3,95,-48,112,-106,-18,77,25,-29,-22,-117,72,94,9,113,95,-1,-104,-28,-124,12,97,66,-109,33,-94,91,-29,-88,-102,-76,77,21,-65,51,95,54,-16,78,-116,78,-79,-51,-107,-123,2,49,40,-124,-90,97,64,-3,-105,71,14,-114,112,3,124,-83,-105,94,-50,35,59,73,-63,120,-43,116,16,-91,-46,-117,-18,-108,-26,-84,84,75,123,-21,-97,-118,-119,34,72,-59,-108,-65,-104,21,70,-108,63,-35,-26,-63,-11,-55,53,-125,-81,-58,-115,-54,-16,59,7,-12,0,-67,126,81,-72,-118,-76,121,-13,5,27,80,-23,87,-125,-85,-14,-37,-6,-56,-79,-118,-19,-43,-45,72,71,-91,-49,31,-121,34,-90,89,-22,46,116,-62,-59,-4,49,12,23,-39,40,88,-54,12,120,34,26,42,-7,-18,-89,67,-37,123,61,74,-91,-36,-38,15,-104,113,46,0,54,28,100,-44,-75,25,-56,28,103,44,-92,34,-100,-113,28,-75,-16,-121,-7,38,58,-99,66,-20,-2,-122,-19,110,11,-58,45,-72,17,38,-45,6,41,64,-86,36,44,91,-45,17,-93,43,-73,-41,-70,52,121,-71,53,-90,14,115,110,29,36,-46,-75,92,97,102,-53,-88,-32,53,122,-39,20,55,-102,-101,117,82,-26,14,46,-120,-91,85,36,101,-108,-81,-26,-18,115,-50,-47,7,18,-125,-24,-46,33,-24,-108,-71,33,41,99,47,-66,-43,-25,117,10,53,-2,10,-14,126,-112,104,-74,-77,-57,24,-30,81,93,115,69,89,10,90,34,88,-116,-90,65,72,43,123,51,-85,55,8,-12,13,10,-90,-37,123,-4,109,40,105,112,99,64,-74,-83,104,44,-20,-16,54,25,-82,-54,64,-109,-37,-3,107,-17,124,14,60,-64,-47,-72,-84,40,-74,89,6,36,-98,-125,30,63,14,-70,109,-62,-38,112,127,-41,52,115,27,-56,-112,76,-107,-65,-118,26,-74,-53,-96,114,-120,78,24,77,48,60,29,49,-117,-15,-91,1,-26,58,-84,-9,-109,-115,-89,-21,82,104,36,116,-103,121,93,-50,-39,-103,37,52,-108,-28,49,-87,-115,-93,38,-37,-68,-28,14,-26,-41,19,107,-2,-107,-37,-49,11,17,-120,24,24,-110,-100,93,46,-84,-122,38,6,-53,-7,98,102,65,35,-8,-6,44,-99,86,-5,67,-4,-65,13,66,23,-111,24,19,7,9,-92,29,114,58,-43,-105,-61,-33,34,-57,-26,5,-11,77,48,0,-41,-49,22,-20,-44,-30,-99,10,45,47,-51,-29,20,-11,-61,104,99,-15,21,-67,44,-71,108,-83,-11,-104,57,39,-84,2,122,14,127,-110,5,-79,98,95,23,89,3,68,-87,94,-9,40,104,107,24,-97,26,-36,-111,-95,-100,31,-97,49,77,-69,112,-96,-111,-45,89,-9,127,114,85,-102,-5,16,-1,-53,31,-69,-53,113,-6,84,-6,-18,62,-44,-73,68,-15,-105,-36,127,12,-27,-28,-31,-42,51,-121,86,-19,-111,-86,-119,93,-74,67,32,51,73,35,-106,18,70,44,72,-82,50,-19,-45,98,-60,-84,-67,-84,-126,-5,38,-67,-2,-62,-54,-23,-110,113,-14,-89,52,28,-61,11,4,70,-100,-35,0,-46,-124,-11,49,118,39,-80,-70,-100,-120,-54,-69,102,59,39,16,-49,53,-50,-27,44,90,-115,69,-102,-113,65,20,-47,59,-115,127,-19,-54,-19,-27,-28,-94,39,65,-114,-115,75,-46,-85,75,-4,-67,127,27,-98,-42,1,-124,-43,22,-21,-27,-74,53,-45,-90,127,-83,-44,-86,-23,10,36,86,59,99,-126,108,-59,-99,-45,-16,91,-33,110,-120,106,-87,19,122,115,-86,85,67,-83,-4,-57,-111,4,-5,-58,-91,-2,95,11,-53,107,-68,-128,-68,-12,85,19,-36,-40,-56,10,-64,58,-12,-32,79,20,37,-65,-33,-9,88,123,114,94,31,67,-32,-2,86,-124,-116,-62,-100,41,-17,35,-81,67,-110,-85,83,45,-121,5,-120,-3,47,14,-65,-78,-114,-87,-9,-19,-21,-7,106,74,117,-40,78,-33,63,61,-70,26,56,-9,76,-121,14,-77,87,-125,69,-32,-101,50,30,104,-59,-117,43,80,-98,-11,-94,-23,-108,52,-38,97,24,-10,-41,125,-119,-19,-42,-56,25,65,7,-39,-102,-4,110,109,74,18,13,-126,96,95,-89,99,15,-3,106,6,72,35,82,-78,-15,73,116,61,-127,-83,54,98,-17,2,-7,88,-57,-37,-39,-102,-79,31,-6,111,-62,-24,103,69,74,113,-15,65,68,37,-65,123,94,117,-121,-32,-78,-5,120,59,104,60,68,5,-65,4,64,-85,-80,117,-101,61,46,-88,69,-123,-19,-57,-15,97,125,54,-23,84,-124,-27,114,-47,16,104,-100,44,-87,36,-27,81,-20,-73,-80,95,-64,-34,29,-77,66,-126,77,-120,105,-100,79,44,116,-18,-15,-27,-71,19,12,-80,-18,27,45,-92,116,-27,-14,14,-77,1,-40,-110,-26,-4,-120,-88,60,51,108,-101,-123,116,-83,111,1,-74,-69,87,11,124,2,93,-64,121,-45,62,-79,110,-37,-55,97,27,110,-79,-91,67,99,53,26,-74,43,98,9,-43,-103,80,-23,60,68,-36,-112,-64,-31,20,-52,-79,-7,-113,94,-30,-100,73,55,-111,-1,87,-29,-25,-94,42,-13,-63,-59,108,38,-16,-62,-85,-17,0,-90,47,116,-80,12,-11,-54,96,-12,-110,-6,-128,-64,-31,-109,103,58,-11,-118,-3,0,-102,64,39,-18,-67,93,95,102,-87,104,88,-62,-31,-36,-61,-105,-26,46,-53,117,93,-70,-54,-103,121,52,-24,82,-10,-124,-22,-122,29,84,-76,121,-64,-65,-6,80,52,-27,7,108,-118,64,-82,-44,73,81,-107,84,-88,-100,-59,-56,9,35,-39,-82,-68,26,65,-66,-73,-15,75,-31,-44,51,-65,-73,-62,100,51,78,-51,-112,-84,82,-19,93,-92,-69,53,-38,-66,127,5,-30,61,26,43,48,-63,24,31,-71,-67,-127,-60,-55,-26,38,-43,-63,-49,-37,-101,116,105,-109,10,3,-67,17,-42,-89,110,62,-103,-41,78,-47,-59,-47,-17,-51,10,-16,-31,68,-41,37,15,-123,94,101,77,116,-122,61,-96,-122,-8,-11,105,-74,109,-97,-111,114,44,105,45,42,-94,-99,-52,122,-113,87,-59,-109,85,-128,120,-49,21,-75,-89,-10,11,120,-51,-19,30,-79,-26,64,-32,-71,28,-11,-44,55,-28,109,59,-84,-22,-55,-113,-105,114,80,50,-26,77,54,36,42,-71,-64,-111,118,99,-121,-100,-128,56,-75,-10,-74,30,36,93,-122,16,-50,-105,85,19,-84,-99,-72,-20,96,-63,75,-53,59,-86,90,-23,-39,-73,96,-118,-127,-9,-106,42,-84,-122,108,-18,81,29,-58,46,94,12,-2,-94,-75,33,85,61,-100,122,2,101,106,45,-49,-43,-63,22,-128,94,5,-115,38,35,54,-8,15,35,87,-114,-76,110,37,-50,20,-114,84,115,-13,48,54,14,-58,-93,112,43,77,9,32,-99,-91,-55,34,-82,23,-40,17,62,66,84,82,-3,117,-100,33,32,19,-100,102,93,101,-33,-103,112,-38,114,38,-1,-89,-90,-86,-9,-101,-66,41,-71,-113,5,21,-40,50,89,-73,123,5,45,-75,68,58,-107,-67,3,-64,89,45,-117,51,16,-119,36,69,-78,-18,94,-18,61,22,-124,97,-55,-97,112,19,119,7,65,-109,23,-15,88,-47,-103,-84,-62,106,-5,-108,73,-109,34,-116,33,81,-41,-102,81,67,20,67,-46,-40,-9,10,-49,121,-57,61,-33,28,42,-36,-67,-113,-38,-94,-89,-67,-28,-17,52,-116,-96,-51,117,29,-84,-53,-38,-53,-44,54,-110,98,-76,117,18,83,10,-62,-36,102,104,80,124,34,15,108,47,91,-112,-10,-116,66,-68,-123,55,-67,87,51,74,-47,25,-122,-34,57,32,96,-96,-64,67,-41,31,-124,-87,-15,76,-125,1,-77,13,99,47,-44,74,97,67,-4,108,-9,-16,44,36,-53,3,-120,105,99,-55,-34,-30,118,8,106,40,-95,-122,-65,14,-23,86,-26,-64,114,89,-59,97,-10,71,10,-108,-60,61,-87,-19,-4,-28,-1,-32,35,-123,55,109,-47,-126,-1,-124,-36,120,3,-107,-17,121,-80,31,25,79,-32,127,-19,103,-4,118,21,-55,70,125,-95,-104,-78,-2,-24,90,-33,97,-79,-92,20,126,49,60,121,41,56,120,113,-102,74,1,-28,44,46,-19,-46,100,-127,77,-64,-8,-12,-13,11,-15,89,22,-95,86,36,-105,110,84,-83,37,-40,-56,-92,19,-82,-17,-25,83,33,4,-111,76,-85,-54,35,-107,-72,127,76,89,-103,-123,28,-96,-47,95,77,107,-35,-98,52,59,-76,75,87,-14,-56,-27,75,117,-34,67,91,-92,-95,-45,-116,-13,-81,5,-35,83,10,85,-112,-38,117,89,43,123,-73,-43,104,36,-106,-80,47,113,-82,51,36,93,33,-84,11,-53,-128,-84,82,-86,-118,0,-33,-6,44,-122,35,81,-71,-44,-73,-64,126,98,-20,-49,-126,-104,46,44,-63,-17,-62,-74,-61,-48,-28,67,-25,-99,92,66,73,-38,49,45,-69,92,-26,-91,80,105,-30,48,-76,85,108,-98,-56,-95,102,47,6,-70,-118,-31,60,-112,-62,89,115,-78,-85,4,36,-1,72,-17,-100,-56,-2,-104,24,-54,-56,-92,-106,-60,-115,-53,-106,49,85,33,-79,54,-77,44,-120,47,41,-60,44,-8,-28,5,90,114,42,74,106,-57,-81,79,83,-67,-97,-90,-120,-16,-57,-88,34,9,7,-107,-59,-92,40,71,-32,113,-85,89,33,89,-58,-78,-50,-22,58,96,66,-19,-125,-39,-42,90,25,70,-104,-31,-90,-21,98,118,-111,102,-35,44,-117,60,86,-62,-47,-4,14,-88,46,79,6,-81,-5,101,99,-12,96,43,-27,42,65,-3,-120,-93,112,32,-6,-111,89,105,122,-67,50,57,-54,-126,-46,35,48,-41,0,-98,71,-22,45,-125,7,81,-26,23,-60,118,25,101,-95,-128,117,22,-126,-29,74,86,-39,-53,65,-86,64,-62,-77,-8,90,-85,54,-28,-128,124,-1,-112,127,105,-124,-40,63,123,123,-77,13,-84,-5,53,-31,-46,-74,-36,27,-16,13,-124,-98,-24,-115,-83,48,101,92,13,-98,-5,-111,-10,-40,-51,-115,-81,-52,-82,24,102,97,98,109,107,-46,-1,109,50,-48,40,-23,71,34,-70,-13,-111,110,43,-41,-9,108,-1,37,45,-72,-28,-45,-50,9,121,-66,-4,-86,-10,18,16,64,-119,-36,33,-13,5,-125,93,-6,19,-61,126,95,48,-116,11,125,-62,-6,67,-1,111,-54,2,45,82,-103,-4,-66,19,20,18,15,48,94,-91,119,33,82,-15,116,-24,15,67,30,111,-106,90,13,80,-20,71,65,66,108,124,-94,-104,-124,120,-95,59,-80,16,83,-101,90,14,-96,25,-64,-38,98,-24,-17,-69,-89,108,-29,-30,-101,-11,99,13,-56,53,72,52,105,105,88,2,26,75,23,-13,3,122,-114,71,-70,-29,-9,-98,58,67,-122,87,126,7,-30,111,-61,69,7,11,-6,103,-6,-16,-32,56,23,94,-31,29,-63,-47,5,67,61,110,43,57,54,41,28,74,-65,97,-22,74,-115,-126,86,0,-50,-83,-93,-3,116,5,22,-29,21,-79,34,-54,68,77,-34,-76,84,-116,-102,-31,-13,-55,64,85,-42,44,43,-115,85,100,-104,-60,103,-54,-65,120,-69,44,59,-102,107,81,89,-79,-44,121,70,-24,-110,51,76,75,117,-7,110,61,-102,42,-28,-28,-67,-12,-19,102,-27,18,115,121,-46,68,-124,-81,-110,-33,108,56,-83,30,-97,4,-79,-17,88,114,-86,105,17,-9,0,61,101,11,7,14,-100,58,-38,-42,27,121,119,-48,56,62,94,39,-20,-49,7,26,108,-99,-44,120,-2,87,-117,-78,-56,64,76,-83,26,-105,21,-3,81,8,-74,-100,67,50,9,58,-14,-118,-96,-13,27,65,-122,-73,-83,102,-40,-60,-120,-13,16,51,-51,112,-81,-15,-7,127,100,-116,-20,83,-72,59,-39,121,-43,114,55,97,-9,-53,107,56,45,49,106,-102,-126,-54,-44,59,18,-64,-75,101,62,-123,-110,-70,-17,24,57,-44,-122,104,-119,43,-40,18,-113,-107,25,122,-90,-19,123,74,-86,-35,107,102,-51,-22,56,-14,109,-100,-124,1,-85,35,-16,-124,-21,-65,1,30,-75,55,67,-121,-78,109,-102,82,-94,-23,-60,46,-104,0,-96,6,39,12,101,62,-39,37,-84,-92,3,48,68,34,-47,26,-67,60,-2,25,118,-110,77,91,46,2,43,103,-85,-107,-23,83,-23,-71,-110,-7,42,43,-82,16,57,-55,-102,-52,-32,32,-111,-70,75,116,116,-11,-44,-75,1,-14,-123,-128,-85,31,71,33,78,-72,-102,70,48,-72,-15,60,56,38,79,93,-83,114,75,-6,120,-78,25,-127,82,112,-37,-90,-92,-121,-112,-35,119,8,-32,-35,77,58,-9,109,-107,69,-21,11,-42,-128,-70,48,-23,-30,-78,-81,-123,30,-40,-8,-127,106,9,64,-78,-51,122,95,81,-109,-15,-43,118,27,-92,88,-109,37,-106,52,-62,-8,119,-45,73,65,127,-96,53,-115,-125,46,89,47,115,8,70,71,-40,-107,15,24,-119,-64,41,115,54,-11,-108,-103,-20,6,104,-67,-8,95,90,102,19,15,-22,73,13,-7,113,55,-53,-123,51,-110,40,37,-103,-83,-61,34,114,59,-25,-113,87,-103,-26,-10,88,-121,-65,-79,92,-63,123,-62,59,31,-87,-11,31,113,14,88,23,25,35,-49,-21,-83,-59,53,109,-72,-22,-64,89,59,-104,-42,24,52,-60,62,91,3,7,-21,61,15,-117,-109,65,-1,-39,25,-34,-37,26,-2,62,-51,61,24,50,-15,-32,-48,-55,25,36,24,6,99,94,-25,86,-84,-30,-95,-102,-94,-53,29,-81,65,69,-85,65,117,-7,0,-23,-66,-75,127,62,-108,10,-5,-4,66,29,-59,41,-82,-55,58,65,9,-128,55,-67,-58,-28,123,-121,99,-70,-99,11,-6,122,-108,119,-18,1,78,61,103,121,-104,117,-68,-22,-108,64,31,-68,-68,52,-96,41,58,-54,11,-26,118,75,14,-54,21,-119,60,-66,-19,-64,11,-5,76,-9,-97,81,-126,72,62,-115,64,23,117,65,73,-121,-87,-40,-48,-82,90,73,-91,42,57,-53,54,6,-11,102,-104,0,-117,70,52,103,-56,104,-1,-103,-12,32,59,123,12,-75,-104,16,-123,31,-35,55,20,-116,-109,-50,-44,-63,24,35,76,-116,-29,-32,16,-43,-68,-56,-115,32,109,-9,-34,126,-39,-74,74,-46,-19,-105,-82,-115,32,17,94,105,-103,-50,68,-121,-29,-7,53,74,77,-123,98,-68,37,62,-8,-21,-23,-99,4,-80,-103,-58,45,-2,-95,58,5,35,19,-37,-65,108,-14,-90,35,-53,-123,28,-5,39,-21,-38,17,70,-53,30,94,62,24,-74,34,14,101,46,20,-61,94,-121,125,-122,88,-127,36,-97,-98,110,80,80,14,72,10,8,95,4,50,113,27,-124,54,-117,-48,122,-39,52,8,94,61,40,-69,21,-34,7,-56,-90,-123,24,23,57,89,-87,-97,-80,-16,63,-50,76,-118,-25,-17,90,24,-4,-112,32,-94,58,-32,-12,11,28,48,-38,118,-69,107,92,61,-104,116,-62,-112,55,-110,0,127,-46,-54,-57,17,116,54,-36,-90,114,-39,-32,53,33,-69,37,72,-70,121,60,-84,22,-95,-74,-105,-7,-67,-41,-49,55,98,-57,60,-51,-107,31,48,48,-72,-38,-35,-5,29,65,-102,78,79,-8,71,-113,122,90,76,-55,-31,77,102,-66,107,-128,112,101,122,-62,-83,111,126,101,-75,-55,-118,68,52,-128,115,76,63,32,-6,90,6,100,-109,-59,98,19,109,-1,114,84,-58,-52,79,95,121,114,-77,-52,56,-114,-13,67,91,-51,50,-94,-115,113,-58,-33,56,55,-92,-120,80,-85,-125,126,-114,44,-126,22,-29,113,-82,-92,91,63,-39,-34,-90,-21,43,-3,113,-5,-81,-91,69,120,-59,-126,127,66,43,113,-111,47,-99,-46,-73,55,-13,-7,73,110,37,-76,68,13,105,94,-36,108,10,-127,-76,10,126,100,21,-117,-80,21,-95,94,-79,77,-72,-63,98,24,93,-124,7,25,-15,84,-62,-99,28,-82,-99,113,-65,13,62,-51,-117,37,115,-125,-40,-96,85,70,31,-27,26,2,57,-15,43,-112,-36,-72,-5,106,44,126,-97,111,-31,-66,-89,76,-114,51,-111,120,69,56,-106,-70,1,105,-54,-56,-8,-123,-92,-71,40,-20,-52,-93,-102,76,-104,48,77,76,-30,53,-113,40,-16,88,44,34,-107,53,18,95,-21,123,-115,-28,53,21,47,76,82,-58,-114,22,-104,-97,-90,73,109,7,-108,-96,-30,89,-84,-46,-47,-62,110,-128,25,-54,-75,55,-62,121,42,69,-62,54,25,7,-75,122,87,-68,88,-83,-95,38,-100,-103,-96,-57,74,109,-34,72,51,86,89,66,120,85,18,-84,95,101,-86,-32,15,48,-104,62,-99,115,43,-14,76,76,-92,-5,27,-8,41,-114,-74,50,-77,-67,-97,-109,16,106,-36,-52,85,16,50,-68,-27,-22,-99,-112,122,63,-15,64,23,23,121,54,-31,64,126,76,16,-57,18,-75,97,-23,-94,-94,72,-53,-40,30,-55,-63,87,-13,116,9,-64,-72,11,-90,-45,11,59,44,110,28,-105,-80,62,-27,20,46,-7,45,57,5,35,126,29,77,-91,-65,-60,10,-56,-115,-42,-17,115,-67,34,56,12,39,-119,-66,-20,22,-39,-102,54,108,1,-75,107,14,-104,-87,-127,-17,-88,33,103,-71,-85,23,-76,-95,-94,107,-102,92,-96,121,61,-98,78,-28,-33,33,75,32,-10,-14,-125,-96,-72,-4,10,7,-65,-52,-27,-71,92,100,61,45,87,9,-43,-52,110,-70,19,-110,45,-66,-74,-126,91,-27,106,58,-110,114,-86,-77,-52,-63,-50,67,-65,-54,33,37,116,64,49,76,-7,-115,22,-105,-124,50,19,81,-126,86,124,-5,-37,-48,19,-65,32,-21,80,-124,-93,-23,-25,16,24,97,65,29,51,56,-79,80,-117,-50,14,-23,-77,87,96,125,-52,49,2,13,55,61,107,93,-106,-116,102,-11,-37,-23,-119,-43,53,-39,-86,0,-96,19,13,15,15,112,24,76,-73,79,-76,-127,99,90,-18,63,119,3,-29,38,111,34,-66,111,-34,31,-29,-95,24,-70,5,-15,65,86,-43,16,76,-127,-120,21,6,-29,97,53,-31,-57,-39,-117,83,-48,-99,38,126,56,-78,-18,67,43,72,100,-96,-37,109,89,-92,94,-88,121,36,112,-33,-42,-69,-99,112,116,-80,-42,49,5,20,124,26,-32,26,-118,-28,65,22,13,-105,-98,81,124,40,52,-76,-104,97,82,59,96,-99,-27,-46,-74,-125,64,-36,-31,114,-28,-83,-61,81,-81,8,-49,42,36,48,-81,12,68,-80,83,38,-46,-115,93,-86,-56,62,-52,-36,-88,7,-85,-80,5,38,-106,-8,-94,-125,-81,123,21,122,-112,45,116,-37,81,48,-122,93,32,-120,48,-28,-85,-99,50,-47,-67,-109,78,-14,-79,10,-98,56,41,-22,-20,10,74,94,-30,-120,110,50,74,86,91,51,-86,43,-44,11,-11,65,127,-97,-24,-31,119,-16,-73,-66,87,-95,109,-64,98,-127,45,-30,24,-11,61,54,76,109,24,126,45,-1,-24,64,-28,28,-113,114,-32,-103,-125,122,95,102,-33,-7,-25,-28,-101,-7,63,109,111,-9,-45,73,-111,-41,-48,-70,-40,-113,28,-32,-41,-95,76,33,-112,-53,-106,75,117,71,-94,81,19,19,53,96,-9,125,-82,40,6,85,65,36,68,-91,59,9,65,91,-67,-34,121,65,125,-25,-38,-107,-106,-122,-83,20,109,45,122,-103,-31,-42,84,-42,23,-57,-69,49,27,41,-116,78,3,-65,-28,59,-52,-101,-29,-91,-29,37,86,113,119,-51,-104,-19,-84,42,-113,90,125,-32,65,37,-21,119,11,126,-13,-37,-49,59,-80,60,-114,90,7,-117,-22,-84,-50,4,69,58,-93,106,110,-77,-46,125,93,78,-124,-20,73,-42,75,-60,-52,-59,80,-5,-105,6,-14,-58,-72,-59,34,59,-96,-46,-102,76,-8,105,-49,-79,-47,-81,-94,93,77,-100,-119,-115,-115,-102,-68,69,107,-126,-86,-103,83,91,-26,-42,-84,73,-54,5,-104,-85,-61,-28,100,22,-71,-126,97,-43,-128,38,41,88,112,94,39,-84,-55,-119,-115,36,60,107,1,87,-45,-114,-80,-9,88,-105,-91,-67,90,-111,95,-96,-113,-103,-70,-24,91,-113,-122,-70,-83,-92,121,-20,117,37,-10,-105,126,82,89,81,-2,-118,-21,36,-9,-85,-103,124,65,-6,-45,118,-33,-5,122,-113,124,87,-30,58,-47,-43,-10,54,-116,88,44,-17,29,94,-59,-106,41,54,101,-86,98,-116,-12,106,-12,95,-29,13,-103,72,-73,55,6,122,124,-106,79,54,17,-93,7,-101,-72,69,-102,-43,71,31,-44,92,28,37,-104,127,-7,54,-50,-74,-35,-125,-16,-119,-17,28,-44,122,117,63,92,-23,14,82,-28,122,-90,-38,26,88,22,-74,127,115,-128,111,61,-41,-9,-104,31,112,29,37,53,-3,52,58,-27,66,-73,-76,27,78,-33,92,-125,39,95,110,-96,-61,-16,-125,80,-107,44,101,63,114,-101,47,-47,124,-31,21,-99,-57,46,24,-24,18,-104,121,68,-113,-76,37,-71,102,59,-10,-124,112,121,123,91,78,-14,-17,32,-82,2,49,102,-47,-30,-83,-19,-3,-50,67,-42,41,-21,-92,-72,117,-74,-111,97,26,18,-26,-78,104,67,41,48,122,-19,108,105,64,-45,-111,-45,43,-66,-80,115,84,-36,81,-31,59,28,60,-10,125,30,72,-64,105,45,52,-74,11,-16,38,-118,-3,98,-46,-77,40,-69,70,-114,-77,60,-70,123,83,-80,-102,42,100,81,109,-77,115,-127,7,-87,-22,8,-48,57,-72,-41,-41,-9,3,80,-54,-30,103,-16,-54,118,105,-87,-37,22,71,-33,-48,121,62,116,-90,66,-38,22,-105,19,-21,83,-41,112,-39,-81,-28,-109,31,-95,-125,-1,54,72,-84,-108,112,-114,89,120,-73,20,110,-55,-126,-58,-93,68,-105,65,-107,122,8,121,-103,-97,61,97,-74,99,-65,46,1,7,57,-122,69,100,-112,-94,94,116,23,106,85,-105,79,-128,-108,39,-111,-87,83,-66,112,24,-102,-7,-72,-97,-78,-8,99,-114,-113,79,115,89,-51,-88,83,28,-90,56,113,57,-102,40,-104,89,-76,-8,38,-67,-5,-9,-18,-121,38,27,-25,-29,-110,3,-10,16,123,-40,-93,116,-36,-20,-73,-18,-111,87,-123,113,120,-121,-97,69,-47,105,-68,-111,-97,-53,-94,-81,114,77,92,46,-37,-80,-18,108,-9,-69,-25,27,-46,-101,-86,53,54,-109,-44,-11,85,-61,-87,-17,34,-25,79,101,-46,-22,-30,99,85,-65,-30,12,117,-80,-23,54,-16,106,-89,-29,-120,64,1,-111,-94,-75,82,68,-3,120,11,-52,-103,87,22,-17,-46,-117,-63,112,12,-123,-52,71,-121,-122,-55,-125,101,-41,105,52,-53,-9,60,56,-3,-1,85,-112,15,127,70,4,-7,48,-72,34,-29,11,-103,114,-46,56,-109,17,-32,9,89,114,-1,92,86,-55,11,-87,-80,53,-18,-4,42,-90,86,15,-50,49,120,-46,22,67,57,-59,90,-97,110,96,119,43,100,-90,-54,-89,81,21,-80,-14,64,-47,126,-17,92,-37,51,40,121,-34,110,-99,-54,36,-73,85,-43,52,-30,-9,121,-18,-51,102,91,-116,-71,95,86,-55,95,-35,74,118,101,87,-114,20,-48,117,-60,-76,55,49,-108,74,-22,-43,20,41,79,-96,114,-12,-68,-44,43,126,-28,19,83,111,-128,102,-19,-110,56,71,-77,89,17,-16,-26,32,-27,-127,-14,-37,62,-34,-107,126,110,104,74,6,85,79,8,-74,107,30,126,-52,80,-11,29,108,65,-128,29,109,-2,123,59,28,-107,110,62,110,-123,-68,71,-39,-20,-57,-108,38,-36,126,-12,100,112,-103,-32,55,98,-5,-82,89,-41,88,36,-92,99,-56,118,97,12,113,-16,88,71,76,-96,-77,117,-5,60,-84,23,45,-41,31,46,33,0,-3,69,38,4,-119,-20,-115,96,-50,28,-9,-38,85,-113,-106,36,3,-96,-80,-23,7,-19,101,-111,92,-107,-9,116,53,-120,5,-3,-13,-87,1,-115,-35,-125,-89,-23,19,53,69,117,-67,-107,-33,-122,-32,-10,-69,-122,75,-116,-69,-35,43,-74,-107,109,18,107,-85,-48,52,-38,83,50,115,-101,-39,5,62,-7,-46,99,97,44,31,78,27,105,-117,-72,-94,-69,108,-86,-59,-30,49,-48,-22,-124,-2,-114,-19,-126,-29,-122,-21,67,15,60,-111,-55,35,-22,81,37,32,-75,0,56,-18,47,108,41,0,-120,122,-4,95,51,-68,-20,78,125,77,119,-9,-115,109,59,79,-128,-124,-114,9,7,91,-8,-80,11,-112,29,-32,-56,11,-50,-82,29,74,-19,-55,-6,12,-115,-6,18,15,-123,72,-15,-62,12,1,43,82,-30,-17,2,26,-30,-85,58,63,-56,-117,-100,52,-90,7,-69,-26,121,-92,111,5,-61,96,-90,63,-18,-11,60,-52,-81,99,125,25,67,-71,82,110,97,51,122,39,33,28,93,-116,123,-107,48,-64,-9,92,-31,-62,-68,-102,-103,-107,48,-100,-2,83,127,-82,41,-105,-7,-120,113,10,58,23,-122,84,-18,-37,20,-82,11,42,46,-95,16,-105,-58,-78,62,-82,-57,39,-18,106,0,52,-51,-59,36,76,98,124,-108,-67,-40,73,-3,19,45,-45,121,20,76,0,-21,-57,46,90,-18,79,66,-42,-56,-47,-39,-120,90,79,103,-104,34,-30,-67,120,94,35,59,25,-41,-128,125,88,88,68,-48,-25,-47,-10,-12,125,92,20,-99,55,66,118,-42,114,46,67,-9,43,37,119,-84,-8,79,-21,123,82,48,76,-63,-17,-23,27,-108,53,97,95,-109,41,68,-50,-32,-20,-119,-71,80,-57,-9,-16,-4,-36,17,66,19,82,-113,-76,39,23,-128,47,9,-87,30,-35,-48,100,96,15,-4,-58,-86,-10,-1,83,-52,17,-102,-88,37,-13,-2,-92,-23,-52,-89,-112,-33,-47,60,28,122,-101,-99,-67,92,-88,77,118,101,-96,-123,-108,-108,-43,102,45,44,-48,84,110,-25,-74,86,50,-7,-109,-9,-92,59,-67,79,29,23,53,-57,73,-89,9,1,81,65,17,31,-107,8,92,126,53,-119,52,98,60,-126,-82,15,79,-15,110,111,-82,22,88,-110,-113,-49,-124,-127,88,-51,-48,-87,-55,-17,62,45,64,41,-111,-95,-46,-122,-91,116,-125,-55,103,75,-29,95,-56,29,-115,-36,-41,-56,88,-100,-81,-33,-81,29,-11,-90,-17,77,-10,-127,-121,-6,30,-4,-24,30,-124,109,112,67,25,-57,4,34,79,126,126,-109,-47,-101,-38,-9,117,-76,37,-43,-120,-86,54,85,-70,56,39,-15,-40,-80,26,3,-64,-45,-35,-69,-120,70,-97,24,-29,-53,69,19,-113,-112,-53,-78,-106,-74,94,-61,78,-57,-58,97,46,58,62,-21,-121,-97,-38,-16,35,35,-120,-127,125,2,-30,54,-44,-17,9,30,-20,30,-53,117,52,29,-92,95,16,60,102,-29,54,-66,-110,122,10,-113,-78,68,-120,-71,-96,111,-37,9,39,-11,111,-52,-25,107,-77,-9,28,81,0,-55,-98,43,-97,-37,69,-123,-4,23,102,-98,106,-11,98,-42,5,115,-84,-121,-86,-78,11,-69,34,-115,3,-94,-104,-9,-38,51,-113,29,83,-39,86,54,-27,-116,-108,61,27,10,-44,65,-86,-91,34,-40,38,99,-14,101,-82,126,-56,-8,-102,37,-52,102,-36,126,74,95,-83,113,-37,-66,-55,-20,-98,-115,96,-49,-44,-123,-1,20,75,-2,-90,10,-61,107,94,87,-63,74,0,-55,2,41,-103,-123,-85,-13,-39,-107,36,-47,-21,6,-70,98,-119,78,52,26,-40,8,72,117,-78,115,76,-57,43,-60,-25,-87,36,83,54,127,127,-78,19,98,-30,125,86,121,124,62,-32,-96,-110,20,97,-126,-104,13,6,-122,-105,36,55,105,-121,-48,-83,0,-113,18,-114,-39,9,20,-20,-23,-115,-49,83,-107,121,70,-30,86,31,-48,-23,125,-67,-114,48,-86,21,-90,83,-79,64,-107,-60,-91,54,69,-73,-77,88,99,-10,15,-29,57,-128,-47,-96,101,-50,112,120,-85,-16,-78,27,7,116,-128,18,-11,49,-19,41,-33,15,-35,-67,84,-15,-57,36,-73,41,15,77,9,83,39,-54,27,-82,33,115,4,-60,101,46,-117,-56,-18,74,100,126,-27,-48,-25,10,-51,126,-41,-81,-95,-60,9,85,99,-6,80,-16,27,77,108,44,46,114,-26,20,-69,92,15,98,107,-114,-59,-87,28,-61,-121,84,125,-44,-125,-13,116,-55,-120,94,-84,-75,-86,34,1,-25,121,-80,26,-97,43,-12,31,75,-58,84,2,12,-109,-61,-68,-21,110,92,-27,-117,13,36,21,-3,107,-125,80,45,87,-108,22,41,-61,75,-115,-29,29,33,-111,-22,-4,-94,8,97,24,-124,25,25,-52,-7,-74,108,-36,-114,12,-32,3,84,75,-60,34,-88,-10,84,96,12,17,-119,114,-41,41,-3,-48,-16,1,-14,21,-115,-11,96,-25,-36,10,-14,-71,-3,-83,85,6,-91,-18,81,-108,36,-33,-59,70,-80,-81,11,-31,19,74,107,-22,91,8,29,57,-95,-80,-40,61,-82,-110,122,97,-114,-102,123,-77,83,122,-24,46,-121,-28,18,111,-47,-35,-120,-102,114,-93,115,22,-82,113,-78,77,76,-66,117,65,28,86,27,82,79,-128,-88,119,63,-31,87,11,124,-10,-99,-71,94,-89,76,-82,-124,101,58,-53,-74,9,-114,-50,31,-3,-51,-119,57,-29,-75,92,113,-47,40,-103,-81,-43,-12,-100,-102,4,-36,12,-26,-70,-118,27,-88,50,28,-73,-113,-94,-1,122,4,-57,-126,124,100,70,62,-87,7,-91,100,-91,-102,-56,34,102,118,44,-47,-90,24,-32,-99,30,-98,36,-124,113,11,-126,-15,-84,72,117,-46,3,-18,97,-38,-73,24,-47,109,-4,-50,-86,88,-112,-97,-65,112,-73,72,-37,20,-125,-29,-43,51,-2,-16,94,119,58,-101,-48,-116,121,94,103,64,52,48,51,-113,-70,106,41,-44,82,111,-106,71,-62,-105,-66,-78,78,71,115,-123,-50,4,33,22,88,-40,-111,-82,-46,-34,-67,120,-58,-28,-18,-126,-52,-31,-109,84,11,-94,10,94,-15,-89,-106,-62,125,-6,98,-39,62,-11,-34,12,12,-18,-50,-60,-78,43,104,36,50,-62,-58,-14,-36,-104,-88,21,78,-18,43,-124,-118,-68,-35,52,-62,102,18,25,87,-106,-78,74,29,127,98,-99,-2,-86,37,6,80,-31,86,77,112,-51,121,70,-126,7,35,-85,3,-24,-78,-109,114,-25,-58,-127,120,-78,26,8,-100,-116,10,-23,-20,14,-18,42,120,-75,79,60,44,-58,102,-104,69,25,119,28,103,-70,22,25,26,124,3,-11,-15,10,87,120,-23,-68,-44,7,93,9,-8,125,-15,-79,-70,108,15,-66,-90,-82,-5,-14,115,-122,-75,74,127,-100,108,4,58,66,-106,-117,1,6,11,-69,-96,55,-65,-8,102,-72,-41,75,76,-2,16,-10,78,-42,59,-72,-1,-31,-100,113,26,-66,48,-4,103,57,71,-94,-2,14,-28,-36,22,-8,-25,39,-51,25,99,91,70,63,11,-124,69,46,-34,-21,99,-70,-110,-90,32,116,34,-74,82,43,-104,-56,31,-117,-43,67,12,-72,115,-84,-62,-9,21,-30,105,82,94,86,12,40,-47,-39,40,-114,-67,-89,-72,-64,-62,-124,-105,32,95,-124,-41,-14,48,26,8,-116,-57,24,-45,-45,-75,-40,-111,-118,107,116,66,-97,-57,-79,-96,-85,-55,49,-55,-32,-87,-76,-12,42,-85,85,-16,75,-41,-112,49,-29,-28,-124,-10,-60,62,-2,-112,15,-36,-33,81,-95,117,120,51,99,-64,30,11,106,-21,-42,43,-59,51,117,12,45,3,-116,110,88,104,60,67,102,-74,108,80,-58,-108,28,38,-108,16,63,100,-24,-36,-1,70,97,7,32,118,-112,-122,-31,-36,106,10,115,-89,35,58,-15,-5,63,19,-123,-99,-11,-94,108,-18,-13,70,-12,-1,126,-15,-9,-25,113,111,66,-59,81,-88,-114,97,-121,-76,16,8,72,62,3,-107,106,-43,92,-91,63,60,-90,-61,96,-9,93,-24,-17,-22,38,-24,29,-27,-36,-25,117,99,-10,76,66,-77,-71,33,-87,100,48,-13,-122,-49,56,-104,72,72,-84,103,72,115,-10,45,19,-22,52,-97,-77,-107,50,-81,-93,-79,102,-71,46,73,6,-21,-52,5,-96,32,112,15,-44,-4,110,5,-26,-85,89,-87,35,73,-17,59,-95,-5,-123,94,127,-83,9,-122,-64,-58,-72,-111,33,-91,-82,56,63,1,6,-67,-106,-55,26,-12,-105,-32,115,-38,-95,118,117,67,-17,95,99,120,-75,2,28,-113,-105,117,-15,111,22,-46,116,25,-91,40,44,84,37,-4,-66,-125,15,69,-14,49,-12,-11,87,-68,20,91,110,117,125,-65,-34,-36,84,-29,-87,-27,60,-66,-118,-125,49,69,81,54,7,-119,53,-23,-60,-9,22,-116,-125,-58}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/ref_functions.h b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/ref_functions.h
new file mode 100644
index 0000000..1b1d593
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/ref_functions.h
@@ -0,0 +1,226 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _REF_FUNCTIONS_H_
+#define _REF_FUNCTIONS_H_
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+//#include "arm_nnsupportfunctions.h"
+#include "fully_connected_testing_weights.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*
+ *
+ * Convolution reference implemenation
+ *
+ */
+
+ void arm_convolve_HWC_q7_ref(const q7_t * Im_in, // input image
+ const uint16_t dim_im_in, // input image dimention
+ const uint16_t ch_im_in, // number of input image channels
+ const q7_t * wt, // kernel weights
+ const uint16_t ch_im_out, // number of filters, i.e., output image channels
+ const uint16_t dim_kernel, // filter kernel size
+ const uint16_t padding, // padding sizes
+ const uint16_t stride, // stride
+ const q7_t * bias, // bias
+ const uint16_t bias_shift, const uint16_t out_shift, q7_t * Im_out, // output image
+ const uint16_t dim_im_out, // output image dimension
+ q15_t * bufferA, //buffer space for input
+ q7_t * bufferB //buffer space for output
+ );
+
+ void arm_convolve_HWC_q7_ref_nonsquare(const q7_t * Im_in, // input image
+ const uint16_t dim_im_in_x, // input image dimention x
+ const uint16_t dim_im_in_y, // input image dimention y
+ const uint16_t ch_im_in, // number of input image channels
+ const q7_t * wt, // kernel weights
+ const uint16_t ch_im_out, // number of filters, i.e., output image channels
+ const uint16_t dim_kernel_x, // filter kernel size x
+ const uint16_t dim_kernel_y, // filter kernel size y
+ const uint16_t padding_x, // padding sizes x
+ const uint16_t padding_y, // padding sizes y
+ const uint16_t stride_x, // stride x
+ const uint16_t stride_y, // stride y
+ const q7_t * bias, // bias
+ const uint16_t bias_shift, const uint16_t out_shift, q7_t * Im_out, // output image
+ const uint16_t dim_im_out_x, // output image dimension x
+ const uint16_t dim_im_out_y, // output image dimension y
+ q15_t * bufferA, //buffer space for input
+ q7_t * bufferB //buffer space for output
+ );
+
+ void arm_convolve_HWC_q15_ref(const q15_t * Im_in, // input image
+ const uint16_t dim_im_in, // input image dimention
+ const uint16_t ch_im_in, // number of input image channels
+ const q15_t * wt, // kernel weights
+ const uint16_t ch_im_out, // number of filters, i.e., output image channels
+ const uint16_t dim_kernel, // filter kernel size
+ const uint16_t padding, // padding sizes
+ const uint16_t stride, // stride
+ const q15_t * bias, // bias
+ const uint16_t bias_shift, const uint16_t out_shift, q15_t * Im_out, // output image
+ const uint16_t dim_im_out, // output image dimension
+ q15_t * bufferA, //buffer space for input
+ q7_t * bufferB //buffer space for output
+ );
+
+ void arm_depthwise_separable_conv_HWC_q7_ref(const q7_t * Im_in, // input image
+ const uint16_t dim_im_in, // input image dimention
+ const uint16_t ch_im_in, // number of input image channels
+ const q7_t * wt, // kernel weights
+ const uint16_t ch_im_out, // number of filters, i.e., output image channels
+ const uint16_t dim_kernel, // filter kernel size
+ const uint16_t padding, // padding sizes
+ const uint16_t stride, // stride
+ const q7_t * bias, // bias
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ q7_t * Im_out, // output image
+ const uint16_t dim_im_out, // output image dimension
+ q15_t * bufferA, //buffer space for input
+ q7_t * bufferB //buffer space for output
+ );
+ void arm_depthwise_separable_conv_HWC_q7_ref_nonsquare(const q7_t * Im_in, // input image
+ const uint16_t dim_im_in_x, // input image dimention x
+ const uint16_t dim_im_in_y, // input image dimention y
+ const uint16_t ch_im_in, // number of input image channels
+ const q7_t * wt, // kernel weights
+ const uint16_t ch_im_out, // number of filters, i.e., output image channels
+ const uint16_t dim_kernel_x, // filter kernel size x
+ const uint16_t dim_kernel_y, // filter kernel size y
+ const uint16_t padding_x, // padding sizes x
+ const uint16_t padding_y, // padding sizes y
+ const uint16_t stride_x, // stride x
+ const uint16_t stride_y, // stride y
+ const q7_t * bias, // bias
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ q7_t * Im_out, // output image
+ const uint16_t dim_im_out_x, // output image dimension x
+ const uint16_t dim_im_out_y, // output image dimension y
+ q15_t * bufferA, //buffer space for input
+ q7_t * bufferB //buffer space for output
+ );
+
+/*
+ *
+ * Fully-connected reference implemenation
+ *
+ */
+
+ void arm_fully_connected_q7_ref(const q7_t * pV, // pointer to vector
+ const q7_t * pM, // pointer to matrix
+ const uint16_t dim_vec, // length of the vector
+ const uint16_t num_of_rows, // numCol of A
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ const q7_t * bias, q7_t * pOut, // output operand
+ q15_t * vec_buffer);
+
+ void arm_fully_connected_q15_ref(const q15_t * pV, // pointer to vector
+ const q15_t * pM, // pointer to matrix
+ const uint16_t dim_vec, // length of the vector
+ const uint16_t num_of_rows, // numCol of A
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ const q15_t * bias, q15_t * pOut, // output operand
+ q15_t * vec_buffer);
+
+ void arm_fully_connected_mat_q7_vec_q15_ref(const q15_t * pV, // pointer to vector
+ const q7_t * pM, // pointer to matrix
+ const uint16_t dim_vec, // length of the vector
+ const uint16_t num_of_rows, // numCol of A
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ const q7_t * bias, q15_t * pOut, // output operand
+ q15_t * vec_buffer);
+
+ void arm_fully_connected_q7_opt_ref(const q7_t * pV, // pointer to vector
+ const q7_t * pM, // pointer to matrix
+ const uint16_t dim_vec, // length of the vector
+ const uint16_t num_of_rows, // numCol of A
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ const q7_t * bias, q7_t * pOut, // output operand
+ q15_t * vec_buffer);
+
+ void arm_fully_connected_q15_opt_ref(const q15_t * pV, // pointer to vector
+ const q15_t * pM, // pointer to matrix
+ const uint16_t dim_vec, // length of the vector
+ const uint16_t num_of_rows, // numCol of A
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ const q15_t * bias, q15_t * pOut, // output operand
+ q15_t * vec_buffer);
+
+ void arm_fully_connected_mat_q7_vec_q15_opt_ref(const q15_t * pV, // pointer to vector
+ const q7_t * pM, // pointer to matrix
+ const uint16_t dim_vec, // length of the vector
+ const uint16_t num_of_rows, // numCol of A
+ const uint16_t bias_shift, // amount of left-shift for bias
+ const uint16_t out_shift, // amount of right-shift for output
+ const q7_t * bias, q15_t * pOut, // output operand
+ q15_t * vec_buffer);
+
+/*
+ *
+ * Pooling reference implemenation
+ *
+ */
+
+ void arm_avepool_q7_HWC_ref(const q7_t * Im_in, // input image
+ const uint16_t dim_im_in, // input image dimension
+ const uint16_t ch_im_in, // number of input image channels
+ const uint16_t dim_kernel, // window kernel size
+ const uint16_t padding, // padding sizes
+ const uint16_t stride, // stride
+ const uint16_t dim_im_out, // output image dimension
+ q7_t * bufferA, // a buffer for local storage
+ q7_t * Im_out);
+
+ void arm_maxpool_q7_HWC_ref(const q7_t * Im_in, // input image
+ const uint16_t dim_im_in, // input image dimension
+ const uint16_t ch_im_in, // number of input image channels
+ const uint16_t dim_kernel, // window kernel size
+ const uint16_t padding, // padding sizes
+ const uint16_t stride, // stride
+ const uint16_t dim_im_out, // output image dimension
+ q7_t * bufferA, // a buffer for local storage
+ q7_t * Im_out);
+
+/*
+ *
+ * Other reference implemenation
+ *
+ */
+
+ void arm_relu_q7_ref(q7_t * data, uint16_t size);
+
+ void arm_relu_q15_ref(q15_t * data, uint16_t size);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.cpp b/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.cpp
new file mode 100644
index 0000000..2a02d61
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.cpp
@@ -0,0 +1,694 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
+*
+*
+* Project: CMSIS NN Library
+* Title: arm_nnexamples_nn_test.cpp
+*
+* Description: Example code for NN kernel testing.
+*
+* Target Processor: Cortex-M4/Cortex-M7
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in
+* the documentation and/or other materials provided with the
+* distribution.
+* - Neither the name of ARM LIMITED nor the names of its contributors
+* may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+#include "arm_nnexamples_nn_test.h"
+
+//#define TEST_SIGMOID
+//#define TEST_TANH
+#define TEST_POOL
+#define TEST_RELU
+#define TEST_IP
+#define TEST_CONV
+#define TEST_NONSQUARE
+
+int test_index = 0;
+q7_t test_flags[50];
+bool test_pass;
+
+int main()
+{
+ printf("start tests\n");
+
+ srand(1);
+
+ // common pointers for testing data
+ q7_t *test1;
+ q15_t *test2;
+ q7_t *test3;
+ q15_t *test4;
+
+ for (test_index = 0; test_index<50; test_index++) {
+ test_flags[test_index] = -1;
+ }
+ test_index = 0;
+
+#ifdef TEST_SIGMOID
+
+#define SIGMOID_DIM 128
+
+ /* This part tests the running of sigmoid functions */
+
+ test1 = new q7_t[SIGMOID_DIM];
+ test2 = new q15_t[SIGMOID_DIM];
+ test3 = new q7_t[SIGMOID_DIM];
+ test4 = new q15_t[SIGMOID_DIM];
+
+ srand(1);
+
+ for (int i = 0; i < SIGMOID_DIM; i++)
+ {
+ test1[i] = (rand() % 256 - 128);
+ test2[i] = (rand() % 65536 - 32768);
+ test3[i] = test1[i];
+ test4[i] = test2[i];
+ }
+
+ arm_nn_activations_direct_q7(test3, SIGMOID_DIM, 3, ARM_SIGMOID);
+
+ for (int i = 0; i < SIGMOID_DIM; i++)
+ {
+ printf("in: %d out: %d\n", test1[i], test3[i]);
+ }
+
+ printf("start testing q15_t sigmoid\n\n");
+
+ arm_nn_activations_direct_q15(test4, SIGMOID_DIM, 3, ARM_SIGMOID);
+
+ for (int i = 0; i < SIGMOID_DIM; i++)
+ {
+ printf("in: %d out: %d\n", test2[i], test4[i]);
+ }
+
+ delete[]test1;
+ delete[]test2;
+ delete[]test3;
+ delete[]test4;
+
+#endif
+
+#ifdef TEST_TANH
+
+#define TANH_DIM 128
+
+ /* This part tests the running of sigmoid functions */
+
+ test1 = new q7_t[TANH_DIM];
+ test2 = new q15_t[TANH_DIM];
+ test3 = new q7_t[TANH_DIM];
+ test4 = new q15_t[TANH_DIM];
+
+ srand(1);
+
+ for (int i = 0; i < TANH_DIM; i++)
+ {
+ test1[i] = (rand() % 256 - 128);
+ test2[i] = (rand() % 65536 - 32768);
+ test3[i] = test1[i];
+ test4[i] = test2[i];
+ }
+
+ arm_nn_activations_direct_q7(test3, TANH_DIM, 3, ARM_TANH);
+
+ printf("start testing q7_t tanh\n\n");
+
+ for (int i = 0; i < TANH_DIM; i++)
+ {
+ printf("in: %d out: %d\n", test1[i], test3[i]);
+ }
+
+ printf("start testing q15_t tanh\n\n");
+
+ arm_nn_activations_direct_q15(test4, TANH_DIM, 3, ARM_TANH);
+
+ for (int i = 0; i < TANH_DIM; i++)
+ {
+ printf("in: %d out: %d\n", test2[i], test4[i]);
+ }
+
+ delete[]test1;
+ delete[]test2;
+ delete[]test3;
+ delete[]test4;
+
+#endif
+
+#ifdef TEST_POOL
+
+#define POOL_IM_DIM 32
+#define POOL_IM_CH 8
+
+ test1 = new q7_t[POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH * 2];
+ test2 = new q15_t[POOL_IM_DIM * POOL_IM_CH];
+ test3 = new q7_t[POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH];
+
+ for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
+ {
+ test1[i] = (rand() % 256 - 128);
+ }
+
+ q7_t *img_in = test1 + POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH;
+ q7_t *pool_out_ref = test3;
+ q7_t *pool_out_opt = test3 + POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH / 2;
+
+ for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
+ {
+ test3[i] = 0;
+ }
+
+ // copy over the img input
+ for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
+ {
+ img_in[i] = test1[i];
+ }
+
+ initialize_results_q7(pool_out_ref, pool_out_opt, POOL_IM_DIM / 2 * POOL_IM_DIM / 2 * POOL_IM_CH);
+
+ printf("Start maxpool reference implementation\n");
+
+ arm_maxpool_q7_HWC_ref(img_in, POOL_IM_DIM, POOL_IM_CH, 3, 0, 2, POOL_IM_DIM / 2, (q7_t *) test2, pool_out_ref);
+
+ // copy over the img input
+ for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
+ {
+ img_in[i] = test1[i];
+ }
+
+ printf("Start maxpool opt implementation\n");
+
+ arm_maxpool_q7_HWC(img_in, POOL_IM_DIM, POOL_IM_CH, 3, 0, 2, POOL_IM_DIM / 2, (q7_t *) test2, pool_out_opt);
+
+ verify_results_q7(pool_out_ref, pool_out_opt, POOL_IM_DIM / 2 * POOL_IM_DIM / 2 * POOL_IM_CH);
+
+ // copy over the img input
+ for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
+ {
+ img_in[i] = test1[i];
+ }
+
+ // copy over the img input
+ for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
+ {
+ img_in[i] = test1[i];
+ }
+
+ printf("Start avepool ref implementation\n");
+
+ arm_avepool_q7_HWC_ref(img_in, POOL_IM_DIM, POOL_IM_CH, 3, 0, 2, POOL_IM_DIM / 2, (q7_t *) test2, pool_out_ref);
+
+ // copy over the img input
+ for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
+ {
+ img_in[i] = test1[i];
+ }
+
+ printf("Start avepool opt implementation\n");
+
+ arm_avepool_q7_HWC(img_in, POOL_IM_DIM, POOL_IM_CH, 3, 0, 2, POOL_IM_DIM / 2, (q7_t *) test2, pool_out_opt);
+
+ // special check here
+ bool if_ave_pool_match = true;
+ for (int i = 0; i < POOL_IM_DIM / 2 * POOL_IM_DIM / 2 * POOL_IM_CH; i++)
+ {
+ // we tolerate at most difference of 1 here because of rounding errors
+ if (pool_out_ref[i] - pool_out_opt[i] >= 2 || pool_out_opt[i] - pool_out_ref[i] >= 2)
+ {
+ printf("Output mismatch at %d, expected %d, actual %d\n", i, pool_out_ref[i], pool_out_opt[i]);
+ if_ave_pool_match = false;
+ }
+ }
+ if (if_ave_pool_match == true)
+ {
+ printf("Outputs match.\n");
+ }
+
+ delete[]test1;
+ delete[]test2;
+ delete[]test3;
+
+#endif
+
+#ifdef TEST_RELU
+
+#define RELU_DIM 127
+
+ test1 = new q7_t[RELU_DIM];
+ test2 = new q15_t[RELU_DIM];
+ test3 = new q7_t[RELU_DIM];
+ test4 = new q15_t[RELU_DIM];
+
+ for (int i = 0; i < RELU_DIM; i++)
+ {
+ test1[i] = (rand() % 256 - 128);
+ test2[i] = (rand() % 65536 - 32768);
+ test3[i] = test1[i];
+ test4[i] = test2[i];
+ }
+
+ q7_t *relu_ref_data_q7 = test1;
+ q7_t *relu_opt_data_q7 = test3;
+ q15_t *relu_ref_data_q15 = test2;
+ q15_t *relu_opt_data_q15 = test4;
+
+ printf("Start ref relu q7 implementation\n");
+
+ arm_relu_q7_ref(relu_ref_data_q7, RELU_DIM);
+
+ printf("Start opt relu q7 implementation\n");
+
+ arm_relu_q7(relu_opt_data_q7, RELU_DIM);
+
+ verify_results_q7(relu_ref_data_q7, relu_opt_data_q7, RELU_DIM);
+
+ printf("Start ref relu q15 implementation\n");
+
+ arm_relu_q15_ref(relu_ref_data_q15, RELU_DIM);
+
+ printf("Start opt relu q15 implementation\n");
+
+ arm_relu_q15(relu_opt_data_q15, RELU_DIM);
+
+ verify_results_q15(relu_ref_data_q15, relu_opt_data_q15, RELU_DIM);
+
+ delete[]test1;
+ delete[]test2;
+ delete[]test3;
+ delete[]test4;
+
+#endif
+
+#ifdef TEST_IP
+
+#define IP_ROW_DIM 127
+#define IP_COL_DIM 127
+
+ q7_t ip_weights[IP_ROW_DIM * IP_COL_DIM] = IP2_WEIGHT;
+ q7_t ip_q7_opt_weights[IP_ROW_DIM * IP_COL_DIM] = IP4_WEIGHT;
+ q7_t ip_q7_q15_opt_weights[IP_ROW_DIM * IP_COL_DIM] = IP4_q7_q15_WEIGHT;
+ q15_t ip_q15_weights[IP_ROW_DIM * IP_COL_DIM] = IP2_WEIGHT;
+ q15_t ip_q15_opt_weights[IP_ROW_DIM * IP_COL_DIM] = IP4_WEIGHT_Q15;
+
+ test1 = new q7_t[IP_COL_DIM + IP_ROW_DIM];
+ test2 = new q15_t[IP_COL_DIM];
+ test3 = new q7_t[IP_ROW_DIM * 3];
+ test4 = new q15_t[IP_COL_DIM + IP_ROW_DIM * 2];
+
+ for (int i = 0; i < IP_ROW_DIM + IP_COL_DIM; i++)
+ {
+ test1[i] = rand() % 256 - 100;
+ }
+ for (int i = 0; i < IP_ROW_DIM * 3; i++)
+ {
+ test3[i] = 0;
+ }
+
+ q7_t *ip_bias_q7 = test1 + IP_COL_DIM;
+
+ q7_t *ip_out_q7_ref = test3;
+ q7_t *ip_out_q7_opt = test3 + IP_ROW_DIM;
+ q7_t *ip_out_q7_opt_fast = test3 + 2 * IP_ROW_DIM;
+ q15_t *ip_out_q15_ref = test4 + IP_COL_DIM;
+ q15_t *ip_out_q15_opt = test4 + IP_COL_DIM + IP_ROW_DIM;
+
+ initialize_results_q7(ip_out_q7_ref, ip_out_q7_opt, IP_ROW_DIM);
+ initialize_results_q7(ip_out_q7_ref, ip_out_q7_opt_fast, IP_ROW_DIM);
+ initialize_results_q7(ip_out_q7_ref, ip_out_q7_opt_fast, IP_ROW_DIM);
+
+ printf("Start ref q7 implementation\n");
+
+ arm_fully_connected_q7_ref(test1, ip_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q7_ref, test2);
+
+ printf("Start q7 implementation\n");
+
+ arm_fully_connected_q7(test1, ip_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q7_opt, test2);
+
+ verify_results_q7(ip_out_q7_ref, ip_out_q7_opt, IP_ROW_DIM);
+
+ printf("Start q7 ref opt implementation\n");
+
+ arm_fully_connected_q7_opt_ref(test1, ip_q7_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7,
+ ip_out_q7_opt_fast, test2);
+
+ verify_results_q7(ip_out_q7_ref, ip_out_q7_opt_fast, IP_ROW_DIM);
+
+ printf("Start q7 opt implementation\n");
+
+ arm_fully_connected_q7_opt(test1, ip_q7_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q7_opt_fast,
+ test2);
+
+ verify_results_q7(ip_out_q7_ref, ip_out_q7_opt_fast, IP_ROW_DIM);
+
+ for (int i = 0; i < IP_ROW_DIM + IP_COL_DIM; i++)
+ {
+ test4[i] = (rand() % 65536 - 32768);
+ }
+
+ initialize_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
+
+ printf("Start ref q15 implementation\n");
+
+ arm_fully_connected_q15_ref(test4, ip_q15_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, test2, ip_out_q15_ref, NULL);
+
+ printf("Start q15 implementation\n");
+
+ arm_fully_connected_q15(test4, ip_q15_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, test2, ip_out_q15_opt, NULL);
+
+ verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
+
+ printf("Start ref opt q15 implementation\n");
+
+ arm_fully_connected_q15_opt_ref(test4, ip_q15_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, test2, ip_out_q15_opt,
+ NULL);
+
+ verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
+
+ printf("Start opt q15 implementation\n");
+
+ arm_fully_connected_q15_opt(test4, ip_q15_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, test2, ip_out_q15_opt, NULL);
+
+ verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
+
+ initialize_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
+
+ printf("Start ref q7_q15 implementation\n");
+
+ arm_fully_connected_mat_q7_vec_q15_ref(test4, ip_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q15_ref,
+ test2);
+
+ printf("Start q7_q15 implementation\n");
+
+ arm_fully_connected_mat_q7_vec_q15(test4, ip_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q15_opt,
+ test2);
+
+ verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
+
+ printf("Start ref opt q7_q15 implementation\n");
+
+ arm_fully_connected_mat_q7_vec_q15_opt_ref(test4, ip_q7_q15_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7,
+ ip_out_q15_opt, test2);
+
+ verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
+
+ printf("Start opt q7_q15 implementation\n");
+
+ arm_fully_connected_mat_q7_vec_q15_opt(test4, ip_q7_q15_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7,
+ ip_out_q15_opt, test2);
+
+ verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
+
+ delete[]test1;
+ delete[]test2;
+ delete[]test3;
+ delete[]test4;
+
+#endif
+
+#ifdef TEST_NONSQUARE
+
+/* Use RCONV to differential with square CONV */
+
+#define RCONV_IM_DIM_X 10
+#define RCONV_IM_DIM_Y 8
+#define RCONV_IM_CH 4
+#define RCONV_KER_DIM_X 5
+#define RCONV_KER_DIM_Y 3
+#define RCONV_STRIDE_X 1
+#define RCONV_STRIDE_Y 1
+#define RCONV_PADDING_X 2
+#define RCONV_PADDING_Y 1
+#define RCONV_OUT_CH 4
+#define RCONV_OUT_DIM_X 10
+#define RCONV_OUT_DIM_Y 8
+
+ test1 = new q7_t[RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH + RCONV_OUT_CH];
+ test2 = new q15_t[2 * RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH];
+ test3 =
+ new q7_t[RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH + 2 * RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH];
+
+ for (int i = 0; i < RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH + RCONV_OUT_CH; i++)
+ {
+ test1[i] = rand() % 256 - 100;
+ }
+
+ for (int i = 0;
+ i < RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH + 2 * RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH; i++)
+ {
+ test3[i] = rand() % 256 - 100;
+ }
+
+ q7_t *rconv_weight_q7 = test1;
+ q7_t *rconv_bias_q7 = test1 + RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH;
+
+ q15_t *rconv_buf = test2;
+
+ q7_t *rconv_im_in_q7 = test3;
+ q7_t *rconv_im_out_ref_q7 = test3 + RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH;
+ q7_t *rconv_im_out_opt_q7 =
+ test3 + RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH + RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH;
+
+ initialize_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
+
+ printf("start conv q7 nonsquare ref implementation\n");
+ arm_convolve_HWC_q7_ref_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
+ RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
+ RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_ref_q7,
+ RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
+
+ printf("start conv q7 nonsquare opt implementation\n");
+ arm_convolve_HWC_q7_fast_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
+ RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
+ RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_opt_q7,
+ RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
+
+ verify_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
+
+ initialize_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
+
+ printf("start 1x1 conv q7 nonsquare fast implementation\n");
+ arm_convolve_HWC_q7_fast_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
+ RCONV_OUT_CH, 1, 1, 0, 0, RCONV_STRIDE_X,
+ RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_ref_q7, RCONV_OUT_DIM_X,
+ RCONV_OUT_DIM_Y, rconv_buf, NULL);
+
+ printf("start 1x1 conv q7 nonsquare dedicated function implementation\n");
+ arm_convolve_1x1_HWC_q7_fast_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
+ RCONV_OUT_CH, 1, 1, 0, 0, RCONV_STRIDE_X,
+ RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_opt_q7, RCONV_OUT_DIM_X,
+ RCONV_OUT_DIM_Y, rconv_buf, NULL);
+
+ verify_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
+
+ printf("start depthwise separable conv q7 nonsquare ref implementation\n");
+ arm_depthwise_separable_conv_HWC_q7_ref_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH,
+ rconv_weight_q7, RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y,
+ RCONV_PADDING_X, RCONV_PADDING_Y, RCONV_STRIDE_X, RCONV_STRIDE_Y,
+ rconv_bias_q7, 1, 7, rconv_im_out_ref_q7, RCONV_OUT_DIM_X,
+ RCONV_OUT_DIM_Y, rconv_buf, NULL);
+
+ printf("start depthwise separable conv q7 nonsquare opt implementation\n");
+ arm_depthwise_separable_conv_HWC_q7_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH,
+ rconv_weight_q7, RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y,
+ RCONV_PADDING_X, RCONV_PADDING_Y, RCONV_STRIDE_X, RCONV_STRIDE_Y,
+ rconv_bias_q7, 1, 7, rconv_im_out_opt_q7, RCONV_OUT_DIM_X,
+ RCONV_OUT_DIM_Y, rconv_buf, NULL);
+
+ verify_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
+
+ delete[]test1;
+ delete[]test2;
+ delete[]test3;
+#endif
+
+#ifdef TEST_CONV
+
+#define CONV_IM_DIM 16
+#define CONV_IM_CH 16
+#define CONV_KER_DIM 5
+#define CONV_OUT_CH 16
+#define CONV_OUT_DIM 16
+
+ test1 = new q7_t[CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH + CONV_OUT_CH];
+ test2 =
+ new q15_t[CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH +
+ 2 * CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH + CONV_OUT_CH];
+ test3 = new q7_t[CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + 2 * CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH];
+ test4 = new q15_t[CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + 2 * CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH];
+
+ for (int i = 0; i < CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH + CONV_OUT_CH; i++)
+ {
+ test1[i] = rand() % 256 - 100;
+ }
+
+ for (int i = 0;
+ i <
+ CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH +
+ 2 * CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH + CONV_OUT_CH; i++)
+ {
+ test2[i] = (rand() % 65536 - 32768);
+ }
+
+ for (int i = 0; i < CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + 2 * CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH; i++)
+ {
+ test3[i] = rand() % 256 - 100;
+ }
+
+ for (int i = 0; i < CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + 2 * CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH; i++)
+ {
+ test4[i] = (rand() % 65536 - 32768);
+ }
+
+ q7_t *conv_weight_q7 = test1;
+ q7_t *conv_bias_q7 = test1 + CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH;
+
+ q15_t *conv_weight_q15 = test2;
+ q15_t *conv_buf = test2 + CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH;
+ q15_t *conv_bias_q15 =
+ test2 + CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH +
+ 2 * CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH;
+
+ q7_t *conv_im_in_q7 = test3;
+ q7_t *conv_im_out_ref_q7 = test3 + CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH;
+ q7_t *conv_im_out_opt_q7 =
+ test3 + CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH;
+
+ q15_t *conv_im_in_q15 = test4;
+ q15_t *conv_im_out_ref_q15 = test4 + CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH;
+ q15_t *conv_im_out_opt_q15 =
+ test4 + CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH;
+
+ initialize_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
+
+ printf("start q7 ref implementation\n");
+
+ arm_convolve_HWC_q7_ref(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
+ CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_ref_q7,
+ CONV_OUT_DIM, conv_buf, NULL);
+
+ printf("start q7 basic implementation\n");
+
+ arm_convolve_HWC_q7_basic(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
+ CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
+ CONV_OUT_DIM, conv_buf, NULL);
+
+ verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
+
+ printf("start q7 fast implementation\n");
+
+ arm_convolve_HWC_q7_fast(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
+ CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
+ CONV_OUT_DIM, conv_buf, NULL);
+
+ verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
+
+ // testing with RGB
+ printf("start q7 ref implementation for RGB\n");
+
+ arm_convolve_HWC_q7_ref(conv_im_in_q7, CONV_IM_DIM, 3, conv_weight_q7,
+ CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_ref_q7,
+ CONV_OUT_DIM, conv_buf, NULL);
+
+ printf("start q7 basic implementation for RGB\n");
+
+ arm_convolve_HWC_q7_basic(conv_im_in_q7, CONV_IM_DIM, 3, conv_weight_q7,
+ CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
+ CONV_OUT_DIM, conv_buf, NULL);
+
+ verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
+
+ printf("start q7 RGB implementation for RGB\n");
+
+ arm_convolve_HWC_q7_RGB(conv_im_in_q7, CONV_IM_DIM, 3, conv_weight_q7,
+ CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
+ CONV_OUT_DIM, conv_buf, NULL);
+
+ verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
+
+ // testing q15
+ initialize_results_q15(conv_im_out_ref_q15, conv_im_out_opt_q15, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
+
+ printf("start q15 ref implementation\n");
+
+ arm_convolve_HWC_q15_ref(conv_im_in_q15, CONV_IM_DIM, CONV_IM_CH, conv_weight_q15,
+ CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q15, 0, 15, conv_im_out_ref_q15,
+ CONV_OUT_DIM, conv_buf, NULL);
+
+ printf("start q15 basic implementation\n");
+
+ arm_convolve_HWC_q15_basic(conv_im_in_q15, CONV_IM_DIM, CONV_IM_CH, conv_weight_q15,
+ CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q15, 0, 15, conv_im_out_opt_q15,
+ CONV_OUT_DIM, conv_buf, NULL);
+
+ verify_results_q15(conv_im_out_ref_q15, conv_im_out_opt_q15, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
+
+ printf("start q15 fast implementation\n");
+
+ arm_convolve_HWC_q15_fast(conv_im_in_q15, CONV_IM_DIM, CONV_IM_CH, conv_weight_q15,
+ CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q15, 0, 15, conv_im_out_opt_q15,
+ CONV_OUT_DIM, conv_buf, NULL);
+
+ verify_results_q15(conv_im_out_ref_q15, conv_im_out_opt_q15, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
+
+ // depthwise separable conv
+ initialize_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
+
+ printf("start q7 depthwise_separable_conv ref implementation\n");
+
+ arm_depthwise_separable_conv_HWC_q7_ref(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
+ CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_ref_q7,
+ CONV_OUT_DIM, conv_buf, NULL);
+
+ printf("start q7 depthwise_separable_conv implementation\n");
+
+ arm_depthwise_separable_conv_HWC_q7(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
+ CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
+ CONV_OUT_DIM, conv_buf, NULL);
+
+ verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
+
+ delete[]test1;
+ delete[]test2;
+ delete[]test3;
+ delete[]test4;
+
+#endif
+
+ test_pass = true;
+ test_index = 0;
+ while (test_flags[test_index] != -1) {
+ if (test_flags[test_index]) {
+ test_pass = false;
+ }
+ test_index ++;
+ }
+ if (test_pass) {
+ printf("All tests passed\n");
+ } else {
+ printf("Test failed passed\n");
+ }
+
+ return 0;
+}
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.h b/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.h
new file mode 100644
index 0000000..264b755
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.h
@@ -0,0 +1,78 @@
+#ifndef _MAIN_H_
+#define _MAIN_H_
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+
+#include "arm_math.h"
+
+#include "arm_nnfunctions.h"
+#include "ref_functions.h"
+
+extern int test_index;
+extern q7_t test_flags[50];
+
+void initialize_results_q7(q7_t * ref, q7_t * opt, int length)
+{
+ arm_fill_q7(0, ref, length);
+ arm_fill_q7(37, opt, length);
+}
+
+void initialize_results_q15(q15_t * ref, q15_t * opt, int length)
+{
+ arm_fill_q15(0, ref, length);
+ arm_fill_q15(0x5F5, opt, length);
+}
+
+void verify_results_q7(q7_t * ref, q7_t * opt, int length)
+{
+
+ bool if_match = true;
+
+ for (int i = 0; i < length; i++)
+ {
+ if (ref[i] != opt[i])
+ {
+ printf("Output mismatch at %d, expected %d, actual %d\r\n", i, ref[i], opt[i]);
+
+ if_match = false;
+ }
+ }
+
+ if (if_match == true)
+ {
+ printf("Outputs match.\r\n\r\n");
+ test_flags[test_index++] = 0;
+ } else {
+ test_flags[test_index++] = 1;
+ }
+
+}
+
+void verify_results_q15(q15_t * ref, q15_t * opt, int length)
+{
+
+ bool if_match = true;
+
+ for (int i = 0; i < length; i++)
+ {
+ if (ref[i] != opt[i])
+ {
+ printf("Output mismatch at %d, expected %d, actual %d\r\n", i, ref[i], opt[i]);
+
+ if_match = false;
+ }
+ }
+
+ if (if_match == true)
+ {
+ printf("Outputs match.\r\n\r\n");
+ test_flags[test_index++] = 0;
+ } else {
+ test_flags[test_index++] = 1;
+ }
+
+}
+
+#endif
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.ini b/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.ini
new file mode 100644
index 0000000..071a116
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.ini
@@ -0,0 +1,26 @@
+/* This file automatically runs the tests and extract out results */
+
+FUNC void check_results (void)
+{
+ if (test_pass) {
+ exec("LOG > NN_TEST.log");
+ printf("Test passed\n");
+ exec("LOG OFF");
+ } else {
+ exec("LOG > NN_TEST.log");
+ printf("Test failed\n");
+ exec("D test_flags");
+ exec("LOG OFF");
+ }
+}
+
+
+
+RESET /* Reset the target processor */
+LOG OFF /* Turn off Logging by default. */
+
+G
+
+check_results()
+
+EXIT
\ No newline at end of file
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.uvoptx b/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.uvoptx
new file mode 100644
index 0000000..790d672
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.uvoptx
@@ -0,0 +1,1389 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj; *.o</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>ARMCM3</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>10000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\ARMCM3_debug\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>.\arm_nnexamples_nn_test.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM3$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMCM4_FP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>100000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\ARMCM4_debug\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>.\arm_nnexamples_nn_test.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=341,284,717,520,0)(1009=-1,-1,-1,-1,0)(1012=347,325,822,639,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>1</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>1</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMCM7_SP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\ARMCM7_debug\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>.\arm_nnexamples_nn_test.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM7_SP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <MemoryWindow1>
+ <Mm>
+ <WinNumber>1</WinNumber>
+ <SubType>0</SubType>
+ <ItemText>0x20000700</ItemText>
+ <AccSizeX>0</AccSizeX>
+ </Mm>
+ </MemoryWindow1>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMCM4b_FP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>100000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\ARMCM4_debug\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>.\arm_nnexamples_nn_test.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=341,284,717,520,0)(1009=-1,-1,-1,-1,0)(1012=347,325,822,639,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>1</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>1</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMCM7b_SP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\ARMCM7_debug\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>.\arm_nnexamples_nn_test.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM7_SP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <MemoryWindow1>
+ <Mm>
+ <WinNumber>1</WinNumber>
+ <SubType>0</SubType>
+ <ItemText>0x20000700</ItemText>
+ <AccSizeX>0</AccSizeX>
+ </Mm>
+ </MemoryWindow1>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>1</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\Ref_Implementations\arm_convolve_HWC_q7_ref.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_ref.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>2</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\Ref_Implementations\arm_convolve_HWC_q7_ref_nonsquare.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_ref_nonsquare.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>3</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\Ref_Implementations\arm_convolve_HWC_q15_ref.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q15_ref.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>4</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\Ref_Implementations\arm_depthwise_separable_conv_HWC_q7_ref.c</PathWithFileName>
+ <FilenameWithoutPath>arm_depthwise_separable_conv_HWC_q7_ref.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>5</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\Ref_Implementations\arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c</PathWithFileName>
+ <FilenameWithoutPath>arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>6</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\Ref_Implementations\arm_fully_connected_mat_q7_vec_q15_opt_ref.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_mat_q7_vec_q15_opt_ref.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>7</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\Ref_Implementations\arm_fully_connected_mat_q7_vec_q15_ref.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_mat_q7_vec_q15_ref.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>8</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\Ref_Implementations\arm_fully_connected_q7_opt_ref.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q7_opt_ref.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>9</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\Ref_Implementations\arm_fully_connected_q7_ref.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q7_ref.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>10</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\Ref_Implementations\arm_fully_connected_q15_opt_ref.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q15_opt_ref.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>11</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\Ref_Implementations\arm_fully_connected_q15_ref.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q15_ref.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>12</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\Ref_Implementations\arm_pool_ref.c</PathWithFileName>
+ <FilenameWithoutPath>arm_pool_ref.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>13</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\Ref_Implementations\arm_relu_ref.c</PathWithFileName>
+ <FilenameWithoutPath>arm_relu_ref.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>14</FileNumber>
+ <FileType>8</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\arm_nnexamples_nn_test.cpp</PathWithFileName>
+ <FilenameWithoutPath>arm_nnexamples_nn_test.cpp</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>15</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nn_activations_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>16</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nn_activations_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>17</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ActivationFunctions\arm_relu_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_relu_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>18</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ActivationFunctions\arm_relu_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_relu_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>19</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>20</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_basic.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>21</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_fast.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>22</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_fast_nonsquare.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>23</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q7_RGB.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>24</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q15_basic.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>25</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</PathWithFileName>
+ <FilenameWithoutPath>arm_convolve_HWC_q15_fast.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>26</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_depthwise_separable_conv_HWC_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>27</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</PathWithFileName>
+ <FilenameWithoutPath>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>28</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nn_mat_mult_kernel_q7_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>29</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>30</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_mat_q7_vec_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>31</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_mat_q7_vec_q15_opt.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>32</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>33</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q7_opt.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>34</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>35</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</PathWithFileName>
+ <FilenameWithoutPath>arm_fully_connected_q15_opt.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>36</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\NNSupportFunctions\arm_nntables.c</PathWithFileName>
+ <FilenameWithoutPath>arm_nntables.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>37</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</PathWithFileName>
+ <FilenameWithoutPath>arm_pool_q7_HWC.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>38</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</PathWithFileName>
+ <FilenameWithoutPath>arm_q7_to_q15_no_shift.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>39</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</PathWithFileName>
+ <FilenameWithoutPath>arm_q7_to_q15_reordered_no_shift.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>40</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</PathWithFileName>
+ <FilenameWithoutPath>arm_softmax_q7.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>41</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</PathWithFileName>
+ <FilenameWithoutPath>arm_softmax_q15.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>42</FileNumber>
+ <FileType>5</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\readme.txt</PathWithFileName>
+ <FilenameWithoutPath>readme.txt</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>1</RteFlg>
+ </Group>
+
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>1</RteFlg>
+ </Group>
+
+ <Group>
+ <GroupName>::Device</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>1</RteFlg>
+ </Group>
+
+</ProjectOpt>
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.uvprojx b/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.uvprojx
new file mode 100644
index 0000000..6b2a87e
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.uvprojx
@@ -0,0 +1,3175 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+ <SchemaVersion>2.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Targets>
+ <Target>
+ <TargetName>ARMCM3</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
+ <uAC6>0</uAC6>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM3</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.2.0</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(10000000) ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM3$Flash\NEW_DEVICE.flm))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM3$Device\Include\ARMCM3.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM3$SVD\ARMCM3.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\ARMCM3_debug\</OutputDirectory>
+ <OutputName>arm_nnexample_nn_test</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\ARMCM3_debug\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> </SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments></TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3>"" ()</Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M3"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>0</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>0</EndSel>
+ <uLtcg>0</uLtcg>
+ <nSecure>0</nSecure>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>1</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>1</uC99>
+ <useXO>0</useXO>
+ <v6Lang>1</v6Lang>
+ <v6LangP>1</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_CM3</Define>
+ <Undefine></Undefine>
+ <IncludePath>.\Ref_Implementations;..\..\Include;..\nn_test;..\..\..\Core\Include;..\..\..\DSP\Include</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <uClangAs>0</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <Files>
+ <File>
+ <FileName>arm_convolve_HWC_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_ref_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q7_ref_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_depthwise_separable_conv_HWC_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_mat_q7_vec_q15_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_mat_q7_vec_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q7_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q15_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_pool_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_relu_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nnexamples_nn_test.cpp</FileName>
+ <FileType>8</FileType>
+ <FilePath>.\arm_nnexamples_nn_test.cpp</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_relu_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_relu_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_RGB.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nntables.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_nntables.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_q7_HWC.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_reordered_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Device</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ <Target>
+ <TargetName>ARMCM4_FP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
+ <uAC6>0</uAC6>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM4_FP</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.2.0</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM4_FP$Device\ARM\ARMCM4\Include\ARMCM4_FP.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM4_FP$Device\ARM\SVD\ARMCM4.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\ARMCM4_debug\</OutputDirectory>
+ <OutputName>arm_nnexample_nn_test</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\ARMCM4_debug\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> -MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments> -MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3>"" ()</Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M4"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>1</EndSel>
+ <uLtcg>0</uLtcg>
+ <nSecure>0</nSecure>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x1000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>4</Optim>
+ <oTime>1</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>1</uC99>
+ <useXO>0</useXO>
+ <v6Lang>1</v6Lang>
+ <v6LangP>1</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_CM4 __FPU_PRESENT=1U</Define>
+ <Undefine></Undefine>
+ <IncludePath>.\Ref_Implementations;..\..\Include;..\nn_test;..\..\..\Core\Include;..\..\..\DSP\Include</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <uClangAs>0</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <Files>
+ <File>
+ <FileName>arm_convolve_HWC_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_ref_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q7_ref_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_depthwise_separable_conv_HWC_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_mat_q7_vec_q15_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_mat_q7_vec_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q7_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q15_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_pool_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_relu_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nnexamples_nn_test.cpp</FileName>
+ <FileType>8</FileType>
+ <FilePath>.\arm_nnexamples_nn_test.cpp</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_relu_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_relu_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_RGB.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nntables.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_nntables.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_q7_HWC.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_reordered_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Device</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ <Target>
+ <TargetName>ARMCM7_SP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
+ <uAC6>0</uAC6>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM7_SP</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.2.0</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM7_SP$Device\ARM\Flash\NEW_DEVICE.FLM))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM7_SP$Device\ARM\ARMCM7\Include\ARMCM7_SP.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM7_SP$Device\ARM\SVD\ARMCM7.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\ARMCM7_debug\</OutputDirectory>
+ <OutputName>arm_nnexamples_nn_test</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\ARMCM7_debug\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> -MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM7</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments> -MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM7</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3></Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M7"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>1</EndSel>
+ <uLtcg>0</uLtcg>
+ <nSecure>0</nSecure>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>1</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>1</uC99>
+ <useXO>0</useXO>
+ <v6Lang>1</v6Lang>
+ <v6LangP>1</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
+ <Undefine></Undefine>
+ <IncludePath>.\Ref_Implementations;..\..\Include;..\nn_test;..\..\..\Core\Include;..\..\..\DSP\Include</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <uClangAs>0</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <Files>
+ <File>
+ <FileName>arm_convolve_HWC_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_ref_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q7_ref_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_depthwise_separable_conv_HWC_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_mat_q7_vec_q15_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_mat_q7_vec_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q7_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q15_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_pool_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_relu_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nnexamples_nn_test.cpp</FileName>
+ <FileType>8</FileType>
+ <FilePath>.\arm_nnexamples_nn_test.cpp</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_relu_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_relu_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_RGB.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nntables.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_nntables.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_q7_HWC.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_reordered_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Device</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ <Target>
+ <TargetName>ARMCM4b_FP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
+ <uAC6>0</uAC6>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM4_FP</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.2.0</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM4_FP$Device\ARM\ARMCM4\Include\ARMCM4_FP.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM4_FP$Device\ARM\SVD\ARMCM4.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\ARMCM4b_debug\</OutputDirectory>
+ <OutputName>arm_nnexample_nn_test</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\ARMCM4_debug\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> -MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments> -MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3>"" ()</Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>1</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M4"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>1</EndSel>
+ <uLtcg>0</uLtcg>
+ <nSecure>0</nSecure>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x1000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>4</Optim>
+ <oTime>1</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>1</uC99>
+ <useXO>0</useXO>
+ <v6Lang>1</v6Lang>
+ <v6LangP>1</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_CM4 __FPU_PRESENT=1U ARM_MATH_BIG_ENDIAN</Define>
+ <Undefine></Undefine>
+ <IncludePath>.\Ref_Implementations;..\..\Include;..\nn_test;..\..\..\Core\Include;..\..\..\DSP\Include</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <uClangAs>0</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <Files>
+ <File>
+ <FileName>arm_convolve_HWC_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_ref_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q7_ref_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_depthwise_separable_conv_HWC_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_mat_q7_vec_q15_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_mat_q7_vec_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q7_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q15_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_pool_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_relu_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nnexamples_nn_test.cpp</FileName>
+ <FileType>8</FileType>
+ <FilePath>.\arm_nnexamples_nn_test.cpp</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_relu_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_relu_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_RGB.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nntables.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_nntables.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_q7_HWC.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_reordered_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Device</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ <Target>
+ <TargetName>ARMCM7b_SP</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
+ <uAC6>0</uAC6>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM7_SP</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.2.0</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM7_SP$Device\ARM\Flash\NEW_DEVICE.FLM))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM7_SP$Device\ARM\ARMCM7\Include\ARMCM7_SP.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM7_SP$Device\ARM\SVD\ARMCM7.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\ARMCM7b_debug\</OutputDirectory>
+ <OutputName>arm_nnexamples_nn_test</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\ARMCM7_debug\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> -MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM7</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments> -MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM7</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3></Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>1</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M7"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>1</EndSel>
+ <uLtcg>0</uLtcg>
+ <nSecure>0</nSecure>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>1</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>1</uC99>
+ <useXO>0</useXO>
+ <v6Lang>1</v6Lang>
+ <v6LangP>1</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_CM7 __FPU_PRESENT=1U ARM_MATH_BIG_ENDIAN</Define>
+ <Undefine></Undefine>
+ <IncludePath>.\Ref_Implementations;..\..\Include;..\nn_test;..\..\..\Core\Include;..\..\..\DSP\Include</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <uClangAs>0</uClangAs>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source Files</GroupName>
+ <Files>
+ <File>
+ <FileName>arm_convolve_HWC_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_ref_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q7_ref_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_convolve_HWC_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_depthwise_separable_conv_HWC_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_mat_q7_vec_q15_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_mat_q7_vec_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q7_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q7_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q15_opt_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_fully_connected_q15_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_pool_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_ref.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\Ref_Implementations\arm_relu_ref.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nnexamples_nn_test.cpp</FileName>
+ <FileType>8</FileType>
+ <FilePath>.\arm_nnexamples_nn_test.cpp</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_nn_activations_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_activations_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_nn_activations_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_relu_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_relu_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ActivationFunctions\arm_relu_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_1x1_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_fast_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_fast_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q7_RGB.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q7_RGB.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_basic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_basic.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_convolve_HWC_q15_fast.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_convolve_HWC_q15_fast.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_depthwise_separable_conv_HWC_q7_nonsquare.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nn_mat_mult_kernel_q7_q15_reordered.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\ConvolutionFunctions\arm_nn_mat_mult_kernel_q7_q15_reordered.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_mat_q7_vec_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_mat_q7_vec_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q7_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q7_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_fully_connected_q15_opt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\FullyConnectedFunctions\arm_fully_connected_q15_opt.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_nntables.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_nntables.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_pool_q7_HWC.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_pool_q7_HWC.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_q7_to_q15_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_q7_to_q15_reordered_no_shift.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\NNSupportFunctions\arm_q7_to_q15_reordered_no_shift.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q7.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\SoftmaxFunctions\arm_softmax_q7.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_softmax_q15.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\SoftmaxFunctions\arm_softmax_q15.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Compiler</GroupName>
+ </Group>
+ <Group>
+ <GroupName>::Device</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+ <RTE>
+ <apis/>
+ <components>
+ <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.2" condition="ARMv6_7_8-M Device">
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM4b_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ <targetInfo name="ARMCM7b_SP"/>
+ </targetInfos>
+ </component>
+ <component Cclass="CMSIS" Cgroup="DSP" Cvendor="ARM" Cversion="1.5.2" condition="CMSIS DSP">
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM4b_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ <targetInfo name="ARMCM7b_SP"/>
+ </targetInfos>
+ </component>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS">
+ <package name="CMSIS" schemaVersion="1.2" url="http://www.keil.com/pack/" vendor="ARM" version="4.0.11"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ </targetInfos>
+ </component>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS">
+ <package name="CMSIS" schemaVersion="1.2" url="http://www.keil.com/pack/" vendor="ARM" version="4.0.11"/>
+ <targetInfos>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM4b_FP"/>
+ </targetInfos>
+ </component>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM7 CMSIS">
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.1.10"/>
+ <targetInfos>
+ <targetInfo name="ARMCM7_SP"/>
+ <targetInfo name="ARMCM7b_SP"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDERR" Cvariant="ITM" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M with ITM">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM4b_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ <targetInfo name="ARMCM7b_SP"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="ITM" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M with ITM">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM4b_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ <targetInfo name="ARMCM7b_SP"/>
+ </targetInfos>
+ </component>
+ <component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="TTY" Cvariant="ITM" Cvendor="Keil" Cversion="1.2.1" condition="ARMCC Cortex-M with ITM">
+ <package name="ARM_Compiler" schemaVersion="1.4.9" url="http://www.keil.com/pack/" vendor="Keil" version="1.3.3"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM4b_FP"/>
+ <targetInfo name="ARMCM7_SP"/>
+ <targetInfo name="ARMCM7b_SP"/>
+ </targetInfos>
+ </component>
+ </components>
+ <files>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM0\Source\ARM\startup_ARMCM0.s" version="1.0.0">
+ <instance index="0" removed="1">RTE\Device\ARMCM0\startup_ARMCM0.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM0 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos/>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM0\Source\system_ARMCM0.c" version="1.0.0">
+ <instance index="0" removed="1">RTE\Device\ARMCM0\system_ARMCM0.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM0 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos/>
+ </file>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM3\system_ARMCM3.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM3"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM4\Source\ARM\startup_ARMCM4.s" version="1.0.0">
+ <instance index="0" removed="1">RTE\Device\ARMCM4\startup_ARMCM4.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.2.0"/>
+ <targetInfos/>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM4\Source\system_ARMCM4.c" version="1.0.0">
+ <instance index="0" removed="1">RTE\Device\ARMCM4\system_ARMCM4.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.2.0"/>
+ <targetInfos/>
+ </file>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM4\Source\ARM\startup_ARMCM4.s" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM4_FP\startup_ARMCM4.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM4b_FP"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM4\Source\system_ARMCM4.c" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM4_FP\system_ARMCM4.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM4 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM4_FP"/>
+ <targetInfo name="ARMCM4b_FP"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM7\Source\ARM\startup_ARMCM7.s" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM7_SP\startup_ARMCM7.s</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM7 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM7_SP"/>
+ <targetInfo name="ARMCM7b_SP"/>
+ </targetInfos>
+ </file>
+ <file attr="config" category="sourceC" name="Device\ARM\ARMCM7\Source\system_ARMCM7.c" version="1.0.0">
+ <instance index="0">RTE\Device\ARMCM7_SP\system_ARMCM7.c</instance>
+ <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM7 CMSIS"/>
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
+ <targetInfos>
+ <targetInfo name="ARMCM7_SP"/>
+ <targetInfo name="ARMCM7b_SP"/>
+ </targetInfos>
+ </file>
+ </files>
+ </RTE>
+
+</Project>
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/readme.txt b/CMSIS/NN/NN_Lib_Tests/nn_test/readme.txt
new file mode 100644
index 0000000..5a1284d
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/readme.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_nnexample_cifar10 for
+ Cortex-M4 and Cortex-M7.
+
+The example is configured for uVision Simulator.
diff --git a/CMSIS/NN/NN_Lib_Tests/nn_test/runTest.bat b/CMSIS/NN/NN_Lib_Tests/nn_test/runTest.bat
new file mode 100644
index 0000000..a66f48e
--- /dev/null
+++ b/CMSIS/NN/NN_Lib_Tests/nn_test/runTest.bat
@@ -0,0 +1,48 @@
+@echo off
+
+set UVEXE=C:\Keil_v5\UV4\UV4.EXE
+
+echo Building NN Test for Cortex-M7 Single Precision Little Endian
+%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM7_SP" -o "NN_Test_ARMCM7_SP_build.log"
+
+echo Running NN Test for Cortex-M7 Single Precision Little Endian
+%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM7_SP" -j0
+
+type NN_TEST.log
+del NN_TEST.log
+
+echo Building NN Test for Cortex-M4 FP Little Endian
+%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM4_FP" -o "NN_Test_ARMCM4_FP_build.log"
+
+echo Running NN Test for Cortex-M4 FP Little Endian
+%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM4_FP" -j0
+
+type NN_TEST.log
+del NN_TEST.log
+
+echo Building NN Test for Cortex-M7 Single Precision Big Endian
+%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM7b_SP" -o "NN_Test_ARMCM7b_SP_build.log"
+
+echo Running NN Test for Cortex-M7 Single Precision Big Endian
+%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM7b_SP" -j0
+
+type NN_TEST.log
+del NN_TEST.log
+
+echo Building NN Test for Cortex-M4 FP Big Endian
+%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM4b_FP" -o "NN_Test_ARMCM4b_FP_build.log"
+
+echo Running NN Test for Cortex-M4 FP Big Endian
+%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM4b_FP" -j0
+
+type NN_TEST.log
+del NN_TEST.log
+
+echo Building NN Test for Cortex-M3
+%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM3" -o "NN_Test_ARMCM3_build.log"
+
+echo Running NN Test for Cortex-M3
+%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM3" -j0
+
+type NN_TEST.log
+del NN_TEST.log
\ No newline at end of file
diff --git a/CMSIS/NN/Scripts/NNFunctions/fully_connected_opt_weight_generation.py b/CMSIS/NN/Scripts/NNFunctions/fully_connected_opt_weight_generation.py
new file mode 100644
index 0000000..0319e83
--- /dev/null
+++ b/CMSIS/NN/Scripts/NNFunctions/fully_connected_opt_weight_generation.py
@@ -0,0 +1,146 @@
+#!/usr/bin/env python
+
+import numpy as np
+
+def convert_to_x4_q7_weights(weights):
+ [r, h, w, c] = weights.shape
+ weights = np.reshape(weights, (r, h*w*c))
+ num_of_rows = r
+ num_of_cols = h*w*c
+ new_weights = np.copy(weights)
+ new_weights = np.reshape(new_weights, (r*h*w*c))
+ counter = 0
+ for i in range(int(num_of_rows)/4):
+ # we only need to do the re-ordering for every 4 rows
+ row_base = 4*i
+ for j in range (int(num_of_cols)/4):
+ # for each 4 entries
+ column_base = 4*j
+ new_weights[counter] = weights[row_base ][column_base ]
+ new_weights[counter+1] = weights[row_base+1][column_base ]
+ new_weights[counter+2] = weights[row_base ][column_base+2]
+ new_weights[counter+3] = weights[row_base+1][column_base+2]
+ new_weights[counter+4] = weights[row_base+2][column_base ]
+ new_weights[counter+5] = weights[row_base+3][column_base ]
+ new_weights[counter+6] = weights[row_base+2][column_base+2]
+ new_weights[counter+7] = weights[row_base+3][column_base+2]
+
+ new_weights[counter+8] = weights[row_base ][column_base+1]
+ new_weights[counter+9] = weights[row_base+1][column_base+1]
+ new_weights[counter+10] = weights[row_base ][column_base+3]
+ new_weights[counter+11] = weights[row_base+1][column_base+3]
+ new_weights[counter+12] = weights[row_base+2][column_base+1]
+ new_weights[counter+13] = weights[row_base+3][column_base+1]
+ new_weights[counter+14] = weights[row_base+2][column_base+3]
+ new_weights[counter+15] = weights[row_base+3][column_base+3]
+ counter = counter + 16
+ # the remaining ones are in order
+ for j in range((int)(num_of_cols-num_of_cols%4), int(num_of_cols)):
+ new_weights[counter] = weights[row_base][j]
+ new_weights[counter+1] = weights[row_base+1][j]
+ new_weights[counter+2] = weights[row_base+2][j]
+ new_weights[counter+3] = weights[row_base+3][j]
+ counter = counter + 4
+ return new_weights
+
+def convert_to_x4_q15_weights(weights):
+ [r, h, w, c] = weights.shape
+ weights = np.reshape(weights, (r, h*w*c))
+ num_of_rows = r
+ num_of_cols = h*w*c
+ new_weights = np.copy(weights)
+ new_weights = np.reshape(new_weights, (r*h*w*c))
+ counter = 0
+ for i in range(int(num_of_rows)/4):
+ # we only need to do the re-ordering for every 4 rows
+ row_base = 4*i
+ for j in range (int(num_of_cols)/2):
+ # for each 2 entries
+ column_base = 2*j
+ new_weights[counter] = weights[row_base ][column_base ]
+ new_weights[counter+1] = weights[row_base ][column_base+1]
+ new_weights[counter+2] = weights[row_base+1][column_base ]
+ new_weights[counter+3] = weights[row_base+1][column_base+1]
+ new_weights[counter+4] = weights[row_base+2][column_base ]
+ new_weights[counter+5] = weights[row_base+2][column_base+1]
+ new_weights[counter+6] = weights[row_base+3][column_base ]
+ new_weights[counter+7] = weights[row_base+3][column_base+1]
+
+ counter = counter + 8
+ # the remaining ones are in order
+ for j in range((int)(num_of_cols-num_of_cols%2), int(num_of_cols)):
+ new_weights[counter] = weights[row_base][j]
+ new_weights[counter+1] = weights[row_base+1][j]
+ new_weights[counter+2] = weights[row_base+2][j]
+ new_weights[counter+3] = weights[row_base+3][j]
+ counter = counter + 4
+ return new_weights
+
+def convert_q7_q15_weights(weights):
+ [r, h, w, c] = weights.shape
+ weights = np.reshape(weights, (r, h*w*c))
+ num_of_rows = r
+ num_of_cols = h*w*c
+ new_weights = np.copy(weights)
+ new_weights = np.reshape(new_weights, (r*h*w*c))
+ counter = 0
+ for i in range(int(num_of_rows)/4):
+ # we only need to do the re-ordering for every 4 rows
+ row_base = 4*i
+ for j in range (int(num_of_cols)/2):
+ # for each 2 entries
+ column_base = 2*j
+ new_weights[counter] = weights[row_base ][column_base ]
+ new_weights[counter+1] = weights[row_base+1][column_base ]
+ new_weights[counter+2] = weights[row_base ][column_base+1]
+ new_weights[counter+3] = weights[row_base+1][column_base+1]
+ new_weights[counter+4] = weights[row_base+2][column_base ]
+ new_weights[counter+5] = weights[row_base+3][column_base ]
+ new_weights[counter+6] = weights[row_base+2][column_base+1]
+ new_weights[counter+7] = weights[row_base+3][column_base+1]
+
+ counter = counter + 8
+ # the remaining ones are in order
+ for j in range((int)(num_of_cols-num_of_cols%2), int(num_of_cols)):
+ new_weights[counter] = weights[row_base][j]
+ new_weights[counter+1] = weights[row_base+1][j]
+ new_weights[counter+2] = weights[row_base+2][j]
+ new_weights[counter+3] = weights[row_base+3][j]
+ counter = counter + 4
+ return new_weights
+
+# input dimensions
+vec_dim = 127
+row_dim = 127
+
+weight = np.zeros((row_dim,vec_dim), dtype=int)
+
+# generate random inputs
+for i in range(row_dim):
+ for j in range(vec_dim):
+ weight[i][j] = np.random.randint(256)-128
+
+weight = np.reshape(weight, (row_dim, vec_dim, 1, 1))
+
+outfile = open("../Ref_Implementations/fully_connected_testing_weights.h", "w")
+outfile.write("#define IP2_WEIGHT {")
+weight.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+new_weight = convert_to_x4_q7_weights(weight)
+outfile.write("#define IP4_WEIGHT {")
+new_weight.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+new_weight = convert_q7_q15_weights(weight)
+outfile.write("#define IP4_q7_q15_WEIGHT {")
+new_weight.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+new_weight = convert_to_x4_q15_weights(weight)
+outfile.write("#define IP4_WEIGHT_Q15 {")
+new_weight.tofile(outfile,sep=",",format="%d")
+outfile.write("}\n\n")
+
+
+outfile.close()
diff --git a/CMSIS/NN/Scripts/NNFunctions/table_gen.py b/CMSIS/NN/Scripts/NNFunctions/table_gen.py
new file mode 100644
index 0000000..5db6d3e
--- /dev/null
+++ b/CMSIS/NN/Scripts/NNFunctions/table_gen.py
@@ -0,0 +1,116 @@
+#!/usr/bin/python
+
+import math
+
+class Table(object):
+
+ def __init__(self, table_entry=256, table_range=8):
+ self.table_entry = table_entry
+ self.table_range = table_range
+ pass
+
+ def sigmoid(self, x):
+ return 1 / (1 + math.exp(-1*x))
+
+ def tanh(self, x):
+ return (math.exp(2*x)-1) / (math.exp(2*x)+1)
+
+ def fp2q7(self, x):
+ x_int = math.floor(x*(2**7)+0.5)
+ if x_int >= 128 :
+ x_int = 127
+ if x_int < -128 :
+ x_int = -128
+ if x_int >= 0 :
+ return x_int
+ else :
+ return 0x100 + x_int
+
+ def fp2q15(self, x):
+ x_int = math.floor(x*(2**15)+0.5)
+ if x_int >= 2**15 :
+ x_int = 2**15-1
+ if x_int < -1*2**15 :
+ x_int = -1*2**15
+ if x_int >= 0 :
+ return x_int
+ else :
+ return 0x10000 + x_int
+
+ def table_gen(self):
+ outfile = open("NNCommonTable.c", "wb")
+
+ outfile.write("/*\n * Common tables for NN\n *\n *\n *\n *\n */\n\n#include \"arm_math.h\"\n#include \"NNCommonTable.h\"\n\n/*\n * Table for sigmoid\n */\n")
+
+ for function_type in ["sigmoid", "tanh"]:
+ for data_type in [7, 15]:
+ out_type = "q"+str(data_type)+"_t"
+ act_func = getattr(self, function_type)
+ quan_func = getattr(self, 'fp2q'+str(data_type))
+
+ # unified table
+ outfile.write('const %s %sTable_q%d[%d] = {\n' % (out_type, function_type, data_type, self.table_entry) )
+ for i in range(self.table_entry):
+ # convert into actual value
+ if i < self.table_entry/2:
+ value_q7 = self.table_range * (i)
+ else:
+ value_q7 = self.table_range * (i - self.table_entry)
+
+ if data_type == 7:
+ #outfile.write('%f, ' % (act_func(float(value_q7)/256)))
+ outfile.write('0x%02x, ' % (quan_func(act_func(float(value_q7)/self.table_entry))))
+ else:
+ #outfile.write('%f, ' % (act_func(float(value_q7)/256)))
+ outfile.write('0x%04x, ' % (quan_func(act_func(float(value_q7)/self.table_entry))))
+ if i % 8 == 7:
+ outfile.write("\n")
+ outfile.write("};\n\n")
+
+ for data_type in [15]:
+ out_type = "q"+str(data_type)+"_t"
+ act_func = getattr(self, function_type)
+ quan_func = getattr(self, 'fp2q'+str(data_type))
+
+ # H-L tables
+ outfile.write('const %s %sLTable_q%d[%d] = {\n' % (out_type, function_type, data_type, self.table_entry/2))
+ for i in range(self.table_entry/2):
+ # convert into actual value, max value is 16*self.table_entry/4 / 4
+ # which is equivalent to self.table_entry / self.table_entry/2 = 2, i.e., 1/4 of 8
+ if i < self.table_entry/4:
+ value_q7 = self.table_range * i / 4
+ else:
+ value_q7 = self.table_range * (i - self.table_entry/2) / 4
+ if data_type == 7:
+ #outfile.write('%f, ' % (act_func(float(value_q7)/256)))
+ outfile.write('0x%02x, ' % (quan_func(act_func(float(value_q7)/(self.table_entry/2)))))
+ else:
+ #outfile.write('%f, ' % (act_func(float(value_q7)/256)))
+ outfile.write('0x%04x, ' % (quan_func(act_func(float(value_q7)/(self.table_entry/2)))))
+ if i % 8 == 7:
+ outfile.write("\n")
+ outfile.write("};\n\n")
+
+ outfile.write('const %s %sHTable_q%d[%d] = {\n' % (out_type, function_type, data_type, 3*self.table_entry/4))
+ for i in range(3 * self.table_entry/4):
+ # convert into actual value, tageting range (2, 8)
+ if i < 3*self.table_entry/8 :
+ value_q7 = self.table_range * ( i + self.table_entry/8 )
+ else:
+ value_q7 = self.table_range * ( i + self.table_entry/8 - self.table_entry)
+ if data_type == 7:
+ #outfile.write('%f, ' % (act_func(float(value_q7)/256)))
+ outfile.write('0x%02x, ' % (quan_func(act_func(float(value_q7)/self.table_entry))))
+ else:
+ #outfile.write('%f, ' % (act_func(float(value_q7)/256)))
+ outfile.write('0x%04x, ' % (quan_func(act_func(float(value_q7)/self.table_entry))))
+ if i % 8 == 7:
+ outfile.write("\n")
+ outfile.write("};\n\n")
+
+ outfile.close()
+
+
+mytable = Table(table_entry=256, table_range=16)
+
+mytable.table_gen()
diff --git a/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c b/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c
new file mode 100644
index 0000000..dfe9777
--- /dev/null
+++ b/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c
@@ -0,0 +1,101 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_nn_activations_q15.c
+ * Description: Q15 neural network activation function using direct table look-up
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup Acti
+ * @{
+ */
+
+ /**
+ * @brief Q15 neural network activation function using direct table look-up
+ * @param[in,out] data pointer to input
+ * @param[in] size number of elements
+ * @param[in] int_width bit-width of the integer part, assume to be smaller than 3
+ * @param[in] type type of activation functions
+ * @return none.
+ *
+ * @details
+ *
+ * This is the direct table look-up approach.
+ *
+ * Assume here the integer part of the fixed-point is <= 3.
+ * More than 3 just not making much sense, makes no difference with
+ * saturation followed by any of these activation functions.
+ */
+
+void arm_nn_activations_direct_q15(q15_t * data, uint16_t size, uint16_t int_width, arm_nn_activation_type type)
+{
+ uint16_t i = size;
+ q15_t *pIn = data;
+ q15_t *pOut = data;
+ uint16_t shift_size = 8 + 3 - int_width;
+ uint32_t bit_mask = 0x7FF >> int_width;
+ uint32_t full_frac = bit_mask + 1;
+ const q15_t *lookup_table;
+
+ switch (type)
+ {
+ case ARM_SIGMOID:
+ lookup_table = sigmoidTable_q15;
+ break;
+ case ARM_TANH:
+ default:
+ lookup_table = tanhTable_q15;
+ break;
+ }
+
+ while (i)
+ {
+ q15_t out;
+ q15_t in = *pIn++;
+ q15_t frac = (uint32_t) in & bit_mask;
+ q15_t value = lookup_table[__USAT(in >> shift_size, 8)];
+ q15_t value2 = lookup_table[__USAT(1 + (in >> shift_size), 8)];
+
+ /* doing the interpolation here for better accuracy */
+ out = ((q31_t) (full_frac - frac) * value + (q31_t) value2 * frac) >> shift_size;
+
+ *pOut++ = out;
+ i--;
+ }
+
+}
+
+/**
+ * @} end of Acti group
+ */
diff --git a/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c b/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c
new file mode 100644
index 0000000..bf32eef
--- /dev/null
+++ b/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_nn_activations_q7.c
+ * Description: Q7 neural network activation function using direct table look-up
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup Acti
+ * @{
+ */
+
+ /**
+ * @brief Q7 neural network activation function using direct table look-up
+ * @param[in,out] data pointer to input
+ * @param[in] size number of elements
+ * @param[in] int_width bit-width of the integer part, assume to be smaller than 3
+ * @param[in] type type of activation functions
+ * @return none.
+ *
+ * @details
+ *
+ * This is the direct table look-up approach.
+ *
+ * Assume here the integer part of the fixed-point is <= 3.
+ * More than 3 just not making much sense, makes no difference with
+ * saturation followed by any of these activation functions.
+ */
+
+void arm_nn_activations_direct_q7(q7_t * data, uint16_t size, uint16_t int_width, arm_nn_activation_type type)
+{
+ uint16_t i = size;
+ q7_t *pIn = data;
+ q7_t *pOut = data;
+ q7_t in;
+ q7_t out;
+ uint16_t shift_size = 3 - int_width;
+ const q7_t *lookup_table;
+ switch (type)
+ {
+ case ARM_SIGMOID:
+ lookup_table = sigmoidTable_q7;
+ break;
+ case ARM_TANH:
+ default:
+ lookup_table = tanhTable_q7;
+ break;
+ }
+ while (i)
+ {
+ in = *pIn++;
+ out = lookup_table[(uint8_t) in >> shift_size];
+ *pOut++ = out;
+ i--;
+ }
+}
+
+/**
+ * @} end of Acti group
+ */
diff --git a/CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c b/CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c
new file mode 100644
index 0000000..4b3f863
--- /dev/null
+++ b/CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_relu_q15.c
+ * Description: Q15 version of ReLU
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup Acti
+ * @{
+ */
+
+ /**
+ * @brief Q15 RELU function
+ * @param[in,out] data pointer to input
+ * @param[in] size number of elements
+ * @return none.
+ *
+ * @details
+ *
+ * Optimized relu with QSUB instructions.
+ *
+ */
+
+void arm_relu_q15(q15_t * data, uint16_t size)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ uint16_t i = size >> 1;
+ q15_t *pIn = data;
+ q15_t *pOut = data;
+ q31_t in;
+ q31_t buf;
+ q31_t mask;
+
+ while (i)
+ {
+ in = *__SIMD32(pIn)++;
+
+ /* extract the first bit */
+ buf = __ROR(in & 0x80008000, 15);
+
+ /* if MSB=1, mask will be 0xFF, 0x0 otherwise */
+ mask = __QSUB16(0x00000000, buf);
+
+ *__SIMD32(pOut)++ = in & (~mask);
+ i--;
+ }
+
+ if (size & 0x1)
+ {
+ if (*pIn < 0)
+ {
+ *pIn = 0;
+ }
+ pIn++;
+ }
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+ uint16_t i;
+
+ for (i = 0; i < size; i++)
+ {
+ if (data[i] < 0)
+ data[i] = 0;
+ }
+
+#endif /* ARM_MATH_DSP */
+
+}
+
+/**
+ * @} end of Acti group
+ */
diff --git a/CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c b/CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c
new file mode 100644
index 0000000..d648f9a
--- /dev/null
+++ b/CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c
@@ -0,0 +1,110 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_relu_q7.c
+ * Description: Q7 version of ReLU
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup Acti
+ * @{
+ */
+
+ /**
+ * @brief Q7 RELU function
+ * @param[in,out] data pointer to input
+ * @param[in] size number of elements
+ * @return none.
+ *
+ * @details
+ *
+ * Optimized relu with QSUB instructions.
+ *
+ */
+
+void arm_relu_q7(q7_t * data, uint16_t size)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ uint16_t i = size >> 2;
+ q7_t *pIn = data;
+ q7_t *pOut = data;
+ q31_t in;
+ q31_t buf;
+ q31_t mask;
+
+ while (i)
+ {
+ in = *__SIMD32(pIn)++;
+
+ /* extract the first bit */
+ buf = __ROR(in & 0x80808080, 7);
+
+ /* if MSB=1, mask will be 0xFF, 0x0 otherwise */
+ mask = __QSUB8(0x00000000, buf);
+
+ *__SIMD32(pOut)++ = in & (~mask);
+ i--;
+ }
+
+ i = size & 0x3;
+ while (i)
+ {
+ if (*pIn < 0)
+ {
+ *pIn = 0;
+ }
+ pIn++;
+ i--;
+ }
+
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+
+ uint16_t i;
+
+ for (i = 0; i < size; i++)
+ {
+ if (data[i] < 0)
+ data[i] = 0;
+ }
+
+#endif /* ARM_MATH_DSP */
+
+}
+
+/**
+ * @} end of Acti group
+ */
diff --git a/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c
new file mode 100644
index 0000000..c5a64d0
--- /dev/null
+++ b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c
@@ -0,0 +1,243 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_convolve_1x1_HWC_q7_fast_nonsquare.c
+ * Description: Fast Q7 version of 1x1 convolution (non-square shape)
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup NNConv
+ * @{
+ */
+
+/**
+ * @brief Fast Q7 version of 1x1 convolution (non-sqaure shape)
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in_x input tensor dimention x
+ * @param[in] dim_im_in_y input tensor dimention y
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel_x filter kernel size x
+ * @param[in] dim_kernel_y filter kernel size y
+ * @param[in] padding_x padding size x
+ * @param[in] padding_y padding size y
+ * @param[in] stride_x convolution stride x
+ * @param[in] stride_y convolution stride y
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out_x output tensor dimension x
+ * @param[in] dim_im_out_y output tensor dimension y
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * This function is optimized for convolution with 1x1 kernel size (i.e., dim_kernel_x=1
+ * and dim_kernel_y=1). It can be used for the second half of MobileNets [1] after depthwise
+ * separable convolution.
+ *
+ * This function is the version with full list of optimization tricks, but with
+ * some contraints:
+ * ch_im_in is multiple of 4
+ * ch_im_out is multiple of 2
+ *
+ * [1] MobileNets: Efficient Convolutional Neural Networks for Mobile Vision Applications
+ * https://arxiv.org/abs/1704.04861
+ */
+
+arm_status arm_convolve_1x1_HWC_q7_fast_nonsquare(const q7_t * Im_in,
+ const uint16_t dim_im_in_x,
+ const uint16_t dim_im_in_y,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel_x,
+ const uint16_t dim_kernel_y,
+ const uint16_t padding_x,
+ const uint16_t padding_y,
+ const uint16_t stride_x,
+ const uint16_t stride_y,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out,
+ const uint16_t dim_im_out_x,
+ const uint16_t dim_im_out_y,
+ q15_t * bufferA,
+ q7_t * bufferB)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ int16_t i_out_y, i_out_x;
+ int16_t i_ch_out;
+
+ /* -----------------------
+ * Here we use bufferA as q15_t internally as computation are done with q15_t level
+ * im2col are done to output in q15_t format from q7_t input
+ */
+
+ q15_t *pBuffer = bufferA;
+ q7_t *pOut = Im_out;
+
+ if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0 || dim_kernel_x != 1 || dim_kernel_y != 1
+ || padding_x != 0 || padding_y != 0 || stride_x != 1 || stride_y != 1)
+ {
+ /* check if the input dimension meets the constraints */
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+
+ for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
+ {
+ /* This part implements the im2col function */
+ arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_out_y * dim_im_in_x + i_out_x) * ch_im_in, pBuffer,
+ ch_im_in);
+ pBuffer += ch_im_in;
+
+ if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
+ {
+ pOut =
+ arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in, bias_shift, out_shift, bias, pOut);
+ /* counter reset */
+ pBuffer = bufferA;
+ }
+ }
+ }
+
+ /* check if there is left-over for compute */
+ if (pBuffer != bufferA)
+ {
+ const q7_t *pA = wt;
+ for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(bias[i_ch_out]) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = bias[i_ch_out] << bias_shift;
+#endif
+ q15_t *pB = bufferA;
+ /* basically each time it process 4 entries */
+ uint16_t colCnt = ch_im_in * dim_kernel_x * dim_kernel_y >> 2;
+
+ while (colCnt)
+ {
+
+ q31_t inA1, inA2;
+ q31_t inB1, inB2;
+
+ pA = (const q7_t *)read_and_pad_reordered((void *)pA, &inA1, &inA2);
+
+ inB1 = *__SIMD32(pB)++;
+ sum = __SMLAD(inA1, inB1, sum);
+ inB2 = *__SIMD32(pB)++;
+ sum = __SMLAD(inA2, inB2, sum);
+
+ colCnt--;
+ }
+ colCnt = ch_im_in * dim_kernel_y * dim_kernel_x & 0x3;
+ while (colCnt)
+ {
+ q7_t inA1 = *pA++;
+ q15_t inB1 = *pB++;
+ sum += inA1 * inB1;
+ colCnt--;
+ }
+ *pOut = (q7_t) __SSAT((sum >> out_shift), 8);
+ pOut++;
+
+ }
+
+ }
+
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+
+ int i, j, k, l, m, n;
+ int conv_out;
+ int in_row, in_col;
+
+ if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0 || dim_kernel_x != 1 || dim_kernel_y != 1
+ || padding_x != 0 || padding_y != 0 || stride_x != 1 || stride_y != 1)
+ {
+ /* check if the input dimension meets the constraints */
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+
+ for (i = 0; i < ch_im_out; i++)
+ {
+ for (j = 0; j < dim_im_out_y; j++)
+ {
+ for (k = 0; k < dim_im_out_x; k++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ conv_out = ((q31_t)(bias[i]) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ conv_out = bias[i] << bias_shift;
+#endif
+ for (m = 0; m < dim_kernel_y; m++)
+ {
+ for (n = 0; n < dim_kernel_x; n++)
+ {
+ // if-for implementation
+ in_row = stride_y * j + m - padding_y;
+ in_col = stride_x * k + n - padding_x;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
+ {
+ for (l = 0; l < ch_im_in; l++)
+ {
+ conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] *
+ wt[i * ch_im_in * dim_kernel_y * dim_kernel_x + (m * dim_kernel_y + n) * ch_im_in + l];
+ }
+ }
+ }
+ }
+ Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
+ }
+ }
+ }
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to application */
+ return ARM_MATH_SUCCESS;
+}
+
+/**
+ * @} end of NNConv group
+ */
diff --git a/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c
new file mode 100644
index 0000000..2c7263a
--- /dev/null
+++ b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c
@@ -0,0 +1,215 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_convolve_HWC_q15_basic.c
+ * Description: Q15 version of convolution
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup NNConv
+ * @{
+ */
+
+ /**
+ * @brief Basic Q15 convolution function
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * bufferA size: ch_im_in*dim_kernel*dim_kernel
+ *
+ * bufferB size: 0
+ *
+ * This basic version is designed to work for any input tensor and weight
+ * dimension.
+ */
+
+arm_status
+arm_convolve_HWC_q15_basic(const q15_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const q15_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const q15_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q15_t * Im_out,
+ const uint16_t dim_im_out,
+ q15_t * bufferA,
+ q7_t * bufferB)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
+
+ uint16_t im2col_out_pixel_index = 0;
+ q15_t *pBuffer = bufferA;
+ q15_t *pOut = Im_out;
+ q15_t *im_buffer = bufferA;
+ const q15_t *pA;
+ int i;
+
+ /* This part implements the im2col function */
+ for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
+ {
+ for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
+ {
+ if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
+ {
+ /* Filling 0 for out-of-bound paddings */
+ /* arm_fill_q15(0, pBuffer, ch_im_in); */
+ memset(pBuffer, 0, 2*ch_im_in);
+ } else
+ {
+ /* arm_copy_q15((q15_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in); */
+ memcpy(pBuffer, (q15_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, 2*ch_im_in);
+ }
+ pBuffer += ch_im_in;
+ }
+ }
+
+ pA = wt;
+ for (i = 0; i < ch_im_out; i++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)bias[i] << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = bias[i] << bias_shift;
+#endif
+ q15_t *pB = im_buffer;
+ uint16_t colCnt = ch_im_in * dim_kernel * dim_kernel >> 2;
+ while (colCnt)
+ {
+ q31_t inA1 = *__SIMD32(pA)++;
+ q31_t inB1 = *__SIMD32(pB)++;
+ q31_t inA2 = *__SIMD32(pA)++;
+ q31_t inB2 = *__SIMD32(pB)++;
+
+ sum = __SMLAD(inA1, inB1, sum);
+ sum = __SMLAD(inA2, inB2, sum);
+
+ colCnt--;
+ }
+ colCnt = ch_im_in * dim_kernel * dim_kernel & 0x3;
+ while (colCnt)
+ {
+ q15_t inA1 = *pA++;
+ q15_t inB1 = *pB++;
+ sum += inA1 * inB1;
+ colCnt--;
+ }
+ *pOut = (q15_t) __SSAT((sum >> out_shift), 16);
+ pOut++;
+ }
+
+ /* counter reset */
+ pBuffer = im_buffer;
+ im2col_out_pixel_index++;
+ }
+ }
+
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+ uint16_t i, j, k, l, m, n;
+ int conv_out;
+ signed char in_row, in_col;
+
+ for (i = 0; i < ch_im_out; i++)
+ {
+ for (j = 0; j < dim_im_out; j++)
+ {
+ for (k = 0; k < dim_im_out; k++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ conv_out = ((q31_t)bias[i] << bias_shift) + (0x1 << (out_shift-1));
+#else
+ conv_out = bias[i] << bias_shift;
+#endif
+ for (m = 0; m < dim_kernel; m++)
+ {
+ for (n = 0; n < dim_kernel; n++)
+ {
+ in_row = stride * j + m - padding;
+ in_col = stride * k + n - padding;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
+ {
+ for (l = 0; l < ch_im_in; l++)
+ {
+ conv_out +=
+ Im_in[(in_row * dim_im_in + in_col) * ch_im_in +
+ l] * wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel +
+ n) * ch_im_in + l];
+ }
+ }
+ }
+ }
+ Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q15_t) __SSAT((conv_out >> out_shift), 16);
+ }
+ }
+ }
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to application */
+ return ARM_MATH_SUCCESS;
+}
+
+/**
+ * @} end of NNConv group
+ */
diff --git a/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c
new file mode 100644
index 0000000..7b53cdd
--- /dev/null
+++ b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_convolve_HWC_q15_fast.c
+ * Description: Fast Q15 version of convolution
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup NNConv
+ * @{
+ */
+
+ /**
+ * @brief Fast Q15 convolution function
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
+ *
+ * bufferB size: 0
+ *
+ * <b>Input dimension constraints:</b>
+ *
+ * ch_im_in is multiple of 2
+ *
+ * ch_im_out is multipe of 2
+ *
+ */
+
+arm_status
+arm_convolve_HWC_q15_fast(const q15_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const q15_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const q15_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q15_t * Im_out,
+ const uint16_t dim_im_out,
+ q15_t * bufferA,
+ q7_t * bufferB)
+{
+
+#if defined (ARM_MATH_DSP)
+ int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
+
+ q15_t *pBuffer = bufferA;
+ q15_t *im_buffer = bufferA;
+ q15_t *pOut = Im_out;
+
+ if (ch_im_in % 2 != 0 || ch_im_out % 2 != 0)
+ {
+ /* check if the input dimension meets the constraints */
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ /* This part implements the im2col function */
+ for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
+ {
+ for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
+ {
+ if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
+ {
+ /* arm_fill_q15(0, pBuffer, ch_im_in); */
+ memset(pBuffer, 0, 2*ch_im_in);
+ } else
+ {
+ /* arm_copy_q15((q15_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in); */
+ memcpy(pBuffer, (q15_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, 2*ch_im_in);
+ }
+ pBuffer += ch_im_in;
+ }
+ }
+
+ if (i_out_x & 0x1)
+ {
+ int i;
+ /* initialize the matrix pointers for A */
+ const q15_t *pA = wt;
+
+ /* set up the second output pointers */
+ q15_t *pOut2 = pOut + ch_im_out;
+
+ /* this loop over rows in A */
+ for (i = 0; i < ch_im_out; i += 2)
+ {
+ /* setup pointers for B */
+ q15_t *pB = im_buffer;
+ const q15_t *pB2 = pB + ch_im_in * dim_kernel * dim_kernel;
+
+ /* aling the second pointer for A */
+ const q15_t *pA2 = pA + ch_im_in * dim_kernel * dim_kernel;
+
+ /* init the sum with bias */
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)bias[i] << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)bias[i] << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum3 = ((q31_t)bias[i + 1] << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum4 = ((q31_t)bias[i + 1] << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = bias[i] << bias_shift;
+ q31_t sum2 = bias[i] << bias_shift;
+ q31_t sum3 = bias[i + 1] << bias_shift;
+ q31_t sum4 = bias[i + 1] << bias_shift;
+#endif
+
+ uint16_t colCnt = ch_im_in * dim_kernel * dim_kernel >> 1;
+ /* accumulate over the vector */
+ while (colCnt)
+ {
+ q31_t inA1 = *__SIMD32(pA)++;
+ q31_t inB1 = *__SIMD32(pB)++;
+ q31_t inA2 = *__SIMD32(pA2)++;
+ q31_t inB2 = *__SIMD32(pB2)++;
+
+ sum = __SMLAD(inA1, inB1, sum);
+ sum2 = __SMLAD(inA1, inB2, sum2);
+ sum3 = __SMLAD(inA2, inB1, sum3);
+ sum4 = __SMLAD(inA2, inB2, sum4);
+
+ colCnt--;
+ } /* while over colCnt */
+ colCnt = ch_im_in * dim_kernel * dim_kernel & 0x1;
+ while (colCnt)
+ {
+ q15_t inA1 = *pA++;
+ q15_t inB1 = *pB++;
+ q15_t inA2 = *pA2++;
+ q15_t inB2 = *pB2++;
+
+ sum += inA1 * inB1;
+ sum2 += inA1 * inB2;
+ sum3 += inA2 * inB1;
+ sum4 += inA2 * inB2;
+ colCnt--;
+ } /* while over colCnt */
+ *pOut++ = (q15_t) __SSAT(sum >> out_shift, 16);
+ *pOut++ = (q15_t) __SSAT(sum3 >> out_shift, 16);
+ *pOut2++ = (q15_t) __SSAT(sum2 >> out_shift, 16);
+ *pOut2++ = (q15_t) __SSAT(sum4 >> out_shift, 16);
+
+ /* skip the row computed with A2 */
+ pA += ch_im_in * dim_kernel * dim_kernel;
+ } /* for over ch_im_out */
+
+ pOut += ch_im_out;
+ /* counter reset */
+ pBuffer = im_buffer;
+ }
+ }
+ }
+
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+ uint16_t i, j, k, l, m, n;
+ int conv_out;
+ signed char in_row, in_col;
+
+ if (ch_im_in % 2 != 0 || ch_im_out % 2 != 0)
+ {
+ /* check if the input dimension meets the constraints */
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+
+ for (i = 0; i < ch_im_out; i++)
+ {
+ for (j = 0; j < dim_im_out; j++)
+ {
+ for (k = 0; k < dim_im_out; k++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ conv_out = ((q31_t)bias[i] << bias_shift) + (0x1 << (out_shift-1));
+#else
+ conv_out = bias[i] << bias_shift;
+#endif
+ for (m = 0; m < dim_kernel; m++)
+ {
+ for (n = 0; n < dim_kernel; n++)
+ {
+ in_row = stride * j + m - padding;
+ in_col = stride * k + n - padding;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
+ {
+ for (l = 0; l < ch_im_in; l++)
+ {
+ conv_out +=
+ Im_in[(in_row * dim_im_in + in_col) * ch_im_in +
+ l] * wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel +
+ n) * ch_im_in + l];
+ }
+ }
+ }
+ }
+ Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q15_t) __SSAT((conv_out >> out_shift), 16);
+ }
+ }
+ }
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to application */
+ return ARM_MATH_SUCCESS;
+}
+
+/**
+ * @} end of NNConv group
+ */
diff --git a/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c
new file mode 100644
index 0000000..aafd073
--- /dev/null
+++ b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c
@@ -0,0 +1,287 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_convolve_HWC_q7_RGB.c
+ * Description: Q7 version of convolution for RGB image
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup NNConv
+ * @{
+ */
+
+ /**
+ * @brief Q7 convolution function for RGB image
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
+ *
+ * bufferB size: 0
+ *
+ * <b>Input dimension constraints:</b>
+ *
+ * ch_im_in equals 3
+ *
+ * This kernel is written exclusively for convolution with ch_im_in
+ * equals 3. This applies on the first layer of CNNs which has input
+ * image with RGB format.
+ */
+
+arm_status
+arm_convolve_HWC_q7_RGB(const q7_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out, const uint16_t dim_im_out, q15_t * bufferA, q7_t * bufferB)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+ int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
+
+ /*
+ * Here we use bufferA as q15_t internally as computation are done with q15_t level
+ * im2col are done to output in q15_t format from q7_t input
+ */
+ q15_t *pBuffer = bufferA;
+ q7_t *pOut = Im_out;
+
+ // check if number of input channels is 3
+ if (ch_im_in != 3)
+ {
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+ // This part implements the im2col function
+ for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
+ {
+ for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
+ {
+ if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
+ {
+ /* Equivalent to arm_fill_q15(0, pBuffer, ch_im_in) with assumption: ch_im_in = 3 */
+ *__SIMD32(pBuffer) = 0x0;
+ *(pBuffer + 2) = 0;
+ pBuffer += 3;
+ } else
+ {
+ /*
+ * Equivalent to:
+ * arm_q7_to_q15_no_shift( (q7_t*)Im_in+(i_ker_y*dim_im_in+i_ker_x)*3, pBuffer, 3);
+ */
+
+ const q7_t *pPixel = Im_in + (i_ker_y * dim_im_in + i_ker_x) * 3;
+ q31_t buf = *__SIMD32(pPixel);
+
+ union arm_nnword top;
+ union arm_nnword bottom;
+
+ top.word = __SXTB16(buf);
+ bottom.word = __SXTB16(__ROR(buf, 8));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+ /*
+ * little-endian, | omit | 3rd | 2nd | 1st |
+ * MSB LSB
+ * top | 3rd | 1st |; bottom | omit | 2nd |
+ *
+ * version 1, need to swap 2nd and 3rd weight
+ * *__SIMD32(pBuffer) = top.word;
+ * *(pBuffer+2) = bottom.half_words[0];
+ *
+ * version 2, no weight shuffling required
+ */
+ *pBuffer++ = top.half_words[0];
+ *__SIMD32(pBuffer) = __PKHBT(bottom.word, top.word, 0);
+#else
+ /*
+ * big-endian, | 1st | 2nd | 3rd | omit |
+ * MSB LSB
+ * top | 2nd | omit |; bottom | 1st | 3rd |
+ *
+ * version 1, need to swap 2nd and 3rd weight
+ * *__SIMD32(pBuffer) = bottom.word;
+ * *(pBuffer+2) = top.half_words[1];
+ *
+ * version 2, no weight shuffling required
+ */
+ *pBuffer++ = bottom.half_words[0];
+ *__SIMD32(pBuffer) = __PKHTB(top.word, bottom.word, 0);
+#endif
+ pBuffer += 2;
+ }
+ }
+ }
+
+ if (pBuffer == bufferA + 2 * 3 * dim_kernel * dim_kernel)
+ {
+ pOut =
+ arm_nn_mat_mult_kernel_q7_q15(wt, bufferA,
+ ch_im_out,
+ 3 * dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
+
+ /* counter reset */
+ pBuffer = bufferA;
+ }
+ }
+ }
+
+ /* left-over because odd number of output pixels */
+ if (pBuffer != bufferA)
+ {
+ const q7_t *pA = wt;
+ int i;
+
+ for (i = 0; i < ch_im_out; i++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)bias[i] << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = bias[i] << bias_shift;
+#endif
+ q15_t *pB = bufferA;
+ /* basically each time it process 4 entries */
+ uint16_t colCnt = 3 * dim_kernel * dim_kernel >> 2;
+
+ while (colCnt)
+ {
+
+ q31_t inA1, inA2;
+ q31_t inB1, inB2;
+
+ pA = (q7_t *) read_and_pad((void *)pA, &inA1, &inA2);
+
+ inB1 = *__SIMD32(pB)++;
+ sum = __SMLAD(inA1, inB1, sum);
+ inB2 = *__SIMD32(pB)++;
+ sum = __SMLAD(inA2, inB2, sum);
+
+ colCnt--;
+ }
+ colCnt = 3 * dim_kernel * dim_kernel & 0x3;
+ while (colCnt)
+ {
+ q7_t inA1 = *pA++;
+ q15_t inB1 = *pB++;
+ sum += inA1 * inB1;
+ colCnt--;
+ }
+ *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
+ }
+ }
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+
+ uint16_t i, j, k, l, m, n;
+ int conv_out;
+ signed char in_row, in_col;
+
+ // check if number of input channels is 3
+ if (ch_im_in != 3)
+ {
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+
+ for (i = 0; i < ch_im_out; i++)
+ {
+ for (j = 0; j < dim_im_out; j++)
+ {
+ for (k = 0; k < dim_im_out; k++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ conv_out = (bias[i] << bias_shift) + (0x1 << (out_shift-1));
+#else
+ conv_out = bias[i] << bias_shift;
+#endif
+ for (m = 0; m < dim_kernel; m++)
+ {
+ for (n = 0; n < dim_kernel; n++)
+ {
+ /* if-for implementation */
+ in_row = stride * j + m - padding;
+ in_col = stride * k + n - padding;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
+ {
+ for (l = 0; l < ch_im_in; l++)
+ {
+ conv_out +=
+ Im_in[(in_row * dim_im_in + in_col) * ch_im_in +
+ l] * wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel +
+ n) * ch_im_in + l];
+ }
+ }
+ }
+ }
+ Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
+ }
+ }
+ }
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to application */
+ return (ARM_MATH_SUCCESS);
+}
+
+/**
+ * @} end of NNConv group
+ */
diff --git a/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c
new file mode 100644
index 0000000..c1399f3
--- /dev/null
+++ b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c
@@ -0,0 +1,238 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_convolve_HWC_q7_basic.c
+ * Description: Q7 version of convolution
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup NNConv
+ * @{
+ */
+
+ /**
+ * @brief Basic Q7 convolution function
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
+ *
+ * bufferB size: 0
+ *
+ * This basic version is designed to work for any input tensor and weight
+ * dimension.
+ */
+
+arm_status
+arm_convolve_HWC_q7_basic(const q7_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out,
+ const uint16_t dim_im_out,
+ q15_t * bufferA,
+ q7_t * bufferB)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
+
+ /*
+ * Here we use bufferA as q15_t internally as computation are done with q15_t level
+ * im2col are done to output in q15_t format from q7_t input
+ */
+ q15_t *pBuffer = bufferA;
+ q7_t *pOut = Im_out;
+
+ /* This part implements the im2col function */
+ for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
+ {
+ for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
+ {
+ if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
+ {
+ /* Filling 0 for out-of-bound paddings */
+ /* arm_fill_q15(0, pBuffer, ch_im_in); */
+ memset(pBuffer, 0, 2*ch_im_in);
+ } else
+ {
+ /* Copying the pixel data to column */
+ arm_q7_to_q15_no_shift((q7_t *)
+ Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in);
+ }
+ pBuffer += ch_im_in;
+ }
+ }
+
+ /* Computation is filed for every 2 columns */
+ if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel)
+ {
+ pOut =
+ arm_nn_mat_mult_kernel_q7_q15(wt, bufferA,
+ ch_im_out,
+ ch_im_in *
+ dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
+
+ /* counter reset */
+ pBuffer = bufferA;
+ }
+ }
+ }
+
+ /* left-over because odd number of output pixels */
+ if (pBuffer != bufferA)
+ {
+ const q7_t *pA = wt;
+ int i;
+
+ for (i = 0; i < ch_im_out; i++)
+ {
+ /* Load the accumulator with bias first */
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)bias[i] << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = bias[i] << bias_shift;
+#endif
+
+ /* Point to the beging of the im2col buffer */
+ q15_t *pB = bufferA;
+
+ /* Each time it process 4 entries */
+ uint16_t colCnt = ch_im_in * dim_kernel * dim_kernel >> 2;
+
+ while (colCnt)
+ {
+ q31_t inA1, inA2;
+ q31_t inB1, inB2;
+
+ pA = (q7_t *) read_and_pad((void *)pA, &inA1, &inA2);
+
+ inB1 = *__SIMD32(pB)++;
+ sum = __SMLAD(inA1, inB1, sum);
+ inB2 = *__SIMD32(pB)++;
+ sum = __SMLAD(inA2, inB2, sum);
+
+ colCnt--;
+ }
+ colCnt = ch_im_in * dim_kernel * dim_kernel & 0x3;
+ while (colCnt)
+ {
+ q7_t inA1 = *pA++;
+ q15_t inB1 = *pB++;
+ sum += inA1 * inB1;
+ colCnt--;
+ }
+ *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
+ }
+ }
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+
+ uint16_t i, j, k, l, m, n;
+ int conv_out;
+ signed char in_row, in_col;
+
+ for (i = 0; i < ch_im_out; i++)
+ {
+ for (j = 0; j < dim_im_out; j++)
+ {
+ for (k = 0; k < dim_im_out; k++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ conv_out = ((q31_t)bias[i] << bias_shift) + (0x1 << (out_shift-1));
+#else
+ conv_out = bias[i] << bias_shift;
+#endif
+ for (m = 0; m < dim_kernel; m++)
+ {
+ for (n = 0; n < dim_kernel; n++)
+ {
+ // if-for implementation
+ in_row = stride * j + m - padding;
+ in_col = stride * k + n - padding;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
+ {
+ for (l = 0; l < ch_im_in; l++)
+ {
+ conv_out +=
+ Im_in[(in_row * dim_im_in + in_col) * ch_im_in +
+ l] * wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel +
+ n) * ch_im_in + l];
+ }
+ }
+ }
+ }
+ Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
+ }
+ }
+ }
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to application */
+ return ARM_MATH_SUCCESS;
+}
+
+/**
+ * @} end of NNConv group
+ */
diff --git a/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c
new file mode 100644
index 0000000..43bf8ad
--- /dev/null
+++ b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c
@@ -0,0 +1,416 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_convolve_HWC_q7_fast.c
+ * Description: Fast Q7 version of convolution
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup NNConv
+ * @{
+ */
+
+ /**
+ * @brief Fast Q7 convolution function
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
+ *
+ * bufferB size: 0
+ *
+ * <b>Input dimension constraints:</b>
+ *
+ * ch_im_in is multiple of 4 ( because of the SIMD32 read and swap )
+ *
+ * ch_im_out is multipe of 2 ( bacause 2x2 mat_mult kernel )
+ *
+ * The im2col converts the Q7 tensor input into Q15 column, which is stored in
+ * bufferA. There is reordering happenning during this im2col process with
+ * arm_q7_to_q15_reordered_no_shift. For every four elements, the second and
+ * third elements are swapped.
+ *
+ * The computation kernel arm_nn_mat_mult_kernel_q7_q15_reordered does the
+ * GEMM computation with the reordered columns.
+ *
+ * To speed-up the determination of the padding condition, we split the
+ * computation into 3x3 parts, i.e., {top, mid, bottom} X {left, mid, right}.
+ * This reduces the total number of boundry condition checks and improves
+ * the data copying performance.
+ */
+
+arm_status
+arm_convolve_HWC_q7_fast(const q7_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out,
+ const uint16_t dim_im_out,
+ q15_t * bufferA,
+ q7_t * bufferB)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
+
+ /*
+ * Here we use bufferA as q15_t internally as computation are done with q15_t level
+ * im2col are done to output in q15_t format from q7_t input
+ */
+
+ q15_t *pBuffer = bufferA;
+ q7_t *pOut = Im_out;
+
+ if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0)
+ {
+ /* check if the input dimension meets the constraints */
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+
+ /*
+ * Here we split the entire matrix into three regions depending on the padding situation
+ * Top: i_out_y from 0 to padding - 1
+ * Middle: i_out_y from padding to dim_im_out-padding-1
+ * Bottom: i_out_y from dim_im_out-padding to dim_im_out-1
+ */
+
+ /* top part */
+ for (i_out_y = 0; i_out_y < padding; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
+ {
+ /* This part implements the im2col function */
+ for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
+ {
+ if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
+ {
+ /* arm_fill_q15(0, pBuffer, ch_im_in); */
+ memset(pBuffer, 0, 2*ch_im_in);
+ } else
+ {
+ arm_q7_to_q15_reordered_no_shift
+ ((q7_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in);
+ }
+ pBuffer += ch_im_in;
+ }
+ }
+
+ if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel)
+ {
+ pOut =
+ arm_nn_mat_mult_kernel_q7_q15_reordered(wt,
+ bufferA,
+ ch_im_out,
+ ch_im_in
+ *
+ dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
+ /* counter reset */
+ pBuffer = bufferA;
+ }
+ }
+ }
+
+ /* middle part, here we also divide the x into left, mid and right */
+ for (; i_out_y < dim_im_out - padding; i_out_y++)
+ {
+
+ /* left part */
+ for (i_out_x = 0; i_out_x < padding; i_out_x++)
+ {
+ /* This part implements the im2col function */
+ for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
+ {
+ if (i_ker_x < 0 || i_ker_x >= dim_im_in)
+ {
+ /* arm_fill_q15(0, pBuffer, ch_im_in); */
+ memset(pBuffer, 0, 2*ch_im_in);
+ } else
+ {
+ arm_q7_to_q15_reordered_no_shift
+ ((q7_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in);
+ }
+ pBuffer += ch_im_in;
+ }
+ }
+
+ if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel)
+ {
+ pOut =
+ arm_nn_mat_mult_kernel_q7_q15_reordered(wt,
+ bufferA,
+ ch_im_out,
+ ch_im_in
+ *
+ dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
+ /* counter reset */
+ pBuffer = bufferA;
+ }
+ }
+
+ /* mid part */
+ for (; i_out_x < dim_im_out - padding; i_out_x++)
+ {
+ /* This part implements the im2col function */
+ for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
+ {
+ arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in
+ +
+ (i_ker_y *
+ dim_im_in +
+ i_out_x *
+ stride - padding) * ch_im_in, pBuffer, ch_im_in * dim_kernel);
+ pBuffer += ch_im_in * dim_kernel;
+ }
+
+ if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel)
+ {
+ pOut =
+ arm_nn_mat_mult_kernel_q7_q15_reordered(wt,
+ bufferA,
+ ch_im_out,
+ ch_im_in
+ *
+ dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
+ /* counter reset */
+ pBuffer = bufferA;
+ }
+ }
+
+ /* right part */
+ for (; i_out_x < dim_im_out; i_out_x++)
+ {
+ /* This part implements the im2col function */
+ for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
+ {
+ if (i_ker_x < 0 || i_ker_x >= dim_im_in)
+ {
+ /* arm_fill_q15(0, pBuffer, ch_im_in); */
+ memset(pBuffer, 0, 2*ch_im_in);
+ } else
+ {
+ arm_q7_to_q15_reordered_no_shift
+ ((q7_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in);
+ }
+ pBuffer += ch_im_in;
+ }
+ }
+
+ if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel)
+ {
+ pOut =
+ arm_nn_mat_mult_kernel_q7_q15_reordered(wt,
+ bufferA,
+ ch_im_out,
+ ch_im_in
+ *
+ dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
+ /* counter reset */
+ pBuffer = bufferA;
+ }
+ }
+ }
+
+ for (; i_out_y < dim_im_out; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
+ {
+ /* This part implements the im2col function */
+ for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
+ {
+ if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
+ {
+ /* arm_fill_q15(0, pBuffer, ch_im_in); */
+ memset(pBuffer, 0, 2*ch_im_in);
+ } else
+ {
+ arm_q7_to_q15_reordered_no_shift
+ ((q7_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in);
+ }
+ pBuffer += ch_im_in;
+ }
+ }
+
+ if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel)
+ {
+ pOut =
+ arm_nn_mat_mult_kernel_q7_q15_reordered(wt,
+ bufferA,
+ ch_im_out,
+ ch_im_in
+ *
+ dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
+ /* counter reset */
+ pBuffer = bufferA;
+ }
+ }
+ }
+
+ /* check if there is left-over for compute */
+ if (pBuffer != bufferA)
+ {
+ const q7_t *pA = wt;
+ int i;
+
+ for (i = 0; i < ch_im_out; i++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)bias[i] << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = bias[i] << bias_shift;
+#endif
+ q15_t *pB = bufferA;
+ /* each time it process 4 entries */
+ uint16_t colCnt = ch_im_in * dim_kernel * dim_kernel >> 2;
+
+ while (colCnt)
+ {
+
+ q31_t inA1, inA2;
+ q31_t inB1, inB2;
+
+ pA = (q7_t *) read_and_pad_reordered((void *)pA, &inA1, &inA2);
+
+ inB1 = *__SIMD32(pB)++;
+ sum = __SMLAD(inA1, inB1, sum);
+ inB2 = *__SIMD32(pB)++;
+ sum = __SMLAD(inA2, inB2, sum);
+
+ colCnt--;
+ }
+ colCnt = ch_im_in * dim_kernel * dim_kernel & 0x3;
+ while (colCnt)
+ {
+ q7_t inA1 = *pA++;
+ q15_t inB1 = *pB++;
+ sum += inA1 * inB1;
+ colCnt--;
+ }
+ *pOut = (q7_t) __SSAT((sum >> out_shift), 8);
+ pOut++;
+
+ }
+
+ }
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+
+ uint16_t i, j, k, l, m, n;
+ int conv_out;
+ signed char in_row, in_col;
+
+ if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0)
+ {
+ /* check if the input dimension meets the constraints */
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+
+ for (i = 0; i < ch_im_out; i++)
+ {
+ for (j = 0; j < dim_im_out; j++)
+ {
+ for (k = 0; k < dim_im_out; k++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ conv_out = (bias[i] << bias_shift) + (0x1 << (out_shift-1));
+#else
+ conv_out = bias[i] << bias_shift;
+#endif
+ for (m = 0; m < dim_kernel; m++)
+ {
+ for (n = 0; n < dim_kernel; n++)
+ {
+ // if-for implementation
+ in_row = stride * j + m - padding;
+ in_col = stride * k + n - padding;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
+ {
+ for (l = 0; l < ch_im_in; l++)
+ {
+ conv_out +=
+ Im_in[(in_row * dim_im_in + in_col) * ch_im_in +
+ l] * wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel +
+ n) * ch_im_in + l];
+ }
+ }
+ }
+ }
+ Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
+ }
+ }
+ }
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to application */
+ return ARM_MATH_SUCCESS;
+}
+
+/**
+ * @} end of NNConv group
+ */
diff --git a/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c
new file mode 100644
index 0000000..31c573a
--- /dev/null
+++ b/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c
@@ -0,0 +1,387 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_convolve_HWC_q7_fast_nonsquare.c
+ * Description: Fast Q7 version of convolution (non-sqaure shape)
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup NNConv
+ * @{
+ */
+
+/**
+ * @brief Fast Q7 convolution function (non-sqaure shape)
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in_x input tensor dimention x
+ * @param[in] dim_im_in_y input tensor dimention y
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel_x filter kernel size x
+ * @param[in] dim_kernel_y filter kernel size y
+ * @param[in] padding_x padding size x
+ * @param[in] padding_y padding size y
+ * @param[in] stride_x convolution stride x
+ * @param[in] stride_y convolution stride y
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out_x output tensor dimension x
+ * @param[in] dim_im_out_y output tensor dimension y
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * This function is the version with full list of optimization tricks, but with
+ * some contraints:
+ * ch_im_in is multiple of 4
+ * ch_im_out is multiple of 2
+ */
+
+arm_status arm_convolve_HWC_q7_fast_nonsquare(const q7_t * Im_in,
+ const uint16_t dim_im_in_x,
+ const uint16_t dim_im_in_y,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel_x,
+ const uint16_t dim_kernel_y,
+ const uint16_t padding_x,
+ const uint16_t padding_y,
+ const uint16_t stride_x,
+ const uint16_t stride_y,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out,
+ const uint16_t dim_im_out_x,
+ const uint16_t dim_im_out_y,
+ q15_t * bufferA,
+ q7_t * bufferB)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
+
+ /* -----------------------
+ * Here we use bufferA as q15_t internally as computation are done with q15_t level
+ * im2col are done to output in q15_t format from q7_t input
+ */
+
+ q15_t *pBuffer = bufferA;
+ q7_t *pOut = Im_out;
+
+ if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0)
+ {
+ /* check if the input dimension meets the constraints */
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+
+ /*
+ * Here we split the entire matrix into three regions depending on the padding situation
+ * Top: i_out_y from 0 to padding - 1
+ * Middle: i_out_y from padding to dim_im_out-padding-1
+ * Bottom: i_out_y from dim_im_out-padding to dim_im_out-1
+ */
+
+ /* top part */
+ for (i_out_y = 0; i_out_y < padding_y; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
+ {
+ /* This part implements the im2col function */
+ for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
+ i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
+ i_ker_x++)
+ {
+ if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x)
+ {
+ /* arm_fill_q15(0, pBuffer, ch_im_in); */
+ memset(pBuffer, 0, 2*ch_im_in);
+ } else
+ {
+ arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in,
+ pBuffer, ch_im_in);
+ }
+ pBuffer += ch_im_in;
+ }
+ }
+
+ if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
+ {
+ pOut =
+ arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
+ bias_shift, out_shift, bias, pOut);
+ /* counter reset */
+ pBuffer = bufferA;
+ }
+ }
+ }
+
+ /* middle part, here we also divide the x into left, mid and right */
+ for (; i_out_y < dim_im_out_y - padding_y; i_out_y++)
+ {
+
+ /* left part */
+ for (i_out_x = 0; i_out_x < padding_x; i_out_x++)
+ {
+ /* This part implements the im2col function */
+ for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
+ i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
+ i_ker_x++)
+ {
+ if (i_ker_x < 0 || i_ker_x >= dim_im_in_x)
+ {
+ /* arm_fill_q15(0, pBuffer, ch_im_in); */
+ memset(pBuffer, 0, 2*ch_im_in);
+ } else
+ {
+ arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in,
+ pBuffer, ch_im_in);
+ }
+ pBuffer += ch_im_in;
+ }
+ }
+
+ if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
+ {
+ pOut =
+ arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
+ bias_shift, out_shift, bias, pOut);
+ /* counter reset */
+ pBuffer = bufferA;
+ }
+ }
+
+ /* mid part */
+ for (; i_out_x < dim_im_out_x - padding_x; i_out_x++)
+ {
+ /* This part implements the im2col function */
+ for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
+ i_ker_y++)
+ {
+ arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in +
+ (i_ker_y * dim_im_in_x + i_out_x * stride_x - padding_x) * ch_im_in,
+ pBuffer, ch_im_in * dim_kernel_x);
+ pBuffer += ch_im_in * dim_kernel_x;
+ }
+
+ if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
+ {
+ pOut =
+ arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
+ bias_shift, out_shift, bias, pOut);
+ /* counter reset */
+ pBuffer = bufferA;
+ }
+ }
+
+ /* right part */
+ for (; i_out_x < dim_im_out_x; i_out_x++)
+ {
+ /* This part implements the im2col function */
+ for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
+ i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
+ i_ker_x++)
+ {
+ if (i_ker_x < 0 || i_ker_x >= dim_im_in_x)
+ {
+ /* arm_fill_q15(0, pBuffer, ch_im_in); */
+ memset(pBuffer, 0, 2*ch_im_in);
+ } else
+ {
+ arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in,
+ pBuffer, ch_im_in);
+ }
+ pBuffer += ch_im_in;
+ }
+ }
+
+ if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
+ {
+ pOut =
+ arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
+ bias_shift, out_shift, bias, pOut);
+ /* counter reset */
+ pBuffer = bufferA;
+ }
+ }
+ }
+
+ for (; i_out_y < dim_im_out_y; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
+ {
+ /* This part implements the im2col function */
+ for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
+ i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
+ i_ker_x++)
+ {
+ if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x)
+ {
+ /* arm_fill_q15(0, pBuffer, ch_im_in); */
+ memset(pBuffer, 0, 2*ch_im_in);
+ } else
+ {
+ arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in,
+ pBuffer, ch_im_in);
+ }
+ pBuffer += ch_im_in;
+ }
+ }
+
+ if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
+ {
+ pOut =
+ arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
+ bias_shift, out_shift, bias, pOut);
+ /* counter reset */
+ pBuffer = bufferA;
+ }
+ }
+ }
+
+ /* check if there is left-over for compute */
+ if (pBuffer != bufferA)
+ {
+ const q7_t *pA = wt;
+ int i;
+ for (i = 0; i < ch_im_out; i++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(bias[i]) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = bias[i] << bias_shift;
+#endif
+ q15_t *pB = bufferA;
+ /* basically each time it process 4 entries */
+ uint16_t colCnt = ch_im_in * dim_kernel_x * dim_kernel_y >> 2;
+
+ while (colCnt)
+ {
+
+ q31_t inA1, inA2;
+ q31_t inB1, inB2;
+
+ pA = (const q7_t *)read_and_pad_reordered((void *)pA, &inA1, &inA2);
+
+ inB1 = *__SIMD32(pB)++;
+ sum = __SMLAD(inA1, inB1, sum);
+ inB2 = *__SIMD32(pB)++;
+ sum = __SMLAD(inA2, inB2, sum);
+
+ colCnt--;
+ }
+ colCnt = (ch_im_in * dim_kernel_y * dim_kernel_x) & 0x3;
+ while (colCnt)
+ {
+ q7_t inA1 = *pA++;
+ q15_t inB1 = *pB++;
+ sum += inA1 * inB1;
+ colCnt--;
+ }
+ *pOut = (q7_t) __SSAT((sum >> out_shift), 8);
+ pOut++;
+
+ }
+
+ }
+
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+ int i, j, k, l, m, n;
+ int conv_out;
+ int in_row, in_col;
+
+ if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0)
+ {
+ /* check if the input dimension meets the constraints */
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+
+ for (i = 0; i < ch_im_out; i++)
+ {
+ for (j = 0; j < dim_im_out_y; j++)
+ {
+ for (k = 0; k < dim_im_out_x; k++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ conv_out = ((q31_t)(bias[i]) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ conv_out = bias[i] << bias_shift;
+#endif
+ for (m = 0; m < dim_kernel_y; m++)
+ {
+ for (n = 0; n < dim_kernel_x; n++)
+ {
+ /* if-for implementation */
+ in_row = stride_y * j + m - padding_y;
+ in_col = stride_x * k + n - padding_x;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
+ {
+ for (l = 0; l < ch_im_in; l++)
+ {
+ conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] *
+ wt[i * ch_im_in * dim_kernel_y * dim_kernel_x + (m * dim_kernel_x + n) * ch_im_in + l];
+ }
+ }
+ }
+ }
+ Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
+ }
+ }
+ }
+
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to application */
+ return ARM_MATH_SUCCESS;
+}
+
+/**
+ * @} end of NNConv group
+ */
diff --git a/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c b/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c
new file mode 100644
index 0000000..a2964a6
--- /dev/null
+++ b/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c
@@ -0,0 +1,432 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_depthwise_separable_conv_HWC_q7.c
+ * Description: Q7 depthwise separable convolution function
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup NNConv
+ * @{
+ */
+
+/**
+ * @brief Q7 depthwise separable convolution function
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
+ *
+ * bufferB size: 0
+ *
+ * <b>Input dimension constraints:</b>
+ *
+ * ch_im_in equals ch_im_out
+ *
+ * Implementation:
+ * There are 3 nested loop here:
+ * Inner loop: calculate each output value with MAC instruction over an accumulator
+ * Mid loop: loop over different output channel
+ * Outer loop: loop over different output (x, y)
+ */
+
+arm_status arm_depthwise_separable_conv_HWC_q7(const q7_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out,
+ const uint16_t dim_im_out,
+ q15_t * bufferA,
+ q7_t * bufferB)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ int16_t i_out_y, i_out_x;
+ int16_t i_ker_y, i_ker_x;
+ q7_t *colBuffer = (q7_t *) bufferA;
+ q7_t *pBuffer = colBuffer;
+ const q7_t *pBias = bias;
+ q7_t *pOut = Im_out;
+ uint16_t rowCnt;
+ uint16_t row_shift;
+
+ /* do some checking here, basically ch_im_in == ch_im_out */
+ if (ch_im_in != ch_im_out)
+ {
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+
+ for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
+ {
+ /* we first do im2col here */
+ for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
+ {
+ if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
+ {
+ /* arm_fill_q7(0, pBuffer, ch_im_in); */
+ memset(pBuffer, 0, ch_im_in);
+ } else
+ {
+ /* arm_copy_q7((q7_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in); */
+ memcpy(pBuffer, (q7_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, ch_im_in);
+ }
+ pBuffer += ch_im_in;
+ }
+ }
+
+ /* we will do the computation here for each channel */
+ rowCnt = ch_im_out >> 2;
+ row_shift = 0;
+ pBias = bias;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+ q31_t sum3 = *pBias++ << bias_shift;
+ q31_t sum4 = *pBias++ << bias_shift;
+#endif
+ uint16_t colCnt = (dim_kernel * dim_kernel) >> 1;
+ q7_t *pB = colBuffer + row_shift;
+ const q7_t *pA = wt + row_shift;
+ row_shift += 4;
+
+#ifdef USE_INTRINSIC
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+ while (colCnt)
+ {
+ q31_t inA1, inA2, inB1, inB2, opA, opB;
+
+ inB1 = *__SIMD32(pB);
+ pB += ch_im_in;
+ opB = *__SIMD32(pB);
+ pB += ch_im_in;
+ inB2 = __PKHTB(opB, inB1, 16);
+ inB1 = __PKHBT(inB1, opB, 16);
+ inA1 = *__SIMD32(pA);
+ pA += ch_im_in;
+ opB = *__SIMD32(pA);
+ pA += ch_im_in;
+ inA2 = __PKHTB(opB, inA1, 16);
+ inA1 = __PKHBT(inA1, opB, 16);
+ opA = __SXTB16(inA1);
+ opB = __SXTB16(inB1);
+ sum = __SMLAD(opA, opB, sum);
+ opA = __SXTB16(__ROR(inA1, 8));
+ opB = __SXTB16(__ROR(inB1, 8));
+ sum2 = __SMLAD(opA, opB, sum2);
+ opA = __SXTB16(inA2);
+ opB = __SXTB16(inB2);
+ sum3 = __SMLAD(opA, opB, sum3);
+ opA = __SXTB16(__ROR(inA2, 8));
+ opB = __SXTB16(__ROR(inB2, 8));
+ sum4 = __SMLAD(opA, opB, sum4);
+ colCnt--;
+ }
+#else
+
+ while (colCnt)
+ {
+ q31_t inA1, inA2, inB1, inB2, opA, opB;
+
+ inB1 = *__SIMD32(pB);
+ pB += ch_im_in;
+ opB = *__SIMD32(pB);
+ pB += ch_im_in;
+ inB2 = __PKHBT(opB, inB1, 16);
+ inB1 = __PKHTB(inB1, opB, 16);
+ inA1 = *__SIMD32(pA);
+ pA += ch_im_in;
+ opB = *__SIMD32(pA);
+ pA += ch_im_in;
+ inA2 = __PKHBT(opB, inA1, 16);
+ inA1 = __PKHTB(inA1, opB, 16);
+ opA = __SXTB16(inA1);
+ opB = __SXTB16(inB1);
+ sum2 = __SMLAD(opA, opB, sum2);
+ opA = __SXTB16(__ROR(inA1, 8));
+ opB = __SXTB16(__ROR(inB1, 8));
+ sum = __SMLAD(opA, opB, sum);
+ opA = __SXTB16(inA2);
+ opB = __SXTB16(inB2);
+ sum4 = __SMLAD(opA, opB, sum4);
+ opA = __SXTB16(__ROR(inA2, 8));
+ opB = __SXTB16(__ROR(inB2, 8));
+ sum3 = __SMLAD(opA, opB, sum3);
+ colCnt--;
+ }
+
+#endif /* ARM_MATH_BIG_ENDIAN */
+
+#else
+
+#ifndef ARM_MATH_BIG_ENDIAN
+ /*
+ * r0 r1 r2 r3 r4 r5
+ * inA1, inA2, inB1, inB2, opA, opB
+ */
+
+ asm volatile ("COL_LOOP_%=:\n"
+ "ldr.w r2, [%[pB], #0]\n"
+ "add.w %[pB], %[pB], %[ch_im_in]\n"
+ "ldr.w r5, [%[pB], #0]\n"
+ "add.w %[pB], %[pB], %[ch_im_in]\n"
+ "pkhtb r3, r5, r2, ASR #16\n"
+ "pkhbt r2, r2, r5, LSL #16\n"
+ "ldr.w r0, [%[pA], #0]\n"
+ "add.w %[pA], %[pA], %[ch_im_in]\n"
+ "ldr.w r5, [%[pA], #0]\n"
+ "add.w %[pA], %[pA], %[ch_im_in]\n"
+ "pkhtb r1, r5, r0, ASR #16\n"
+ "pkhbt r0, r0, r5, LSL #16\n"
+ "sxtb16 r4, r0\n"
+ "sxtb16 r5, r2\n"
+ "smlad %[sum], r4, r5, %[sum]\n"
+ "mov.w r4, r0, ror #8\n"
+ "mov.w r5, r2, ror #8\n"
+ "sxtb16 r4, r4\n"
+ "sxtb16 r5, r5\n"
+ "smlad %[sum2], r4, r5, %[sum2]\n"
+ "sxtb16 r4, r1\n"
+ "sxtb16 r5, r3\n"
+ "smlad %[sum3], r4, r5, %[sum3]\n"
+ "mov.w r4, r1, ror #8\n"
+ "mov.w r5, r3, ror #8\n"
+ "sxtb16 r4, r4\n"
+ "sxtb16 r5, r5\n"
+ "smlad %[sum4], r4, r5, %[sum4]\n"
+ "subs %[colCnt], #1\n"
+ "bne COL_LOOP_%=\n":[sum]
+ "+r"(sum),[sum2] "+r"(sum2),
+ [sum3] "+r"(sum3),
+ [sum4] "+r"(sum4),[pB] "+r"(pB),
+ [pA] "+r"(pA):[colCnt]
+ "r"(colCnt),[ch_im_in] "r"(ch_im_in):"r0", "r1", "r2", "r3", "r4", "r5");
+#else
+ /*
+ * r0 r1 r2 r3 r4 r5
+ * inA1, inA2, inB1, inB2, opA, opB
+ */
+ asm volatile ("COL_LOOP_%=:\n"
+ "ldr.w r2, [%[pB], #0]\n"
+ "add.w %[pB], %[pB], %[ch_im_in]\n"
+ "ldr.w r5, [%[pB], #0]\n"
+ "add.w %[pB], %[pB], %[ch_im_in]\n"
+ "pkhbt r3, r5, r2, LSL #16\n"
+ "pkhtb r2, r2, r5, ASR #16\n"
+ "ldr.w r0, [%[pA], #0]\n"
+ "add.w %[pA], %[pA], %[ch_im_in]\n"
+ "ldr.w r5, [%[pA], #0]\n"
+ "add.w %[pA], %[pA], %[ch_im_in]\n"
+ "pkhbt r1, r5, r0, LSL #16\n"
+ "pkhtb r0, r0, r5, ASR #16\n"
+ "sxtb16 r4, r0\n"
+ "sxtb16 r5, r2\n"
+ "smlad %[sum2], r4, r5, %[sum2]\n"
+ "mov.w r4, r0, ror #8\n"
+ "mov.w r5, r2, ror #8\n"
+ "sxtb16 r4, r4\n"
+ "sxtb16 r5, r5\n"
+ "smlad %[sum], r4, r5, %[sum]\n"
+ "sxtb16 r4, r1\n"
+ "sxtb16 r5, r3\n"
+ "smlad %[sum4], r4, r5, %[sum4]\n"
+ "mov.w r4, r1, ror #8\n"
+ "mov.w r5, r3, ror #8\n"
+ "sxtb16 r4, r4\n"
+ "sxtb16 r5, r5\n"
+ "smlad %[sum3], r4, r5, %[sum3]\n"
+ "subs %[colCnt], #1\n"
+ "bne COL_LOOP_%=\n":[sum]
+ "+r"(sum),[sum2] "+r"(sum2),
+ [sum3] "+r"(sum3),
+ [sum4] "+r"(sum4),[pB] "+r"(pB),
+ [pA] "+r"(pA):[colCnt]
+ "r"(colCnt),[ch_im_in] "r"(ch_im_in):"r0", "r1", "r2", "r3", "r4", "r5");
+
+#endif /* ARM_MATH_BIG_ENDIAN */
+
+#endif /* USE_INTRINSIC */
+
+ colCnt = (dim_kernel * dim_kernel) & 0x1;
+ while (colCnt)
+ {
+ union arm_nnword inA, inB;
+ inA.word = *__SIMD32(pA);
+ pA += ch_im_in;
+ inB.word = *__SIMD32(pB);
+ pB += ch_im_in;
+ sum += inA.bytes[0] * inB.bytes[0];
+ sum2 += inA.bytes[1] * inB.bytes[1];
+ sum3 += inA.bytes[2] * inB.bytes[2];
+ sum4 += inA.bytes[3] * inB.bytes[3];
+ colCnt--;
+ }
+
+ *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
+ *pOut++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
+ *pOut++ = (q7_t) __SSAT((sum3 >> out_shift), 8);
+ *pOut++ = (q7_t) __SSAT((sum4 >> out_shift), 8);
+
+ rowCnt--;
+ }
+
+ rowCnt = ch_im_out & 0x3;
+ while (rowCnt)
+ {
+ q7_t *pB = colBuffer + row_shift;
+ const q7_t *pA = wt + row_shift;
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+#endif
+ uint16_t colCnt = (dim_kernel * dim_kernel);
+
+ row_shift += 1;
+
+ while (colCnt)
+ {
+ q7_t A1 = *pA;
+ q7_t B1 = *pB;
+ pA += ch_im_in;
+ pB += ch_im_in;
+ sum += A1 * B1;
+
+ colCnt--;
+ }
+ *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
+ rowCnt--;
+ }
+
+ /* clear counter and pointers */
+ pBuffer = colBuffer;
+ }
+ }
+
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+ int i_out_y, i_out_x, i_ch_out, i_ker_x, i_ker_y;
+ int conv_out;
+
+ /* do some checking here, basically ch_im_in == ch_im_out */
+ if (ch_im_in != ch_im_out)
+ {
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+
+ for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
+ {
+ for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++)
+ {
+ // for each output
+#if defined (ARM_NNUSE_ROUND)
+ conv_out = ((q31_t)(bias[i_ch_out]) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ conv_out = bias[i_ch_out] << bias_shift;
+#endif
+ for (i_ker_y = 0; i_ker_y < dim_kernel; i_ker_y++)
+ {
+ for (i_ker_x = 0; i_ker_x < dim_kernel; i_ker_x++)
+ {
+ int in_row = stride * i_out_y + i_ker_y - padding;
+ int in_col = stride * i_out_x + i_ker_x - padding;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
+ {
+ conv_out +=
+ Im_in[(in_row *
+ dim_im_in +
+ in_col) *
+ ch_im_in +
+ i_ch_out] * wt[(i_ker_y * dim_kernel + i_ker_x) * ch_im_out + i_ch_out];
+ }
+ }
+ }
+ Im_out[(i_out_y * dim_im_out +
+ i_out_x) * ch_im_out + i_ch_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
+ }
+ }
+ }
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to application */
+ return ARM_MATH_SUCCESS;
+
+}
+
+/**
+ * @} end of NNConv group
+ */
diff --git a/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c b/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c
new file mode 100644
index 0000000..0a8eb57
--- /dev/null
+++ b/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c
@@ -0,0 +1,426 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_depthwise_separable_conv_HWC_q7_nonsquare.c
+ * Description: Q7 depthwise separable convolution function (non-square shape)
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup NNConv
+ * @{
+ */
+
+/**
+ * @brief Q7 depthwise separable convolution function (non-square shape)
+ * @param[in] Im_in pointer to input tensor
+ * @param[in] dim_im_in_x input tensor dimention x
+ * @param[in] dim_im_in_y input tensor dimention y
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] wt pointer to kernel weights
+ * @param[in] ch_im_out number of filters, i.e., output tensor channels
+ * @param[in] dim_kernel_x filter kernel size x
+ * @param[in] dim_kernel_y filter kernel size y
+ * @param[in] padding_x padding sizes x
+ * @param[in] padding_y padding sizes y
+ * @param[in] stride_x convolution stride x
+ * @param[in] stride_y convolution stride y
+ * @param[in] bias pointer to bias
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in,out] Im_out pointer to output tensor
+ * @param[in] dim_im_out_x output tensor dimension x
+ * @param[in] dim_im_out_y output tensor dimension y
+ * @param[in,out] bufferA pointer to buffer space for input,
+ * @param[in,out] bufferB pointer to buffer space for output
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * This function is the version with full list of optimization tricks, but with
+ * some contraints:
+ * ch_im_in is multiple of 2
+ * ch_im_out is multiple of 2
+ */
+
+arm_status arm_depthwise_separable_conv_HWC_q7_nonsquare(const q7_t * Im_in,
+ const uint16_t dim_im_in_x,
+ const uint16_t dim_im_in_y,
+ const uint16_t ch_im_in,
+ const q7_t * wt,
+ const uint16_t ch_im_out,
+ const uint16_t dim_kernel_x,
+ const uint16_t dim_kernel_y,
+ const uint16_t padding_x,
+ const uint16_t padding_y,
+ const uint16_t stride_x,
+ const uint16_t stride_y,
+ const q7_t * bias,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ q7_t * Im_out,
+ const uint16_t dim_im_out_x,
+ const uint16_t dim_im_out_y,
+ q15_t * bufferA,
+ q7_t * bufferB)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+/*
+ * Implementation:
+ * There are 3 nested loop here:
+ * Inner loop: calculate each output value with MAC instruction over an accumulator
+ * Mid loop: loop over different output channel
+ * Outer loop: loop over different output (x, y)
+ *
+ */
+
+ int16_t i_out_y, i_out_x;
+ int16_t i_ker_y, i_ker_x;
+ q7_t *colBuffer = (q7_t *) bufferA;
+ q7_t *pBuffer = colBuffer;
+ const q7_t *pBias = bias;
+ q7_t *pOut = Im_out;
+ uint16_t rowCnt;
+ uint16_t row_shift;
+
+ /* do some checking here, basically ch_im_in == ch_im_out */
+ if (ch_im_in != ch_im_out)
+ {
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+
+ for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
+ {
+ /* we first do im2col here */
+ for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
+ i_ker_y++)
+ {
+ for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
+ i_ker_x++)
+ {
+ if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x)
+ {
+ /* arm_fill_q7(0, pBuffer, ch_im_in); */
+ memset(pBuffer, 0, ch_im_in);
+ } else
+ {
+ /* arm_copy_q7((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, pBuffer, ch_im_in); */
+ memcpy(pBuffer, (q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, ch_im_in);
+ }
+ pBuffer += ch_im_in;
+ }
+ }
+
+ /* we will do the computation here for each channel */
+ rowCnt = ch_im_out >> 2;
+ row_shift = 0;
+ pBias = bias;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+ q31_t sum3 = *pBias++ << bias_shift;
+ q31_t sum4 = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = (dim_kernel_x * dim_kernel_y) >> 1;
+ q7_t *pB = colBuffer + row_shift;
+ const q7_t *pA = wt + row_shift;
+ row_shift += 4;
+
+#ifdef USE_INTRINSIC
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+ while (colCnt)
+ {
+ q31_t inA1, inA2, inB1, inB2, opA, opB;
+
+ inB1 = *__SIMD32(pB);
+ pB += ch_im_in;
+ opB = *__SIMD32(pB);
+ pB += ch_im_in;
+ inB2 = __PKHTB(opB, inB1, 16);
+ inB1 = __PKHBT(inB1, opB, 16);
+ inA1 = *__SIMD32(pA);
+ pA += ch_im_in;
+ opB = *__SIMD32(pA);
+ pA += ch_im_in;
+ inA2 = __PKHTB(opB, inA1, 16);
+ inA1 = __PKHBT(inA1, opB, 16);
+ opA = __SXTB16(inA1);
+ opB = __SXTB16(inB1);
+ sum = __SMLAD(opA, opB, sum);
+ opA = __SXTB16(__ROR(inA1, 8));
+ opB = __SXTB16(__ROR(inB1, 8));
+ sum2 = __SMLAD(opA, opB, sum2);
+ opA = __SXTB16(inA2);
+ opB = __SXTB16(inB2);
+ sum3 = __SMLAD(opA, opB, sum3);
+ opA = __SXTB16(__ROR(inA2, 8));
+ opB = __SXTB16(__ROR(inB2, 8));
+ sum4 = __SMLAD(opA, opB, sum4);
+ colCnt--;
+ }
+#else
+
+ while (colCnt)
+ {
+ q31_t inA1, inA2, inB1, inB2, opA, opB;
+
+ inB1 = *__SIMD32(pB);
+ pB += ch_im_in;
+ opB = *__SIMD32(pB);
+ pB += ch_im_in;
+ inB2 = __PKHBT(opB, inB1, 16);
+ inB1 = __PKHTB(inB1, opB, 16);
+ inA1 = *__SIMD32(pA);
+ pA += ch_im_in;
+ opB = *__SIMD32(pA);
+ pA += ch_im_in;
+ inA2 = __PKHBT(opB, inA1, 16);
+ inA1 = __PKHTB(inA1, opB, 16);
+ opA = __SXTB16(inA1);
+ opB = __SXTB16(inB1);
+ sum2 = __SMLAD(opA, opB, sum2);
+ opA = __SXTB16(__ROR(inA1, 8));
+ opB = __SXTB16(__ROR(inB1, 8));
+ sum = __SMLAD(opA, opB, sum);
+ opA = __SXTB16(inA2);
+ opB = __SXTB16(inB2);
+ sum4 = __SMLAD(opA, opB, sum4);
+ opA = __SXTB16(__ROR(inA2, 8));
+ opB = __SXTB16(__ROR(inB2, 8));
+ sum3 = __SMLAD(opA, opB, sum3);
+ colCnt--;
+ }
+
+#endif /* ARM_MATH_BIG_ENDIAN */
+
+#else
+
+#ifndef ARM_MATH_BIG_ENDIAN
+ // r0 r1 r2 r3 r4 r5
+ // inA1, inA2, inB1, inB2, opA, opB
+ asm volatile ("COL_LOOP:\n"
+ "ldr.w r2, [%[pB], #0]\n"
+ "add.w %[pB], %[pB], %[ch_im_in]\n"
+ "ldr.w r5, [%[pB], #0]\n"
+ "add.w %[pB], %[pB], %[ch_im_in]\n"
+ "pkhtb r3, r5, r2, ASR #16\n"
+ "pkhbt r2, r2, r5, LSL #16\n"
+ "ldr.w r0, [%[pA], #0]\n"
+ "add.w %[pA], %[pA], %[ch_im_in]\n"
+ "ldr.w r5, [%[pA], #0]\n"
+ "add.w %[pA], %[pA], %[ch_im_in]\n"
+ "pkhtb r1, r5, r0, ASR #16\n"
+ "pkhbt r0, r0, r5, LSL #16\n"
+ "sxtb16 r4, r0\n"
+ "sxtb16 r5, r2\n"
+ "smlad %[sum], r4, r5, %[sum]\n"
+ "mov.w r4, r0, ror #8\n"
+ "mov.w r5, r2, ror #8\n"
+ "sxtb16 r4, r4\n"
+ "sxtb16 r5, r5\n"
+ "smlad %[sum2], r4, r5, %[sum2]\n"
+ "sxtb16 r4, r1\n"
+ "sxtb16 r5, r3\n"
+ "smlad %[sum3], r4, r5, %[sum3]\n"
+ "mov.w r4, r1, ror #8\n"
+ "mov.w r5, r3, ror #8\n"
+ "sxtb16 r4, r4\n"
+ "sxtb16 r5, r5\n"
+ "smlad %[sum4], r4, r5, %[sum4]\n"
+ "subs %[colCnt], #1\n"
+ "bne COL_LOOP\n":[sum] "+r"(sum),[sum2] "+r"(sum2),[sum3] "+r"(sum3),
+ [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt),
+ [ch_im_in] "r"(ch_im_in):"r0", "r1", "r2", "r3", "r4", "r5");
+#else
+ // r0 r1 r2 r3 r4 r5
+ // inA1, inA2, inB1, inB2, opA, opB
+ asm volatile ("COL_LOOP:\n"
+ "ldr.w r2, [%[pB], #0]\n"
+ "add.w %[pB], %[pB], %[ch_im_in]\n"
+ "ldr.w r5, [%[pB], #0]\n"
+ "add.w %[pB], %[pB], %[ch_im_in]\n"
+ "pkhbt r3, r5, r2, LSL #16\n"
+ "pkhtb r2, r2, r5, ASR #16\n"
+ "ldr.w r0, [%[pA], #0]\n"
+ "add.w %[pA], %[pA], %[ch_im_in]\n"
+ "ldr.w r5, [%[pA], #0]\n"
+ "add.w %[pA], %[pA], %[ch_im_in]\n"
+ "pkhbt r1, r5, r0, LSL #16\n"
+ "pkhtb r0, r0, r5, ASR #16\n"
+ "sxtb16 r4, r0\n"
+ "sxtb16 r5, r2\n"
+ "smlad %[sum2], r4, r5, %[sum2]\n"
+ "mov.w r4, r0, ror #8\n"
+ "mov.w r5, r2, ror #8\n"
+ "sxtb16 r4, r4\n"
+ "sxtb16 r5, r5\n"
+ "smlad %[sum], r4, r5, %[sum]\n"
+ "sxtb16 r4, r1\n"
+ "sxtb16 r5, r3\n"
+ "smlad %[sum4], r4, r5, %[sum4]\n"
+ "mov.w r4, r1, ror #8\n"
+ "mov.w r5, r3, ror #8\n"
+ "sxtb16 r4, r4\n"
+ "sxtb16 r5, r5\n"
+ "smlad %[sum3], r4, r5, %[sum3]\n"
+ "subs %[colCnt], #1\n"
+ "bne COL_LOOP\n":[sum] "+r"(sum),[sum2] "+r"(sum2),[sum3] "+r"(sum3),
+ [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt),
+ [ch_im_in] "r"(ch_im_in):"r0", "r1", "r2", "r3", "r4", "r5");
+#endif /*ARM_MATH_BIG_ENDIAN */
+
+#endif /* USE_INTRINSIC */
+
+ colCnt = (dim_kernel_x * dim_kernel_y) & 0x1;
+ while (colCnt)
+ {
+ union arm_nnword inA, inB;
+ inA.word = *__SIMD32(pA);
+ pA += ch_im_in;
+ inB.word = *__SIMD32(pB);
+ pB += ch_im_in;
+ sum += inA.bytes[0] * inB.bytes[0];
+ sum2 += inA.bytes[1] * inB.bytes[1];
+ sum3 += inA.bytes[2] * inB.bytes[2];
+ sum4 += inA.bytes[3] * inB.bytes[3];
+ colCnt--;
+ }
+
+ *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
+ *pOut++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
+ *pOut++ = (q7_t) __SSAT((sum3 >> out_shift), 8);
+ *pOut++ = (q7_t) __SSAT((sum4 >> out_shift), 8);
+
+ rowCnt--;
+ }
+
+ rowCnt = ch_im_out & 0x3;
+ while (rowCnt)
+ {
+ q7_t *pB = colBuffer + row_shift;
+ const q7_t *pA = wt + row_shift;
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+#endif
+ uint16_t colCnt = (dim_kernel_x * dim_kernel_y);
+
+ row_shift += 1;
+
+ while (colCnt)
+ {
+ q7_t A1 = *pA;
+ q7_t B1 = *pB;
+ pA += ch_im_in;
+ pB += ch_im_in;
+ sum += A1 * B1;
+
+ colCnt--;
+ }
+ *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
+ rowCnt--;
+ }
+
+ // clear counter and pointers
+ pBuffer = colBuffer;
+ }
+ }
+
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+ int i_out_y, i_out_x, i_ch_out;
+ int i_ker_y, i_ker_x;
+
+ /* do some checking here, basically ch_im_in == ch_im_out */
+ if (ch_im_in != ch_im_out)
+ {
+ return ARM_MATH_SIZE_MISMATCH;
+ }
+
+ for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++)
+ {
+ for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
+ {
+ for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++)
+ {
+ // for each output
+#if defined (ARM_NNUSE_ROUND)
+ int conv_out = ((q31_t)(bias[i_ch_out]) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ int conv_out = bias[i_ch_out] << bias_shift;
+#endif
+ for (i_ker_y = 0; i_ker_y < dim_kernel_y; i_ker_y++)
+ {
+ for (i_ker_x = 0; i_ker_x < dim_kernel_x; i_ker_x++)
+ {
+ int in_row = stride_y * i_out_y + i_ker_y - padding_y;
+ int in_col = stride_x * i_out_x + i_ker_x - padding_x;
+ if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
+ {
+ conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + i_ch_out] *
+ wt[(i_ker_y * dim_kernel_x + i_ker_x) * ch_im_out + i_ch_out];
+ }
+ }
+ }
+ Im_out[(i_out_y * dim_im_out_x + i_out_x) * ch_im_out + i_ch_out] =
+ (q7_t) __SSAT((conv_out >> out_shift), 8);
+ }
+ }
+ }
+
+#endif /* ARM_MATH_DSP */
+
+
+ /* Return to application */
+ return ARM_MATH_SUCCESS;
+
+}
+
+/**
+ * @} end of NNConv group
+ */
diff --git a/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c b/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c
new file mode 100644
index 0000000..f2ccdae
--- /dev/null
+++ b/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c
@@ -0,0 +1,199 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_nn_mat_mult_kernel_q7_q15.c
+ * Description: Matrix-multiplication function for convolution
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+ /**
+ * @brief Matrix-multiplication function for convolution
+ * @param[in] pA pointer to operand A
+ * @param[in] pInBuffer pointer to operand B, always conssists of 2 vectors
+ * @param[in] ch_im_out numRow of A
+ * @param[in] numCol_A numCol of A
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias the bias
+ * @param[in,out] pOut pointer to output
+ * @return The function returns the incremented output pointer
+ *
+ * @details
+ *
+ * This function does the matrix multiplication with weight matrix
+ * and 2 columns from im2col.
+ */
+
+q7_t *arm_nn_mat_mult_kernel_q7_q15(const q7_t * pA,
+ const q15_t * pInBuffer,
+ const uint16_t ch_im_out,
+ const uint16_t numCol_A,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q7_t * bias,
+ q7_t * pOut)
+{
+#if defined (ARM_MATH_DSP)
+ /* set up the second output pointers */
+ q7_t *pOut2 = pOut + ch_im_out;
+ const q7_t *pBias = bias;
+
+ uint16_t rowCnt = ch_im_out >> 1;
+ /* this loop over rows in A */
+ while (rowCnt)
+ {
+ /* setup pointers for B */
+ const q15_t *pB = pInBuffer;
+ const q15_t *pB2 = pB + numCol_A;
+
+ /* align the second pointer for A */
+ const q7_t *pA2 = pA + numCol_A;
+
+ /* init the sum with bias */
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum3 = ((q31_t)(*pBias) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+ q31_t sum3 = *pBias << bias_shift;
+ q31_t sum4 = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = numCol_A >> 2;
+ /* accumulate over the vector */
+ while (colCnt)
+ {
+ q31_t inA11, inA12, inA21, inA22;
+ q31_t inB1 = *__SIMD32(pB)++;
+ q31_t inB2 = *__SIMD32(pB2)++;
+
+ pA = (q7_t *) read_and_pad((void *)pA, &inA11, &inA12);
+ pA2 = (q7_t *) read_and_pad((void *)pA2, &inA21, &inA22);
+
+ sum = __SMLAD(inA11, inB1, sum);
+ sum2 = __SMLAD(inA11, inB2, sum2);
+ sum3 = __SMLAD(inA21, inB1, sum3);
+ sum4 = __SMLAD(inA21, inB2, sum4);
+
+ inB1 = *__SIMD32(pB)++;
+ inB2 = *__SIMD32(pB2)++;
+
+ sum = __SMLAD(inA12, inB1, sum);
+ sum2 = __SMLAD(inA12, inB2, sum2);
+ sum3 = __SMLAD(inA22, inB1, sum3);
+ sum4 = __SMLAD(inA22, inB2, sum4);
+
+ colCnt--;
+ } /* while over colCnt */
+ colCnt = numCol_A & 0x3;
+ while (colCnt)
+ {
+ q7_t inA1 = *pA++;
+ q15_t inB1 = *pB++;
+ q7_t inA2 = *pA2++;
+ q15_t inB2 = *pB2++;
+
+ sum += inA1 * inB1;
+ sum2 += inA1 * inB2;
+ sum3 += inA2 * inB1;
+ sum4 += inA2 * inB2;
+ colCnt--;
+ } /* while over colCnt */
+ *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
+ *pOut++ = (q7_t) __SSAT((sum3 >> out_shift), 8);
+ *pOut2++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
+ *pOut2++ = (q7_t) __SSAT((sum4 >> out_shift), 8);
+
+ /* skip the row computed with A2 */
+ pA += numCol_A;
+ rowCnt--;
+ } /* for over ch_im_out */
+
+ /* compute left-over row if any */
+ if (ch_im_out & 0x1)
+ {
+ /* setup pointers for B */
+ const q15_t *pB = pInBuffer;
+ const q15_t *pB2 = pB + numCol_A;
+
+ /* load the bias */
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = numCol_A >> 2;
+ while (colCnt)
+ {
+ q31_t inA11, inA12;
+ q31_t inB1 = *__SIMD32(pB)++;
+ q31_t inB2 = *__SIMD32(pB2)++;
+
+ pA = (q7_t *) read_and_pad((void *)pA, &inA11, &inA12);
+
+ sum = __SMLAD(inA11, inB1, sum);
+ sum2 = __SMLAD(inA11, inB2, sum2);
+
+ inB1 = *__SIMD32(pB)++;
+ inB2 = *__SIMD32(pB2)++;
+ sum = __SMLAD(inA12, inB1, sum);
+ sum2 = __SMLAD(inA12, inB2, sum2);
+
+ colCnt--;
+ }
+ colCnt = numCol_A & 0x3;
+ while (colCnt)
+ {
+ q7_t inA1 = *pA++;
+ q15_t inB1 = *pB++;
+ q15_t inB2 = *pB2++;
+
+ sum += inA1 * inB1;
+ sum2 += inA1 * inB2;
+ colCnt--;
+ }
+
+ *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
+ *pOut2++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
+ }
+
+ pOut += ch_im_out;
+
+ /* return the new output pointer with offset */
+ return pOut;
+#else
+ /* To be completed */
+ return NULL;
+#endif /* ARM_MATH_DSP */
+
+}
diff --git a/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c b/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c
new file mode 100644
index 0000000..34953ff
--- /dev/null
+++ b/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c
@@ -0,0 +1,144 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_nn_mat_mult_kernel_q7_q15_reordered.c
+ * Description: Matrix-multiplication function for convolution with reordered columns
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ * -------------------------------------------------------------------- */
+
+#include "arm_nnfunctions.h"
+#include "arm_math.h"
+
+ /**
+ * @brief Matrix-multiplication function for convolution with reordered columns
+ * @param[in] pA pointer to operand A
+ * @param[in] pInBuffer pointer to operand B, always conssists of 2 vectors
+ * @param[in] ch_im_out numRow of A
+ * @param[in] numCol_A numCol of A
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias the bias
+ * @param[in,out] pOut pointer to output
+ * @return The function returns the incremented output pointer
+ *
+ * @details
+ *
+ * This function assumes that data in pInBuffer are reordered
+ */
+
+q7_t *arm_nn_mat_mult_kernel_q7_q15_reordered(const q7_t * pA,
+ const q15_t * pInBuffer,
+ const uint16_t ch_im_out,
+ const uint16_t numCol_A,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q7_t * bias,
+ q7_t * pOut)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* set up the second output pointers */
+ q7_t *pOut2 = pOut + ch_im_out;
+ int i;
+
+ /* this loop over rows in A */
+ for (i = 0; i < ch_im_out; i += 2)
+ {
+ /* setup pointers for B */
+ const q15_t *pB = pInBuffer;
+ const q15_t *pB2 = pB + numCol_A;
+
+ /* align the second pointer for A */
+ const q7_t *pA2 = pA + numCol_A;
+
+ /* init the sum with bias */
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(bias[i]) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(bias[i]) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum3 = ((q31_t)(bias[i + 1]) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum4 = ((q31_t)(bias[i + 1]) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = bias[i] << bias_shift;
+ q31_t sum2 = bias[i] << bias_shift;
+ q31_t sum3 = bias[i + 1] << bias_shift;
+ q31_t sum4 = bias[i + 1] << bias_shift;
+#endif
+ uint16_t colCnt = numCol_A >> 2;
+ /* accumulate over the vector */
+ while (colCnt)
+ {
+ q31_t inA11, inA12, inA21, inA22;
+ q31_t inB1 = *__SIMD32(pB)++;
+ q31_t inB2 = *__SIMD32(pB2)++;
+
+ pA = (q7_t *) read_and_pad_reordered((void *)pA, &inA11, &inA12);
+ pA2 = (q7_t *) read_and_pad_reordered((void *)pA2, &inA21, &inA22);
+
+ sum = __SMLAD(inA11, inB1, sum);
+ sum2 = __SMLAD(inA11, inB2, sum2);
+ sum3 = __SMLAD(inA21, inB1, sum3);
+ sum4 = __SMLAD(inA21, inB2, sum4);
+
+ inB1 = *__SIMD32(pB)++;
+ inB2 = *__SIMD32(pB2)++;
+
+ sum = __SMLAD(inA12, inB1, sum);
+ sum2 = __SMLAD(inA12, inB2, sum2);
+ sum3 = __SMLAD(inA22, inB1, sum3);
+ sum4 = __SMLAD(inA22, inB2, sum4);
+
+ colCnt--;
+ } /* while over colCnt */
+ colCnt = numCol_A & 0x3;
+ while (colCnt)
+ {
+ q7_t inA1 = *pA++;
+ q15_t inB1 = *pB++;
+ q7_t inA2 = *pA2++;
+ q15_t inB2 = *pB2++;
+
+ sum += inA1 * inB1;
+ sum2 += inA1 * inB2;
+ sum3 += inA2 * inB1;
+ sum4 += inA2 * inB2;
+ colCnt--;
+ } /* while over colCnt */
+ *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
+ *pOut++ = (q7_t) __SSAT((sum3 >> out_shift), 8);
+ *pOut2++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
+ *pOut2++ = (q7_t) __SSAT((sum4 >> out_shift), 8);
+
+ /* skip the row computed with A2 */
+ pA += numCol_A;
+ } /* for over ch_im_out */
+
+ pOut += ch_im_out;
+
+ /* return the new output pointer with offset */
+ return pOut;
+#else
+ /* To be completed */
+ return NULL;
+#endif /* ARM_MATH_DSP */
+}
diff --git a/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c b/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c
new file mode 100644
index 0000000..c2d70e3
--- /dev/null
+++ b/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c
@@ -0,0 +1,212 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_fully_connected_mat_q7_vec_q15.c
+ * Description: Mixed Q15-Q7 fully-connected layer function
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup FC
+ * @{
+ */
+
+ /**
+ * @brief Mixed Q15-Q7 fully-connected layer function
+ * @param[in] pV pointer to input vector
+ * @param[in] pM pointer to matrix weights
+ * @param[in] dim_vec length of the vector
+ * @param[in] num_of_rows number of rows in weight matrix
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias pointer to bias
+ * @param[in,out] pOut pointer to output vector
+ * @param[in,out] vec_buffer pointer to buffer space for input
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * vec_buffer size: 0
+ *
+ * Q7_Q15 version of the fully connected layer
+ *
+ * Weights are in q7_t and Activations are in q15_t
+ *
+ */
+
+arm_status
+arm_fully_connected_mat_q7_vec_q15(const q15_t * pV,
+ const q7_t * pM,
+ const uint16_t dim_vec,
+ const uint16_t num_of_rows,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q7_t * bias,
+ q15_t * pOut,
+ q15_t * vec_buffer)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ const q7_t *pB = pM;
+ const q7_t *pB2;
+ q15_t *pO = pOut;
+ const q7_t *pBias = bias;
+ const q15_t *pA = pV;
+
+ uint16_t rowCnt = num_of_rows >> 1;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+#endif
+ uint16_t colCnt = dim_vec >> 2;
+
+ pA = pV;
+ pB2 = pB + dim_vec;
+
+ while (colCnt)
+ {
+ q31_t inV, inM11, inM12, inM21, inM22;
+ pB = (q7_t *) read_and_pad((void *)pB, &inM11, &inM12);
+ pB2 = (q7_t *) read_and_pad((void *)pB2, &inM21, &inM22);
+
+ inV = *__SIMD32(pA)++;
+
+ sum = __SMLAD(inV, inM11, sum);
+ sum2 = __SMLAD(inV, inM21, sum2);
+
+ inV = *__SIMD32(pA)++;
+
+ sum = __SMLAD(inV, inM12, sum);
+ sum2 = __SMLAD(inV, inM22, sum2);
+
+ colCnt--;
+ }
+ colCnt = dim_vec & 0x3;
+ while (colCnt)
+ {
+ q15_t inV = *pA++;
+ q7_t inM = *pB++;
+ q7_t inM2 = *pB2++;
+
+ sum += inV * inM;
+ sum2 += inV * inM2;
+ colCnt--;
+ } /* while over colCnt */
+ *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
+ *pO++ = (q15_t) (__SSAT((sum2 >> out_shift), 16));
+
+ /*adjust the pointers and counters */
+ pB += dim_vec;
+ rowCnt--;
+ }
+
+ /* left-over part of the rows */
+ rowCnt = num_of_rows & 0x1;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+#endif
+ uint16_t colCnt = dim_vec >> 2;
+
+ pA = pV;
+
+ while (colCnt)
+ {
+ q31_t inV1, inV2, inM11, inM12;
+
+ pB = (q7_t *) read_and_pad((void *)pB, &inM11, &inM12);
+
+ inV1 = *__SIMD32(pA)++;
+ sum = __SMLAD(inV1, inM11, sum);
+
+ inV2 = *__SIMD32(pA)++;
+ sum = __SMLAD(inV2, inM12, sum);
+
+ colCnt--;
+ }
+
+ /* left-over of the vector */
+ colCnt = dim_vec & 0x3;
+ while (colCnt)
+ {
+ q15_t inV = *pA++;
+ q7_t inM = *pB++;
+ sum += inV * inM;
+ colCnt--;
+ }
+
+ *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
+
+ rowCnt--;
+ }
+
+#else
+ int i, j;
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+ for (i = 0; i < num_of_rows; i++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ int ip_out = ((q31_t)(bias[i]) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ int ip_out = bias[i] << bias_shift;
+#endif
+ for (j = 0; j < dim_vec; j++)
+ {
+ ip_out += pV[j] * pM[i * dim_vec + j];
+ }
+ pOut[i] = (q15_t) __SSAT((ip_out >> out_shift), 16);
+ }
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to ARM_MATH_SUCCESS */
+ return (ARM_MATH_SUCCESS);
+
+}
+
+/**
+ * @} end of FC group
+ */
diff --git a/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c b/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c
new file mode 100644
index 0000000..497061f
--- /dev/null
+++ b/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c
@@ -0,0 +1,425 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_fully_connected_mat_q7_vec_q15_opt.c
+ * Description: Mixed Q15-Q7 opt fully-connected layer function
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup FC
+ * @{
+ */
+
+ /**
+ * @brief Mixed Q15-Q7 opt fully-connected layer function
+ * @param[in] pV pointer to input vector
+ * @param[in] pM pointer to matrix weights
+ * @param[in] dim_vec length of the vector
+ * @param[in] num_of_rows number of rows in weight matrix
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias pointer to bias
+ * @param[in,out] pOut pointer to output vector
+ * @param[in,out] vec_buffer pointer to buffer space for input
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * vec_buffer size: 0
+ *
+ * Q7_Q15 version of the fully connected layer
+ *
+ * Weights are in q7_t and Activations are in q15_t
+ *
+ * Limitation: x4 version requires weight reordering to work
+ *
+ * Here we use only one pointer to read 4 rows in the weight
+ * matrix. So if the original q7_t matrix looks like this:
+ *
+ * | a11 | a12 | a13 | a14 | a15 | a16 | a17 |
+ *
+ * | a21 | a22 | a23 | a24 | a25 | a26 | a27 |
+ *
+ * | a31 | a32 | a33 | a34 | a35 | a36 | a37 |
+ *
+ * | a41 | a42 | a43 | a44 | a45 | a46 | a47 |
+ *
+ * | a51 | a52 | a53 | a54 | a55 | a56 | a57 |
+ *
+ * | a61 | a62 | a63 | a64 | a65 | a66 | a67 |
+ *
+ * We operates on multiple-of-4 rows, so the first four rows becomes
+ *
+ * | a11 | a21 | a12 | a22 | a31 | a41 | a32 | a42 |
+ *
+ * | a13 | a23 | a14 | a24 | a33 | a43 | a34 | a44 |
+ *
+ * | a15 | a25 | a16 | a26 | a35 | a45 | a36 | a46 |
+ *
+ * The column left over will be in-order.
+ * which is:
+ * | a17 | a27 | a37 | a47 |
+ *
+ * For the left-over rows, we do 1x1 computation, so the data remains
+ * as its original order.
+ *
+ * So the stored weight matrix looks like this:
+ *
+ * | a11 | a21 | a12 | a22 | a31 | a41 |
+ *
+ * | a32 | a42 | a13 | a23 | a14 | a24 |
+ *
+ * | a33 | a43 | a34 | a44 | a15 | a25 |
+ *
+ * | a16 | a26 | a35 | a45 | a36 | a46 |
+ *
+ * | a17 | a27 | a37 | a47 | a51 | a52 |
+ *
+ * | a53 | a54 | a55 | a56 | a57 | a61 |
+ *
+ * | a62 | a63 | a64 | a65 | a66 | a67 |
+ *
+ */
+
+arm_status
+arm_fully_connected_mat_q7_vec_q15_opt(const q15_t * pV,
+ const q7_t * pM,
+ const uint16_t dim_vec,
+ const uint16_t num_of_rows,
+ const uint16_t bias_shift,
+ const uint16_t out_shift, const q7_t * bias, q15_t * pOut, q15_t * vec_buffer)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ const q7_t *pB = pM;
+ q15_t *pO = pOut;
+ const q7_t *pBias = bias;
+ const q15_t *pA = pV;
+
+ uint16_t rowCnt = num_of_rows >> 2;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+ q31_t sum3 = *pBias++ << bias_shift;
+ q31_t sum4 = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = dim_vec >> 1;
+
+ pA = pV;
+
+#ifdef USE_INTRINSIC
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+ while (colCnt)
+ {
+ q31_t inM11, inM12, inM13, inM14;
+ q31_t inV;
+
+ inV = *__SIMD32(pA)++;
+ inM11 = *__SIMD32(pB)++;
+ inM12 = __SXTB16(__ROR(inM11, 8));
+ inM11 = __SXTB16(inM11);
+ sum = __SMLAD(inM11, inV, sum);
+ sum2 = __SMLAD(inM12, inV, sum2);
+ inM13 = *__SIMD32(pB)++;
+ inM14 = __SXTB16(__ROR(inM13, 8));
+ inM13 = __SXTB16(inM13);
+ sum3 = __SMLAD(inM13, inV, sum3);
+ sum4 = __SMLAD(inM14, inV, sum4);
+ colCnt--;
+ }
+
+#else
+
+ while (colCnt)
+ {
+ q31_t inM11, inM12, inM13, inM14;
+ q31_t inV;
+
+ inV = *__SIMD32(pA)++;
+ inM11 = *__SIMD32(pB)++;
+ inM12 = __SXTB16(__ROR(inM11, 8));
+ inM11 = __SXTB16(inM11);
+ sum = __SMLAD(inM12, inV, sum);
+ sum2 = __SMLAD(inM11, inV, sum2);
+ inM13 = *__SIMD32(pB)++;
+ inM14 = __SXTB16(__ROR(inM13, 8));
+ inM13 = __SXTB16(inM13);
+ sum3 = __SMLAD(inM14, inV, sum3);
+ sum4 = __SMLAD(inM13, inV, sum4);
+ colCnt--;
+ }
+
+#endif /* ARM_MATH_BIG_ENDIAN */
+
+#else
+
+ /*
+ * register needed:
+ * loop counter: colCnt
+ * accumulators: sum, sum2, sum3, sum4
+ * pointers: pB, pA
+ * weight data: inM11, inM12, inM13, inM14
+ * activation data: inV
+ */
+
+#ifndef ARM_MATH_BIG_ENDIAN
+ asm volatile ("COL_LOOP_%=:\n"
+ "ldr.w r4, [%[pA]], #4\n"
+ "ldr.w r1, [%[pB]], #8\n"
+ "mov.w r0, r1, ror #8\n"
+ "sxtb16 r0, r0\n"
+ "sxtb16 r1, r1\n"
+ "smlad %[sum], r4, r1, %[sum]\n"
+ "smlad %[sum2], r4, r0, %[sum2]\n"
+ "ldr.w r3, [%[pB], #-4]\n"
+ "mov.w r2, r3, ror #8\n"
+ "sxtb16 r2, r2\n"
+ "sxtb16 r3, r3\n"
+ "smlad %[sum3], r4, r3, %[sum3]\n"
+ "smlad %[sum4], r4, r2, %[sum4]\n"
+ "subs %[colCnt], #1\n"
+ "bne COL_LOOP_%=\n":[sum] "+r"(sum),
+ [sum2] "+r"(sum2),[sum3] "+r"(sum3),
+ [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt):"r0", "r1", "r2", "r3", "r4");
+#else
+ asm volatile ("COL_LOOP_%=:\n"
+ "ldr.w r4, [%[pA]], #4\n"
+ "ldr.w r1, [%[pB]], #8\n"
+ "mov.w r0, r1, ror #8\n"
+ "sxtb16 r0, r0\n"
+ "sxtb16 r1, r1\n"
+ "smlad %[sum], r4, r0, %[sum]\n"
+ "smlad %[sum2], r4, r1, %[sum2]\n"
+ "ldr.w r3, [%[pB], #-4]\n"
+ "mov.w r2, r3, ror #8\n"
+ "sxtb16 r2, r2\n"
+ "sxtb16 r3, r3\n"
+ "smlad %[sum3], r4, r2, %[sum3]\n"
+ "smlad %[sum4], r4, r3, %[sum4]\n"
+ "subs %[colCnt], #1\n"
+ "bne COL_LOOP_%=\n":[sum] "+r"(sum),
+ [sum2] "+r"(sum2),[sum3] "+r"(sum3),
+ [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt):"r0", "r1", "r2", "r3", "r4");
+#endif /* ARM_MATH_BIG_ENDIAN */
+
+#endif /* USE_INTRINSIC */
+
+ colCnt = dim_vec & 0x1;
+ while (colCnt)
+ {
+ q15_t inV = *pA++;
+ q7_t inM = *pB++;
+ q7_t inM2 = *pB++;
+ q7_t inM3 = *pB++;
+ q7_t inM4 = *pB++;
+
+ sum += inV * inM;
+ sum2 += inV * inM2;
+ sum3 += inV * inM3;
+ sum4 += inV * inM4;
+ colCnt--;
+ } /* while over colCnt */
+ *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
+ *pO++ = (q15_t) (__SSAT((sum2 >> out_shift), 16));
+ *pO++ = (q15_t) (__SSAT((sum3 >> out_shift), 16));
+ *pO++ = (q15_t) (__SSAT((sum4 >> out_shift), 16));
+
+ /* adjust the pointers and counters */
+ rowCnt--;
+ }
+
+ /* left-over part of the rows */
+ rowCnt = num_of_rows & 0x3;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = dim_vec >> 2;
+
+ pA = pV;
+
+ while (colCnt)
+ {
+ q31_t inV1, inV2, inM11, inM12;
+
+ pB = (q7_t *) read_and_pad((void *)pB, &inM11, &inM12);
+
+ inV1 = *__SIMD32(pA)++;
+ sum = __SMLAD(inV1, inM11, sum);
+
+ inV2 = *__SIMD32(pA)++;
+ sum = __SMLAD(inV2, inM12, sum);
+
+ colCnt--;
+ }
+
+ /* left-over of the vector */
+ colCnt = dim_vec & 0x3;
+ while (colCnt)
+ {
+ q15_t inV = *pA++;
+ q7_t inM = *pB++;
+ sum += inV * inM;
+ colCnt--;
+ }
+
+ *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
+
+ rowCnt--;
+ }
+
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+ uint16_t rowCnt = num_of_rows >> 2;
+ const q7_t *pB = pM;
+ const q15_t *pA;
+ q15_t *pO = pOut;
+ const q7_t *pBias = bias;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+ q31_t sum3 = *pBias++ << bias_shift;
+ q31_t sum4 = *pBias++ << bias_shift;
+#endif
+ uint16_t colCnt = dim_vec >> 1;
+
+ pA = pV;
+
+ while (colCnt)
+ {
+ q15_t inA1 = *pA++;
+ q15_t inA2 = *pA++;
+
+ q7_t inB1 = *pB++;
+ q7_t inB3 = *pB++;
+ q7_t inB2 = *pB++;
+ q7_t inB4 = *pB++;
+
+ sum += inA1 * inB1 + inA2 * inB2;
+ sum2 += inA1 * inB3 + inA2 * inB4;
+
+ inB1 = *pB++;
+ inB3 = *pB++;
+ inB2 = *pB++;
+ inB4 = *pB++;
+
+ sum3 += inA1 * inB1 + inA2 * inB2;
+ sum4 += inA1 * inB3 + inA2 * inB4;
+
+ colCnt--;
+ }
+
+ colCnt = dim_vec & 0x1;
+ while (colCnt)
+ {
+ q15_t inA = *pA++;
+ q7_t inB = *pB++;
+ sum += inA * inB;
+ inB = *pB++;
+ sum2 += inA * inB;
+ inB = *pB++;
+ sum3 += inA * inB;
+ inB = *pB++;
+ sum4 += inA * inB;
+
+ colCnt--;
+ }
+ *pO++ = (q15_t) __SSAT((sum >> out_shift), 16);
+ *pO++ = (q15_t) __SSAT((sum2 >> out_shift), 16);
+ *pO++ = (q15_t) __SSAT((sum3 >> out_shift), 16);
+ *pO++ = (q15_t) __SSAT((sum4 >> out_shift), 16);
+
+ rowCnt--;
+ }
+
+ rowCnt = num_of_rows & 0x3;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ int ip_out = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ int ip_out = *pBias++ << bias_shift;
+#endif
+ int j;
+
+ pA = pV;
+ for (j = 0; j < dim_vec; j++)
+ {
+ q15_t inA = *pA++;
+ q7_t inB = *pB++;
+ ip_out += inA * inB;
+ }
+ *pO++ = (q15_t) __SSAT((ip_out >> out_shift), 16);
+
+ rowCnt--;
+ }
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to ARM_MATH_SUCCESS */
+ return (ARM_MATH_SUCCESS);
+
+}
+
+/**
+ * @} end of FC group
+ */
diff --git a/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c b/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c
new file mode 100644
index 0000000..dfdad65
--- /dev/null
+++ b/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c
@@ -0,0 +1,206 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_fully_connected_q15.c
+ * Description: Q15 basic fully-connected layer function
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup FC
+ * @{
+ */
+
+ /**
+ * @brief Q15 opt fully-connected layer function
+ * @param[in] pV pointer to input vector
+ * @param[in] pM pointer to matrix weights
+ * @param[in] dim_vec length of the vector
+ * @param[in] num_of_rows number of rows in weight matrix
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias pointer to bias
+ * @param[in,out] pOut pointer to output vector
+ * @param[in,out] vec_buffer pointer to buffer space for input
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * vec_buffer size: 0
+ *
+ */
+
+arm_status
+arm_fully_connected_q15(const q15_t * pV,
+ const q15_t * pM,
+ const uint16_t dim_vec,
+ const uint16_t num_of_rows,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q15_t * bias,
+ q15_t * pOut,
+ q15_t * vec_buffer)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ const q15_t *pB = pM;
+ const q15_t *pB2 = pB + dim_vec;
+ q15_t *pO = pOut;
+ const q15_t *pA;
+ const q15_t *pBias = bias;
+ uint16_t rowCnt = num_of_rows >> 1;
+
+ /* this loop loops over different output */
+ while (rowCnt) {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = dim_vec >> 2;
+
+ pA = pV;
+ pB2 = pB + dim_vec;
+
+ while (colCnt)
+ {
+ q31_t inV1, inM1, inM2;
+ inV1 = *__SIMD32(pA)++;
+ inM1 = *__SIMD32(pB)++;
+ sum = __SMLAD(inV1, inM1, sum);
+ inM2 = *__SIMD32(pB2)++;
+ sum2 = __SMLAD(inV1, inM2, sum2);
+
+ inV1 = *__SIMD32(pA)++;
+ inM1 = *__SIMD32(pB)++;
+ sum = __SMLAD(inV1, inM1, sum);
+ inM2 = *__SIMD32(pB2)++;
+ sum2 = __SMLAD(inV1, inM2, sum2);
+
+ colCnt--;
+ }
+ colCnt = dim_vec & 0x3;
+ while (colCnt)
+ {
+ q15_t inV = *pA++;
+ q15_t inM = *pB++;
+ q15_t inM2 = *pB2++;
+
+ sum += inV * inM;
+ sum2 += inV * inM2;
+ colCnt--;
+ } /* while over colCnt */
+ *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
+ *pO++ = (q15_t) (__SSAT((sum2>> out_shift), 16));
+
+ /* adjust the pointers and counters */
+ pB = pB + dim_vec;
+ rowCnt --;
+ }
+
+ rowCnt = num_of_rows & 0x1;
+
+ while (rowCnt) {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = dim_vec >> 2;
+
+ pA = pV;
+
+ while (colCnt) {
+ q31_t inV1, inM1;
+ inV1 = *__SIMD32(pA)++;
+ inM1 = *__SIMD32(pB)++;
+ sum = __SMLAD(inV1, inM1, sum);
+
+ inV1 = *__SIMD32(pA)++;
+ inM1 = *__SIMD32(pB)++;
+ sum = __SMLAD(inV1, inM1, sum);
+
+ colCnt--;
+ }
+
+ /* left-over of the vector */
+ colCnt = dim_vec & 0x3;
+ while(colCnt) {
+ q15_t inV = *pA++;
+ q15_t inM = *pB++;
+
+ sum += inV * inM;
+
+ colCnt--;
+ }
+
+ *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
+
+ rowCnt --;
+ }
+
+#else
+ int i, j;
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+ for (i = 0; i < num_of_rows; i++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ int ip_out = ((q31_t)(bias[i]) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ int ip_out = bias[i] << bias_shift;
+#endif
+ for (j = 0; j < dim_vec; j++)
+ {
+ ip_out += pV[j] * pM[i * dim_vec + j];
+ }
+ pOut[i] = (q15_t) __SSAT((ip_out >> out_shift), 16);
+ }
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to application */
+ return (ARM_MATH_SUCCESS);
+
+}
+
+/**
+ * @} end of FC group
+ */
diff --git a/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c b/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c
new file mode 100644
index 0000000..205f9e1
--- /dev/null
+++ b/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c
@@ -0,0 +1,354 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_fully_connected_q15_opt.c
+ * Description: Q15 opt fully-connected layer function
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup FC
+ * @{
+ */
+
+ /**
+ * @brief Q15 opt fully-connected layer function
+ * @param[in] pV pointer to input vector
+ * @param[in] pM pointer to matrix weights
+ * @param[in] dim_vec length of the vector
+ * @param[in] num_of_rows number of rows in weight matrix
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias pointer to bias
+ * @param[in,out] pOut pointer to output vector
+ * @param[in,out] vec_buffer pointer to buffer space for input
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * vec_buffer size: 0
+ *
+ * Here we use only one pointer to read 4 rows in the weight
+ * matrix. So if the original matrix looks like this:
+ *
+ * | a11 | a12 | a13 |
+ *
+ * | a21 | a22 | a23 |
+ *
+ * | a31 | a32 | a33 |
+ *
+ * | a41 | a42 | a43 |
+ *
+ * | a51 | a52 | a53 |
+ *
+ * | a61 | a62 | a63 |
+ *
+ * We operates on multiple-of-4 rows, so the first four rows becomes
+ *
+ * | a11 | a12 | a21 | a22 | a31 | a32 | a41 | a42 |
+ *
+ * | a13 | a23 | a33 | a43 |
+ *
+ * Remaining rows are kept the same original order.
+ *
+ * So the stored weight matrix looks like this:
+ *
+ *
+ * | a11 | a12 | a21 | a22 | a31 | a32 | a41 | a42 |
+ *
+ * | a13 | a23 | a33 | a43 | a51 | a52 | a53 | a61 |
+ *
+ * | a62 | a63 |
+ */
+
+arm_status
+arm_fully_connected_q15_opt(const q15_t * pV,
+ const q15_t * pM,
+ const uint16_t dim_vec,
+ const uint16_t num_of_rows,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q15_t * bias,
+ q15_t * pOut,
+ q15_t * vec_buffer)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ const q15_t *pB = pM;
+ q15_t *pO = pOut;
+ const q15_t *pBias = bias;
+ const q15_t *pA = pV;
+
+ uint16_t rowCnt = num_of_rows >> 2;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+ q31_t sum3 = *pBias++ << bias_shift;
+ q31_t sum4 = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = dim_vec >> 1;
+
+ pA = pV;
+
+#ifdef USE_INTRINSIC
+
+ while (colCnt)
+ {
+ q31_t inM11, inM12, inM13, inM14;
+ q31_t inV;
+
+ inV = *__SIMD32(pA)++;
+ inM11 = *__SIMD32(pB)++;
+ sum = __SMLAD(inV, inM11, sum);
+ inM12 = *__SIMD32(pB)++;
+ sum2 = __SMLAD(inV, inM12, sum2);
+ inM13 = *__SIMD32(pB)++;
+ sum3 = __SMLAD(inV, inM13, sum3);
+ inM14 = *__SIMD32(pB)++;
+ sum4 = __SMLAD(inV, inM14, sum4);
+ colCnt--;
+ }
+
+#else
+
+ /*
+ * register needed:
+ * loop counter: colCnt
+ * accumulators: sum, sum2, sum3, sum4
+ * pointers: pB, pA
+ * weight data: inM11, inM12, inM13, inM14
+ * activation data: inV
+ */
+
+ asm volatile ("COL_LOOP_%=:\n"
+ "ldr.w r4, [%[pA]], #4\n"
+ "ldr.w r0, [%[pB]], #16\n"
+ "smlad %[sum], r4, r0, %[sum]\n"
+ "ldr.w r1, [%[pB] , #-12]\n"
+ "smlad %[sum2], r4, r1, %[sum2]\n"
+ "ldr.w r2, [%[pB] , #-8]\n"
+ "smlad %[sum3], r4, r2, %[sum3]\n"
+ "ldr.w r3, [%[pB] , #-4]\n"
+ "smlad %[sum4], r4, r3, %[sum4]\n"
+ "subs %[colCnt], #1\n"
+ "bne COL_LOOP_%=\n":[sum] "+r"(sum),
+ [sum2] "+r"(sum2),[sum3] "+r"(sum3),
+ [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt):"r0", "r1", "r2", "r3", "r4");
+
+#endif /* USE_INTRINSIC */
+
+ colCnt = dim_vec & 0x1;
+ while (colCnt)
+ {
+
+ q15_t inV = *pA++;
+ q15_t inM = *pB++;
+ q15_t inM2 = *pB++;
+ q15_t inM3 = *pB++;
+ q15_t inM4 = *pB++;
+
+ sum += inV * inM;
+ sum2 += inV * inM2;
+ sum3 += inV * inM3;
+ sum4 += inV * inM4;
+ colCnt--;
+ } /* while over colCnt */
+ *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
+ *pO++ = (q15_t) (__SSAT((sum2 >> out_shift), 16));
+ *pO++ = (q15_t) (__SSAT((sum3 >> out_shift), 16));
+ *pO++ = (q15_t) (__SSAT((sum4 >> out_shift), 16));
+
+ /* adjust the pointers and counters */
+ rowCnt--;
+ }
+
+ /* left-over part of the rows */
+ rowCnt = num_of_rows & 0x3;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = dim_vec >> 2;
+
+ pA = pV;
+
+ while (colCnt)
+ {
+ q31_t inV1, inV2, inM1, inM2;
+
+ inM1 = *__SIMD32(pB)++;
+ inV1 = *__SIMD32(pA)++;
+ sum = __SMLAD(inV1, inM1, sum);
+
+ inM2 = *__SIMD32(pB)++;
+ inV2 = *__SIMD32(pA)++;
+ sum = __SMLAD(inV2, inM2, sum);
+
+ colCnt--;
+ }
+
+ /* left-over of the vector */
+ colCnt = dim_vec & 0x3;
+ while (colCnt)
+ {
+ q15_t inV = *pA++;
+ q15_t inM = *pB++;
+ sum += inV * inM;
+ colCnt--;
+ }
+
+ *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
+
+ rowCnt--;
+ }
+
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+ uint16_t rowCnt = num_of_rows >> 2;
+ const q15_t *pB = pM;
+ const q15_t *pA;
+ q15_t *pO = pOut;
+ const q15_t *pBias = bias;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+ q31_t sum3 = *pBias++ << bias_shift;
+ q31_t sum4 = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = dim_vec >> 1;
+
+ pA = pV;
+ while (colCnt)
+ {
+ q15_t inA1 = *pA++;
+ q15_t inA2 = *pA++;
+
+ q15_t inB1 = *pB++;
+ q15_t inB2 = *pB++;
+ sum += inA1 * inB1 + inA2 * inB2;
+
+ inB1 = *pB++;
+ inB2 = *pB++;
+ sum2 += inA1 * inB1 + inA2 * inB2;
+
+ inB1 = *pB++;
+ inB2 = *pB++;
+ sum3 += inA1 * inB1 + inA2 * inB2;
+
+ inB1 = *pB++;
+ inB2 = *pB++;
+ sum4 += inA1 * inB1 + inA2 * inB2;
+
+ colCnt--;
+ }
+ colCnt = dim_vec & 0x1;
+ while (colCnt)
+ {
+ q15_t inA = *pA++;
+ q15_t inB = *pB++;
+ sum += inA * inB;
+ inB = *pB++;
+ sum2 += inA * inB;
+ inB = *pB++;
+ sum3 += inA * inB;
+ inB = *pB++;
+ sum4 += inA * inB;
+ colCnt--;
+ }
+ *pO++ = (q15_t) __SSAT((sum >> out_shift), 16);
+ *pO++ = (q15_t) __SSAT((sum2 >> out_shift), 16);
+ *pO++ = (q15_t) __SSAT((sum3 >> out_shift), 16);
+ *pO++ = (q15_t) __SSAT((sum4 >> out_shift), 16);
+
+ rowCnt--;
+ }
+ rowCnt = num_of_rows & 0x3;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ int ip_out = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ int ip_out = *pBias++ << bias_shift;
+#endif
+ int j;
+
+ pA = pV;
+ for (j = 0; j < dim_vec; j++)
+ {
+ q15_t inA = *pA++;
+ q15_t inB = *pB++;
+ ip_out += inA * inB;
+ }
+ *pO++ = (q15_t) __SSAT((ip_out >> out_shift), 16);
+
+ rowCnt--;
+ }
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to ARM_MATH_SUCCESS */
+ return (ARM_MATH_SUCCESS);
+
+}
+
+/**
+ * @} end of FC group
+ */
diff --git a/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c b/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c
new file mode 100644
index 0000000..e3095bd
--- /dev/null
+++ b/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c
@@ -0,0 +1,211 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_fully_connected_q7.c
+ * Description: Q7 basic fully-connected layer function
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup FC
+ * @{
+ */
+
+ /**
+ * @brief Q7 basic fully-connected layer function
+ * @param[in] pV pointer to input vector
+ * @param[in] pM pointer to matrix weights
+ * @param[in] dim_vec length of the vector
+ * @param[in] num_of_rows number of rows in weight matrix
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias pointer to bias
+ * @param[in,out] pOut pointer to output vector
+ * @param[in,out] vec_buffer pointer to buffer space for input
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * vec_buffer size: dim_vec
+ *
+ * This basic function is designed to work with regular weight
+ * matrix without interleaving.
+ *
+ */
+
+arm_status
+arm_fully_connected_q7(const q7_t * pV,
+ const q7_t * pM,
+ const uint16_t dim_vec,
+ const uint16_t num_of_rows,
+ const uint16_t bias_shift,
+ const uint16_t out_shift, const q7_t * bias, q7_t * pOut, q15_t * vec_buffer)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ const q7_t *pB = pM;
+ const q7_t *pB2;
+ q7_t *pO = pOut;
+ const q7_t *pBias = bias;
+ q15_t *pA;
+ uint16_t rowCnt = num_of_rows >> 1;
+
+ /* expand the vector into the buffer */
+ arm_q7_to_q15_reordered_no_shift(pV, vec_buffer, dim_vec);
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+#endif
+ uint16_t colCnt = dim_vec >> 2;
+
+ pA = vec_buffer;
+ pB2 = pB + dim_vec;
+
+ while (colCnt)
+ {
+ q31_t inV, inM11, inM12, inM21, inM22;
+ pB = (q7_t *) read_and_pad_reordered((void *)pB, &inM11, &inM12);
+ pB2 = (q7_t *) read_and_pad_reordered((void *)pB2, &inM21, &inM22);
+
+ inV = *__SIMD32(pA)++;
+
+ sum = __SMLAD(inV, inM11, sum);
+ sum2 = __SMLAD(inV, inM21, sum2);
+
+ inV = *__SIMD32(pA)++;
+
+ sum = __SMLAD(inV, inM12, sum);
+ sum2 = __SMLAD(inV, inM22, sum2);
+
+ colCnt--;
+ }
+ colCnt = dim_vec & 0x3;
+ while (colCnt)
+ {
+ q7_t inV = *pA++;
+ q15_t inM = *pB++;
+ q15_t inM2 = *pB2++;
+
+ sum += inV * inM;
+ sum2 += inV * inM2;
+ colCnt--;
+ } /* while over colCnt */
+ *pO++ = (q7_t) (__SSAT((sum >> out_shift), 8));
+ *pO++ = (q7_t) (__SSAT((sum2 >> out_shift), 8));
+
+ /* adjust the pointers and counters */
+ pB += dim_vec;
+ rowCnt--;
+ }
+
+ /* left-over part of the rows */
+ rowCnt = num_of_rows & 0x1;
+
+ while (rowCnt)
+ {
+ uint16_t colCnt = dim_vec >> 2;
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+#endif
+
+ pA = vec_buffer;
+
+ while (colCnt)
+ {
+ q31_t inV1, inV2, inM11, inM12;
+
+ pB = (q7_t *) read_and_pad_reordered((void *)pB, &inM11, &inM12);
+
+ inV1 = *__SIMD32(pA)++;
+ sum = __SMLAD(inV1, inM11, sum);
+
+ inV2 = *__SIMD32(pA)++;
+ sum = __SMLAD(inV2, inM12, sum);
+
+ colCnt--;
+ }
+
+ /* left-over of the vector */
+ colCnt = dim_vec & 0x3;
+ while (colCnt)
+ {
+ q7_t inV = *pA++;
+ q15_t inM = *pB++;
+ sum += inV * inM;
+ colCnt--;
+ }
+
+ *pO++ = (q7_t) (__SSAT((sum >> out_shift), 8));
+
+ rowCnt--;
+ }
+
+#else
+ int i, j;
+
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+ for (i = 0; i < num_of_rows; i++)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ int ip_out = ((q31_t)(bias[i]) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ int ip_out = bias[i] << bias_shift;
+#endif
+ for (j = 0; j < dim_vec; j++)
+ {
+ ip_out += pV[j] * pM[i * dim_vec + j];
+ }
+ pOut[i] = (q7_t) __SSAT((ip_out >> out_shift), 8);
+ }
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to ARM_MATH_SUCCESS */
+ return (ARM_MATH_SUCCESS);
+
+}
+
+/**
+ * @} end of FC group
+ */
diff --git a/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c b/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c
new file mode 100644
index 0000000..2dcaf08
--- /dev/null
+++ b/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c
@@ -0,0 +1,506 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_fully_connected_q7_opt.c
+ * Description: Q7 basic fully-connected layer function
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup FC
+ * @{
+ */
+
+ /**
+ * @brief Q7 opt fully-connected layer function
+ * @param[in] pV pointer to input vector
+ * @param[in] pM pointer to matrix weights
+ * @param[in] dim_vec length of the vector
+ * @param[in] num_of_rows number of rows in weight matrix
+ * @param[in] bias_shift amount of left-shift for bias
+ * @param[in] out_shift amount of right-shift for output
+ * @param[in] bias pointer to bias
+ * @param[in,out] pOut pointer to output vector
+ * @param[in,out] vec_buffer pointer to buffer space for input
+ * @return The function returns <code>ARM_MATH_SUCCESS</code>
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * vec_buffer size: dim_vec
+ *
+ * This opt function is designed to work with interleaved weight
+ * matrix. The vector input is assumed in q7_t format, we call
+ * arm_q7_to_q15_no_shift_shuffle function to expand into
+ * q15_t format with certain weight re-ordering, refer to the function
+ * comments for more details.
+ * Here we use only one pointer to read 4 rows in the weight
+ * matrix. So if the original q7_t matrix looks like this:
+ *
+ * | a11 | a12 | a13 | a14 | a15 | a16 | a17 |
+ *
+ * | a21 | a22 | a23 | a24 | a25 | a26 | a27 |
+ *
+ * | a31 | a32 | a33 | a34 | a35 | a36 | a37 |
+ *
+ * | a41 | a42 | a43 | a44 | a45 | a46 | a47 |
+ *
+ * | a51 | a52 | a53 | a54 | a55 | a56 | a57 |
+ *
+ * | a61 | a62 | a63 | a64 | a65 | a66 | a67 |
+ *
+ *
+ * We operates on multiple-of-4 rows, so the first four rows becomes
+ *
+ * | a11 | a21 | a13 | a23 | a31 | a41 | a33 | a43 |
+ *
+ * | a12 | a22 | a14 | a24 | a32 | a42 | a34 | a44 |
+ *
+ * | a15 | a25 | a35 | a45 | a16 | a26 | a36 | a46 |
+ *
+ * So within the kernel, we first read the re-ordered vector in as:
+ *
+ * | b1 | b3 | and | b2 | b4 |
+ *
+ * the four q31_t weights will look like
+ *
+ * | a11 | a13 |, | a21 | a23 |, | a31 | a33 |, | a41 | a43 |
+ *
+ * | a12 | a14 |, | a22 | a24 |, | a32 | a34 |, | a42 | a44 |
+ *
+ * The column left over will be in-order.
+ * which is:
+ *
+ * | a17 | a27 | a37 | a47 |
+ *
+ * For the left-over rows, we do 1x1 computation, so the data remains
+ * as its original order.
+ *
+ * So the stored weight matrix looks like this:
+ *
+ * | a11 | a21 | a13 | a23 | a31 | a41 |
+ *
+ * | a33 | a43 | a12 | a22 | a14 | a24 |
+ *
+ * | a32 | a42 | a34 | a44 | a15 | a25 |
+ *
+ * | a35 | a45 | a16 | a26 | a36 | a46 |
+ *
+ * | a17 | a27 | a37 | a47 | a51 | a52 |
+ *
+ * | a53 | a54 | a55 | a56 | a57 | a61 |
+ *
+ * | a62 | a63 | a64 | a65 | a66 | a67 |
+ *
+ *
+ */
+
+arm_status
+arm_fully_connected_q7_opt(const q7_t * pV,
+ const q7_t * pM,
+ const uint16_t dim_vec,
+ const uint16_t num_of_rows,
+ const uint16_t bias_shift,
+ const uint16_t out_shift,
+ const q7_t * bias,
+ q7_t * pOut,
+ q15_t * vec_buffer)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ const q7_t *pB = pM;
+ q7_t *pO = pOut;
+ const q7_t *pBias = bias;
+ q15_t *pA;
+ uint16_t rowCnt = num_of_rows >> 2;
+
+ arm_q7_to_q15_reordered_no_shift(pV, vec_buffer, dim_vec);
+
+ while (rowCnt)
+ {
+
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+ q31_t sum3 = *pBias++ << bias_shift;
+ q31_t sum4 = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = dim_vec >> 2;
+
+ pA = vec_buffer;
+
+#ifdef USE_INTRINSIC
+
+#ifndef ARM_MATH_BIG_ENDIAN
+ while (colCnt)
+ {
+ q31_t inM11, inM12, inM13, inM14;
+ q31_t inV;
+
+ inV = *__SIMD32(pA)++;
+ inM11 = *__SIMD32(pB)++;
+ inM12 = __SXTB16(__ROR(inM11, 8));
+ inM11 = __SXTB16(inM11);
+ sum = __SMLAD(inM11, inV, sum);
+ sum2 = __SMLAD(inM12, inV, sum2);
+ inM13 = *__SIMD32(pB)++;
+ inM14 = __SXTB16(__ROR(inM13, 8));
+ inM13 = __SXTB16(inM13);
+ sum3 = __SMLAD(inM13, inV, sum3);
+ sum4 = __SMLAD(inM14, inV, sum4);
+
+ inV = *__SIMD32(pA)++;
+ inM11 = *__SIMD32(pB)++;
+ inM12 = __SXTB16(__ROR(inM11, 8));
+ inM11 = __SXTB16(inM11);
+ sum = __SMLAD(inM11, inV, sum);
+ sum2 = __SMLAD(inM12, inV, sum2);
+ inM13 = *__SIMD32(pB)++;
+ inM14 = __SXTB16(__ROR(inM13, 8));
+ inM13 = __SXTB16(inM13);
+ sum3 = __SMLAD(inM13, inV, sum3);
+ sum4 = __SMLAD(inM14, inV, sum4);
+ colCnt--;
+ }
+#else
+ while (colCnt)
+ {
+ q31_t inM11, inM12, inM13, inM14;
+ q31_t inV;
+
+ inV = *__SIMD32(pA)++;
+ inM11 = *__SIMD32(pB)++;
+ inM12 = __SXTB16(__ROR(inM11, 8));
+ inM11 = __SXTB16(inM11);
+ sum = __SMLAD(inM12, inV, sum);
+ sum2 = __SMLAD(inM11, inV, sum2);
+ inM13 = *__SIMD32(pB)++;
+ inM14 = __SXTB16(__ROR(inM13, 8));
+ inM13 = __SXTB16(inM13);
+ sum3 = __SMLAD(inM14, inV, sum3);
+ sum4 = __SMLAD(inM13, inV, sum4);
+
+ inV = *__SIMD32(pA)++;
+ inM11 = *__SIMD32(pB)++;
+ inM12 = __SXTB16(__ROR(inM11, 8));
+ inM11 = __SXTB16(inM11);
+ sum = __SMLAD(inM12, inV, sum);
+ sum2 = __SMLAD(inM11, inV, sum2);
+ inM13 = *__SIMD32(pB)++;
+ inM14 = __SXTB16(__ROR(inM13, 8));
+ inM13 = __SXTB16(inM13);
+ sum3 = __SMLAD(inM14, inV, sum3);
+ sum4 = __SMLAD(inM13, inV, sum4);
+ colCnt--;
+ }
+#endif /* ARM_MATH_BIG_ENDIAN */
+
+#else
+
+ /*
+ * register needed:
+ * loop counter: colCnt
+ * accumulators: sum, sum2, sum3, sum4
+ * pointers: pB, pA
+ * weight data: inM11, inM12, inM13, inM14
+ * activation data: inV
+ */
+
+#ifndef ARM_MATH_BIG_ENDIAN
+ asm volatile ("COL_LOOP_%=:\n"
+ "ldr.w r4, [%[pA]], #8\n"
+ "ldr.w r1, [%[pB]], #16\n"
+ "mov.w r0, r1, ror #8\n"
+ "sxtb16 r0, r0\n"
+ "sxtb16 r1, r1\n"
+ "smlad %[sum], r4, r1, %[sum]\n"
+ "smlad %[sum2], r4, r0, %[sum2]\n"
+ "ldr.w r3, [%[pB], #-12]\n"
+ "mov.w r2, r3, ror #8\n"
+ "sxtb16 r2, r2\n"
+ "sxtb16 r3, r3\n"
+ "smlad %[sum3], r4, r3, %[sum3]\n"
+ "smlad %[sum4], r4, r2, %[sum4]\n"
+ "ldr.w r4, [%[pA], #-4]\n"
+ "ldr.w r1, [%[pB], #-8]\n"
+ "mov.w r0, r1, ror #8\n"
+ "sxtb16 r0, r0\n"
+ "sxtb16 r1, r1\n"
+ "smlad %[sum], r4, r1, %[sum]\n"
+ "smlad %[sum2], r4, r0, %[sum2]\n"
+ "ldr.w r3, [%[pB], #-4]\n"
+ "mov.w r2, r3, ror #8\n"
+ "sxtb16 r2, r2\n"
+ "sxtb16 r3, r3\n"
+ "smlad %[sum3], r4, r3, %[sum3]\n"
+ "smlad %[sum4], r4, r2, %[sum4]\n"
+ "subs %[colCnt], #1\n"
+ "bne COL_LOOP_%=\n":[sum] "+r"(sum),
+ [sum2] "+r"(sum2),[sum3] "+r"(sum3),
+ [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt):"r0", "r1", "r2", "r3", "r4");
+#else
+ asm volatile ("COL_LOOP_%=:\n"
+ "ldr.w r4, [%[pA]], #8\n"
+ "ldr.w r1, [%[pB]], #16\n"
+ "mov.w r0, r1, ror #8\n"
+ "sxtb16 r0, r0\n"
+ "sxtb16 r1, r1\n"
+ "smlad %[sum], r4, r0, %[sum]\n"
+ "smlad %[sum2], r4, r1, %[sum2]\n"
+ "ldr.w r3, [%[pB], #-12]\n"
+ "mov.w r2, r3, ror #8\n"
+ "sxtb16 r2, r2\n"
+ "sxtb16 r3, r3\n"
+ "smlad %[sum3], r4, r2, %[sum3]\n"
+ "smlad %[sum4], r4, r3, %[sum4]\n"
+ "ldr.w r4, [%[pA], #-4]\n"
+ "ldr.w r1, [%[pB], #-8]\n"
+ "mov.w r0, r1, ror #8\n"
+ "sxtb16 r0, r0\n"
+ "sxtb16 r1, r1\n"
+ "smlad %[sum], r4, r0, %[sum]\n"
+ "smlad %[sum2], r4, r1, %[sum2]\n"
+ "ldr.w r3, [%[pB], #-4]\n"
+ "mov.w r2, r3, ror #8\n"
+ "sxtb16 r2, r2\n"
+ "sxtb16 r3, r3\n"
+ "smlad %[sum3], r4, r2, %[sum3]\n"
+ "smlad %[sum4], r4, r3, %[sum4]\n"
+ "subs %[colCnt], #1\n"
+ "bne COL_LOOP_%=\n":[sum] "+r"(sum),
+ [sum2] "+r"(sum2),[sum3] "+r"(sum3),
+ [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt):"r0", "r1", "r2", "r3", "r4");
+#endif /* ARM_MATH_BIG_ENDIAN */
+
+#endif /* USE_INTRINSIC */
+
+ colCnt = dim_vec & 0x3;
+ while (colCnt)
+ {
+ q15_t inV = *pA++;
+ q7_t inM = *pB++;
+ q7_t inM2 = *pB++;
+ q7_t inM3 = *pB++;
+ q7_t inM4 = *pB++;
+
+ sum += inV * inM;
+ sum2 += inV * inM2;
+ sum3 += inV * inM3;
+ sum4 += inV * inM4;
+ colCnt--;
+ } /* while over colCnt */
+ *pO++ = (q7_t) (__SSAT((sum >> out_shift), 8));
+ *pO++ = (q7_t) (__SSAT((sum2 >> out_shift), 8));
+ *pO++ = (q7_t) (__SSAT((sum3 >> out_shift), 8));
+ *pO++ = (q7_t) (__SSAT((sum4 >> out_shift), 8));
+
+ /* adjust the pointers and counters */
+ rowCnt--;
+ }
+
+ /* left-over part of the rows */
+ rowCnt = num_of_rows & 0x3;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+#endif
+ uint16_t colCnt = dim_vec >> 2;
+
+ pA = vec_buffer;
+
+ while (colCnt)
+ {
+ q31_t inV1, inV2, inM11, inM12;
+
+ pB = (q7_t *) read_and_pad_reordered((void *)pB, &inM11, &inM12);
+
+ inV1 = *__SIMD32(pA)++;
+ sum = __SMLAD(inV1, inM11, sum);
+
+ inV2 = *__SIMD32(pA)++;
+ sum = __SMLAD(inV2, inM12, sum);
+
+ colCnt--;
+ }
+
+ /* left-over of the vector */
+ colCnt = dim_vec & 0x3;
+ while (colCnt)
+ {
+ q15_t inV = *pA++;
+ q7_t inM = *pB++;
+ sum += inV * inM;
+ colCnt--;
+ }
+
+ *pO++ = (q7_t) (__SSAT((sum >> out_shift), 8));
+
+ rowCnt--;
+ }
+
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+ uint16_t rowCnt = num_of_rows >> 2;
+ const q7_t *pB = pM;
+ const q7_t *pA;
+ q7_t *pO = pOut;
+ const q7_t *pBias = bias;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ q31_t sum = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+ q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ q31_t sum = *pBias++ << bias_shift;
+ q31_t sum2 = *pBias++ << bias_shift;
+ q31_t sum3 = *pBias++ << bias_shift;
+ q31_t sum4 = *pBias++ << bias_shift;
+#endif
+
+ uint16_t colCnt = dim_vec >> 2;
+
+ pA = pV;
+
+ while (colCnt)
+ {
+ q7_t inA1 = *pA++;
+ q7_t inA3 = *pA++;
+ q7_t inA2 = *pA++;
+ q7_t inA4 = *pA++;
+
+ q7_t inB1 = *pB++;
+ q7_t inB3 = *pB++;
+ q7_t inB2 = *pB++;
+ q7_t inB4 = *pB++;
+
+ sum += inA1 * inB1 + inA2 * inB2;
+ sum2 += inA1 * inB3 + inA2 * inB4;
+
+ inB1 = *pB++;
+ inB3 = *pB++;
+ inB2 = *pB++;
+ inB4 = *pB++;
+
+ sum3 += inA1 * inB1 + inA2 * inB2;
+ sum4 += inA1 * inB3 + inA2 * inB4;
+
+ inB1 = *pB++;
+ inB3 = *pB++;
+ inB2 = *pB++;
+ inB4 = *pB++;
+
+ sum += inA3 * inB1 + inA4 * inB2;
+ sum2 += inA3 * inB3 + inA4 * inB4;
+
+ inB1 = *pB++;
+ inB3 = *pB++;
+ inB2 = *pB++;
+ inB4 = *pB++;
+
+ sum3 += inA3 * inB1 + inA4 * inB2;
+ sum4 += inA3 * inB3 + inA4 * inB4;
+
+ colCnt--;
+ }
+ colCnt = dim_vec & 0x3;
+ while (colCnt)
+ {
+ q7_t inA = *pA++;
+ q7_t inB = *pB++;
+ sum += inA * inB;
+ inB = *pB++;
+ sum2 += inA * inB;
+ inB = *pB++;
+ sum3 += inA * inB;
+ inB = *pB++;
+ sum4 += inA * inB;
+
+ colCnt--;
+ }
+ *pO++ = (q7_t) __SSAT((sum >> out_shift), 8);
+ *pO++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
+ *pO++ = (q7_t) __SSAT((sum3 >> out_shift), 8);
+ *pO++ = (q7_t) __SSAT((sum4 >> out_shift), 8);
+
+ rowCnt--;
+ }
+
+ rowCnt = num_of_rows & 0x3;
+
+ while (rowCnt)
+ {
+#if defined (ARM_NNUSE_ROUND)
+ int ip_out = ((q31_t)(*pBias++) << bias_shift) + (0x1 << (out_shift-1));
+#else
+ int ip_out = *pBias++ << bias_shift;
+#endif
+
+ int j;
+
+ pA = pV;
+ for (j = 0; j < dim_vec; j++)
+ {
+ q7_t inA = *pA++;
+ q7_t inB = *pB++;
+ ip_out += inA * inB;
+ }
+ *pO++ = (q7_t) __SSAT((ip_out >> out_shift), 8);
+
+ rowCnt--;
+ }
+
+#endif /* ARM_MATH_DSP */
+
+ /* Return to ARM_MATH_SUCCESS */
+ return (ARM_MATH_SUCCESS);
+
+}
+
+/**
+ * @} end of FC group
+ */
diff --git a/CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c b/CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c
new file mode 100644
index 0000000..f9508af
--- /dev/null
+++ b/CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c
@@ -0,0 +1,297 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_nntables.c
+ * Description: Converts the elements of the Q7 vector to Q15 vector without left-shift
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_nnsupportfunctions.h"
+
+/**
+ * @brief tables for various activation functions
+ *
+ * This file include the declaration of common tables.
+ * Most of them are used for activation functions
+ *
+ * Assumption:
+ * Unified table: input is 3.x format, i.e, range of [-8, 8)
+ * sigmoid(8) = 0.9996646498695336
+ * tanh(8) = 0.9999997749296758
+ * The accuracy here should be good enough
+ *
+ * 2-stage HL table:
+ *
+ * The entire input range is divided into two parts:
+ *
+ * Low range table: 0x000x xxxx or 0x111x xxxx
+ * table entry will be the binary number excluding the first
+ * two digits, i.e., 0x0x xxxx or 0x1x xxxx
+ *
+ *
+ *
+ * High range table 0x0010 0000 -- 0x0111 1111
+ * 0x1000 0000 -- 0x1101 1111
+ *
+ * For positive numbers, table entry will be
+ * 0x0010 0000 -- 0x0111 1111 minus 0x0010 0000
+ * i.e., 0x0000 0000 - 0x0101 11111
+ *
+ * same thing for the negative numbers, table entry will be
+ * 0x1000 0000 -- 0x1101 1111 minux 0x0010 0000
+ * i.e., 0x0110 0000 - 0x1011 1111
+ */
+
+const q7_t sigmoidTable_q7[256] = {
+ 0x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e,
+ 0x50, 0x52, 0x53, 0x55, 0x57, 0x59, 0x5a, 0x5c,
+ 0x5e, 0x5f, 0x61, 0x62, 0x63, 0x65, 0x66, 0x67,
+ 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70,
+ 0x71, 0x72, 0x72, 0x73, 0x74, 0x74, 0x75, 0x76,
+ 0x76, 0x77, 0x77, 0x78, 0x78, 0x79, 0x79, 0x7a,
+ 0x7a, 0x7a, 0x7b, 0x7b, 0x7b, 0x7c, 0x7c, 0x7c,
+ 0x7c, 0x7c, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7e,
+ 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+ 0x01, 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
+ 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x04,
+ 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x06,
+ 0x06, 0x06, 0x07, 0x07, 0x08, 0x08, 0x09, 0x09,
+ 0x0a, 0x0a, 0x0b, 0x0c, 0x0c, 0x0d, 0x0e, 0x0e,
+ 0x0f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16,
+ 0x17, 0x19, 0x1a, 0x1b, 0x1d, 0x1e, 0x1f, 0x21,
+ 0x22, 0x24, 0x26, 0x27, 0x29, 0x2b, 0x2d, 0x2e,
+ 0x30, 0x32, 0x34, 0x36, 0x38, 0x3a, 0x3c, 0x3e,
+};
+
+const q15_t sigmoidTable_q15[256] = {
+ 0x4000, 0x4200, 0x43ff, 0x45fc, 0x47f5, 0x49eb, 0x4bdc, 0x4dc8,
+ 0x4fad, 0x518a, 0x5360, 0x552c, 0x56ef, 0x58a8, 0x5a57, 0x5bfb,
+ 0x5d93, 0x5f20, 0x60a1, 0x6216, 0x637f, 0x64db, 0x662b, 0x676f,
+ 0x68a6, 0x69d2, 0x6af1, 0x6c05, 0x6d0d, 0x6e09, 0x6efb, 0x6fe2,
+ 0x70be, 0x7190, 0x7258, 0x7316, 0x73cc, 0x7478, 0x751b, 0x75b7,
+ 0x764a, 0x76d6, 0x775b, 0x77d8, 0x784f, 0x78c0, 0x792a, 0x798f,
+ 0x79ee, 0x7a48, 0x7a9d, 0x7aed, 0x7b39, 0x7b80, 0x7bc4, 0x7c03,
+ 0x7c3f, 0x7c78, 0x7cad, 0x7ce0, 0x7d0f, 0x7d3c, 0x7d66, 0x7d8d,
+ 0x7db3, 0x7dd6, 0x7df7, 0x7e16, 0x7e33, 0x7e4f, 0x7e69, 0x7e81,
+ 0x7e98, 0x7eae, 0x7ec2, 0x7ed5, 0x7ee7, 0x7ef8, 0x7f08, 0x7f17,
+ 0x7f25, 0x7f32, 0x7f3e, 0x7f4a, 0x7f55, 0x7f5f, 0x7f69, 0x7f72,
+ 0x7f7b, 0x7f83, 0x7f8a, 0x7f91, 0x7f98, 0x7f9e, 0x7fa4, 0x7faa,
+ 0x7faf, 0x7fb4, 0x7fb8, 0x7fbd, 0x7fc1, 0x7fc5, 0x7fc8, 0x7fcc,
+ 0x7fcf, 0x7fd2, 0x7fd5, 0x7fd7, 0x7fda, 0x7fdc, 0x7fde, 0x7fe0,
+ 0x7fe2, 0x7fe4, 0x7fe6, 0x7fe7, 0x7fe9, 0x7fea, 0x7feb, 0x7fed,
+ 0x7fee, 0x7fef, 0x7ff0, 0x7ff1, 0x7ff2, 0x7ff3, 0x7ff4, 0x7ff4,
+ 0x000b, 0x000c, 0x000c, 0x000d, 0x000e, 0x000f, 0x0010, 0x0011,
+ 0x0012, 0x0013, 0x0015, 0x0016, 0x0017, 0x0019, 0x001a, 0x001c,
+ 0x001e, 0x0020, 0x0022, 0x0024, 0x0026, 0x0029, 0x002b, 0x002e,
+ 0x0031, 0x0034, 0x0038, 0x003b, 0x003f, 0x0043, 0x0048, 0x004c,
+ 0x0051, 0x0056, 0x005c, 0x0062, 0x0068, 0x006f, 0x0076, 0x007d,
+ 0x0085, 0x008e, 0x0097, 0x00a1, 0x00ab, 0x00b6, 0x00c2, 0x00ce,
+ 0x00db, 0x00e9, 0x00f8, 0x0108, 0x0119, 0x012b, 0x013e, 0x0152,
+ 0x0168, 0x017f, 0x0197, 0x01b1, 0x01cd, 0x01ea, 0x0209, 0x022a,
+ 0x024d, 0x0273, 0x029a, 0x02c4, 0x02f1, 0x0320, 0x0353, 0x0388,
+ 0x03c1, 0x03fd, 0x043c, 0x0480, 0x04c7, 0x0513, 0x0563, 0x05b8,
+ 0x0612, 0x0671, 0x06d6, 0x0740, 0x07b1, 0x0828, 0x08a5, 0x092a,
+ 0x09b6, 0x0a49, 0x0ae5, 0x0b88, 0x0c34, 0x0cea, 0x0da8, 0x0e70,
+ 0x0f42, 0x101e, 0x1105, 0x11f7, 0x12f3, 0x13fb, 0x150f, 0x162e,
+ 0x175a, 0x1891, 0x19d5, 0x1b25, 0x1c81, 0x1dea, 0x1f5f, 0x20e0,
+ 0x226d, 0x2405, 0x25a9, 0x2758, 0x2911, 0x2ad4, 0x2ca0, 0x2e76,
+ 0x3053, 0x3238, 0x3424, 0x3615, 0x380b, 0x3a04, 0x3c01, 0x3e00,
+};
+
+const q15_t sigmoidLTable_q15[128] = {
+ 0x4000, 0x4100, 0x4200, 0x42ff, 0x43ff, 0x44fd, 0x45fc, 0x46f9,
+ 0x47f5, 0x48f1, 0x49eb, 0x4ae5, 0x4bdc, 0x4cd3, 0x4dc8, 0x4ebb,
+ 0x4fad, 0x509c, 0x518a, 0x5276, 0x5360, 0x5447, 0x552c, 0x560f,
+ 0x56ef, 0x57cd, 0x58a8, 0x5981, 0x5a57, 0x5b2a, 0x5bfb, 0x5cc9,
+ 0x5d93, 0x5e5b, 0x5f20, 0x5fe2, 0x60a1, 0x615d, 0x6216, 0x62cc,
+ 0x637f, 0x642e, 0x64db, 0x6584, 0x662b, 0x66ce, 0x676f, 0x680c,
+ 0x68a6, 0x693d, 0x69d2, 0x6a63, 0x6af1, 0x6b7c, 0x6c05, 0x6c8a,
+ 0x6d0d, 0x6d8d, 0x6e09, 0x6e84, 0x6efb, 0x6f70, 0x6fe2, 0x7051,
+ 0x0f42, 0x0faf, 0x101e, 0x1090, 0x1105, 0x117c, 0x11f7, 0x1273,
+ 0x12f3, 0x1376, 0x13fb, 0x1484, 0x150f, 0x159d, 0x162e, 0x16c3,
+ 0x175a, 0x17f4, 0x1891, 0x1932, 0x19d5, 0x1a7c, 0x1b25, 0x1bd2,
+ 0x1c81, 0x1d34, 0x1dea, 0x1ea3, 0x1f5f, 0x201e, 0x20e0, 0x21a5,
+ 0x226d, 0x2337, 0x2405, 0x24d6, 0x25a9, 0x267f, 0x2758, 0x2833,
+ 0x2911, 0x29f1, 0x2ad4, 0x2bb9, 0x2ca0, 0x2d8a, 0x2e76, 0x2f64,
+ 0x3053, 0x3145, 0x3238, 0x332d, 0x3424, 0x351b, 0x3615, 0x370f,
+ 0x380b, 0x3907, 0x3a04, 0x3b03, 0x3c01, 0x3d01, 0x3e00, 0x3f00,
+};
+
+const q15_t sigmoidHTable_q15[192] = {
+ 0x70be, 0x7190, 0x7258, 0x7316, 0x73cc, 0x7478, 0x751b, 0x75b7,
+ 0x764a, 0x76d6, 0x775b, 0x77d8, 0x784f, 0x78c0, 0x792a, 0x798f,
+ 0x79ee, 0x7a48, 0x7a9d, 0x7aed, 0x7b39, 0x7b80, 0x7bc4, 0x7c03,
+ 0x7c3f, 0x7c78, 0x7cad, 0x7ce0, 0x7d0f, 0x7d3c, 0x7d66, 0x7d8d,
+ 0x7db3, 0x7dd6, 0x7df7, 0x7e16, 0x7e33, 0x7e4f, 0x7e69, 0x7e81,
+ 0x7e98, 0x7eae, 0x7ec2, 0x7ed5, 0x7ee7, 0x7ef8, 0x7f08, 0x7f17,
+ 0x7f25, 0x7f32, 0x7f3e, 0x7f4a, 0x7f55, 0x7f5f, 0x7f69, 0x7f72,
+ 0x7f7b, 0x7f83, 0x7f8a, 0x7f91, 0x7f98, 0x7f9e, 0x7fa4, 0x7faa,
+ 0x7faf, 0x7fb4, 0x7fb8, 0x7fbd, 0x7fc1, 0x7fc5, 0x7fc8, 0x7fcc,
+ 0x7fcf, 0x7fd2, 0x7fd5, 0x7fd7, 0x7fda, 0x7fdc, 0x7fde, 0x7fe0,
+ 0x7fe2, 0x7fe4, 0x7fe6, 0x7fe7, 0x7fe9, 0x7fea, 0x7feb, 0x7fed,
+ 0x7fee, 0x7fef, 0x7ff0, 0x7ff1, 0x7ff2, 0x7ff3, 0x7ff4, 0x7ff4,
+ 0x000b, 0x000c, 0x000c, 0x000d, 0x000e, 0x000f, 0x0010, 0x0011,
+ 0x0012, 0x0013, 0x0015, 0x0016, 0x0017, 0x0019, 0x001a, 0x001c,
+ 0x001e, 0x0020, 0x0022, 0x0024, 0x0026, 0x0029, 0x002b, 0x002e,
+ 0x0031, 0x0034, 0x0038, 0x003b, 0x003f, 0x0043, 0x0048, 0x004c,
+ 0x0051, 0x0056, 0x005c, 0x0062, 0x0068, 0x006f, 0x0076, 0x007d,
+ 0x0085, 0x008e, 0x0097, 0x00a1, 0x00ab, 0x00b6, 0x00c2, 0x00ce,
+ 0x00db, 0x00e9, 0x00f8, 0x0108, 0x0119, 0x012b, 0x013e, 0x0152,
+ 0x0168, 0x017f, 0x0197, 0x01b1, 0x01cd, 0x01ea, 0x0209, 0x022a,
+ 0x024d, 0x0273, 0x029a, 0x02c4, 0x02f1, 0x0320, 0x0353, 0x0388,
+ 0x03c1, 0x03fd, 0x043c, 0x0480, 0x04c7, 0x0513, 0x0563, 0x05b8,
+ 0x0612, 0x0671, 0x06d6, 0x0740, 0x07b1, 0x0828, 0x08a5, 0x092a,
+ 0x09b6, 0x0a49, 0x0ae5, 0x0b88, 0x0c34, 0x0cea, 0x0da8, 0x0e70,
+};
+
+const q7_t tanhTable_q7[256] = {
+ 0x00, 0x08, 0x10, 0x18, 0x1f, 0x27, 0x2e, 0x35,
+ 0x3b, 0x41, 0x47, 0x4c, 0x51, 0x56, 0x5a, 0x5e,
+ 0x61, 0x65, 0x68, 0x6a, 0x6d, 0x6f, 0x71, 0x72,
+ 0x74, 0x75, 0x76, 0x78, 0x78, 0x79, 0x7a, 0x7b,
+ 0x7b, 0x7c, 0x7c, 0x7d, 0x7d, 0x7e, 0x7e, 0x7e,
+ 0x7e, 0x7e, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x81,
+ 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x82,
+ 0x82, 0x82, 0x82, 0x82, 0x83, 0x83, 0x84, 0x84,
+ 0x85, 0x85, 0x86, 0x87, 0x88, 0x88, 0x8a, 0x8b,
+ 0x8c, 0x8e, 0x8f, 0x91, 0x93, 0x96, 0x98, 0x9b,
+ 0x9f, 0xa2, 0xa6, 0xaa, 0xaf, 0xb4, 0xb9, 0xbf,
+ 0xc5, 0xcb, 0xd2, 0xd9, 0xe1, 0xe8, 0xf0, 0xf8,
+};
+
+const q15_t tanhTable_q15[256] = {
+ 0x0000, 0x07fd, 0x0feb, 0x17b9, 0x1f59, 0x26bf, 0x2ddf, 0x34ae,
+ 0x3b27, 0x4142, 0x46fd, 0x4c56, 0x514d, 0x55e2, 0x5a1a, 0x5df6,
+ 0x617c, 0x64b0, 0x6797, 0x6a37, 0x6c95, 0x6eb5, 0x709e, 0x7254,
+ 0x73dc, 0x753a, 0x7672, 0x7788, 0x787f, 0x795b, 0x7a1e, 0x7acb,
+ 0x7b65, 0x7bee, 0x7c66, 0x7cd1, 0x7d30, 0x7d84, 0x7dce, 0x7e0f,
+ 0x7e49, 0x7e7d, 0x7eaa, 0x7ed2, 0x7ef5, 0x7f14, 0x7f30, 0x7f48,
+ 0x7f5e, 0x7f71, 0x7f82, 0x7f91, 0x7f9e, 0x7fa9, 0x7fb3, 0x7fbc,
+ 0x7fc4, 0x7fcb, 0x7fd1, 0x7fd7, 0x7fdc, 0x7fe0, 0x7fe4, 0x7fe7,
+ 0x7fea, 0x7fed, 0x7fef, 0x7ff1, 0x7ff3, 0x7ff4, 0x7ff6, 0x7ff7,
+ 0x7ff8, 0x7ff9, 0x7ffa, 0x7ffa, 0x7ffb, 0x7ffc, 0x7ffc, 0x7ffd,
+ 0x7ffd, 0x7ffd, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7fff, 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
+ 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
+ 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
+ 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
+ 0x8000, 0x8000, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001,
+ 0x8001, 0x8001, 0x8001, 0x8002, 0x8002, 0x8002, 0x8002, 0x8003,
+ 0x8003, 0x8003, 0x8004, 0x8004, 0x8005, 0x8006, 0x8006, 0x8007,
+ 0x8008, 0x8009, 0x800a, 0x800c, 0x800d, 0x800f, 0x8011, 0x8013,
+ 0x8016, 0x8019, 0x801c, 0x8020, 0x8024, 0x8029, 0x802f, 0x8035,
+ 0x803c, 0x8044, 0x804d, 0x8057, 0x8062, 0x806f, 0x807e, 0x808f,
+ 0x80a2, 0x80b8, 0x80d0, 0x80ec, 0x810b, 0x812e, 0x8156, 0x8183,
+ 0x81b7, 0x81f1, 0x8232, 0x827c, 0x82d0, 0x832f, 0x839a, 0x8412,
+ 0x849b, 0x8535, 0x85e2, 0x86a5, 0x8781, 0x8878, 0x898e, 0x8ac6,
+ 0x8c24, 0x8dac, 0x8f62, 0x914b, 0x936b, 0x95c9, 0x9869, 0x9b50,
+ 0x9e84, 0xa20a, 0xa5e6, 0xaa1e, 0xaeb3, 0xb3aa, 0xb903, 0xbebe,
+ 0xc4d9, 0xcb52, 0xd221, 0xd941, 0xe0a7, 0xe847, 0xf015, 0xf803,
+};
+
+const q15_t tanhLTable_q15[128] = {
+ 0x0000, 0x0400, 0x07fd, 0x0bf7, 0x0feb, 0x13d7, 0x17b9, 0x1b90,
+ 0x1f59, 0x2314, 0x26bf, 0x2a58, 0x2ddf, 0x3151, 0x34ae, 0x37f6,
+ 0x3b27, 0x3e40, 0x4142, 0x442c, 0x46fd, 0x49b6, 0x4c56, 0x4edd,
+ 0x514d, 0x53a3, 0x55e2, 0x580a, 0x5a1a, 0x5c13, 0x5df6, 0x5fc4,
+ 0x617c, 0x6320, 0x64b0, 0x662d, 0x6797, 0x68f0, 0x6a37, 0x6b6e,
+ 0x6c95, 0x6dac, 0x6eb5, 0x6fb0, 0x709e, 0x717f, 0x7254, 0x731e,
+ 0x73dc, 0x7490, 0x753a, 0x75da, 0x7672, 0x7701, 0x7788, 0x7807,
+ 0x787f, 0x78f0, 0x795b, 0x79bf, 0x7a1e, 0x7a77, 0x7acb, 0x7b1b,
+ 0x849b, 0x84e5, 0x8535, 0x8589, 0x85e2, 0x8641, 0x86a5, 0x8710,
+ 0x8781, 0x87f9, 0x8878, 0x88ff, 0x898e, 0x8a26, 0x8ac6, 0x8b70,
+ 0x8c24, 0x8ce2, 0x8dac, 0x8e81, 0x8f62, 0x9050, 0x914b, 0x9254,
+ 0x936b, 0x9492, 0x95c9, 0x9710, 0x9869, 0x99d3, 0x9b50, 0x9ce0,
+ 0x9e84, 0xa03c, 0xa20a, 0xa3ed, 0xa5e6, 0xa7f6, 0xaa1e, 0xac5d,
+ 0xaeb3, 0xb123, 0xb3aa, 0xb64a, 0xb903, 0xbbd4, 0xbebe, 0xc1c0,
+ 0xc4d9, 0xc80a, 0xcb52, 0xceaf, 0xd221, 0xd5a8, 0xd941, 0xdcec,
+ 0xe0a7, 0xe470, 0xe847, 0xec29, 0xf015, 0xf409, 0xf803, 0xfc00,
+};
+
+const q15_t tanhHTable_q15[192] = {
+ 0x7b65, 0x7bee, 0x7c66, 0x7cd1, 0x7d30, 0x7d84, 0x7dce, 0x7e0f,
+ 0x7e49, 0x7e7d, 0x7eaa, 0x7ed2, 0x7ef5, 0x7f14, 0x7f30, 0x7f48,
+ 0x7f5e, 0x7f71, 0x7f82, 0x7f91, 0x7f9e, 0x7fa9, 0x7fb3, 0x7fbc,
+ 0x7fc4, 0x7fcb, 0x7fd1, 0x7fd7, 0x7fdc, 0x7fe0, 0x7fe4, 0x7fe7,
+ 0x7fea, 0x7fed, 0x7fef, 0x7ff1, 0x7ff3, 0x7ff4, 0x7ff6, 0x7ff7,
+ 0x7ff8, 0x7ff9, 0x7ffa, 0x7ffa, 0x7ffb, 0x7ffc, 0x7ffc, 0x7ffd,
+ 0x7ffd, 0x7ffd, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7fff, 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
+ 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
+ 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
+ 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
+ 0x8000, 0x8000, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001,
+ 0x8001, 0x8001, 0x8001, 0x8002, 0x8002, 0x8002, 0x8002, 0x8003,
+ 0x8003, 0x8003, 0x8004, 0x8004, 0x8005, 0x8006, 0x8006, 0x8007,
+ 0x8008, 0x8009, 0x800a, 0x800c, 0x800d, 0x800f, 0x8011, 0x8013,
+ 0x8016, 0x8019, 0x801c, 0x8020, 0x8024, 0x8029, 0x802f, 0x8035,
+ 0x803c, 0x8044, 0x804d, 0x8057, 0x8062, 0x806f, 0x807e, 0x808f,
+ 0x80a2, 0x80b8, 0x80d0, 0x80ec, 0x810b, 0x812e, 0x8156, 0x8183,
+ 0x81b7, 0x81f1, 0x8232, 0x827c, 0x82d0, 0x832f, 0x839a, 0x8412,
+};
diff --git a/CMSIS/NN/Source/NNSupportFunctions/arm_pool_q7_HWC.c b/CMSIS/NN/Source/NNSupportFunctions/arm_pool_q7_HWC.c
new file mode 100644
index 0000000..cd4d2ec
--- /dev/null
+++ b/CMSIS/NN/Source/NNSupportFunctions/arm_pool_q7_HWC.c
@@ -0,0 +1,448 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_pool_q7_HWC.c
+ * Description: Pooling function implementations
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+#if defined (ARM_MATH_DSP)
+
+/**
+ * @brief A few utility functions used by pooling functions
+ *
+ *
+ */
+
+static void buffer_scale_back_q15_to_q7(q15_t * buffer, q7_t * target, uint16_t length, uint16_t scale)
+{
+ int i;
+
+ for (i = 0; i < length; i++)
+ {
+ target[i] = (q7_t) (buffer[i] / scale);
+ }
+}
+
+static void compare_and_replace_if_larger_q7(q7_t * base, // base data
+ q7_t * target, // compare target
+ const uint16_t length // data length
+ )
+{
+ q7_t *pIn = base;
+ q7_t *pCom = target;
+ union arm_nnword in;
+ union arm_nnword com;
+ uint16_t cnt = length >> 2;
+
+ while (cnt > 0u)
+ {
+ in.word = *__SIMD32(pIn);
+ com.word = *__SIMD32(pCom)++;
+
+ // if version
+ if (com.bytes[0] > in.bytes[0])
+ in.bytes[0] = com.bytes[0];
+ if (com.bytes[1] > in.bytes[1])
+ in.bytes[1] = com.bytes[1];
+ if (com.bytes[2] > in.bytes[2])
+ in.bytes[2] = com.bytes[2];
+ if (com.bytes[3] > in.bytes[3])
+ in.bytes[3] = com.bytes[3];
+
+ *__SIMD32(pIn)++ = in.word;
+
+ cnt--;
+ }
+}
+
+static void accumulate_q7_to_q15(q15_t * base, q7_t * target, const uint16_t length)
+{
+ q15_t *pCnt = base;
+ q7_t *pV = target;
+ q31_t v1, v2, vo1, vo2;
+ uint16_t cnt = length >> 2;
+ q31_t in;
+
+ while (cnt > 0u)
+ {
+ q31_t value = *__SIMD32(pV)++;
+ v1 = __SXTB16(__ROR(value, 8));
+ v2 = __SXTB16(value);
+#ifndef ARM_MATH_BIG_ENDIAN
+
+ vo2 = __PKHTB(v1, v2, 16);
+ vo1 = __PKHBT(v2, v1, 16);
+
+#else
+
+ vo1 = __PKHTB(v1, v2, 16);
+ vo2 = __PKHBT(v2, v1, 16);
+
+#endif
+
+ in = *__SIMD32(pCnt);
+ *__SIMD32(pCnt)++ = __QADD16(vo1, in);
+
+ in = *__SIMD32(pCnt);
+ *__SIMD32(pCnt)++ = __QADD16(vo2, in);
+
+ cnt--;
+ }
+ cnt = length & 0x3;
+ while (cnt > 0u)
+ {
+ *pCnt++ += *pV++;
+ cnt--;
+ }
+}
+
+#endif // ARM_MATH_DSP
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup Pooling
+ * @{
+ */
+
+ /**
+ * @brief Q7 max pooling function
+ * @param[in, out] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input
+ * @param[in,out] Im_out pointer to output tensor
+ * @return none.
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * bufferA size: 0
+ *
+ * The pooling function is implemented as split x-pooling then
+ * y-pooling.
+ *
+ * This pooling function is input-destructive. Input data is undefined
+ * after calling this function.
+ *
+ */
+
+void
+arm_maxpool_q7_HWC(q7_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride, const uint16_t dim_im_out, q7_t * bufferA, q7_t * Im_out)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ int16_t i_x, i_y;
+
+ /* first does the pooling along x axis */
+ for (i_y = 0; i_y < dim_im_in; i_y++)
+ {
+
+ for (i_x = 0; i_x < dim_im_out; i_x++)
+ {
+ /* for each output pixel */
+ q7_t *target = Im_in + (i_y * dim_im_in + i_x) * ch_im_in;
+ q7_t *win_start;
+ q7_t *win_stop;
+ if (i_x * stride - padding < 0)
+ {
+ win_start = target;
+ } else
+ {
+ win_start = Im_in + (i_y * dim_im_in + i_x * stride - padding) * ch_im_in;
+ }
+
+ if (i_x * stride - padding + dim_kernel >= dim_im_in)
+ {
+ win_stop = Im_in + (i_y * dim_im_in + dim_im_in) * ch_im_in;
+ } else
+ {
+ win_stop = Im_in + (i_y * dim_im_in + i_x * stride - padding + dim_kernel) * ch_im_in;
+ }
+
+ /* first step is to copy over initial data */
+ /* arm_copy_q7(win_start, target, ch_im_in); */
+ memmove(target, win_start, ch_im_in);
+
+ /* start the max operation from the second part */
+ win_start += ch_im_in;
+ for (; win_start < win_stop; win_start += ch_im_in)
+ {
+ compare_and_replace_if_larger_q7(target, win_start, ch_im_in);
+ }
+ }
+ }
+
+ /* then does the pooling along y axis */
+ for (i_y = 0; i_y < dim_im_out; i_y++)
+ {
+
+ /* for each output row */
+ q7_t *target = Im_out + i_y * dim_im_out * ch_im_in;
+ q7_t *row_start;
+ q7_t *row_end;
+ /* setting the starting row */
+ if (i_y * stride - padding < 0)
+ {
+ row_start = Im_in;
+ } else
+ {
+ row_start = Im_in + (i_y * stride - padding) * dim_im_in * ch_im_in;
+ }
+ /* setting the stopping row */
+ if (i_y * stride - padding + dim_kernel >= dim_im_in)
+ {
+ row_end = Im_in + dim_im_in * dim_im_in * ch_im_in;
+ } else
+ {
+ row_end = Im_in + (i_y * stride - padding + dim_kernel) * dim_im_in * ch_im_in;
+ }
+
+ /* copy over the first row */
+ /* arm_copy_q7(row_start, target, dim_im_out * ch_im_in); */
+ memmove(target, row_start, dim_im_out * ch_im_in);
+
+ /* move over to next row */
+ row_start += ch_im_in * dim_im_in;
+
+ for (; row_start < row_end; row_start += dim_im_in * ch_im_in)
+ {
+ compare_and_replace_if_larger_q7(target, row_start, dim_im_out * ch_im_in);
+ }
+ }
+
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+
+ int16_t i_ch_in, i_x, i_y;
+ int16_t k_x, k_y;
+
+ for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
+ {
+ for (i_y = 0; i_y < dim_im_out; i_y++)
+ {
+ for (i_x = 0; i_x < dim_im_out; i_x++)
+ {
+ int max = -129;
+ for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
+ {
+ for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
+ {
+ if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
+ {
+ if (Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)] > max)
+ {
+ max = Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
+ }
+ }
+ }
+ }
+ Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = max;
+ }
+ }
+ }
+
+#endif /* ARM_MATH_DSP */
+
+}
+
+ /**
+ * @brief Q7 average pooling function
+ * @param[in,out] Im_in pointer to input tensor
+ * @param[in] dim_im_in input tensor dimention
+ * @param[in] ch_im_in number of input tensor channels
+ * @param[in] dim_kernel filter kernel size
+ * @param[in] padding padding sizes
+ * @param[in] stride convolution stride
+ * @param[in] dim_im_out output tensor dimension
+ * @param[in,out] bufferA pointer to buffer space for input
+ * @param[in,out] Im_out pointer to output tensor
+ * @return none.
+ *
+ * @details
+ *
+ * <b>Buffer size:</b>
+ *
+ * bufferA size: 2*dim_im_out*ch_im_in
+ *
+ * The pooling function is implemented as split x-pooling then
+ * y-pooling.
+ *
+ * This pooling function is input-destructive. Input data is undefined
+ * after calling this function.
+ *
+ */
+
+void
+arm_avepool_q7_HWC(q7_t * Im_in,
+ const uint16_t dim_im_in,
+ const uint16_t ch_im_in,
+ const uint16_t dim_kernel,
+ const uint16_t padding,
+ const uint16_t stride, const uint16_t dim_im_out, q7_t * bufferA, q7_t * Im_out)
+{
+
+#if defined (ARM_MATH_DSP)
+ /* Run the following code for Cortex-M4 and Cortex-M7 */
+
+ q15_t *buffer = (q15_t *) bufferA;
+ int16_t i_x, i_y;
+ int16_t count = 0;
+
+ /* first does the pooling along x axis */
+ for (i_y = 0; i_y < dim_im_in; i_y++)
+ {
+
+ for (i_x = 0; i_x < dim_im_out; i_x++)
+ {
+ /* for each output pixel */
+ q7_t *target = Im_in + (i_y * dim_im_in + i_x) * ch_im_in;
+ q7_t *win_start;
+ q7_t *win_stop;
+ if (i_x * stride - padding < 0)
+ {
+ win_start = target;
+ } else
+ {
+ win_start = Im_in + (i_y * dim_im_in + i_x * stride - padding) * ch_im_in;
+ }
+
+ if (i_x * stride - padding + dim_kernel >= dim_im_in)
+ {
+ win_stop = Im_in + (i_y * dim_im_in + dim_im_in) * ch_im_in;
+ } else
+ {
+ win_stop = Im_in + (i_y * dim_im_in + i_x * stride - padding + dim_kernel) * ch_im_in;
+ }
+
+ /* first step is to copy over initial data */
+ arm_q7_to_q15_no_shift(win_start, buffer, ch_im_in);
+ count = 1;
+
+ /* start the max operation from the second part */
+ win_start += ch_im_in;
+ for (; win_start < win_stop; win_start += ch_im_in)
+ {
+ accumulate_q7_to_q15(buffer, win_start, ch_im_in);
+ count++;
+ }
+ buffer_scale_back_q15_to_q7(buffer, target, ch_im_in, count);
+ }
+ }
+
+ /* then does the pooling along y axis */
+ for (i_y = 0; i_y < dim_im_out; i_y++)
+ {
+ /* for each output row */
+ q7_t *target = Im_out + i_y * dim_im_out * ch_im_in;
+ q7_t *row_start;
+ q7_t *row_end;
+ /* setting the starting row */
+ if (i_y * stride - padding < 0)
+ {
+ row_start = Im_in;
+ } else
+ {
+ row_start = Im_in + (i_y * stride - padding) * dim_im_in * ch_im_in;
+ }
+ /* setting the stopping row */
+ if (i_y * stride - padding + dim_kernel >= dim_im_in)
+ {
+ row_end = Im_in + dim_im_in * dim_im_in * ch_im_in;
+ } else
+ {
+ row_end = Im_in + (i_y * stride - padding + dim_kernel) * dim_im_in * ch_im_in;
+ }
+
+ /* copy over the first row */
+ arm_q7_to_q15_no_shift(row_start, buffer, dim_im_out * ch_im_in);
+ count = 1;
+
+ /* move over to next row */
+ row_start += ch_im_in * dim_im_in;
+
+ for (; row_start < row_end; row_start += dim_im_in * ch_im_in)
+ {
+ accumulate_q7_to_q15(buffer, row_start, dim_im_out * ch_im_in);
+ count++;
+ }
+ buffer_scale_back_q15_to_q7(buffer, target, dim_im_out * ch_im_in, count);
+ }
+
+#else
+ /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
+
+ int16_t i_ch_in, i_x, i_y;
+ int16_t k_x, k_y;
+
+ for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
+ {
+ for (i_y = 0; i_y < dim_im_out; i_y++)
+ {
+ for (i_x = 0; i_x < dim_im_out; i_x++)
+ {
+ int sum = 0;
+ int count = 0;
+ for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
+ {
+ for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
+ {
+ if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
+ {
+ sum += Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
+ count++;
+ }
+ }
+ }
+ Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = sum / count;
+ }
+ }
+ }
+
+#endif /* ARM_MATH_DSP */
+
+}
+
+/**
+ * @} end of Pooling group
+ */
diff --git a/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c b/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c
new file mode 100644
index 0000000..92ba36b
--- /dev/null
+++ b/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c
@@ -0,0 +1,134 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_q7_to_q15_no_shift.c
+ * Description: Converts the elements of the Q7 vector to Q15 vector without left-shift
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_nnsupportfunctions.h"
+
+/**
+ * @ingroup groupSupport
+ */
+
+/**
+ * @addtogroup nndata_convert
+ * @{
+ */
+
+/**
+ * @brief Converts the elements of the Q7 vector to Q15 vector without left-shift
+ * @param[in] *pSrc points to the Q7 input vector
+ * @param[out] *pDst points to the Q15 output vector
+ * @param[in] blockSize length of the input vector
+ * @return none.
+ *
+ * \par Description:
+ *
+ * The equation used for the conversion process is:
+ *
+ * <pre>
+ * pDst[n] = (q15_t) pSrc[n]; 0 <= n < blockSize.
+ * </pre>
+ *
+ */
+
+void arm_q7_to_q15_no_shift(const q7_t * pSrc, q15_t * pDst, uint32_t blockSize)
+{
+ const q7_t *pIn = pSrc; /* Src pointer */
+ uint32_t blkCnt; /* loop counter */
+
+#ifndef ARM_MATH_CM0_FAMILY
+ q31_t in;
+ q31_t in1, in2;
+ q31_t out1, out2;
+
+ /* Run the below code for Cortex-M4 and Cortex-M3 */
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2u;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0u)
+ {
+ /* C = (q15_t) A << 8 */
+ /* convert from q7 to q15 and then store the results in the destination buffer */
+ in = *__SIMD32(pIn)++;
+
+ /* rotatate in by 8 and extend two q7_t values to q15_t values */
+ in1 = __SXTB16(__ROR(in, 8));
+
+ /* extend remainig two q7_t values to q15_t values */
+ in2 = __SXTB16(in);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+ out2 = __PKHTB(in1, in2, 16);
+ out1 = __PKHBT(in2, in1, 16);
+
+#else
+
+ out1 = __PKHTB(in1, in2, 16);
+ out2 = __PKHBT(in2, in1, 16);
+
+#endif
+
+ *__SIMD32(pDst)++ = out1;
+ *__SIMD32(pDst)++ = out2;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4u;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Loop over blockSize number of values */
+ blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
+
+ while (blkCnt > 0u)
+ {
+ /* C = (q15_t) A << 8 */
+ /* convert from q7 to q15 and then store the results in the destination buffer */
+ *pDst++ = (q15_t) * pIn++;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+}
+
+/**
+ * @} end of q7_to_x group
+ */
diff --git a/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c b/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c
new file mode 100644
index 0000000..10150bf
--- /dev/null
+++ b/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c
@@ -0,0 +1,145 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_q7_to_q15_reordered_no_shift.c
+ * Description: Converts the elements of the Q7 vector to reordered Q15 vector without left-shift
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_nnsupportfunctions.h"
+
+/**
+ * @ingroup groupSupport
+ */
+
+/**
+ * @addtogroup nndata_convert
+ * @{
+ */
+
+/**
+ * @brief Converts the elements of the Q7 vector to reordered Q15 vector without left-shift
+ * @param[in] *pSrc points to the Q7 input vector
+ * @param[out] *pDst points to the Q15 output vector
+ * @param[in] blockSize length of the input vector
+ * @return none.
+ *
+ * @details
+ *
+ * This function does the q7 to q15 expansion with re-ordering
+ *
+ * <pre>
+ * | A1 | A2 | A3 | A4 |
+ *
+ * 0 7 8 15 16 23 24 31
+ * </pre>
+ *
+ * is converted into:
+ *
+ * <pre>
+ * | A1 | A3 | and | A2 | A4 |
+ *
+ * 0 15 16 31 0 15 16 31
+ * </pre>
+ *
+ *
+ * This looks strange but is natural considering how sign-extension is done at
+ * assembly level.
+ *
+ * The expansion of other other oprand will follow the same rule so that the end
+ * results are the same.
+ *
+ * The tail (i.e., last (N % 4) elements) will still be in original order.
+ *
+ */
+
+void arm_q7_to_q15_reordered_no_shift(const q7_t * pSrc, q15_t * pDst, uint32_t blockSize)
+{
+ const q7_t *pIn = pSrc; /* Src pointer */
+ uint32_t blkCnt; /* loop counter */
+
+#ifndef ARM_MATH_CM0_FAMILY
+ q31_t in;
+ q31_t in1, in2;
+
+ /* Run the below code for Cortex-M4 and Cortex-M3 */
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2u;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0u)
+ {
+ /* C = (q15_t) A << 8 */
+ /* convert from q7 to q15 and then store the results in the destination buffer */
+ in = *__SIMD32(pIn)++;
+
+ /* rotatate in by 8 and extend two q7_t values to q15_t values */
+ in1 = __SXTB16(__ROR(in, 8));
+
+ /* extend remainig two q7_t values to q15_t values */
+ in2 = __SXTB16(in);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+ *__SIMD32(pDst)++ = in2;
+ *__SIMD32(pDst)++ = in1;
+#else
+ *__SIMD32(pDst)++ = in1;
+ *__SIMD32(pDst)++ = in2;
+#endif
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4u;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Loop over blockSize number of values */
+ blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
+
+ while (blkCnt > 0u)
+ {
+ /* C = (q15_t) A << 8 */
+ /* convert from q7 to q15 and then store the results in the destination buffer */
+ *pDst++ = (q15_t) * pIn++;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+}
+
+/**
+ * @} end of q7_to_x group
+ */
diff --git a/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c b/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c
new file mode 100644
index 0000000..48c8689
--- /dev/null
+++ b/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c
@@ -0,0 +1,108 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_softmax_q15.c
+ * Description: Q15 softmax function
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup Softmax
+ * @{
+ */
+
+ /**
+ * @brief Q15 softmax function
+ * @param[in] vec_in pointer to input vector
+ * @param[in] dim_vec input vector dimention
+ * @param[out] p_out pointer to output vector
+ * @return none.
+ *
+ * @details
+ *
+ * Here, instead of typical e based softmax, we use
+ * 2-based softmax, i.e.,:
+ *
+ * y_i = 2^(x_i) / sum(2^x_j)
+ *
+ * The relative output will be different here.
+ * But mathamatically, the gradient will be the same
+ * with a log(2) scaling factor.
+ *
+ */
+
+void arm_softmax_q15(const q15_t * vec_in, const uint16_t dim_vec, q15_t * p_out)
+{
+ q31_t sum;
+ int16_t i;
+ q31_t min, max;
+ max = -1 * 0x100000;
+ min = 0x100000;
+ for (i = 0; i < dim_vec; i++)
+ {
+ if (vec_in[i] > max)
+ {
+ max = vec_in[i];
+ }
+ if (vec_in[i] < min)
+ {
+ min = vec_in[i];
+ }
+ }
+
+ /* we ignore really small values
+ * anyway, they will be 0 after shrinking
+ * to q7_t
+ */
+ if (max - min > 16)
+ {
+ min = max - 16;
+ }
+
+ sum = 0;
+
+ for (i = 0; i < dim_vec; i++)
+ {
+ sum += 0x1 << (vec_in[i] - min);
+ }
+
+ for (i = 0; i < dim_vec; i++)
+ {
+ /* we leave 7-bit dynamic range, so that 128 -> 100% confidence */
+ p_out[i] = (q15_t) __SSAT(((0x1 << (vec_in[i] - min + 14)) / sum), 16);
+ }
+
+}
+
+/**
+ * @} end of Softmax group
+ */
diff --git a/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c b/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c
new file mode 100644
index 0000000..b0cd16e
--- /dev/null
+++ b/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c
@@ -0,0 +1,108 @@
+/*
+ * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project: CMSIS NN Library
+ * Title: arm_softmax_q7.c
+ * Description: Q7 softmax function
+ *
+ * $Date: 17. January 2018
+ * $Revision: V.1.0.0
+ *
+ * Target Processor: Cortex-M4 and Cortex-M7 cores
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+/**
+ * @ingroup groupNN
+ */
+
+/**
+ * @addtogroup Softmax
+ * @{
+ */
+
+ /**
+ * @brief Q7 softmax function
+ * @param[in] vec_in pointer to input vector
+ * @param[in] dim_vec input vector dimention
+ * @param[out] p_out pointer to output vector
+ * @return none.
+ *
+ * @details
+ *
+ * Here, instead of typical natural logarithm e based softmax, we use
+ * 2-based softmax here, i.e.,:
+ *
+ * y_i = 2^(x_i) / sum(2^x_j)
+ *
+ * The relative output will be different here.
+ * But mathamatically, the gradient will be the same
+ * with a log(2) scaling factor.
+ *
+ */
+
+void arm_softmax_q7(const q7_t * vec_in, const uint16_t dim_vec, q7_t * p_out)
+{
+ q31_t sum;
+ int16_t i;
+ q15_t min, max;
+ max = -257;
+ min = 257;
+ for (i = 0; i < dim_vec; i++)
+ {
+ if (vec_in[i] > max)
+ {
+ max = vec_in[i];
+ }
+ if (vec_in[i] < min)
+ {
+ min = vec_in[i];
+ }
+ }
+
+ /* we ignore really small values
+ * anyway, they will be 0 after shrinking
+ * to q7_t
+ */
+ if (max - min > 8)
+ {
+ min = max - 8;
+ }
+
+ sum = 0;
+
+ for (i = 0; i < dim_vec; i++)
+ {
+ sum += 0x1 << (vec_in[i] - min);
+ }
+
+ for (i = 0; i < dim_vec; i++)
+ {
+ /* we leave 7-bit dynamic range, so that 128 -> 100% confidence */
+ p_out[i] = (q7_t) __SSAT(((0x1 << (vec_in[i] - min + 20)) / sum) >> 13, 8);
+ }
+
+}
+
+/**
+ * @} end of Softmax group
+ */
