diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc
index bf35e29..8cfe5ee 100644
--- a/ARM.CMSIS.pdsc
+++ b/ARM.CMSIS.pdsc
@@ -1827,8 +1827,8 @@
         <file category="include" name="CMSIS/Include/"/>
         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
         <!-- Code template -->
-        <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     select="CMSIS-Core 'main' function for ARMv8-M"/>
-        <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" select="Context Management for ARMv8-M TrustZone" />
+        <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     select="Secure mode 'main' module for ARMv8-M"/>
+        <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" select="RTOS Context Management (TrustZone for ARMv8-M)" />
       </files>
     </component>
 
diff --git a/Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h b/Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h
index e82e5d4..27aff14 100644
--- a/Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h
+++ b/Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h
@@ -1142,7 +1142,7 @@
   #endif /* defined (SCB_CSR_AIRCR_INIT) && (SCB_CSR_AIRCR_INIT == 1U) */
 
   #if defined (__FPU_USED) && (__FPU_USED == 1U) && defined (TZ_FPU_NS_USAGE) && (TZ_FPU_NS_USAGE == 1U)
-    SCB->NSACR |= (0x3U << 10U);  // enable non-secure access to CP10 and CP11
+    SCB->NSACR |= (0x3U << 10U);  /* enable non-secure access to CP10 and CP11 */
   #endif
 
   #if defined (NVIC_INIT_ITNS0) && (NVIC_INIT_ITNS0 == 1U)
diff --git a/Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h b/Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h
index 6457171..c0984ee 100644
--- a/Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h
+++ b/Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h
@@ -1142,7 +1142,7 @@
   #endif /* defined (SCB_CSR_AIRCR_INIT) && (SCB_CSR_AIRCR_INIT == 1U) */
 
   #if defined (__FPU_USED) && (__FPU_USED == 1U) && defined (TZ_FPU_NS_USAGE) && (TZ_FPU_NS_USAGE == 1U)
-    SCB->NSACR |= (0x3U << 10U);  // enable non-secure access to CP10 and CP11
+    SCB->NSACR |= (0x3U << 10U);  /* enable non-secure access to CP10 and CP11 */
   #endif
 
   #if defined (NVIC_INIT_ITNS0) && (NVIC_INIT_ITNS0 == 1U)