commit 724104c61ad09787e1bfd258ce30043899207d74
author Jonatan Antoni <jonatan.antoni@arm.com> Fri Apr 03 16:52:57 2020 +0200
committer Jonatan Antoni <jonatan.antoni@arm.com> Fri Apr 03 16:56:29 2020 +0200
tree 2cee25283f58bc688abe3d6e1508ebcb644840b0
parent b2a65a02c0b124624a8c6ed82b4b1dc42e052b31

Core(A): Fixed file and component versions.

Change-Id: I079f1423436e90209e7c1cb5d408ca44f724c0cf

ARM.CMSIS.pdsc

diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc
index 21751ae..7292ad3 100644
--- a/ARM.CMSIS.pdsc
+++ b/ARM.CMSIS.pdsc
@@ -16,6 +16,10 @@
         - Enhanced MVE support for Armv8.1-MML
         - Fixed device config define checks.
         - L1 Cache functions for Armv7-M and later
+      CMSIS-Core(A): 1.2.0 (see revision history for details)
+        - Fixed GIC_SetPendingIRQ to use GICD_SGIR
+        - Added missing DSP intrinsics
+        - Reworked assembly intrinsics: volatile, barriers and clobber
       CMSIS-DSP: 1.8.0 (see revision history for details)
         - Added new functions and function groups
         - Added MVE support
@@ -2578,7 +2582,7 @@
       </files>
     </component>
 
-    <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
+    <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.0"  condition="ARMv7-A Device" >
       <description>CMSIS-CORE for Cortex-A</description>
       <files>
         <!-- CPU independent -->