diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc
index aed50be..92eb599 100644
--- a/ARM.CMSIS.pdsc
+++ b/ARM.CMSIS.pdsc
@@ -23,6 +23,7 @@
         - Improved MVE performance for fully Connected and max pool operator
         - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
         - Expanded existing unit test suite along with support for FVP
+        - Removed Examples folder
       CMSIS-RTOS2:
         - RTX 5.5.3 (see revision history for details)
       CMSIS-Pack: 1.7.2 (see revision history for details)
@@ -3774,66 +3775,6 @@
       </attributes>
     </example>
 
-    <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
-      <description>Neural Network CIFAR10 example</description>
-      <board name="uVision Simulator" vendor="Keil"/>
-      <project>
-        <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
-      </project>
-      <attributes>
-        <component Cclass="CMSIS" Cgroup="CORE"/>
-        <component Cclass="CMSIS" Cgroup="DSP"/>
-        <component Cclass="CMSIS" Cgroup="NN Lib"/>
-        <component Cclass="Device" Cgroup="Startup"/>
-        <category>Getting Started</category>
-      </attributes>
-    </example>
-
-    <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
-      <description>Neural Network CIFAR10 example</description>
-      <board name="EWARM Simulator" vendor="IAR"/>
-      <project>
-        <environment name="iar" load="NN-example-cifar10.ewp"/>
-      </project>
-      <attributes>
-        <component Cclass="CMSIS" Cgroup="CORE"/>
-        <component Cclass="CMSIS" Cgroup="DSP"/>
-        <component Cclass="CMSIS" Cgroup="NN Lib"/>
-        <component Cclass="Device" Cgroup="Startup"/>
-        <category>Getting Started</category>
-      </attributes>
-    </example>
-
-    <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
-      <description>Neural Network GRU example</description>
-      <board name="uVision Simulator" vendor="Keil"/>
-      <project>
-        <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
-      </project>
-      <attributes>
-        <component Cclass="CMSIS" Cgroup="CORE"/>
-        <component Cclass="CMSIS" Cgroup="DSP"/>
-        <component Cclass="CMSIS" Cgroup="NN Lib"/>
-        <component Cclass="Device" Cgroup="Startup"/>
-        <category>Getting Started</category>
-      </attributes>
-    </example>
-
-    <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
-      <description>Neural Network GRU example</description>
-      <board name="EWARM Simulator" vendor="IAR"/>
-      <project>
-        <environment name="iar" load="NN-example-gru.ewp"/>
-      </project>
-      <attributes>
-        <component Cclass="CMSIS" Cgroup="CORE"/>
-        <component Cclass="CMSIS" Cgroup="DSP"/>
-        <component Cclass="CMSIS" Cgroup="NN Lib"/>
-        <component Cclass="Device" Cgroup="Startup"/>
-        <category>Getting Started</category>
-      </attributes>
-    </example>
-
     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
       <description>CMSIS-RTOS2 Blinky example</description>
       <board name="uVision Simulator" vendor="Keil"/>
diff --git a/CMSIS/DoxyGen/NN/nn.dxy b/CMSIS/DoxyGen/NN/nn.dxy
index ff78a3d..faf1c21 100644
--- a/CMSIS/DoxyGen/NN/nn.dxy
+++ b/CMSIS/DoxyGen/NN/nn.dxy
@@ -750,7 +750,6 @@
 # Note: If this tag is empty the current directory is searched.
 
 INPUT                  = ./src/history.txt      \
-                         ../../NN/Examples/ARM  \
                          ../../NN/Include/      \
                          ../../NN/Source/
 
@@ -852,7 +851,7 @@
 # that contain example code fragments that are included (see the \include
 # command).
 
-EXAMPLE_PATH           = ../../NN/Examples/ARM
+EXAMPLE_PATH           =
 
 # If the value of the EXAMPLE_PATH tag contains directories, you can use the
 # EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
diff --git a/CMSIS/DoxyGen/NN/src/history.txt b/CMSIS/DoxyGen/NN/src/history.txt
index 6da63e0..a800671 100644
--- a/CMSIS/DoxyGen/NN/src/history.txt
+++ b/CMSIS/DoxyGen/NN/src/history.txt
@@ -15,6 +15,7 @@
       the weight offset parameter is expected to be zero<br> </li>
       <li> Added unit test for Softmax </li>
       <li> Added MVE optimiztion for SVDF operator </li>
+      <li> Removed Examples folder </li>
       </ul>
     </td>
   </tr>
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/EventRecorderStub.scvd b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/EventRecorderStub.scvd
deleted file mode 100644
index 2956b29..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/EventRecorderStub.scvd
+++ /dev/null
@@ -1,9 +0,0 @@
-<?xml version="1.0" encoding="utf-8"?>
-
-<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
-
-<component name="EventRecorderStub" version="1.0.0"/>       <!--name and version of the component-->
-  <events>
-  </events>
-
-</component_viewer>
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Compiler/EventRecorderConf.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Compiler/EventRecorderConf.h
deleted file mode 100644
index ddf354d..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Compiler/EventRecorderConf.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*------------------------------------------------------------------------------
- * MDK - Component ::Event Recorder
- * Copyright (c) 2016 ARM Germany GmbH. All rights reserved.
- *------------------------------------------------------------------------------
- * Name:    EventRecorderConf.h
- * Purpose: Event Recorder Configuration
- * Rev.:    V1.0.0
- *----------------------------------------------------------------------------*/
-
-//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
-
-// <h>Event Recorder
-
-//   <o>Number of Records
-//     <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
-//     <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
-//     <65536=>65536 <131072=>131072 <262144=>262144 <524288=>524288
-//     <1048576=>1048576
-//   <i>Configure size of Event Record Buffer (each record is 16 bytes)
-//   <i>Must be 2^n (min=8, max=1048576)
-#define EVENT_RECORD_COUNT      64U
-
-//   <o>Time Stamp Source
-//      <0=> DWT Cycle Counter  <1=> SysTick
-//      <3=> User Timer (Normal Reset)  <4=> User Timer (Power-On Reset)
-//   <i>Selects source for 32-bit time stamp
-#define EVENT_TIMESTAMP_SOURCE  1
-
-//   <h>SysTick Configuration
-//   <i>Configure values when Time Stamp Source is set to SysTick
-
-//     <o>SysTick Input Clock Frequency [Hz] <1-1000000000>
-//     <i>Defines SysTick input clock (typical identical with processor clock)
-#define SYSTICK_CLOCK           100000000U
-
-//     <o>SysTick Interrupt Period [us] <1-1000000000>
-//     <i>Defines time period of the SysTick timer interrupt
-#define SYSTICK_PERIOD_US       1000U
-
-//   </h>
-
-// </h>
-
-//------------- <<< end of configuration section >>> ---------------------------
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/startup_ARMCM0.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/startup_ARMCM0.s
deleted file mode 100644
index 9fc447d..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/startup_ARMCM0.s
+++ /dev/null
@@ -1,242 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM0.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM0 Device Series
-; * @version  V5.00
-; * @date     02. March 2016
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;/*
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-;*/
-
-
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000C00
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
-                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
-                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
-                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
-                DCD     MCIA_IRQHandler           ;  4:  MCIa
-                DCD     MCIB_IRQHandler           ;  5:  MCIb
-                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
-                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
-                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
-                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
-                DCD     AACI_IRQHandler           ; 10: AACI / AC97
-                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
-                DCD     ENET_IRQHandler           ; 12: Ethernet
-                DCD     USBDC_IRQHandler          ; 13: USB Device
-                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
-                DCD     CHLCD_IRQHandler          ; 15: Character LCD
-                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
-                DCD     CAN_IRQHandler            ; 17: CAN
-                DCD     LIN_IRQHandler            ; 18: LIN
-                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
-                DCD     0                         ; 20: Reserved
-                DCD     0                         ; 21: Reserved
-                DCD     0                         ; 22: Reserved
-                DCD     0                         ; 23: Reserved
-                DCD     0                         ; 24: Reserved
-                DCD     0                         ; 25: Reserved
-                DCD     0                         ; 26: Reserved
-                DCD     0                         ; 27: Reserved
-                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
-                DCD     0                         ; 29: Reserved - CPU FPGA
-                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
-                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
-__Vectors_End
-
-__Vectors_Size  EQU     __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  SystemInit
-                IMPORT  __main
-                LDR     R0, =SystemInit
-                BLX     R0
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler               [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler               [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler            [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler           [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WDT_IRQHandler            [WEAK]
-                EXPORT  RTC_IRQHandler            [WEAK]
-                EXPORT  TIM0_IRQHandler           [WEAK]
-                EXPORT  TIM2_IRQHandler           [WEAK]
-                EXPORT  MCIA_IRQHandler           [WEAK]
-                EXPORT  MCIB_IRQHandler           [WEAK]
-                EXPORT  UART0_IRQHandler          [WEAK]
-                EXPORT  UART1_IRQHandler          [WEAK]
-                EXPORT  UART2_IRQHandler          [WEAK]
-                EXPORT  UART3_IRQHandler          [WEAK]
-                EXPORT  UART4_IRQHandler          [WEAK]
-                EXPORT  AACI_IRQHandler           [WEAK]
-                EXPORT  CLCD_IRQHandler           [WEAK]
-                EXPORT  ENET_IRQHandler           [WEAK]
-                EXPORT  USBDC_IRQHandler          [WEAK]
-                EXPORT  USBHC_IRQHandler          [WEAK]
-                EXPORT  CHLCD_IRQHandler          [WEAK]
-                EXPORT  FLEXRAY_IRQHandler        [WEAK]
-                EXPORT  CAN_IRQHandler            [WEAK]
-                EXPORT  LIN_IRQHandler            [WEAK]
-                EXPORT  I2C_IRQHandler            [WEAK]
-                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
-                EXPORT  SPI_IRQHandler            [WEAK]
-
-WDT_IRQHandler
-RTC_IRQHandler
-TIM0_IRQHandler
-TIM2_IRQHandler
-MCIA_IRQHandler
-MCIB_IRQHandler
-UART0_IRQHandler
-UART1_IRQHandler
-UART2_IRQHandler
-UART3_IRQHandler
-UART4_IRQHandler
-AACI_IRQHandler
-CLCD_IRQHandler
-ENET_IRQHandler
-USBDC_IRQHandler
-USBHC_IRQHandler
-CHLCD_IRQHandler
-FLEXRAY_IRQHandler
-CAN_IRQHandler
-LIN_IRQHandler
-I2C_IRQHandler
-CPU_CLCD_IRQHandler
-SPI_IRQHandler
-                B       .
-
-                ENDP
-
-
-                ALIGN
-
-
-; User Initial Stack & Heap
-
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __initial_sp
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-
-                IMPORT  __use_two_region_memory
-                EXPORT  __user_initial_stackheap
-
-__user_initial_stackheap PROC
-                LDR     R0, =  Heap_Mem
-                LDR     R1, =(Stack_Mem + Stack_Size)
-                LDR     R2, = (Heap_Mem +  Heap_Size)
-                LDR     R3, = Stack_Mem
-                BX      LR
-                ENDP
-
-                ALIGN
-
-                ENDIF
-
-
-                END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/system_ARMCM0.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/system_ARMCM0.c
deleted file mode 100644
index 66829ad..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/system_ARMCM0.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/**************************************************************************//**
- * @file     system_ARMCM0.c
- * @brief    CMSIS Device System Source File for
- *           ARMCM0 Device Series
- * @version  V5.00
- * @date     08. April 2016
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ARMCM0.h"
-
-/*----------------------------------------------------------------------------
-  Define clocks
- *----------------------------------------------------------------------------*/
-#define  XTAL            ( 5000000U)      /* Oscillator frequency */
-
-#define  SYSTEM_CLOCK    (5 * XTAL)
-
-
-/*----------------------------------------------------------------------------
-  System Core Clock Variable
- *----------------------------------------------------------------------------*/
-uint32_t SystemCoreClock = SYSTEM_CLOCK;
-
-
-/*----------------------------------------------------------------------------
-  System Core Clock update function
- *----------------------------------------------------------------------------*/
-void SystemCoreClockUpdate (void)
-{
-  SystemCoreClock = SYSTEM_CLOCK;
-}
-
-/*----------------------------------------------------------------------------
-  System initialization function
- *----------------------------------------------------------------------------*/
-void SystemInit (void)
-{
-  SystemCoreClock = SYSTEM_CLOCK;
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/startup_ARMCM3.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/startup_ARMCM3.s
deleted file mode 100644
index 16e56b0..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/startup_ARMCM3.s
+++ /dev/null
@@ -1,262 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM3.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM3 Device Series
-; * @version  V5.00
-; * @date     02. March 2016
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;/*
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-;*/
-
-
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000C00
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     MemManage_Handler         ; MPU Fault Handler
-                DCD     BusFault_Handler          ; Bus Fault Handler
-                DCD     UsageFault_Handler        ; Usage Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     DebugMon_Handler          ; Debug Monitor Handler
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
-                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
-                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
-                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
-                DCD     MCIA_IRQHandler           ;  4:  MCIa
-                DCD     MCIB_IRQHandler           ;  5:  MCIb
-                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
-                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
-                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
-                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
-                DCD     AACI_IRQHandler           ; 10: AACI / AC97
-                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
-                DCD     ENET_IRQHandler           ; 12: Ethernet
-                DCD     USBDC_IRQHandler          ; 13: USB Device
-                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
-                DCD     CHLCD_IRQHandler          ; 15: Character LCD
-                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
-                DCD     CAN_IRQHandler            ; 17: CAN
-                DCD     LIN_IRQHandler            ; 18: LIN
-                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
-                DCD     0                         ; 20: Reserved
-                DCD     0                         ; 21: Reserved
-                DCD     0                         ; 22: Reserved
-                DCD     0                         ; 23: Reserved
-                DCD     0                         ; 24: Reserved
-                DCD     0                         ; 25: Reserved
-                DCD     0                         ; 26: Reserved
-                DCD     0                         ; 27: Reserved
-                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
-                DCD     0                         ; 29: Reserved - CPU FPGA
-                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
-                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
-__Vectors_End
-
-__Vectors_Size  EQU     __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  SystemInit
-                IMPORT  __main
-                LDR     R0, =SystemInit
-                BLX     R0
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler               [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler         [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler         [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler          [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler        [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler               [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler          [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler            [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler           [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WDT_IRQHandler            [WEAK]
-                EXPORT  RTC_IRQHandler            [WEAK]
-                EXPORT  TIM0_IRQHandler           [WEAK]
-                EXPORT  TIM2_IRQHandler           [WEAK]
-                EXPORT  MCIA_IRQHandler           [WEAK]
-                EXPORT  MCIB_IRQHandler           [WEAK]
-                EXPORT  UART0_IRQHandler          [WEAK]
-                EXPORT  UART1_IRQHandler          [WEAK]
-                EXPORT  UART2_IRQHandler          [WEAK]
-                EXPORT  UART3_IRQHandler          [WEAK]
-                EXPORT  UART4_IRQHandler          [WEAK]
-                EXPORT  AACI_IRQHandler           [WEAK]
-                EXPORT  CLCD_IRQHandler           [WEAK]
-                EXPORT  ENET_IRQHandler           [WEAK]
-                EXPORT  USBDC_IRQHandler          [WEAK]
-                EXPORT  USBHC_IRQHandler          [WEAK]
-                EXPORT  CHLCD_IRQHandler          [WEAK]
-                EXPORT  FLEXRAY_IRQHandler        [WEAK]
-                EXPORT  CAN_IRQHandler            [WEAK]
-                EXPORT  LIN_IRQHandler            [WEAK]
-                EXPORT  I2C_IRQHandler            [WEAK]
-                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
-                EXPORT  SPI_IRQHandler            [WEAK]
-
-WDT_IRQHandler
-RTC_IRQHandler
-TIM0_IRQHandler
-TIM2_IRQHandler
-MCIA_IRQHandler
-MCIB_IRQHandler
-UART0_IRQHandler
-UART1_IRQHandler
-UART2_IRQHandler
-UART3_IRQHandler
-UART4_IRQHandler
-AACI_IRQHandler
-CLCD_IRQHandler
-ENET_IRQHandler
-USBDC_IRQHandler
-USBHC_IRQHandler
-CHLCD_IRQHandler
-FLEXRAY_IRQHandler
-CAN_IRQHandler
-LIN_IRQHandler
-I2C_IRQHandler
-CPU_CLCD_IRQHandler
-SPI_IRQHandler
-                B       .
-
-                ENDP
-
-
-                ALIGN
-
-
-; User Initial Stack & Heap
-
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __initial_sp
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-
-                IMPORT  __use_two_region_memory
-                EXPORT  __user_initial_stackheap
-
-__user_initial_stackheap PROC
-                LDR     R0, =  Heap_Mem
-                LDR     R1, =(Stack_Mem + Stack_Size)
-                LDR     R2, = (Heap_Mem +  Heap_Size)
-                LDR     R3, = Stack_Mem
-                BX      LR
-                ENDP
-
-                ALIGN
-
-                ENDIF
-
-
-                END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/system_ARMCM3.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/system_ARMCM3.c
deleted file mode 100644
index f08df7a..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/system_ARMCM3.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/**************************************************************************//**
- * @file     system_ARMCM3.c
- * @brief    CMSIS Device System Source File for
- *           ARMCM3 Device Series
- * @version  V5.00
- * @date     08. April 2016
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ARMCM3.h"
-
-/*----------------------------------------------------------------------------
-  Define clocks
- *----------------------------------------------------------------------------*/
-#define  XTAL            ( 5000000U)      /* Oscillator frequency */
-
-#define  SYSTEM_CLOCK    (5 * XTAL)
-
-
-/*----------------------------------------------------------------------------
-  Externals
- *----------------------------------------------------------------------------*/
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
-  extern uint32_t __Vectors;
-#endif
-
-/*----------------------------------------------------------------------------
-  System Core Clock Variable
- *----------------------------------------------------------------------------*/
-uint32_t SystemCoreClock = SYSTEM_CLOCK;
-
-
-/*----------------------------------------------------------------------------
-  System Core Clock update function
- *----------------------------------------------------------------------------*/
-void SystemCoreClockUpdate (void)
-{
-  SystemCoreClock = SYSTEM_CLOCK;
-}
-
-/*----------------------------------------------------------------------------
-  System initialization function
- *----------------------------------------------------------------------------*/
-void SystemInit (void)
-{
-
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
-  SCB->VTOR = (uint32_t) &__Vectors;
-#endif
-
-  SystemCoreClock = SYSTEM_CLOCK;
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
deleted file mode 100644
index dae6439..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
+++ /dev/null
@@ -1,262 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM4.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM4 Device Series
-; * @version  V5.00
-; * @date     02. March 2016
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;/*
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-;*/
-
-
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000C00
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     MemManage_Handler         ; MPU Fault Handler
-                DCD     BusFault_Handler          ; Bus Fault Handler
-                DCD     UsageFault_Handler        ; Usage Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     DebugMon_Handler          ; Debug Monitor Handler
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
-                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
-                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
-                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
-                DCD     MCIA_IRQHandler           ;  4:  MCIa
-                DCD     MCIB_IRQHandler           ;  5:  MCIb
-                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
-                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
-                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
-                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
-                DCD     AACI_IRQHandler           ; 10: AACI / AC97
-                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
-                DCD     ENET_IRQHandler           ; 12: Ethernet
-                DCD     USBDC_IRQHandler          ; 13: USB Device
-                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
-                DCD     CHLCD_IRQHandler          ; 15: Character LCD
-                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
-                DCD     CAN_IRQHandler            ; 17: CAN
-                DCD     LIN_IRQHandler            ; 18: LIN
-                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
-                DCD     0                         ; 20: Reserved
-                DCD     0                         ; 21: Reserved
-                DCD     0                         ; 22: Reserved
-                DCD     0                         ; 23: Reserved
-                DCD     0                         ; 24: Reserved
-                DCD     0                         ; 25: Reserved
-                DCD     0                         ; 26: Reserved
-                DCD     0                         ; 27: Reserved
-                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
-                DCD     0                         ; 29: Reserved - CPU FPGA
-                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
-                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
-__Vectors_End
-
-__Vectors_Size  EQU     __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  SystemInit
-                IMPORT  __main
-                LDR     R0, =SystemInit
-                BLX     R0
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler               [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler         [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler         [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler          [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler        [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler               [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler          [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler            [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler           [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WDT_IRQHandler            [WEAK]
-                EXPORT  RTC_IRQHandler            [WEAK]
-                EXPORT  TIM0_IRQHandler           [WEAK]
-                EXPORT  TIM2_IRQHandler           [WEAK]
-                EXPORT  MCIA_IRQHandler           [WEAK]
-                EXPORT  MCIB_IRQHandler           [WEAK]
-                EXPORT  UART0_IRQHandler          [WEAK]
-                EXPORT  UART1_IRQHandler          [WEAK]
-                EXPORT  UART2_IRQHandler          [WEAK]
-                EXPORT  UART3_IRQHandler          [WEAK]
-                EXPORT  UART4_IRQHandler          [WEAK]
-                EXPORT  AACI_IRQHandler           [WEAK]
-                EXPORT  CLCD_IRQHandler           [WEAK]
-                EXPORT  ENET_IRQHandler           [WEAK]
-                EXPORT  USBDC_IRQHandler          [WEAK]
-                EXPORT  USBHC_IRQHandler          [WEAK]
-                EXPORT  CHLCD_IRQHandler          [WEAK]
-                EXPORT  FLEXRAY_IRQHandler        [WEAK]
-                EXPORT  CAN_IRQHandler            [WEAK]
-                EXPORT  LIN_IRQHandler            [WEAK]
-                EXPORT  I2C_IRQHandler            [WEAK]
-                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
-                EXPORT  SPI_IRQHandler            [WEAK]
-
-WDT_IRQHandler
-RTC_IRQHandler
-TIM0_IRQHandler
-TIM2_IRQHandler
-MCIA_IRQHandler
-MCIB_IRQHandler
-UART0_IRQHandler
-UART1_IRQHandler
-UART2_IRQHandler
-UART3_IRQHandler
-UART4_IRQHandler
-AACI_IRQHandler
-CLCD_IRQHandler
-ENET_IRQHandler
-USBDC_IRQHandler
-USBHC_IRQHandler
-CHLCD_IRQHandler
-FLEXRAY_IRQHandler
-CAN_IRQHandler
-LIN_IRQHandler
-I2C_IRQHandler
-CPU_CLCD_IRQHandler
-SPI_IRQHandler
-                B       .
-
-                ENDP
-
-
-                ALIGN
-
-
-; User Initial Stack & Heap
-
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __initial_sp
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-
-                IMPORT  __use_two_region_memory
-                EXPORT  __user_initial_stackheap
-
-__user_initial_stackheap PROC
-                LDR     R0, =  Heap_Mem
-                LDR     R1, =(Stack_Mem + Stack_Size)
-                LDR     R2, = (Heap_Mem +  Heap_Size)
-                LDR     R3, = Stack_Mem
-                BX      LR
-                ENDP
-
-                ALIGN
-
-                ENDIF
-
-
-                END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/system_ARMCM4.c
deleted file mode 100644
index 070fa1e..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/system_ARMCM4.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/**************************************************************************//**
- * @file     system_ARMCM4.c
- * @brief    CMSIS Device System Source File for
- *           ARMCM4 Device Series
- * @version  V5.00
- * @date     08. April 2016
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined (ARMCM4)
-  #include "ARMCM4.h"
-#elif defined (ARMCM4_FP)
-  #include "ARMCM4_FP.h"
-#else
-  #error device not specified!
-#endif
-
-/*----------------------------------------------------------------------------
-  Define clocks
- *----------------------------------------------------------------------------*/
-#define  XTAL            ( 5000000U)      /* Oscillator frequency */
-
-#define  SYSTEM_CLOCK    (5 * XTAL)
-
-
-/*----------------------------------------------------------------------------
-  Externals
- *----------------------------------------------------------------------------*/
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
-  extern uint32_t __Vectors;
-#endif
-
-/*----------------------------------------------------------------------------
-  System Core Clock Variable
- *----------------------------------------------------------------------------*/
-uint32_t SystemCoreClock = SYSTEM_CLOCK;
-
-
-/*----------------------------------------------------------------------------
-  System Core Clock update function
- *----------------------------------------------------------------------------*/
-void SystemCoreClockUpdate (void)
-{
-  SystemCoreClock = SYSTEM_CLOCK;
-}
-
-/*----------------------------------------------------------------------------
-  System initialization function
- *----------------------------------------------------------------------------*/
-void SystemInit (void)
-{
-
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
-  SCB->VTOR = (uint32_t) &__Vectors;
-#endif
-
-#if defined (__FPU_USED) && (__FPU_USED == 1)
-  SCB->CPACR |= ((3U << 10*2) |           /* set CP10 Full Access */
-                 (3U << 11*2)  );         /* set CP11 Full Access */
-#endif
-
-#ifdef UNALIGNED_SUPPORT_DISABLE
-  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
-#endif
-
-  SystemCoreClock = SYSTEM_CLOCK;
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/gcc_arm.ld b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/gcc_arm.ld
deleted file mode 100644
index b987fd1..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/gcc_arm.ld
+++ /dev/null
@@ -1,196 +0,0 @@
-/* Linker script to configure memory regions. */
-MEMORY
-{
-  FLASH (rx)  : ORIGIN = 0x00000000, LENGTH = 512K
-  RAM   (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
-}
-
-/* Library configurations */
-GROUP(libgcc.a libc.a libm.a libnosys.a)
-
-/* Linker script to place sections and symbol values. Should be used together
- * with other linker script that defines memory regions FLASH and RAM.
- * It references following symbols, which must be defined in code:
- *   Reset_Handler : Entry of reset handler
- *
- * It defines following symbols, which code can use without definition:
- *   __exidx_start
- *   __exidx_end
- *   __copy_table_start__
- *   __copy_table_end__
- *   __zero_table_start__
- *   __zero_table_end__
- *   __etext
- *   __data_start__
- *   __preinit_array_start
- *   __preinit_array_end
- *   __init_array_start
- *   __init_array_end
- *   __fini_array_start
- *   __fini_array_end
- *   __data_end__
- *   __bss_start__
- *   __bss_end__
- *   __end__
- *   end
- *   __HeapBase
- *   __HeapLimit
- *   __StackLimit
- *   __StackTop
- *   __stack
- *   __Vectors_End
- *   __Vectors_Size
- */
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
-	.text :
-	{
-		KEEP(*(.vectors))
-		__Vectors_End = .;
-		__Vectors_Size = __Vectors_End - __Vectors;
-		__end__ = .;
-
-		*(.text*)
-
-		KEEP(*(.init))
-		KEEP(*(.fini))
-
-		/* .ctors */
-		*crtbegin.o(.ctors)
-		*crtbegin?.o(.ctors)
-		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
-		*(SORT(.ctors.*))
-		*(.ctors)
-
-		/* .dtors */
- 		*crtbegin.o(.dtors)
- 		*crtbegin?.o(.dtors)
- 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
- 		*(SORT(.dtors.*))
- 		*(.dtors)
-
-		*(.rodata*)
-
-		KEEP(*(.eh_frame*))
-	} > FLASH
-
-	.ARM.extab :
-	{
-		*(.ARM.extab* .gnu.linkonce.armextab.*)
-	} > FLASH
-
-	__exidx_start = .;
-	.ARM.exidx :
-	{
-		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
-	} > FLASH
-	__exidx_end = .;
-
-	/* To copy multiple ROM to RAM sections,
-	 * uncomment .copy.table section and,
-	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.copy.table :
-	{
-		. = ALIGN(4);
-		__copy_table_start__ = .;
-		LONG (__etext)
-		LONG (__data_start__)
-		LONG (__data_end__ - __data_start__)
-		LONG (__etext2)
-		LONG (__data2_start__)
-		LONG (__data2_end__ - __data2_start__)
-		__copy_table_end__ = .;
-	} > FLASH
-	*/
-
-	/* To clear multiple BSS sections,
-	 * uncomment .zero.table section and,
-	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.zero.table :
-	{
-		. = ALIGN(4);
-		__zero_table_start__ = .;
-		LONG (__bss_start__)
-		LONG (__bss_end__ - __bss_start__)
-		LONG (__bss2_start__)
-		LONG (__bss2_end__ - __bss2_start__)
-		__zero_table_end__ = .;
-	} > FLASH
-	*/
-
-	__etext = .;
-
-	.data : AT (__etext)
-	{
-		__data_start__ = .;
-		*(vtable)
-		*(.data*)
-
-		. = ALIGN(4);
-		/* preinit data */
-		PROVIDE_HIDDEN (__preinit_array_start = .);
-		KEEP(*(.preinit_array))
-		PROVIDE_HIDDEN (__preinit_array_end = .);
-
-		. = ALIGN(4);
-		/* init data */
-		PROVIDE_HIDDEN (__init_array_start = .);
-		KEEP(*(SORT(.init_array.*)))
-		KEEP(*(.init_array))
-		PROVIDE_HIDDEN (__init_array_end = .);
-
-
-		. = ALIGN(4);
-		/* finit data */
-		PROVIDE_HIDDEN (__fini_array_start = .);
-		KEEP(*(SORT(.fini_array.*)))
-		KEEP(*(.fini_array))
-		PROVIDE_HIDDEN (__fini_array_end = .);
-
-		KEEP(*(.jcr*))
-		. = ALIGN(4);
-		/* All data end */
-		__data_end__ = .;
-
-	} > RAM
-
-	.bss :
-	{
-		. = ALIGN(4);
-		__bss_start__ = .;
-		*(.bss*)
-		*(COMMON)
-		. = ALIGN(4);
-		__bss_end__ = .;
-	} > RAM
-
-	.heap (COPY):
-	{
-		__HeapBase = .;
-		__end__ = .;
-		end = __end__;
-		KEEP(*(.heap*))
-		__HeapLimit = .;
-	} > RAM
-
-	/* .stack_dummy section doesn't contains any symbols. It is only
-	 * used for linker to calculate size of stack sections, and assign
-	 * values to stack symbols later */
-	.stack_dummy (COPY):
-	{
-		KEEP(*(.stack*))
-	} > RAM
-
-	/* Set stack top to end of RAM, and stack limit move down by
-	 * size of stack_dummy section */
-	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
-	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
-	PROVIDE(__stack = __StackTop);
-
-	/* Check if data + heap + stack exceeds RAM limit */
-	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
deleted file mode 100644
index 26edb9f..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
+++ /dev/null
@@ -1,295 +0,0 @@
-/**************************************************************************//**
- * @file     startup_ARMCM7.s
- * @brief    CMSIS Core Device Startup File for
- *           ARMCM7 Device Series
- * @version  V5.00
- * @date     26. April 2016
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <stdint.h>
-
-
-/*----------------------------------------------------------------------------
-  Linker generated Symbols
- *----------------------------------------------------------------------------*/
-extern uint32_t __etext;
-extern uint32_t __data_start__;
-extern uint32_t __data_end__;
-extern uint32_t __copy_table_start__;
-extern uint32_t __copy_table_end__;
-extern uint32_t __zero_table_start__;
-extern uint32_t __zero_table_end__;
-extern uint32_t __bss_start__;
-extern uint32_t __bss_end__;
-extern uint32_t __StackTop;
-
-/*----------------------------------------------------------------------------
-  Exception / Interrupt Handler Function Prototype
- *----------------------------------------------------------------------------*/
-typedef void( *pFunc )( void );
-
-
-/*----------------------------------------------------------------------------
-  External References
- *----------------------------------------------------------------------------*/
-#ifndef __START
-extern void  _start(void) __attribute__((noreturn));    /* PreeMain (C library entry point) */
-#else
-extern int  __START(void) __attribute__((noreturn));    /* main entry point */
-#endif
-
-#ifndef __NO_SYSTEM_INIT
-extern void SystemInit (void);            /* CMSIS System Initialization      */
-#endif
-
-
-/*----------------------------------------------------------------------------
-  Internal References
- *----------------------------------------------------------------------------*/
-void Default_Handler(void);                          /* Default empty handler */
-void Reset_Handler(void);                            /* Reset Handler */
-
-
-/*----------------------------------------------------------------------------
-  User Initial Stack & Heap
- *----------------------------------------------------------------------------*/
-#ifndef __STACK_SIZE
-  #define	__STACK_SIZE  0x00000400
-#endif
-static uint8_t stack[__STACK_SIZE] __attribute__ ((aligned(8), used, section(".stack")));
-
-#ifndef __HEAP_SIZE
-  #define	__HEAP_SIZE   0x00000C00
-#endif
-#if __HEAP_SIZE > 0
-static uint8_t heap[__HEAP_SIZE]   __attribute__ ((aligned(8), used, section(".heap")));
-#endif
-
-
-/*----------------------------------------------------------------------------
-  Exception / Interrupt Handler
- *----------------------------------------------------------------------------*/
-/* Cortex-M7 Processor Exceptions */
-void NMI_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
-void HardFault_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
-void MemManage_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
-void BusFault_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void UsageFault_Handler  (void) __attribute__ ((weak, alias("Default_Handler")));
-void SVC_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
-void DebugMon_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void PendSV_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
-void SysTick_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
-
-/* ARMCM7 Specific Interrupts */
-void WDT_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
-void RTC_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
-void TIM0_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void TIM2_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void MCIA_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void MCIB_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void UART0_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void UART1_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void UART2_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void UART4_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void AACI_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void CLCD_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void ENET_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void USBDC_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void USBHC_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void CHLCD_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void FLEXRAY_IRQHandler  (void) __attribute__ ((weak, alias("Default_Handler")));
-void CAN_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
-void LIN_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
-void I2C_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
-void CPU_CLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
-void UART3_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void SPI_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
-
-
-/*----------------------------------------------------------------------------
-  Exception / Interrupt Vector table
- *----------------------------------------------------------------------------*/
-const pFunc __Vectors[] __attribute__ ((section(".vectors"))) = {
-  /* Cortex-M7 Exceptions Handler */
-  (pFunc)((uint32_t)&__StackTop),           /*      Initial Stack Pointer     */
-  Reset_Handler,                            /*      Reset Handler             */
-  NMI_Handler,                              /*      NMI Handler               */
-  HardFault_Handler,                        /*      Hard Fault Handler        */
-  MemManage_Handler,                        /*      MPU Fault Handler         */
-  BusFault_Handler,                         /*      Bus Fault Handler         */
-  UsageFault_Handler,                       /*      Usage Fault Handler       */
-  0,                                        /*      Reserved                  */
-  0,                                        /*      Reserved                  */
-  0,                                        /*      Reserved                  */
-  0,                                        /*      Reserved                  */
-  SVC_Handler,                              /*      SVCall Handler            */
-  DebugMon_Handler,                         /*      Debug Monitor Handler     */
-  0,                                        /*      Reserved                  */
-  PendSV_Handler,                           /*      PendSV Handler            */
-  SysTick_Handler,                          /*      SysTick Handler           */
-
-  /* External interrupts */
-  WDT_IRQHandler,                           /*  0:  Watchdog Timer            */
-  RTC_IRQHandler,                           /*  1:  Real Time Clock           */
-  TIM0_IRQHandler,                          /*  2:  Timer0 / Timer1           */
-  TIM2_IRQHandler,                          /*  3:  Timer2 / Timer3           */
-  MCIA_IRQHandler,                          /*  4:  MCIa                      */
-  MCIB_IRQHandler,                          /*  5:  MCIb                      */
-  UART0_IRQHandler,                         /*  6:  UART0 - DUT FPGA          */
-  UART1_IRQHandler,                         /*  7:  UART1 - DUT FPGA          */
-  UART2_IRQHandler,                         /*  8:  UART2 - DUT FPGA          */
-  UART4_IRQHandler,                         /*  9:  UART4 - not connected     */
-  AACI_IRQHandler,                          /* 10: AACI / AC97                */
-  CLCD_IRQHandler,                          /* 11: CLCD Combined Interrupt    */
-  ENET_IRQHandler,                          /* 12: Ethernet                   */
-  USBDC_IRQHandler,                         /* 13: USB Device                 */
-  USBHC_IRQHandler,                         /* 14: USB Host Controller        */
-  CHLCD_IRQHandler,                         /* 15: Character LCD              */
-  FLEXRAY_IRQHandler,                       /* 16: Flexray                    */
-  CAN_IRQHandler,                           /* 17: CAN                        */
-  LIN_IRQHandler,                           /* 18: LIN                        */
-  I2C_IRQHandler,                           /* 19: I2C ADC/DAC                */
-  0,                                        /* 20: Reserved                   */
-  0,                                        /* 21: Reserved                   */
-  0,                                        /* 22: Reserved                   */
-  0,                                        /* 23: Reserved                   */
-  0,                                        /* 24: Reserved                   */
-  0,                                        /* 25: Reserved                   */
-  0,                                        /* 26: Reserved                   */
-  0,                                        /* 27: Reserved                   */
-  CPU_CLCD_IRQHandler,                      /* 28: Reserved - CPU FPGA CLCD   */
-  0,                                        /* 29: Reserved - CPU FPGA        */
-  UART3_IRQHandler,                         /* 30: UART3    - CPU FPGA        */
-  SPI_IRQHandler                            /* 31: SPI Touchscreen - CPU FPGA */
-};
-
-
-/*----------------------------------------------------------------------------
-  Reset Handler called on controller reset
- *----------------------------------------------------------------------------*/
-void Reset_Handler(void) {
-  uint32_t *pSrc, *pDest;
-  uint32_t *pTable __attribute__((unused));
-
-/*  Firstly it copies data from read only memory to RAM. There are two schemes
- *  to copy. One can copy more than one sections. Another can only copy
- *  one section.  The former scheme needs more instructions and read-only
- *  data to implement than the latter.
- *  Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes.  */
-
-#ifdef __STARTUP_COPY_MULTIPLE
-/*  Multiple sections scheme.
- *
- *  Between symbol address __copy_table_start__ and __copy_table_end__,
- *  there are array of triplets, each of which specify:
- *    offset 0: LMA of start of a section to copy from
- *    offset 4: VMA of start of a section to copy to
- *    offset 8: size of the section to copy. Must be multiply of 4
- *
- *  All addresses must be aligned to 4 bytes boundary.
- */
-  pTable = &__copy_table_start__;
-
-  for (; pTable < &__copy_table_end__; pTable = pTable + 3) {
-		pSrc  = (uint32_t*)*(pTable + 0);
-		pDest = (uint32_t*)*(pTable + 1);
-		for (; pDest < (uint32_t*)(*(pTable + 1) + *(pTable + 2)) ; ) {
-      *pDest++ = *pSrc++;
-		}
-	}
-#else
-/*  Single section scheme.
- *
- *  The ranges of copy from/to are specified by following symbols
- *    __etext: LMA of start of the section to copy from. Usually end of text
- *    __data_start__: VMA of start of the section to copy to
- *    __data_end__: VMA of end of the section to copy to
- *
- *  All addresses must be aligned to 4 bytes boundary.
- */
-  pSrc  = &__etext;
-  pDest = &__data_start__;
-
-  for ( ; pDest < &__data_end__ ; ) {
-    *pDest++ = *pSrc++;
-  }
-#endif /*__STARTUP_COPY_MULTIPLE */
-
-/*  This part of work usually is done in C library startup code. Otherwise,
- *  define this macro to enable it in this startup.
- *
- *  There are two schemes too. One can clear multiple BSS sections. Another
- *  can only clear one section. The former is more size expensive than the
- *  latter.
- *
- *  Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
- *  Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
- */
-#ifdef __STARTUP_CLEAR_BSS_MULTIPLE
-/*  Multiple sections scheme.
- *
- *  Between symbol address __copy_table_start__ and __copy_table_end__,
- *  there are array of tuples specifying:
- *    offset 0: Start of a BSS section
- *    offset 4: Size of this BSS section. Must be multiply of 4
- */
-  pTable = &__zero_table_start__;
-
-  for (; pTable < &__zero_table_end__; pTable = pTable + 2) {
-		pDest = (uint32_t*)*(pTable + 0);
-		for (; pDest < (uint32_t*)(*(pTable + 0) + *(pTable + 1)) ; ) {
-      *pDest++ = 0;
-		}
-	}
-#elif defined (__STARTUP_CLEAR_BSS)
-/*  Single BSS section scheme.
- *
- *  The BSS section is specified by following symbols
- *    __bss_start__: start of the BSS section.
- *    __bss_end__: end of the BSS section.
- *
- *  Both addresses must be aligned to 4 bytes boundary.
- */
-  pDest = &__bss_start__;
-
-  for ( ; pDest < &__bss_end__ ; ) {
-    *pDest++ = 0UL;
-  }
-#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
-
-#ifndef __NO_SYSTEM_INIT
-	SystemInit();
-#endif
-
-#ifndef __START
-#define __START _start
-#endif
-	__START();
-
-}
-
-
-/*----------------------------------------------------------------------------
-  Default Handler for Exceptions / Interrupts
- *----------------------------------------------------------------------------*/
-void Default_Handler(void) {
-
-	while(1);
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
deleted file mode 100644
index b69f038..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
+++ /dev/null
@@ -1,262 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM7.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM7 Device Series
-; * @version  V5.00
-; * @date     02. March 2016
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;/*
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-;*/
-
-
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000C00
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     MemManage_Handler         ; MPU Fault Handler
-                DCD     BusFault_Handler          ; Bus Fault Handler
-                DCD     UsageFault_Handler        ; Usage Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     DebugMon_Handler          ; Debug Monitor Handler
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
-                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
-                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
-                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
-                DCD     MCIA_IRQHandler           ;  4:  MCIa
-                DCD     MCIB_IRQHandler           ;  5:  MCIb
-                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
-                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
-                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
-                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
-                DCD     AACI_IRQHandler           ; 10: AACI / AC97
-                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
-                DCD     ENET_IRQHandler           ; 12: Ethernet
-                DCD     USBDC_IRQHandler          ; 13: USB Device
-                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
-                DCD     CHLCD_IRQHandler          ; 15: Character LCD
-                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
-                DCD     CAN_IRQHandler            ; 17: CAN
-                DCD     LIN_IRQHandler            ; 18: LIN
-                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
-                DCD     0                         ; 20: Reserved
-                DCD     0                         ; 21: Reserved
-                DCD     0                         ; 22: Reserved
-                DCD     0                         ; 23: Reserved
-                DCD     0                         ; 24: Reserved
-                DCD     0                         ; 25: Reserved
-                DCD     0                         ; 26: Reserved
-                DCD     0                         ; 27: Reserved
-                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
-                DCD     0                         ; 29: Reserved - CPU FPGA
-                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
-                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
-__Vectors_End
-
-__Vectors_Size  EQU     __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  SystemInit
-                IMPORT  __main
-                LDR     R0, =SystemInit
-                BLX     R0
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler               [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler         [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler         [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler          [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler        [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler               [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler          [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler            [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler           [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WDT_IRQHandler            [WEAK]
-                EXPORT  RTC_IRQHandler            [WEAK]
-                EXPORT  TIM0_IRQHandler           [WEAK]
-                EXPORT  TIM2_IRQHandler           [WEAK]
-                EXPORT  MCIA_IRQHandler           [WEAK]
-                EXPORT  MCIB_IRQHandler           [WEAK]
-                EXPORT  UART0_IRQHandler          [WEAK]
-                EXPORT  UART1_IRQHandler          [WEAK]
-                EXPORT  UART2_IRQHandler          [WEAK]
-                EXPORT  UART3_IRQHandler          [WEAK]
-                EXPORT  UART4_IRQHandler          [WEAK]
-                EXPORT  AACI_IRQHandler           [WEAK]
-                EXPORT  CLCD_IRQHandler           [WEAK]
-                EXPORT  ENET_IRQHandler           [WEAK]
-                EXPORT  USBDC_IRQHandler          [WEAK]
-                EXPORT  USBHC_IRQHandler          [WEAK]
-                EXPORT  CHLCD_IRQHandler          [WEAK]
-                EXPORT  FLEXRAY_IRQHandler        [WEAK]
-                EXPORT  CAN_IRQHandler            [WEAK]
-                EXPORT  LIN_IRQHandler            [WEAK]
-                EXPORT  I2C_IRQHandler            [WEAK]
-                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
-                EXPORT  SPI_IRQHandler            [WEAK]
-
-WDT_IRQHandler
-RTC_IRQHandler
-TIM0_IRQHandler
-TIM2_IRQHandler
-MCIA_IRQHandler
-MCIB_IRQHandler
-UART0_IRQHandler
-UART1_IRQHandler
-UART2_IRQHandler
-UART3_IRQHandler
-UART4_IRQHandler
-AACI_IRQHandler
-CLCD_IRQHandler
-ENET_IRQHandler
-USBDC_IRQHandler
-USBHC_IRQHandler
-CHLCD_IRQHandler
-FLEXRAY_IRQHandler
-CAN_IRQHandler
-LIN_IRQHandler
-I2C_IRQHandler
-CPU_CLCD_IRQHandler
-SPI_IRQHandler
-                B       .
-
-                ENDP
-
-
-                ALIGN
-
-
-; User Initial Stack & Heap
-
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __initial_sp
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-
-                IMPORT  __use_two_region_memory
-                EXPORT  __user_initial_stackheap
-
-__user_initial_stackheap PROC
-                LDR     R0, =  Heap_Mem
-                LDR     R1, =(Stack_Mem + Stack_Size)
-                LDR     R2, = (Heap_Mem +  Heap_Size)
-                LDR     R3, = Stack_Mem
-                BX      LR
-                ENDP
-
-                ALIGN
-
-                ENDIF
-
-
-                END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/system_ARMCM7.c
deleted file mode 100644
index 65bfaca..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/system_ARMCM7.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/**************************************************************************//**
- * @file     system_ARMCM7.c
- * @brief    CMSIS Device System Source File for
- *           ARMCM7 Device Series
- * @version  V5.00
- * @date     08. April 2016
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined (ARMCM7)
-  #include "ARMCM7.h"
-#elif defined (ARMCM7_SP)
-  #include "ARMCM7_SP.h"
-#elif defined (ARMCM7_DP)
-  #include "ARMCM7_DP.h"
-#else
-  #error device not specified!
-#endif
-
-/*----------------------------------------------------------------------------
-  Define clocks
- *----------------------------------------------------------------------------*/
-#define  XTAL            ( 5000000U)      /* Oscillator frequency */
-
-#define  SYSTEM_CLOCK    (5 * XTAL)
-
-
-/*----------------------------------------------------------------------------
-  Externals
- *----------------------------------------------------------------------------*/
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
-  extern uint32_t __Vectors;
-#endif
-
-/*----------------------------------------------------------------------------
-  System Core Clock Variable
- *----------------------------------------------------------------------------*/
-uint32_t SystemCoreClock = SYSTEM_CLOCK;
-
-
-/*----------------------------------------------------------------------------
-  System Core Clock update function
- *----------------------------------------------------------------------------*/
-void SystemCoreClockUpdate (void)
-{
-  SystemCoreClock = SYSTEM_CLOCK;
-}
-
-/*----------------------------------------------------------------------------
-  System initialization function
- *----------------------------------------------------------------------------*/
-void SystemInit (void)
-{
-
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
-  SCB->VTOR = (uint32_t) &__Vectors;
-#endif
-
-#if defined (__FPU_USED) && (__FPU_USED == 1)
-  SCB->CPACR |= ((3U << 10*2) |           /* set CP10 Full Access */
-                 (3U << 11*2)  );         /* set CP11 Full Access */
-#endif
-
-#ifdef UNALIGNED_SUPPORT_DISABLE
-  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
-#endif
-
-  SystemCoreClock = SYSTEM_CLOCK;
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM0/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM0/RTE_Components.h
deleted file mode 100644
index 0c062ad..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM0/RTE_Components.h
+++ /dev/null
@@ -1,24 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_cifar10' 
- * Target:  'ARMCM0' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "ARMCM0.h"
-
-#define RTE_Compiler_EventRecorder
-          #define RTE_Compiler_EventRecorder_DAP
-#define RTE_Compiler_IO_STDOUT          /* Compiler I/O: STDOUT */
-          #define RTE_Compiler_IO_STDOUT_EVR      /* Compiler I/O: STDOUT EVR */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM3/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM3/RTE_Components.h
deleted file mode 100644
index 62755a7..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM3/RTE_Components.h
+++ /dev/null
@@ -1,22 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_cifar10' 
- * Target:  'ARMCM3' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "ARMCM3.h"
-
-#define RTE_Compiler_IO_STDOUT          /* Compiler I/O: STDOUT */
-          #define RTE_Compiler_IO_STDOUT_ITM      /* Compiler I/O: STDOUT ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM4_FP/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM4_FP/RTE_Components.h
deleted file mode 100644
index 835cb37..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM4_FP/RTE_Components.h
+++ /dev/null
@@ -1,22 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_cifar10' 
- * Target:  'ARMCM4_FP' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "ARMCM4_FP.h"
-
-#define RTE_Compiler_IO_STDOUT          /* Compiler I/O: STDOUT */
-          #define RTE_Compiler_IO_STDOUT_ITM      /* Compiler I/O: STDOUT ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM7_SP/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM7_SP/RTE_Components.h
deleted file mode 100644
index d275f41..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM7_SP/RTE_Components.h
+++ /dev/null
@@ -1,22 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_cifar10' 
- * Target:  'ARMCM7_SP' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "ARMCM7_SP.h"
-
-#define RTE_Compiler_IO_STDOUT          /* Compiler I/O: STDOUT */
-          #define RTE_Compiler_IO_STDOUT_ITM      /* Compiler I/O: STDOUT ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.cpp b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.cpp
deleted file mode 100644
index 471899c..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.cpp
+++ /dev/null
@@ -1,196 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
-*
-*
-* Project:       CMSIS NN Library
-* Title:         arm_nnexamples_cifar10.cpp
-*
-* Description:   Convolutional Neural Network Example
-*
-* Target Processor: Cortex-M4/Cortex-M7
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of Arm LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-/**
- * @ingroup groupExamples
- */
-
-/**
- * @defgroup CNNExample Convolutional Neural Network Example
- *
- * \par Description:
- * \par
- * Demonstrates a convolutional neural network (CNN) example with the use of convolution,
- * ReLU activation, pooling and fully-connected functions.
- *
- * \par Model definition:
- * \par
- * The CNN used in this example is based on CIFAR-10 example from Caffe [1]. 
- * The neural network consists
- * of 3 convolution layers interspersed by ReLU activation and max pooling layers, followed by a 
- * fully-connected layer at the end. The input to the network is a 32x32 pixel color image, which will 
- * be classified into one of the 10 output classes. 
- * This example model implementation needs 32.3 KB to store weights, 40 KB for activations and 
- * 3.1 KB for storing the \c im2col data.
- *
- * \image html CIFAR10_CNN.gif "Neural Network model definition"
- *
- * \par Variables Description:
- * \par
- * \li \c conv1_wt, \c conv2_wt, \c conv3_wt are convolution layer weight matrices
- * \li \c conv1_bias, \c conv2_bias, \c conv3_bias are convolution layer bias arrays
- * \li \c ip1_wt, ip1_bias point to fully-connected layer weights and biases
- * \li \c input_data points to the input image data
- * \li \c output_data points to the classification output
- * \li \c col_buffer is a buffer to store the \c im2col output
- * \li \c scratch_buffer is used to store the activation data (intermediate layer outputs)
- *
- * \par CMSIS DSP Software Library Functions Used:
- * \par
- * - arm_convolve_HWC_q7_RGB()
- * - arm_convolve_HWC_q7_fast()
- * - arm_relu_q7()
- * - arm_maxpool_q7_HWC()
- * - arm_avepool_q7_HWC()
- * - arm_fully_connected_q7_opt()
- * - arm_fully_connected_q7()
- *
- * <b> Refer  </b>
- * \link arm_nnexamples_cifar10.cpp \endlink
- *
- * \par [1] https://github.com/BVLC/caffe
- */
-
-#include <stdint.h>
-#include <stdio.h>
-#include "arm_math.h"
-#include "arm_nnexamples_cifar10_parameter.h"
-#include "arm_nnexamples_cifar10_weights.h"
-
-#include "arm_nnfunctions.h"
-#include "arm_nnexamples_cifar10_inputs.h"
-
-#ifdef _RTE_
-#include "RTE_Components.h"
-#ifdef RTE_Compiler_EventRecorder
-#include "EventRecorder.h"
-#endif
-#endif
-
-// include the input and weights
-
-static q7_t conv1_wt[CONV1_IM_CH * CONV1_KER_DIM * CONV1_KER_DIM * CONV1_OUT_CH] = CONV1_WT;
-static q7_t conv1_bias[CONV1_OUT_CH] = CONV1_BIAS;
-
-static q7_t conv2_wt[CONV2_IM_CH * CONV2_KER_DIM * CONV2_KER_DIM * CONV2_OUT_CH] = CONV2_WT;
-static q7_t conv2_bias[CONV2_OUT_CH] = CONV2_BIAS;
-
-static q7_t conv3_wt[CONV3_IM_CH * CONV3_KER_DIM * CONV3_KER_DIM * CONV3_OUT_CH] = CONV3_WT;
-static q7_t conv3_bias[CONV3_OUT_CH] = CONV3_BIAS;
-
-static q7_t ip1_wt[IP1_DIM * IP1_OUT] = IP1_WT;
-static q7_t ip1_bias[IP1_OUT] = IP1_BIAS;
-
-/* Here the image_data should be the raw uint8 type RGB image in [RGB, RGB, RGB ... RGB] format */
-uint8_t   image_data[CONV1_IM_CH * CONV1_IM_DIM * CONV1_IM_DIM] = IMG_DATA;
-q7_t      output_data[IP1_OUT];
-
-//vector buffer: max(im2col buffer,average pool buffer, fully connected buffer)
-q7_t      col_buffer[2 * 5 * 5 * 32 * 2];
-
-q7_t      scratch_buffer[32 * 32 * 10 * 4];
-
-int main()
-{
-  #ifdef RTE_Compiler_EventRecorder
-  EventRecorderInitialize (EventRecordAll, 1);  // initialize and start Event Recorder
-  #endif
-
-  printf("start execution\n");
-  /* start the execution */
-
-  q7_t     *img_buffer1 = scratch_buffer;
-  q7_t     *img_buffer2 = img_buffer1 + 32 * 32 * 32;
-
-  /* input pre-processing */
-  int mean_data[3] = INPUT_MEAN_SHIFT;
-  unsigned int scale_data[3] = INPUT_RIGHT_SHIFT;
-  for (int i=0;i<32*32*3; i+=3) {
-    img_buffer2[i] =   (q7_t)__SSAT( ((((int)image_data[i]   - mean_data[0])<<7) + (0x1<<(scale_data[0]-1)))
-                             >> scale_data[0], 8);
-    img_buffer2[i+1] = (q7_t)__SSAT( ((((int)image_data[i+1] - mean_data[1])<<7) + (0x1<<(scale_data[1]-1)))
-                             >> scale_data[1], 8);
-    img_buffer2[i+2] = (q7_t)__SSAT( ((((int)image_data[i+2] - mean_data[2])<<7) + (0x1<<(scale_data[2]-1)))
-                             >> scale_data[2], 8);
-  }
-  
-  // conv1 img_buffer2 -> img_buffer1
-  arm_convolve_HWC_q7_RGB(img_buffer2, CONV1_IM_DIM, CONV1_IM_CH, conv1_wt, CONV1_OUT_CH, CONV1_KER_DIM, CONV1_PADDING,
-                          CONV1_STRIDE, conv1_bias, CONV1_BIAS_LSHIFT, CONV1_OUT_RSHIFT, img_buffer1, CONV1_OUT_DIM,
-                          (q15_t *) col_buffer, NULL);
-
-  arm_relu_q7(img_buffer1, CONV1_OUT_DIM * CONV1_OUT_DIM * CONV1_OUT_CH);
-
-  // pool1 img_buffer1 -> img_buffer2
-  arm_maxpool_q7_HWC(img_buffer1, CONV1_OUT_DIM, CONV1_OUT_CH, POOL1_KER_DIM,
-                     POOL1_PADDING, POOL1_STRIDE, POOL1_OUT_DIM, NULL, img_buffer2);
-
-  // conv2 img_buffer2 -> img_buffer1
-  arm_convolve_HWC_q7_fast(img_buffer2, CONV2_IM_DIM, CONV2_IM_CH, conv2_wt, CONV2_OUT_CH, CONV2_KER_DIM,
-                           CONV2_PADDING, CONV2_STRIDE, conv2_bias, CONV2_BIAS_LSHIFT, CONV2_OUT_RSHIFT, img_buffer1,
-                           CONV2_OUT_DIM, (q15_t *) col_buffer, NULL);
-
-  arm_relu_q7(img_buffer1, CONV2_OUT_DIM * CONV2_OUT_DIM * CONV2_OUT_CH);
-
-  // pool2 img_buffer1 -> img_buffer2
-  arm_maxpool_q7_HWC(img_buffer1, CONV2_OUT_DIM, CONV2_OUT_CH, POOL2_KER_DIM,
-                     POOL2_PADDING, POOL2_STRIDE, POOL2_OUT_DIM, col_buffer, img_buffer2);
-
-// conv3 img_buffer2 -> img_buffer1
-  arm_convolve_HWC_q7_fast(img_buffer2, CONV3_IM_DIM, CONV3_IM_CH, conv3_wt, CONV3_OUT_CH, CONV3_KER_DIM,
-                           CONV3_PADDING, CONV3_STRIDE, conv3_bias, CONV3_BIAS_LSHIFT, CONV3_OUT_RSHIFT, img_buffer1,
-                           CONV3_OUT_DIM, (q15_t *) col_buffer, NULL);
-
-  arm_relu_q7(img_buffer1, CONV3_OUT_DIM * CONV3_OUT_DIM * CONV3_OUT_CH);
-
-  // pool3 img_buffer-> img_buffer2
-  arm_maxpool_q7_HWC(img_buffer1, CONV3_OUT_DIM, CONV3_OUT_CH, POOL3_KER_DIM,
-                     POOL3_PADDING, POOL3_STRIDE, POOL3_OUT_DIM, col_buffer, img_buffer2);
-
-  arm_fully_connected_q7_opt(img_buffer2, ip1_wt, IP1_DIM, IP1_OUT, IP1_BIAS_LSHIFT, IP1_OUT_RSHIFT, ip1_bias,
-                             output_data, (q15_t *) img_buffer1);
-
-  arm_softmax_q7(output_data, 10, output_data);
-
-  for (int i = 0; i < 10; i++)
-  {
-      printf("%d: %d\n", i, output_data[i]);
-  }
-
-  return 0;
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.uvoptx b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.uvoptx
deleted file mode 100644
index fe91232..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.uvoptx
+++ /dev/null
@@ -1,745 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
-
-  <SchemaVersion>1.0</SchemaVersion>
-
-  <Header>### uVision Project, (C) Keil Software</Header>
-
-  <Extensions>
-    <cExt>*.c</cExt>
-    <aExt>*.s*; *.src; *.a*</aExt>
-    <oExt>*.obj; *.o</oExt>
-    <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
-    <pExt>*.plm</pExt>
-    <CppX>*.cpp</CppX>
-    <nMigrate>0</nMigrate>
-  </Extensions>
-
-  <DaveTm>
-    <dwLowDateTime>0</dwLowDateTime>
-    <dwHighDateTime>0</dwHighDateTime>
-  </DaveTm>
-
-  <Target>
-    <TargetName>ARMCM0</TargetName>
-    <ToolsetNumber>0x4</ToolsetNumber>
-    <ToolsetName>ARM-ADS</ToolsetName>
-    <TargetOption>
-      <CLKADS>10000000</CLKADS>
-      <OPTTT>
-        <gFlags>1</gFlags>
-        <BeepAtEnd>1</BeepAtEnd>
-        <RunSim>0</RunSim>
-        <RunTarget>1</RunTarget>
-        <RunAbUc>0</RunAbUc>
-      </OPTTT>
-      <OPTHX>
-        <HexSelection>1</HexSelection>
-        <FlashByte>65535</FlashByte>
-        <HexRangeLowAddress>0</HexRangeLowAddress>
-        <HexRangeHighAddress>0</HexRangeHighAddress>
-        <HexOffset>0</HexOffset>
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-      <OPTLEX>
-        <PageWidth>79</PageWidth>
-        <PageLength>66</PageLength>
-        <TabStop>8</TabStop>
-        <ListingPath>.\ARMCM0_debug\</ListingPath>
-      </OPTLEX>
-      <ListingPage>
-        <CreateCListing>1</CreateCListing>
-        <CreateAListing>1</CreateAListing>
-        <CreateLListing>1</CreateLListing>
-        <CreateIListing>0</CreateIListing>
-        <AsmCond>1</AsmCond>
-        <AsmSymb>1</AsmSymb>
-        <AsmXref>0</AsmXref>
-        <CCond>1</CCond>
-        <CCode>0</CCode>
-        <CListInc>0</CListInc>
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-      </ListingPage>
-      <OPTXL>
-        <LMap>1</LMap>
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-        <LGenerateSymbols>1</LGenerateSymbols>
-        <LLibSym>1</LLibSym>
-        <LLines>1</LLines>
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-        <LXref>0</LXref>
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-      </OPTXL>
-      <OPTFL>
-        <tvExp>1</tvExp>
-        <tvExpOptDlg>0</tvExpOptDlg>
-        <IsCurrentTarget>0</IsCurrentTarget>
-      </OPTFL>
-      <CpuCode>7</CpuCode>
-      <DebugOpt>
-        <uSim>1</uSim>
-        <uTrg>0</uTrg>
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-      <Breakpoint/>
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-        <Type>Keil.ARM_Compiler.1.3.3</Type>
-        <SubType>1</SubType>
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-  </Target>
-
-  <Target>
-    <TargetName>ARMCM3</TargetName>
-    <ToolsetNumber>0x4</ToolsetNumber>
-    <ToolsetName>ARM-ADS</ToolsetName>
-    <TargetOption>
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diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.uvprojx b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.uvprojx
deleted file mode 100644
index bdcfd87..0000000
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-        <TargetArmAds>
-          <ArmAdsMisc>
-            <GenerateListings>0</GenerateListings>
-            <asHll>1</asHll>
-            <asAsm>1</asAsm>
-            <asMacX>1</asMacX>
-            <asSyms>1</asSyms>
-            <asFals>1</asFals>
-            <asDbgD>1</asDbgD>
-            <asForm>1</asForm>
-            <ldLst>0</ldLst>
-            <ldmm>1</ldmm>
-            <ldXref>1</ldXref>
-            <BigEnd>0</BigEnd>
-            <AdsALst>1</AdsALst>
-            <AdsACrf>1</AdsACrf>
-            <AdsANop>0</AdsANop>
-            <AdsANot>0</AdsANot>
-            <AdsLLst>1</AdsLLst>
-            <AdsLmap>1</AdsLmap>
-            <AdsLcgr>1</AdsLcgr>
-            <AdsLsym>1</AdsLsym>
-            <AdsLszi>1</AdsLszi>
-            <AdsLtoi>1</AdsLtoi>
-            <AdsLsun>1</AdsLsun>
-            <AdsLven>1</AdsLven>
-            <AdsLsxf>1</AdsLsxf>
-            <RvctClst>0</RvctClst>
-            <GenPPlst>0</GenPPlst>
-            <AdsCpuType>"Cortex-M3"</AdsCpuType>
-            <RvctDeviceName></RvctDeviceName>
-            <mOS>0</mOS>
-            <uocRom>0</uocRom>
-            <uocRam>0</uocRam>
-            <hadIROM>1</hadIROM>
-            <hadIRAM>1</hadIRAM>
-            <hadXRAM>0</hadXRAM>
-            <uocXRam>0</uocXRam>
-            <RvdsVP>0</RvdsVP>
-            <hadIRAM2>0</hadIRAM2>
-            <hadIROM2>0</hadIROM2>
-            <StupSel>8</StupSel>
-            <useUlib>0</useUlib>
-            <EndSel>0</EndSel>
-            <uLtcg>0</uLtcg>
-            <nSecure>0</nSecure>
-            <RoSelD>3</RoSelD>
-            <RwSelD>3</RwSelD>
-            <CodeSel>0</CodeSel>
-            <OptFeed>0</OptFeed>
-            <NoZi1>0</NoZi1>
-            <NoZi2>0</NoZi2>
-            <NoZi3>0</NoZi3>
-            <NoZi4>0</NoZi4>
-            <NoZi5>0</NoZi5>
-            <Ro1Chk>0</Ro1Chk>
-            <Ro2Chk>0</Ro2Chk>
-            <Ro3Chk>0</Ro3Chk>
-            <Ir1Chk>1</Ir1Chk>
-            <Ir2Chk>0</Ir2Chk>
-            <Ra1Chk>0</Ra1Chk>
-            <Ra2Chk>0</Ra2Chk>
-            <Ra3Chk>0</Ra3Chk>
-            <Im1Chk>1</Im1Chk>
-            <Im2Chk>0</Im2Chk>
-            <OnChipMemories>
-              <Ocm1>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm1>
-              <Ocm2>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm2>
-              <Ocm3>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm3>
-              <Ocm4>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm4>
-              <Ocm5>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm5>
-              <Ocm6>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm6>
-              <IRAM>
-                <Type>0</Type>
-                <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
-              </IRAM>
-              <IROM>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x80000</Size>
-              </IROM>
-              <XRAM>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </XRAM>
-              <OCR_RVCT1>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT1>
-              <OCR_RVCT2>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT2>
-              <OCR_RVCT3>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT3>
-              <OCR_RVCT4>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x80000</Size>
-              </OCR_RVCT4>
-              <OCR_RVCT5>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT5>
-              <OCR_RVCT6>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT6>
-              <OCR_RVCT7>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT7>
-              <OCR_RVCT8>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT8>
-              <OCR_RVCT9>
-                <Type>0</Type>
-                <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
-              </OCR_RVCT9>
-              <OCR_RVCT10>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT10>
-            </OnChipMemories>
-            <RvctStartVector></RvctStartVector>
-          </ArmAdsMisc>
-          <Cads>
-            <interw>1</interw>
-            <Optim>1</Optim>
-            <oTime>0</oTime>
-            <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
-            <Strict>0</Strict>
-            <EnumInt>0</EnumInt>
-            <PlainCh>0</PlainCh>
-            <Ropi>0</Ropi>
-            <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
-            <uThumb>0</uThumb>
-            <uSurpInc>0</uSurpInc>
-            <uC99>1</uC99>
-            <useXO>0</useXO>
-            <v6Lang>1</v6Lang>
-            <v6LangP>1</v6LangP>
-            <vShortEn>1</vShortEn>
-            <vShortWch>1</vShortWch>
-            <v6Lto>0</v6Lto>
-            <v6WtE>0</v6WtE>
-            <v6Rtti>0</v6Rtti>
-            <VariousControls>
-              <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM3</Define>
-              <Undefine></Undefine>
-              <IncludePath></IncludePath>
-            </VariousControls>
-          </Cads>
-          <Aads>
-            <interw>1</interw>
-            <Ropi>0</Ropi>
-            <Rwpi>0</Rwpi>
-            <thumb>0</thumb>
-            <SplitLS>0</SplitLS>
-            <SwStkChk>0</SwStkChk>
-            <NoWarn>0</NoWarn>
-            <uSurpInc>0</uSurpInc>
-            <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
-            <VariousControls>
-              <MiscControls></MiscControls>
-              <Define></Define>
-              <Undefine></Undefine>
-              <IncludePath></IncludePath>
-            </VariousControls>
-          </Aads>
-          <LDads>
-            <umfTarg>0</umfTarg>
-            <Ropi>0</Ropi>
-            <Rwpi>0</Rwpi>
-            <noStLib>0</noStLib>
-            <RepFail>1</RepFail>
-            <useFile>0</useFile>
-            <TextAddressRange>0x00000000</TextAddressRange>
-            <DataAddressRange>0x20000000</DataAddressRange>
-            <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
-            <IncludeLibs></IncludeLibs>
-            <IncludeLibsPath></IncludeLibsPath>
-            <Misc></Misc>
-            <LinkerInputFile></LinkerInputFile>
-            <DisabledWarnings></DisabledWarnings>
-          </LDads>
-        </TargetArmAds>
-      </TargetOption>
-      <Groups>
-        <Group>
-          <GroupName>Source Files</GroupName>
-          <Files>
-            <File>
-              <FileName>arm_nnexamples_cifar10.cpp</FileName>
-              <FileType>8</FileType>
-              <FilePath>.\arm_nnexamples_cifar10.cpp</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>Documentation</GroupName>
-          <Files>
-            <File>
-              <FileName>readme.txt</FileName>
-              <FileType>5</FileType>
-              <FilePath>.\readme.txt</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>::CMSIS</GroupName>
-        </Group>
-        <Group>
-          <GroupName>::Compiler</GroupName>
-        </Group>
-        <Group>
-          <GroupName>::Device</GroupName>
-        </Group>
-      </Groups>
-    </Target>
-    <Target>
-      <TargetName>ARMCM4_FP</TargetName>
-      <ToolsetNumber>0x4</ToolsetNumber>
-      <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
-      <uAC6>0</uAC6>
-      <TargetOption>
-        <TargetCommonOption>
-          <Device>ARMCM4_FP</Device>
-          <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.3.0</PackID>
-          <PackURL>http://www.keil.com/pack/</PackURL>
-          <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
-          <FlashUtilSpec></FlashUtilSpec>
-          <StartupFile></StartupFile>
-          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM))</FlashDriverDll>
-          <DeviceId>0</DeviceId>
-          <RegisterFile>$$Device:ARMCM4_FP$Device\ARM\ARMCM4\Include\ARMCM4_FP.h</RegisterFile>
-          <MemoryEnv></MemoryEnv>
-          <Cmp></Cmp>
-          <Asm></Asm>
-          <Linker></Linker>
-          <OHString></OHString>
-          <InfinionOptionDll></InfinionOptionDll>
-          <SLE66CMisc></SLE66CMisc>
-          <SLE66AMisc></SLE66AMisc>
-          <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>$$Device:ARMCM4_FP$Device\ARM\SVD\ARMCM4.svd</SFDFile>
-          <bCustSvd>0</bCustSvd>
-          <UseEnv>0</UseEnv>
-          <BinPath></BinPath>
-          <IncludePath></IncludePath>
-          <LibPath></LibPath>
-          <RegisterFilePath></RegisterFilePath>
-          <DBRegisterFilePath></DBRegisterFilePath>
-          <TargetStatus>
-            <Error>0</Error>
-            <ExitCodeStop>0</ExitCodeStop>
-            <ButtonStop>0</ButtonStop>
-            <NotGenerated>0</NotGenerated>
-            <InvalidFlash>1</InvalidFlash>
-          </TargetStatus>
-          <OutputDirectory>.\ARMCM4_debug\</OutputDirectory>
-          <OutputName>arm_nnexample_cifar10</OutputName>
-          <CreateExecutable>1</CreateExecutable>
-          <CreateLib>0</CreateLib>
-          <CreateHexFile>0</CreateHexFile>
-          <DebugInformation>1</DebugInformation>
-          <BrowseInformation>1</BrowseInformation>
-          <ListingPath>.\ARMCM4_debug\</ListingPath>
-          <HexFormatSelection>1</HexFormatSelection>
-          <Merge32K>0</Merge32K>
-          <CreateBatchFile>0</CreateBatchFile>
-          <BeforeCompile>
-            <RunUserProg1>0</RunUserProg1>
-            <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
-            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
-            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
-            <nStopU1X>0</nStopU1X>
-            <nStopU2X>0</nStopU2X>
-          </BeforeCompile>
-          <BeforeMake>
-            <RunUserProg1>0</RunUserProg1>
-            <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
-            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
-            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
-            <nStopB1X>0</nStopB1X>
-            <nStopB2X>0</nStopB2X>
-          </BeforeMake>
-          <AfterMake>
-            <RunUserProg1>0</RunUserProg1>
-            <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
-            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
-            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
-            <nStopA1X>0</nStopA1X>
-            <nStopA2X>0</nStopA2X>
-          </AfterMake>
-          <SelectedForBatchBuild>1</SelectedForBatchBuild>
-          <SVCSIdString></SVCSIdString>
-        </TargetCommonOption>
-        <CommonProperty>
-          <UseCPPCompiler>0</UseCPPCompiler>
-          <RVCTCodeConst>0</RVCTCodeConst>
-          <RVCTZI>0</RVCTZI>
-          <RVCTOtherData>0</RVCTOtherData>
-          <ModuleSelection>0</ModuleSelection>
-          <IncludeInBuild>1</IncludeInBuild>
-          <AlwaysBuild>0</AlwaysBuild>
-          <GenerateAssemblyFile>0</GenerateAssemblyFile>
-          <AssembleAssemblyFile>0</AssembleAssemblyFile>
-          <PublicsOnly>0</PublicsOnly>
-          <StopOnExitCode>3</StopOnExitCode>
-          <CustomArgument></CustomArgument>
-          <IncludeLibraryModules></IncludeLibraryModules>
-          <ComprImg>1</ComprImg>
-        </CommonProperty>
-        <DllOption>
-          <SimDllName>SARMCM3.DLL</SimDllName>
-          <SimDllArguments>  -MPU</SimDllArguments>
-          <SimDlgDll>DCM.DLL</SimDlgDll>
-          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
-          <TargetDllName>SARMCM3.DLL</TargetDllName>
-          <TargetDllArguments> -MPU</TargetDllArguments>
-          <TargetDlgDll>TCM.DLL</TargetDlgDll>
-          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
-        </DllOption>
-        <DebugOption>
-          <OPTHX>
-            <HexSelection>1</HexSelection>
-            <HexRangeLowAddress>0</HexRangeLowAddress>
-            <HexRangeHighAddress>0</HexRangeHighAddress>
-            <HexOffset>0</HexOffset>
-            <Oh166RecLen>16</Oh166RecLen>
-          </OPTHX>
-        </DebugOption>
-        <Utilities>
-          <Flash1>
-            <UseTargetDll>1</UseTargetDll>
-            <UseExternalTool>0</UseExternalTool>
-            <RunIndependent>0</RunIndependent>
-            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
-            <DriverSelection>4096</DriverSelection>
-          </Flash1>
-          <bUseTDR>1</bUseTDR>
-          <Flash2>BIN\UL2CM3.DLL</Flash2>
-          <Flash3>"" ()</Flash3>
-          <Flash4></Flash4>
-          <pFcarmOut></pFcarmOut>
-          <pFcarmGrp></pFcarmGrp>
-          <pFcArmRoot></pFcArmRoot>
-          <FcArmLst>0</FcArmLst>
-        </Utilities>
-        <TargetArmAds>
-          <ArmAdsMisc>
-            <GenerateListings>0</GenerateListings>
-            <asHll>1</asHll>
-            <asAsm>1</asAsm>
-            <asMacX>1</asMacX>
-            <asSyms>1</asSyms>
-            <asFals>1</asFals>
-            <asDbgD>1</asDbgD>
-            <asForm>1</asForm>
-            <ldLst>0</ldLst>
-            <ldmm>1</ldmm>
-            <ldXref>1</ldXref>
-            <BigEnd>0</BigEnd>
-            <AdsALst>1</AdsALst>
-            <AdsACrf>1</AdsACrf>
-            <AdsANop>0</AdsANop>
-            <AdsANot>0</AdsANot>
-            <AdsLLst>1</AdsLLst>
-            <AdsLmap>1</AdsLmap>
-            <AdsLcgr>1</AdsLcgr>
-            <AdsLsym>1</AdsLsym>
-            <AdsLszi>1</AdsLszi>
-            <AdsLtoi>1</AdsLtoi>
-            <AdsLsun>1</AdsLsun>
-            <AdsLven>1</AdsLven>
-            <AdsLsxf>1</AdsLsxf>
-            <RvctClst>0</RvctClst>
-            <GenPPlst>0</GenPPlst>
-            <AdsCpuType>"Cortex-M4"</AdsCpuType>
-            <RvctDeviceName></RvctDeviceName>
-            <mOS>0</mOS>
-            <uocRom>0</uocRom>
-            <uocRam>0</uocRam>
-            <hadIROM>1</hadIROM>
-            <hadIRAM>1</hadIRAM>
-            <hadXRAM>0</hadXRAM>
-            <uocXRam>0</uocXRam>
-            <RvdsVP>2</RvdsVP>
-            <hadIRAM2>0</hadIRAM2>
-            <hadIROM2>0</hadIROM2>
-            <StupSel>8</StupSel>
-            <useUlib>0</useUlib>
-            <EndSel>1</EndSel>
-            <uLtcg>0</uLtcg>
-            <nSecure>0</nSecure>
-            <RoSelD>3</RoSelD>
-            <RwSelD>3</RwSelD>
-            <CodeSel>0</CodeSel>
-            <OptFeed>0</OptFeed>
-            <NoZi1>0</NoZi1>
-            <NoZi2>0</NoZi2>
-            <NoZi3>0</NoZi3>
-            <NoZi4>0</NoZi4>
-            <NoZi5>0</NoZi5>
-            <Ro1Chk>0</Ro1Chk>
-            <Ro2Chk>0</Ro2Chk>
-            <Ro3Chk>0</Ro3Chk>
-            <Ir1Chk>1</Ir1Chk>
-            <Ir2Chk>0</Ir2Chk>
-            <Ra1Chk>0</Ra1Chk>
-            <Ra2Chk>0</Ra2Chk>
-            <Ra3Chk>0</Ra3Chk>
-            <Im1Chk>1</Im1Chk>
-            <Im2Chk>0</Im2Chk>
-            <OnChipMemories>
-              <Ocm1>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm1>
-              <Ocm2>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm2>
-              <Ocm3>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm3>
-              <Ocm4>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm4>
-              <Ocm5>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm5>
-              <Ocm6>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm6>
-              <IRAM>
-                <Type>0</Type>
-                <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
-              </IRAM>
-              <IROM>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x80000</Size>
-              </IROM>
-              <XRAM>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </XRAM>
-              <OCR_RVCT1>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT1>
-              <OCR_RVCT2>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT2>
-              <OCR_RVCT3>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT3>
-              <OCR_RVCT4>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x80000</Size>
-              </OCR_RVCT4>
-              <OCR_RVCT5>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT5>
-              <OCR_RVCT6>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT6>
-              <OCR_RVCT7>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT7>
-              <OCR_RVCT8>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT8>
-              <OCR_RVCT9>
-                <Type>0</Type>
-                <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
-              </OCR_RVCT9>
-              <OCR_RVCT10>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT10>
-            </OnChipMemories>
-            <RvctStartVector></RvctStartVector>
-          </ArmAdsMisc>
-          <Cads>
-            <interw>1</interw>
-            <Optim>4</Optim>
-            <oTime>1</oTime>
-            <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
-            <Strict>0</Strict>
-            <EnumInt>0</EnumInt>
-            <PlainCh>0</PlainCh>
-            <Ropi>0</Ropi>
-            <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
-            <uThumb>0</uThumb>
-            <uSurpInc>0</uSurpInc>
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diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_inputs.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_inputs.h
deleted file mode 100644
index c600c5a..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_inputs.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* Here are two different test images */
-
-//#define IMG_DATA {158,112,49,159,111,47,165,116,51,166,118,53,160,112,46,156,109,41,162,115,47,159,113,45,158,111,44,159,113,41,161,116,41,160,111,52,161,111,49,166,117,41,169,117,45,170,119,44,167,117,40,162,113,38,160,111,39,160,112,43,156,109,44,149,107,45,150,107,45,148,106,43,149,107,44,143,101,39,140,98,43,141,97,41,143,97,38,137,95,36,126,91,36,116,85,33,152,112,51,151,110,40,159,114,45,166,116,56,162,112,49,160,113,43,164,117,47,162,114,45,163,116,46,156,110,38,155,111,41,159,110,54,163,113,52,170,119,41,171,117,40,171,115,33,169,115,30,160,111,33,154,112,41,151,115,50,145,110,53,139,104,55,140,102,52,141,100,48,149,105,50,147,102,46,145,102,45,142,97,38,143,98,34,136,95,31,125,91,32,119,88,34,151,110,47,151,109,33,158,111,36,167,111,48,160,106,42,163,115,44,165,117,45,165,117,45,163,115,43,162,115,43,158,114,48,157,109,57,161,111,51,166,115,38,167,114,37,169,113,35,170,116,39,159,114,47,145,111,54,121,96,49,110,90,52,98,78,50,101,77,47,114,85,50,120,86,48,134,96,55,143,103,51,140,99,39,142,99,35,139,98,34,130,95,34,120,89,33,155,107,40,155,110,32,160,109,31,174,112,44,167,110,43,167,117,46,169,120,48,169,119,48,165,115,44,165,117,45,167,123,57,191,146,95,177,130,75,157,111,41,162,115,47,164,114,54,158,112,58,149,111,67,104,80,47,103,87,65,98,90,76,92,90,84,80,75,66,74,63,50,86,70,52,83,62,39,113,85,45,132,98,46,140,102,43,140,101,39,136,99,39,127,94,36,155,107,41,156,114,48,161,115,49,170,114,47,169,114,43,163,113,40,169,120,47,166,116,44,164,113,41,164,116,42,173,128,59,246,214,164,195,156,107,151,114,56,146,111,60,142,108,71,111,80,50,78,53,31,85,69,56,113,103,98,112,110,111,106,114,118,97,102,105,93,94,93,74,72,67,84,78,70,85,73,47,105,83,45,128,96,48,138,101,46,133,94,36,129,93,36,148,109,54,133,104,64,130,100,57,147,112,53,161,115,44,165,113,39,167,116,41,167,115,41,163,111,37,165,116,39,163,118,42,180,138,85,157,122,78,128,102,58,97,75,43,66,50,31,69,58,43,66,56,45,89,83,76,118,113,110,122,121,120,119,122,122,114,116,116,94,96,96,99,100,97,91,91,86,58,58,47,67,58,37,108,84,49,140,105,58,138,98,44,134,95,40,127,100,57,109,95,80,47,37,17,88,74,28,153,117,48,170,118,43,168,115,40,170,118,43,169,117,42,166,116,37,164,120,39,147,107,52,129,98,59,127,108,75,100,87,70,68,67,57,78,83,72,72,75,64,83,84,74,132,130,121,146,142,132,124,118,108,105,99,90,107,102,94,115,111,103,85,83,77,63,71,69,46,47,39,79,61,36,132,98,58,141,99,48,134,93,39,131,115,90,99,96,92,42,43,38,70,64,41,143,111,56,167,117,42,165,114,36,168,116,39,171,119,49,161,113,51,140,109,51,120,94,49,130,110,77,144,131,107,116,106,93,88,87,79,91,95,88,85,88,82,77,77,69,124,118,107,163,153,140,136,124,112,102,93,81,106,98,88,100,93,84,85,81,74,54,60,58,49,53,49,57,47,32,107,83,50,138,103,51,136,97,39,170,161,144,103,105,105,54,58,59,124,121,113,153,124,82,161,113,43,163,117,41,166,122,50,165,121,66,174,135,95,113,89,59,125,105,78,157,141,121,156,143,128,121,111,101,86,80,74,82,81,77,84,85,82,80,78,73,81,71,61,138,125,112,146,135,123,113,103,93,87,79,70,83,77,69,86,82,76,71,73,67,56,57,53,40,35,27,74,59,35,133,106,59,137,103,45,180,176,163,134,139,143,94,100,105,154,154,149,174,149,112,158,116,51,156,116,47,153,118,60,207,180,146,237,214,198,207,180,166,156,131,119,174,153,145,148,131,125,125,110,107,93,85,79,86,84,79,74,74,71,59,57,53,76,68,58,137,125,112,143,133,122,133,124,114,106,98,89,86,81,74,87,85,78,84,85,78,75,76,71,50,49,43,40,30,15,95,75,44,132,103,57,183,183,175,108,116,122,142,151,158,165,169,168,177,156,122,155,112,50,159,118,51,122,89,47,213,197,179,237,224,226,220,191,188,164,135,131,183,159,155,156,137,132,125,108,104,120,111,104,78,76,69,80,80,77,45,44,40,91,85,77,175,165,154,157,147,137,155,147,138,107,100,92,87,83,77,103,102,96,88,88,79,78,79,73,59,59,59,41,36,33,59,46,31,104,81,46,188,191,189,100,108,116,135,144,153,170,175,178,187,167,136,166,120,59,173,123,55,134,93,44,117,95,80,194,182,188,199,171,164,170,142,133,185,161,151,189,171,159,134,119,106,117,107,95,102,98,89,84,84,79,38,38,34,125,121,113,210,201,192,160,152,142,146,139,130,93,89,82,83,80,75,94,93,88,104,104,94,85,87,81,73,75,78,55,53,55,62,55,48,76,56,26,189,194,194,90,96,105,127,134,144,175,180,185,174,156,133,166,123,68,178,123,53,159,109,47,97,68,44,168,154,152,168,144,126,137,114,94,186,166,148,216,202,183,160,149,129,123,113,98,120,114,105,115,114,109,50,50,47,150,147,140,194,187,178,155,149,140,123,118,111,91,88,83,84,83,79,84,84,80,95,95,85,86,87,81,84,87,89,73,73,73,79,74,64,73,55,24,189,192,193,93,95,103,152,154,163,185,188,192,119,110,98,136,106,66,173,124,58,167,116,50,103,72,39,147,132,120,145,125,103,167,149,127,189,174,155,226,216,200,180,172,157,141,131,117,126,117,107,117,114,109,71,71,68,154,152,147,186,181,174,149,144,136,114,110,104,87,85,80,80,80,76,72,73,70,80,80,72,99,100,94,100,101,99,90,88,81,97,89,69,94,73,34,194,196,196,108,107,112,168,167,172,186,186,188,105,109,109,99,89,67,156,119,62,167,122,55,100,74,34,115,106,88,138,123,103,198,185,169,190,180,169,172,165,159,145,140,140,154,143,134,146,136,125,103,100,95,71,71,70,152,152,149,179,175,170,137,13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-
-
-#define IMG_DATA {235,235,235,231,231,231,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,232,233,233,231,233,232,231,233,231,233,233,230,233,232,232,232,234,232,231,234,232,232,232,233,233,230,232,233,231,233,233,233,232,232,232,232,232,232,232,232,232,233,233,233,233,233,233,232,232,232,238,238,238,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,237,234,233,236,234,233,236,236,234,234,236,234,234,235,237,234,234,238,235,236,237,236,236,235,236,236,234,236,236,236,235,235,235,235,235,235,235,235,235,236,236,236,236,236,236,235,235,235,237,237,237,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,234,234,236,233,231,236,234,231,235,235,234,234,235,236,227,230,233,231,235,238,231,233,235,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,235,235,234,234,234,238,238,238,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,235,234,233,233,230,232,232,231,228,230,232,223,226,231,186,192,197,209,216,219,207,210,213,228,228,230,236,235,235,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,235,235,235,235,235,237,237,237,234,234,234,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,234,234,234,234,234,234,235,235,235,235,235,235,234,234,234,234,234,234,235,235,235,235,235,235,236,238,236,233,237,237,219,225,230,203,210,219,163,172,179,195,205,208,214,218,221,230,229,232,237,235,237,235,235,235,235,235,235,235,235,235,235,236,236,236,236,236,236,236,236,236,236,236,239,239,238,236,235,235,236,235,235,236,235,235,236,235,235,236,235,235,235,236,235,235,235,235,234,234,234,235,235,235,237,236,236,237,236,236,234,235,236,232,233,234,235,237,237,229,231,232,208,216,218,194,205,210,185,198,207,174,188,200,165,179,189,184,196,202,207,215,220,226,228,232,236,235,237,236,236,235,236,236,235,236,236,235,236,236,236,237,237,237,237,237,237,237,237,237,228,229,229,228,227,228,232,230,231,231,228,230,234,232,233,237,236,236,237,237,235,236,237,235,237,235,236,237,235,236,239,236,237,239,237,238,225,229,230,224,228,229,233,237,238,221,226,228,183,197,204,161,180,190,159,180,191,154,176,190,144,163,177,143,159,171,156,169,177,198,206,211,233,238,239,236,237,234,235,236,233,235,235,235,235,236,236,236,238,237,237,237,237,239,237,238,212,220,222,224,230,233,230,234,238,227,232,234,229,234,234,234,237,236,237,238,235,238,237,236,239,237,238,239,237,238,239,236,237,240,238,239,201,204,203,219,222,221,233,236,235,214,218,218,193,204,210,185,201,210,184,201,211,173,191,203,165,182,196,159,174,187,162,176,185,186,199,204,229,239,240,234,239,238,233,238,237,233,238,238,234,239,238,236,239,238,237,239,238,238,238,238,216,234,241,221,236,243,225,238,246,225,239,243,227,240,240,231,238,237,236,237,235,238,236,235,238,236,237,238,236,237,237,237,237,239,239,239,197,198,196,220,221,218,233,234,231,230,231,229,209,213,217,209,216,222,219,228,235,208,218,227,209,221,234,210,224,235,217,233,240,218,235,241,225,240,243,228,238,240,228,239,240,230,240,240,230,240,239,235,240,239,237,240,239,238,238,238,118,140,149,119,138,148,124,142,153,136,155,161,172,188,191,225,234,233,235,236,233,237,234,232,236,233,234,235,235,235,235,237,236,233,237,235,214,216,214,226,228,226,232,234,232,236,237,236,228,230,232,227,230,235,231,236,241,225,232,239,225,237,247,217,233,243,201,219,226,185,204,211,172,189,195,167,179,186,167,180,185,186,199,201,223,235,235,235,241,239,236,240,239,238,240,239,109,130,141,103,121,133,108,125,137,111,127,137,146,159,165,222,229,231,227,228,225,229,226,224,236,232,233,234,234,234,231,236,234,230,237,235,229,234,235,231,235,236,232,237,238,230,235,236,231,236,238,231,237,240,229,237,241,223,232,238,191,206,213,164,184,191,146,165,172,137,156,163,134,149,159,128,140,153,121,133,143,149,162,166,216,228,229,234,241,239,235,240,238,237,240,239,195,212,224,188,202,215,199,211,224,200,211,223,209,217,227,223,227,231,213,213,211,211,209,206,216,213,214,220,222,222,219,226,225,210,221,219,209,219,223,211,221,225,216,225,230,220,229,233,225,234,237,226,236,239,225,237,241,218,231,237,183,204,208,175,198,203,181,200,207,178,194,202,186,197,211,170,178,196,142,151,164,185,195,202,219,230,233,231,240,238,234,241,239,236,240,239,193,207,222,191,202,217,202,211,224,214,217,234,223,225,241,214,219,227,203,208,208,171,174,174,177,180,183,207,213,214,174,184,188,98,112,121,93,114,126,101,121,132,111,129,139,122,138,147,137,152,161,153,167,174,202,216,220,223,236,237,218,232,235,220,233,238,223,234,240,217,226,233,221,228,237,212,219,229,196,203,212,222,230,237,219,227,234,221,230,233,232,239,242,235,241,242,113,130,152,111,125,147,113,125,141,125,131,151,138,145,165,170,182,193,191,201,205,190,199,204,208,219,226,216,230,234,158,172,183,54,71,92,45,70,91,49,73,91,53,73,90,66,84,98,102,114,129,159,168,179,221,227,233,234,239,241,233,237,241,227,231,237,223,228,233,207,211,217,202,208,212,211,218,220,212,219,223,199,206,214,179,186,196,188,197,205,211,221,227,221,231,234,61,81,108,69,86,114,63,79,100,68,85,102,123,141,155,139,155,164,151,157,164,195,200,207,214,228,234,206,223,228,163,180,190,103,121,138,95,112,131,101,117,135,138,151,168,181,192,207,207,212,223,221,222,232,219,219,227,205,203,212,183,186,195,158,166,174,147,154,163,131,138,147,125,133,140,130,139,144,136,146,152,133,142,151,128,137,147,138,153,160,182,197,203,197,212,216,40,53,77,58,70,94,85,98,116,127,144,153,132,151,156,96,107,110,119,115,118,163,158,161,173,180,182,184,194,197,182,194,198,181,193,200,183,194,202,198,209,217,218,228,236,200,210,217,174,181,186,159,165,172,145,150,159,132,136,149,116,125,138,98,111,123,94,106,118,99,111,123,105,118,128,107,121,130,122,135,145,138,151,161,150,164,174,157,174,184,188,206,213,185,203,208,13,15,35,26,29,47,134,140,151,206,216,220,138,150,150,118,123,123,141,133,134,172,162,162,181,181,180,207,209,211,220,224,225,228,234,233,224,234,232,230,241,240,226,238,238,176,189,190,144,159,163,138,154,162,142,158,170,145,163,177,154,171,187,149,165,182,149,165,182,154,171,187,157,174,189,160,177,191,173,190,204,187,204,217,190,207,218,178,196,208,165,183,193,157,175,183,5,5,24,58,62,79,200,207,217,225,232,239,197,205,212,199,207,211,212,212,218,226,224,229,229,230,237,233,236,246,232,238,245,230,238,239,209,221,220,223,238,239,221,238,241,210,228,234,198,217,228,180,200,214,193,216,230,188,213,229,189,212,231,194,214,234,192,212,232,184,204,224,172,193,212,171,191,209,161,181,197,144,165,179,136,156,169,131,146,161,128,143,158,138,154,165,39,45,71,145,155,179,190,204,222,186,196,216,184,197,217,192,211,229,194,211,230,194,208,227,194,206,227,191,203,228,192,207,228,190,207,221,177,193,207,180,198,215,154,176,193,147,169,188,145,161,184,156,171,195,146,163,186,113,133,156,114,137,161,132,157,180,126,150,173,111,135,158,92,115,138,91,112,135,93,114,133,94,116,131,105,125,140,121,133,151,129,141,158,129,142,156,122,135,161,162,179,207,143,160,194,137,154,189,131,152,187,128,152,190,127,150,192,130,150,193,131,150,192,128,147,190,127,147,189,129,149,189,129,149,188,124,145,186,104,126,163,100,122,154,102,120,154,118,134,170,112,128,163,94,109,145,94,112,148,94,117,153,87,112,144,83,103,136,80,97,130,83,103,134,93,111,139,101,117,141,108,121,144,115,125,146,121,133,148,130,144,156,73,87,109,76,90,113,77,90,122,80,93,127,84,98,134,87,102,142,87,102,147,90,105,150,94,111,152,102,119,160,107,124,165,113,131,172,115,137,181,118,136,186,118,132,180,120,133,175,115,136,172,110,133,168,106,127,163,100,119,155,95,109,148,85,101,139,79,97,132,80,92,127,80,94,129,77,100,133,80,100,129,82,98,122,92,104,126,113,119,138,125,135,146,136,149,156,13,25,41,3,11,25,9,16,35,18,26,48,18,26,52,21,25,56,20,25,58,22,30,61,26,36,62,34,43,70,42,51,77,48,59,87,52,69,106,60,75,121,66,77,126,70,79,126,71,87,127,72,88,126,67,81,120,60,72,112,55,67,106,53,68,104,53,69,103,57,69,102,57,71,105,57,78,110,72,89,115,87,100,119,104,113,128,120,124,136,130,136,141,137,146,149,36,46,55,11,16,20,8,13,19,32,44,53,36,45,58,22,25,41,8,11,30,3,8,24,1,4,17,0,2,15,0,2,15,0,4,20,6,13,42,5,18,56,1,19,60,3,23,62,13,29,71,24,38,81,21,33,77,21,31,76,21,38,78,22,44,79,30,50,83,39,58,90,57,70,101,85,90,118,113,115,138,123,123,138,116,115,125,122,123,128,134,139,137,153,160,158,35,41,45,26,27,26,13,19,18,27,41,41,71,81,84,70,70,76,49,50,57,27,31,37,15,15,21,5,5,11,2,2,7,0,0,7,17,17,35,57,64,91,31,50,78,10,36,62,4,30,60,4,30,62,7,30,63,14,35,69,25,43,74,41,55,83,62,71,99,86,97,123,122,124,146,144,131,149,132,120,135,114,105,114,117,111,116,132,134,133,146,152,146,172,179,175,16,15,17,13,10,9,4,10,8,3,12,11,45,44,46,65,52,57,54,43,47,36,33,35,18,18,20,4,4,7,2,2,4,0,1,3,7,8,15,118,117,134,161,158,179,131,128,148,112,112,131,105,105,125,105,103,124,109,105,127,118,107,126,138,115,133,154,126,144,151,126,141,127,106,116,105,86,91,106,94,97,120,116,116,129,130,129,142,147,144,164,172,165,184,194,190,40,40,35,12,10,7,0,3,3,0,4,4,12,6,7,30,12,17,32,12,17,21,10,12,7,6,7,2,1,3,2,1,2,3,2,3,0,0,2,68,58,64,182,128,146,205,130,148,196,127,144,194,123,141,195,119,137,187,113,129,172,110,122,150,96,106,123,75,83,103,66,69,95,71,70,104,93,88,122,118,113,129,132,126,132,141,135,152,162,158,171,182,176,185,197,194,69,77,64,26,29,21,1,1,1,1,1,2,4,1,0,12,2,5,18,3,9,12,2,5,4,1,2,2,0,0,2,0,0,4,0,1,1,1,1,32,12,11,153,45,59,203,47,68,195,46,67,191,48,69,179,50,67,155,49,59,119,42,49,91,38,42,81,48,46,94,77,71,117,110,102,125,126,116,125,128,120,129,135,128,144,153,147,162,176,171,173,187,183,184,198,196,83,94,82,47,52,43,1,1,1,2,1,2,2,0,0,5,1,2,7,1,5,4,0,2,1,0,0,1,0,0,1,0,0,3,0,0,1,2,0,27,3,2,142,25,38,205,32,54,198,25,46,169,25,43,121,25,36,85,29,34,74,41,39,85,66,56,102,92,82,121,113,105,128,124,115,122,126,115,121,127,118,132,139,131,147,157,150,165,179,174,176,191,187,186,201,199,92,102,93,54,60,50,6,7,3,3,2,1,2,2,0,1,3,1,1,3,3,1,2,2,1,1,1,1,0,0,1,0,0,1,1,1,0,3,2,15,1,0,102,19,28,157,31,47,117,17,23,74,13,12,56,27,22,74,58,55,99,90,81,115,115,99,122,126,111,124,124,112,123,123,113,125,130,119,128,135,126,136,145,137,148,159,151,162,176,171,177,192,188,188,202,201,87,99,89,43,51,37,19,23,11,11,12,4,8,10,2,5,11,4,2,10,4,2,7,2,3,4,1,3,4,1,3,4,1,2,3,2,0,6,6,4,5,2,42,13,13,71,21,24,53,27,25,57,50,41,80,77,62,113,98,82,132,113,101,134,126,113,123,126,112,116,125,111,120,128,115,131,138,126,139,148,137,143,154,145,156,168,161,169,184,179,182,197,193,188,202,201,82,96,82,46,57,36,36,44,22,31,35,17,27,30,15,22,28,15,17,26,13,16,23,12,18,21,12,19,21,13,20,22,14,19,23,15,19,27,20,23,31,21,37,40,27,64,55,45,87,70,67,104,88,81,116,102,85,128,112,88,139,121,105,131,122,110,117,122,107,115,127,112,123,133,119,131,139,127,139,149,138,148,160,151,159,172,164,174,189,183,185,200,196,187,202,200,85,101,83,62,75,48,58,67,38,55,61,37,51,56,35,47,53,33,46,53,34,48,55,38,49,55,40,51,56,41,53,58,44,55,62,46,59,67,45,68,71,48,81,84,59,104,96,74,116,103,83,127,109,92,133,116,97,127,121,97,127,127,107,118,124,106,114,125,108,122,131,117,129,136,123,136,145,133,141,152,141,149,162,153,158,171,163,168,183,178,180,195,191,186,200,199}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_parameter.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_parameter.h
deleted file mode 100644
index 09d0ca3..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_parameter.h
+++ /dev/null
@@ -1,43 +0,0 @@
-#define CONV1_IM_DIM 32
-#define CONV1_IM_CH 3
-#define CONV1_KER_DIM 5
-#define CONV1_PADDING 2
-#define CONV1_STRIDE 1
-#define CONV1_OUT_CH 32
-#define CONV1_OUT_DIM 32
-
-#define POOL1_KER_DIM 3
-#define POOL1_STRIDE 2
-#define POOL1_PADDING 0
-#define POOL1_OUT_DIM 16
-
-#define CONV2_IM_DIM 16
-#define CONV2_IM_CH 32
-#define CONV2_KER_DIM 5
-#define CONV2_PADDING 2
-#define CONV2_STRIDE 1
-#define CONV2_OUT_CH 16
-#define CONV2_OUT_DIM 16
-
-#define POOL2_KER_DIM 3
-#define POOL2_STRIDE 2
-#define POOL2_PADDING 0
-#define POOL2_OUT_DIM 8
-
-#define CONV3_IM_DIM 8
-#define CONV3_IM_CH 16
-#define CONV3_KER_DIM 5
-#define CONV3_PADDING 2
-#define CONV3_STRIDE 1
-#define CONV3_OUT_CH 32
-#define CONV3_OUT_DIM 8
-
-#define POOL3_KER_DIM 3
-#define POOL3_STRIDE 2
-#define POOL3_PADDING 0
-#define POOL3_OUT_DIM 4
-
-#define IP1_DIM 4*4*32
-#define IP1_IM_DIM 4
-#define IP1_IM_CH 32
-#define IP1_OUT 10
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_weights.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_weights.h
deleted file mode 100644
index 8d92d21..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_weights.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#define CONV1_WT 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-
-#define CONV1_BIAS {-49,-18,-7,-20,-12,-15,7,2,-10,-84,-72,-65,-53,-6,-87,-63,-64,-28,-28,-4,-3,-10,-52,-15,-5,-7,-31,-44,-102,-19,-5,-65}
-
-#define CONV2_WT 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-
-#define CONV2_BIAS {55,50,34,43,-37,35,-21,10,35,-53,-76,7,14,-1,92,20}
-
-#define CONV3_WT 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-
-#define CONV3_BIAS {18,36,-46,-45,64,8,13,-19,28,1,14,-57,23,20,-2,32,48,-11,85,73,-7,52,125,33,125,13,92,-72,89,-1,11,70}
-
-#define IP1_WT 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34,-1,-20}
-
-#define IP1_BIAS {30,-121,-51,77,40,20,46,-35,28,-33}
-
-#define CONV1_BIAS_LSHIFT 6
-#define CONV1_OUT_RSHIFT 9
-#define CONV2_BIAS_LSHIFT 4
-#define CONV2_OUT_RSHIFT 9
-#define CONV3_BIAS_LSHIFT 1
-#define CONV3_OUT_RSHIFT 7
-#define IP1_BIAS_LSHIFT 1
-#define IP1_OUT_RSHIFT 8
-#define INPUT_MEAN_SHIFT {125,123,114}
-#define INPUT_RIGHT_SHIFT {8,8,8}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/readme.txt b/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/readme.txt
deleted file mode 100644
index 774fef8..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/readme.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-CMSIS NN Lib example arm_nnexample_cifar10 for
-  Cortex-M4 and Cortex-M7.
-
-The example is configured for uVision Simulator.
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/EventRecorderStub.scvd b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/EventRecorderStub.scvd
deleted file mode 100644
index 2956b29..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/EventRecorderStub.scvd
+++ /dev/null
@@ -1,9 +0,0 @@
-<?xml version="1.0" encoding="utf-8"?>
-
-<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
-
-<component name="EventRecorderStub" version="1.0.0"/>       <!--name and version of the component-->
-  <events>
-  </events>
-
-</component_viewer>
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Compiler/EventRecorderConf.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Compiler/EventRecorderConf.h
deleted file mode 100644
index ddf354d..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Compiler/EventRecorderConf.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*------------------------------------------------------------------------------
- * MDK - Component ::Event Recorder
- * Copyright (c) 2016 ARM Germany GmbH. All rights reserved.
- *------------------------------------------------------------------------------
- * Name:    EventRecorderConf.h
- * Purpose: Event Recorder Configuration
- * Rev.:    V1.0.0
- *----------------------------------------------------------------------------*/
-
-//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
-
-// <h>Event Recorder
-
-//   <o>Number of Records
-//     <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
-//     <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
-//     <65536=>65536 <131072=>131072 <262144=>262144 <524288=>524288
-//     <1048576=>1048576
-//   <i>Configure size of Event Record Buffer (each record is 16 bytes)
-//   <i>Must be 2^n (min=8, max=1048576)
-#define EVENT_RECORD_COUNT      64U
-
-//   <o>Time Stamp Source
-//      <0=> DWT Cycle Counter  <1=> SysTick
-//      <3=> User Timer (Normal Reset)  <4=> User Timer (Power-On Reset)
-//   <i>Selects source for 32-bit time stamp
-#define EVENT_TIMESTAMP_SOURCE  1
-
-//   <h>SysTick Configuration
-//   <i>Configure values when Time Stamp Source is set to SysTick
-
-//     <o>SysTick Input Clock Frequency [Hz] <1-1000000000>
-//     <i>Defines SysTick input clock (typical identical with processor clock)
-#define SYSTICK_CLOCK           100000000U
-
-//     <o>SysTick Interrupt Period [us] <1-1000000000>
-//     <i>Defines time period of the SysTick timer interrupt
-#define SYSTICK_PERIOD_US       1000U
-
-//   </h>
-
-// </h>
-
-//------------- <<< end of configuration section >>> ---------------------------
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/startup_ARMCM0.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/startup_ARMCM0.s
deleted file mode 100644
index 9fc447d..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/startup_ARMCM0.s
+++ /dev/null
@@ -1,242 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM0.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM0 Device Series
-; * @version  V5.00
-; * @date     02. March 2016
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;/*
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-;*/
-
-
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000C00
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
-                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
-                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
-                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
-                DCD     MCIA_IRQHandler           ;  4:  MCIa
-                DCD     MCIB_IRQHandler           ;  5:  MCIb
-                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
-                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
-                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
-                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
-                DCD     AACI_IRQHandler           ; 10: AACI / AC97
-                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
-                DCD     ENET_IRQHandler           ; 12: Ethernet
-                DCD     USBDC_IRQHandler          ; 13: USB Device
-                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
-                DCD     CHLCD_IRQHandler          ; 15: Character LCD
-                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
-                DCD     CAN_IRQHandler            ; 17: CAN
-                DCD     LIN_IRQHandler            ; 18: LIN
-                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
-                DCD     0                         ; 20: Reserved
-                DCD     0                         ; 21: Reserved
-                DCD     0                         ; 22: Reserved
-                DCD     0                         ; 23: Reserved
-                DCD     0                         ; 24: Reserved
-                DCD     0                         ; 25: Reserved
-                DCD     0                         ; 26: Reserved
-                DCD     0                         ; 27: Reserved
-                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
-                DCD     0                         ; 29: Reserved - CPU FPGA
-                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
-                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
-__Vectors_End
-
-__Vectors_Size  EQU     __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  SystemInit
-                IMPORT  __main
-                LDR     R0, =SystemInit
-                BLX     R0
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler               [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler               [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler            [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler           [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WDT_IRQHandler            [WEAK]
-                EXPORT  RTC_IRQHandler            [WEAK]
-                EXPORT  TIM0_IRQHandler           [WEAK]
-                EXPORT  TIM2_IRQHandler           [WEAK]
-                EXPORT  MCIA_IRQHandler           [WEAK]
-                EXPORT  MCIB_IRQHandler           [WEAK]
-                EXPORT  UART0_IRQHandler          [WEAK]
-                EXPORT  UART1_IRQHandler          [WEAK]
-                EXPORT  UART2_IRQHandler          [WEAK]
-                EXPORT  UART3_IRQHandler          [WEAK]
-                EXPORT  UART4_IRQHandler          [WEAK]
-                EXPORT  AACI_IRQHandler           [WEAK]
-                EXPORT  CLCD_IRQHandler           [WEAK]
-                EXPORT  ENET_IRQHandler           [WEAK]
-                EXPORT  USBDC_IRQHandler          [WEAK]
-                EXPORT  USBHC_IRQHandler          [WEAK]
-                EXPORT  CHLCD_IRQHandler          [WEAK]
-                EXPORT  FLEXRAY_IRQHandler        [WEAK]
-                EXPORT  CAN_IRQHandler            [WEAK]
-                EXPORT  LIN_IRQHandler            [WEAK]
-                EXPORT  I2C_IRQHandler            [WEAK]
-                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
-                EXPORT  SPI_IRQHandler            [WEAK]
-
-WDT_IRQHandler
-RTC_IRQHandler
-TIM0_IRQHandler
-TIM2_IRQHandler
-MCIA_IRQHandler
-MCIB_IRQHandler
-UART0_IRQHandler
-UART1_IRQHandler
-UART2_IRQHandler
-UART3_IRQHandler
-UART4_IRQHandler
-AACI_IRQHandler
-CLCD_IRQHandler
-ENET_IRQHandler
-USBDC_IRQHandler
-USBHC_IRQHandler
-CHLCD_IRQHandler
-FLEXRAY_IRQHandler
-CAN_IRQHandler
-LIN_IRQHandler
-I2C_IRQHandler
-CPU_CLCD_IRQHandler
-SPI_IRQHandler
-                B       .
-
-                ENDP
-
-
-                ALIGN
-
-
-; User Initial Stack & Heap
-
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __initial_sp
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-
-                IMPORT  __use_two_region_memory
-                EXPORT  __user_initial_stackheap
-
-__user_initial_stackheap PROC
-                LDR     R0, =  Heap_Mem
-                LDR     R1, =(Stack_Mem + Stack_Size)
-                LDR     R2, = (Heap_Mem +  Heap_Size)
-                LDR     R3, = Stack_Mem
-                BX      LR
-                ENDP
-
-                ALIGN
-
-                ENDIF
-
-
-                END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/system_ARMCM0.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/system_ARMCM0.c
deleted file mode 100644
index 66829ad..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/system_ARMCM0.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/**************************************************************************//**
- * @file     system_ARMCM0.c
- * @brief    CMSIS Device System Source File for
- *           ARMCM0 Device Series
- * @version  V5.00
- * @date     08. April 2016
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ARMCM0.h"
-
-/*----------------------------------------------------------------------------
-  Define clocks
- *----------------------------------------------------------------------------*/
-#define  XTAL            ( 5000000U)      /* Oscillator frequency */
-
-#define  SYSTEM_CLOCK    (5 * XTAL)
-
-
-/*----------------------------------------------------------------------------
-  System Core Clock Variable
- *----------------------------------------------------------------------------*/
-uint32_t SystemCoreClock = SYSTEM_CLOCK;
-
-
-/*----------------------------------------------------------------------------
-  System Core Clock update function
- *----------------------------------------------------------------------------*/
-void SystemCoreClockUpdate (void)
-{
-  SystemCoreClock = SYSTEM_CLOCK;
-}
-
-/*----------------------------------------------------------------------------
-  System initialization function
- *----------------------------------------------------------------------------*/
-void SystemInit (void)
-{
-  SystemCoreClock = SYSTEM_CLOCK;
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/startup_ARMCM3.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/startup_ARMCM3.s
deleted file mode 100644
index 16e56b0..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/startup_ARMCM3.s
+++ /dev/null
@@ -1,262 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM3.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM3 Device Series
-; * @version  V5.00
-; * @date     02. March 2016
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;/*
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-;*/
-
-
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000C00
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     MemManage_Handler         ; MPU Fault Handler
-                DCD     BusFault_Handler          ; Bus Fault Handler
-                DCD     UsageFault_Handler        ; Usage Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     DebugMon_Handler          ; Debug Monitor Handler
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
-                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
-                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
-                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
-                DCD     MCIA_IRQHandler           ;  4:  MCIa
-                DCD     MCIB_IRQHandler           ;  5:  MCIb
-                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
-                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
-                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
-                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
-                DCD     AACI_IRQHandler           ; 10: AACI / AC97
-                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
-                DCD     ENET_IRQHandler           ; 12: Ethernet
-                DCD     USBDC_IRQHandler          ; 13: USB Device
-                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
-                DCD     CHLCD_IRQHandler          ; 15: Character LCD
-                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
-                DCD     CAN_IRQHandler            ; 17: CAN
-                DCD     LIN_IRQHandler            ; 18: LIN
-                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
-                DCD     0                         ; 20: Reserved
-                DCD     0                         ; 21: Reserved
-                DCD     0                         ; 22: Reserved
-                DCD     0                         ; 23: Reserved
-                DCD     0                         ; 24: Reserved
-                DCD     0                         ; 25: Reserved
-                DCD     0                         ; 26: Reserved
-                DCD     0                         ; 27: Reserved
-                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
-                DCD     0                         ; 29: Reserved - CPU FPGA
-                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
-                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
-__Vectors_End
-
-__Vectors_Size  EQU     __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  SystemInit
-                IMPORT  __main
-                LDR     R0, =SystemInit
-                BLX     R0
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler               [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler         [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler         [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler          [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler        [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler               [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler          [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler            [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler           [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WDT_IRQHandler            [WEAK]
-                EXPORT  RTC_IRQHandler            [WEAK]
-                EXPORT  TIM0_IRQHandler           [WEAK]
-                EXPORT  TIM2_IRQHandler           [WEAK]
-                EXPORT  MCIA_IRQHandler           [WEAK]
-                EXPORT  MCIB_IRQHandler           [WEAK]
-                EXPORT  UART0_IRQHandler          [WEAK]
-                EXPORT  UART1_IRQHandler          [WEAK]
-                EXPORT  UART2_IRQHandler          [WEAK]
-                EXPORT  UART3_IRQHandler          [WEAK]
-                EXPORT  UART4_IRQHandler          [WEAK]
-                EXPORT  AACI_IRQHandler           [WEAK]
-                EXPORT  CLCD_IRQHandler           [WEAK]
-                EXPORT  ENET_IRQHandler           [WEAK]
-                EXPORT  USBDC_IRQHandler          [WEAK]
-                EXPORT  USBHC_IRQHandler          [WEAK]
-                EXPORT  CHLCD_IRQHandler          [WEAK]
-                EXPORT  FLEXRAY_IRQHandler        [WEAK]
-                EXPORT  CAN_IRQHandler            [WEAK]
-                EXPORT  LIN_IRQHandler            [WEAK]
-                EXPORT  I2C_IRQHandler            [WEAK]
-                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
-                EXPORT  SPI_IRQHandler            [WEAK]
-
-WDT_IRQHandler
-RTC_IRQHandler
-TIM0_IRQHandler
-TIM2_IRQHandler
-MCIA_IRQHandler
-MCIB_IRQHandler
-UART0_IRQHandler
-UART1_IRQHandler
-UART2_IRQHandler
-UART3_IRQHandler
-UART4_IRQHandler
-AACI_IRQHandler
-CLCD_IRQHandler
-ENET_IRQHandler
-USBDC_IRQHandler
-USBHC_IRQHandler
-CHLCD_IRQHandler
-FLEXRAY_IRQHandler
-CAN_IRQHandler
-LIN_IRQHandler
-I2C_IRQHandler
-CPU_CLCD_IRQHandler
-SPI_IRQHandler
-                B       .
-
-                ENDP
-
-
-                ALIGN
-
-
-; User Initial Stack & Heap
-
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __initial_sp
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-
-                IMPORT  __use_two_region_memory
-                EXPORT  __user_initial_stackheap
-
-__user_initial_stackheap PROC
-                LDR     R0, =  Heap_Mem
-                LDR     R1, =(Stack_Mem + Stack_Size)
-                LDR     R2, = (Heap_Mem +  Heap_Size)
-                LDR     R3, = Stack_Mem
-                BX      LR
-                ENDP
-
-                ALIGN
-
-                ENDIF
-
-
-                END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/system_ARMCM3.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/system_ARMCM3.c
deleted file mode 100644
index f08df7a..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/system_ARMCM3.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/**************************************************************************//**
- * @file     system_ARMCM3.c
- * @brief    CMSIS Device System Source File for
- *           ARMCM3 Device Series
- * @version  V5.00
- * @date     08. April 2016
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ARMCM3.h"
-
-/*----------------------------------------------------------------------------
-  Define clocks
- *----------------------------------------------------------------------------*/
-#define  XTAL            ( 5000000U)      /* Oscillator frequency */
-
-#define  SYSTEM_CLOCK    (5 * XTAL)
-
-
-/*----------------------------------------------------------------------------
-  Externals
- *----------------------------------------------------------------------------*/
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
-  extern uint32_t __Vectors;
-#endif
-
-/*----------------------------------------------------------------------------
-  System Core Clock Variable
- *----------------------------------------------------------------------------*/
-uint32_t SystemCoreClock = SYSTEM_CLOCK;
-
-
-/*----------------------------------------------------------------------------
-  System Core Clock update function
- *----------------------------------------------------------------------------*/
-void SystemCoreClockUpdate (void)
-{
-  SystemCoreClock = SYSTEM_CLOCK;
-}
-
-/*----------------------------------------------------------------------------
-  System initialization function
- *----------------------------------------------------------------------------*/
-void SystemInit (void)
-{
-
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
-  SCB->VTOR = (uint32_t) &__Vectors;
-#endif
-
-  SystemCoreClock = SYSTEM_CLOCK;
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
deleted file mode 100644
index dae6439..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
+++ /dev/null
@@ -1,262 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM4.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM4 Device Series
-; * @version  V5.00
-; * @date     02. March 2016
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;/*
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-;*/
-
-
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000C00
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     MemManage_Handler         ; MPU Fault Handler
-                DCD     BusFault_Handler          ; Bus Fault Handler
-                DCD     UsageFault_Handler        ; Usage Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     DebugMon_Handler          ; Debug Monitor Handler
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
-                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
-                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
-                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
-                DCD     MCIA_IRQHandler           ;  4:  MCIa
-                DCD     MCIB_IRQHandler           ;  5:  MCIb
-                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
-                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
-                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
-                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
-                DCD     AACI_IRQHandler           ; 10: AACI / AC97
-                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
-                DCD     ENET_IRQHandler           ; 12: Ethernet
-                DCD     USBDC_IRQHandler          ; 13: USB Device
-                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
-                DCD     CHLCD_IRQHandler          ; 15: Character LCD
-                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
-                DCD     CAN_IRQHandler            ; 17: CAN
-                DCD     LIN_IRQHandler            ; 18: LIN
-                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
-                DCD     0                         ; 20: Reserved
-                DCD     0                         ; 21: Reserved
-                DCD     0                         ; 22: Reserved
-                DCD     0                         ; 23: Reserved
-                DCD     0                         ; 24: Reserved
-                DCD     0                         ; 25: Reserved
-                DCD     0                         ; 26: Reserved
-                DCD     0                         ; 27: Reserved
-                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
-                DCD     0                         ; 29: Reserved - CPU FPGA
-                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
-                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
-__Vectors_End
-
-__Vectors_Size  EQU     __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  SystemInit
-                IMPORT  __main
-                LDR     R0, =SystemInit
-                BLX     R0
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler               [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler         [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler         [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler          [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler        [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler               [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler          [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler            [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler           [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WDT_IRQHandler            [WEAK]
-                EXPORT  RTC_IRQHandler            [WEAK]
-                EXPORT  TIM0_IRQHandler           [WEAK]
-                EXPORT  TIM2_IRQHandler           [WEAK]
-                EXPORT  MCIA_IRQHandler           [WEAK]
-                EXPORT  MCIB_IRQHandler           [WEAK]
-                EXPORT  UART0_IRQHandler          [WEAK]
-                EXPORT  UART1_IRQHandler          [WEAK]
-                EXPORT  UART2_IRQHandler          [WEAK]
-                EXPORT  UART3_IRQHandler          [WEAK]
-                EXPORT  UART4_IRQHandler          [WEAK]
-                EXPORT  AACI_IRQHandler           [WEAK]
-                EXPORT  CLCD_IRQHandler           [WEAK]
-                EXPORT  ENET_IRQHandler           [WEAK]
-                EXPORT  USBDC_IRQHandler          [WEAK]
-                EXPORT  USBHC_IRQHandler          [WEAK]
-                EXPORT  CHLCD_IRQHandler          [WEAK]
-                EXPORT  FLEXRAY_IRQHandler        [WEAK]
-                EXPORT  CAN_IRQHandler            [WEAK]
-                EXPORT  LIN_IRQHandler            [WEAK]
-                EXPORT  I2C_IRQHandler            [WEAK]
-                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
-                EXPORT  SPI_IRQHandler            [WEAK]
-
-WDT_IRQHandler
-RTC_IRQHandler
-TIM0_IRQHandler
-TIM2_IRQHandler
-MCIA_IRQHandler
-MCIB_IRQHandler
-UART0_IRQHandler
-UART1_IRQHandler
-UART2_IRQHandler
-UART3_IRQHandler
-UART4_IRQHandler
-AACI_IRQHandler
-CLCD_IRQHandler
-ENET_IRQHandler
-USBDC_IRQHandler
-USBHC_IRQHandler
-CHLCD_IRQHandler
-FLEXRAY_IRQHandler
-CAN_IRQHandler
-LIN_IRQHandler
-I2C_IRQHandler
-CPU_CLCD_IRQHandler
-SPI_IRQHandler
-                B       .
-
-                ENDP
-
-
-                ALIGN
-
-
-; User Initial Stack & Heap
-
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __initial_sp
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-
-                IMPORT  __use_two_region_memory
-                EXPORT  __user_initial_stackheap
-
-__user_initial_stackheap PROC
-                LDR     R0, =  Heap_Mem
-                LDR     R1, =(Stack_Mem + Stack_Size)
-                LDR     R2, = (Heap_Mem +  Heap_Size)
-                LDR     R3, = Stack_Mem
-                BX      LR
-                ENDP
-
-                ALIGN
-
-                ENDIF
-
-
-                END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/system_ARMCM4.c
deleted file mode 100644
index 070fa1e..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/system_ARMCM4.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/**************************************************************************//**
- * @file     system_ARMCM4.c
- * @brief    CMSIS Device System Source File for
- *           ARMCM4 Device Series
- * @version  V5.00
- * @date     08. April 2016
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined (ARMCM4)
-  #include "ARMCM4.h"
-#elif defined (ARMCM4_FP)
-  #include "ARMCM4_FP.h"
-#else
-  #error device not specified!
-#endif
-
-/*----------------------------------------------------------------------------
-  Define clocks
- *----------------------------------------------------------------------------*/
-#define  XTAL            ( 5000000U)      /* Oscillator frequency */
-
-#define  SYSTEM_CLOCK    (5 * XTAL)
-
-
-/*----------------------------------------------------------------------------
-  Externals
- *----------------------------------------------------------------------------*/
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
-  extern uint32_t __Vectors;
-#endif
-
-/*----------------------------------------------------------------------------
-  System Core Clock Variable
- *----------------------------------------------------------------------------*/
-uint32_t SystemCoreClock = SYSTEM_CLOCK;
-
-
-/*----------------------------------------------------------------------------
-  System Core Clock update function
- *----------------------------------------------------------------------------*/
-void SystemCoreClockUpdate (void)
-{
-  SystemCoreClock = SYSTEM_CLOCK;
-}
-
-/*----------------------------------------------------------------------------
-  System initialization function
- *----------------------------------------------------------------------------*/
-void SystemInit (void)
-{
-
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
-  SCB->VTOR = (uint32_t) &__Vectors;
-#endif
-
-#if defined (__FPU_USED) && (__FPU_USED == 1)
-  SCB->CPACR |= ((3U << 10*2) |           /* set CP10 Full Access */
-                 (3U << 11*2)  );         /* set CP11 Full Access */
-#endif
-
-#ifdef UNALIGNED_SUPPORT_DISABLE
-  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
-#endif
-
-  SystemCoreClock = SYSTEM_CLOCK;
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/gcc_arm.ld b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/gcc_arm.ld
deleted file mode 100644
index b987fd1..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/gcc_arm.ld
+++ /dev/null
@@ -1,196 +0,0 @@
-/* Linker script to configure memory regions. */
-MEMORY
-{
-  FLASH (rx)  : ORIGIN = 0x00000000, LENGTH = 512K
-  RAM   (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
-}
-
-/* Library configurations */
-GROUP(libgcc.a libc.a libm.a libnosys.a)
-
-/* Linker script to place sections and symbol values. Should be used together
- * with other linker script that defines memory regions FLASH and RAM.
- * It references following symbols, which must be defined in code:
- *   Reset_Handler : Entry of reset handler
- *
- * It defines following symbols, which code can use without definition:
- *   __exidx_start
- *   __exidx_end
- *   __copy_table_start__
- *   __copy_table_end__
- *   __zero_table_start__
- *   __zero_table_end__
- *   __etext
- *   __data_start__
- *   __preinit_array_start
- *   __preinit_array_end
- *   __init_array_start
- *   __init_array_end
- *   __fini_array_start
- *   __fini_array_end
- *   __data_end__
- *   __bss_start__
- *   __bss_end__
- *   __end__
- *   end
- *   __HeapBase
- *   __HeapLimit
- *   __StackLimit
- *   __StackTop
- *   __stack
- *   __Vectors_End
- *   __Vectors_Size
- */
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
-	.text :
-	{
-		KEEP(*(.vectors))
-		__Vectors_End = .;
-		__Vectors_Size = __Vectors_End - __Vectors;
-		__end__ = .;
-
-		*(.text*)
-
-		KEEP(*(.init))
-		KEEP(*(.fini))
-
-		/* .ctors */
-		*crtbegin.o(.ctors)
-		*crtbegin?.o(.ctors)
-		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
-		*(SORT(.ctors.*))
-		*(.ctors)
-
-		/* .dtors */
- 		*crtbegin.o(.dtors)
- 		*crtbegin?.o(.dtors)
- 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
- 		*(SORT(.dtors.*))
- 		*(.dtors)
-
-		*(.rodata*)
-
-		KEEP(*(.eh_frame*))
-	} > FLASH
-
-	.ARM.extab :
-	{
-		*(.ARM.extab* .gnu.linkonce.armextab.*)
-	} > FLASH
-
-	__exidx_start = .;
-	.ARM.exidx :
-	{
-		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
-	} > FLASH
-	__exidx_end = .;
-
-	/* To copy multiple ROM to RAM sections,
-	 * uncomment .copy.table section and,
-	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.copy.table :
-	{
-		. = ALIGN(4);
-		__copy_table_start__ = .;
-		LONG (__etext)
-		LONG (__data_start__)
-		LONG (__data_end__ - __data_start__)
-		LONG (__etext2)
-		LONG (__data2_start__)
-		LONG (__data2_end__ - __data2_start__)
-		__copy_table_end__ = .;
-	} > FLASH
-	*/
-
-	/* To clear multiple BSS sections,
-	 * uncomment .zero.table section and,
-	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.zero.table :
-	{
-		. = ALIGN(4);
-		__zero_table_start__ = .;
-		LONG (__bss_start__)
-		LONG (__bss_end__ - __bss_start__)
-		LONG (__bss2_start__)
-		LONG (__bss2_end__ - __bss2_start__)
-		__zero_table_end__ = .;
-	} > FLASH
-	*/
-
-	__etext = .;
-
-	.data : AT (__etext)
-	{
-		__data_start__ = .;
-		*(vtable)
-		*(.data*)
-
-		. = ALIGN(4);
-		/* preinit data */
-		PROVIDE_HIDDEN (__preinit_array_start = .);
-		KEEP(*(.preinit_array))
-		PROVIDE_HIDDEN (__preinit_array_end = .);
-
-		. = ALIGN(4);
-		/* init data */
-		PROVIDE_HIDDEN (__init_array_start = .);
-		KEEP(*(SORT(.init_array.*)))
-		KEEP(*(.init_array))
-		PROVIDE_HIDDEN (__init_array_end = .);
-
-
-		. = ALIGN(4);
-		/* finit data */
-		PROVIDE_HIDDEN (__fini_array_start = .);
-		KEEP(*(SORT(.fini_array.*)))
-		KEEP(*(.fini_array))
-		PROVIDE_HIDDEN (__fini_array_end = .);
-
-		KEEP(*(.jcr*))
-		. = ALIGN(4);
-		/* All data end */
-		__data_end__ = .;
-
-	} > RAM
-
-	.bss :
-	{
-		. = ALIGN(4);
-		__bss_start__ = .;
-		*(.bss*)
-		*(COMMON)
-		. = ALIGN(4);
-		__bss_end__ = .;
-	} > RAM
-
-	.heap (COPY):
-	{
-		__HeapBase = .;
-		__end__ = .;
-		end = __end__;
-		KEEP(*(.heap*))
-		__HeapLimit = .;
-	} > RAM
-
-	/* .stack_dummy section doesn't contains any symbols. It is only
-	 * used for linker to calculate size of stack sections, and assign
-	 * values to stack symbols later */
-	.stack_dummy (COPY):
-	{
-		KEEP(*(.stack*))
-	} > RAM
-
-	/* Set stack top to end of RAM, and stack limit move down by
-	 * size of stack_dummy section */
-	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
-	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
-	PROVIDE(__stack = __StackTop);
-
-	/* Check if data + heap + stack exceeds RAM limit */
-	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
deleted file mode 100644
index 26edb9f..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
+++ /dev/null
@@ -1,295 +0,0 @@
-/**************************************************************************//**
- * @file     startup_ARMCM7.s
- * @brief    CMSIS Core Device Startup File for
- *           ARMCM7 Device Series
- * @version  V5.00
- * @date     26. April 2016
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <stdint.h>
-
-
-/*----------------------------------------------------------------------------
-  Linker generated Symbols
- *----------------------------------------------------------------------------*/
-extern uint32_t __etext;
-extern uint32_t __data_start__;
-extern uint32_t __data_end__;
-extern uint32_t __copy_table_start__;
-extern uint32_t __copy_table_end__;
-extern uint32_t __zero_table_start__;
-extern uint32_t __zero_table_end__;
-extern uint32_t __bss_start__;
-extern uint32_t __bss_end__;
-extern uint32_t __StackTop;
-
-/*----------------------------------------------------------------------------
-  Exception / Interrupt Handler Function Prototype
- *----------------------------------------------------------------------------*/
-typedef void( *pFunc )( void );
-
-
-/*----------------------------------------------------------------------------
-  External References
- *----------------------------------------------------------------------------*/
-#ifndef __START
-extern void  _start(void) __attribute__((noreturn));    /* PreeMain (C library entry point) */
-#else
-extern int  __START(void) __attribute__((noreturn));    /* main entry point */
-#endif
-
-#ifndef __NO_SYSTEM_INIT
-extern void SystemInit (void);            /* CMSIS System Initialization      */
-#endif
-
-
-/*----------------------------------------------------------------------------
-  Internal References
- *----------------------------------------------------------------------------*/
-void Default_Handler(void);                          /* Default empty handler */
-void Reset_Handler(void);                            /* Reset Handler */
-
-
-/*----------------------------------------------------------------------------
-  User Initial Stack & Heap
- *----------------------------------------------------------------------------*/
-#ifndef __STACK_SIZE
-  #define	__STACK_SIZE  0x00000400
-#endif
-static uint8_t stack[__STACK_SIZE] __attribute__ ((aligned(8), used, section(".stack")));
-
-#ifndef __HEAP_SIZE
-  #define	__HEAP_SIZE   0x00000C00
-#endif
-#if __HEAP_SIZE > 0
-static uint8_t heap[__HEAP_SIZE]   __attribute__ ((aligned(8), used, section(".heap")));
-#endif
-
-
-/*----------------------------------------------------------------------------
-  Exception / Interrupt Handler
- *----------------------------------------------------------------------------*/
-/* Cortex-M7 Processor Exceptions */
-void NMI_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
-void HardFault_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
-void MemManage_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
-void BusFault_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void UsageFault_Handler  (void) __attribute__ ((weak, alias("Default_Handler")));
-void SVC_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
-void DebugMon_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void PendSV_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
-void SysTick_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
-
-/* ARMCM7 Specific Interrupts */
-void WDT_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
-void RTC_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
-void TIM0_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void TIM2_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void MCIA_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void MCIB_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void UART0_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void UART1_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void UART2_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void UART4_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void AACI_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void CLCD_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void ENET_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
-void USBDC_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void USBHC_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void CHLCD_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void FLEXRAY_IRQHandler  (void) __attribute__ ((weak, alias("Default_Handler")));
-void CAN_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
-void LIN_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
-void I2C_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
-void CPU_CLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
-void UART3_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
-void SPI_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
-
-
-/*----------------------------------------------------------------------------
-  Exception / Interrupt Vector table
- *----------------------------------------------------------------------------*/
-const pFunc __Vectors[] __attribute__ ((section(".vectors"))) = {
-  /* Cortex-M7 Exceptions Handler */
-  (pFunc)((uint32_t)&__StackTop),           /*      Initial Stack Pointer     */
-  Reset_Handler,                            /*      Reset Handler             */
-  NMI_Handler,                              /*      NMI Handler               */
-  HardFault_Handler,                        /*      Hard Fault Handler        */
-  MemManage_Handler,                        /*      MPU Fault Handler         */
-  BusFault_Handler,                         /*      Bus Fault Handler         */
-  UsageFault_Handler,                       /*      Usage Fault Handler       */
-  0,                                        /*      Reserved                  */
-  0,                                        /*      Reserved                  */
-  0,                                        /*      Reserved                  */
-  0,                                        /*      Reserved                  */
-  SVC_Handler,                              /*      SVCall Handler            */
-  DebugMon_Handler,                         /*      Debug Monitor Handler     */
-  0,                                        /*      Reserved                  */
-  PendSV_Handler,                           /*      PendSV Handler            */
-  SysTick_Handler,                          /*      SysTick Handler           */
-
-  /* External interrupts */
-  WDT_IRQHandler,                           /*  0:  Watchdog Timer            */
-  RTC_IRQHandler,                           /*  1:  Real Time Clock           */
-  TIM0_IRQHandler,                          /*  2:  Timer0 / Timer1           */
-  TIM2_IRQHandler,                          /*  3:  Timer2 / Timer3           */
-  MCIA_IRQHandler,                          /*  4:  MCIa                      */
-  MCIB_IRQHandler,                          /*  5:  MCIb                      */
-  UART0_IRQHandler,                         /*  6:  UART0 - DUT FPGA          */
-  UART1_IRQHandler,                         /*  7:  UART1 - DUT FPGA          */
-  UART2_IRQHandler,                         /*  8:  UART2 - DUT FPGA          */
-  UART4_IRQHandler,                         /*  9:  UART4 - not connected     */
-  AACI_IRQHandler,                          /* 10: AACI / AC97                */
-  CLCD_IRQHandler,                          /* 11: CLCD Combined Interrupt    */
-  ENET_IRQHandler,                          /* 12: Ethernet                   */
-  USBDC_IRQHandler,                         /* 13: USB Device                 */
-  USBHC_IRQHandler,                         /* 14: USB Host Controller        */
-  CHLCD_IRQHandler,                         /* 15: Character LCD              */
-  FLEXRAY_IRQHandler,                       /* 16: Flexray                    */
-  CAN_IRQHandler,                           /* 17: CAN                        */
-  LIN_IRQHandler,                           /* 18: LIN                        */
-  I2C_IRQHandler,                           /* 19: I2C ADC/DAC                */
-  0,                                        /* 20: Reserved                   */
-  0,                                        /* 21: Reserved                   */
-  0,                                        /* 22: Reserved                   */
-  0,                                        /* 23: Reserved                   */
-  0,                                        /* 24: Reserved                   */
-  0,                                        /* 25: Reserved                   */
-  0,                                        /* 26: Reserved                   */
-  0,                                        /* 27: Reserved                   */
-  CPU_CLCD_IRQHandler,                      /* 28: Reserved - CPU FPGA CLCD   */
-  0,                                        /* 29: Reserved - CPU FPGA        */
-  UART3_IRQHandler,                         /* 30: UART3    - CPU FPGA        */
-  SPI_IRQHandler                            /* 31: SPI Touchscreen - CPU FPGA */
-};
-
-
-/*----------------------------------------------------------------------------
-  Reset Handler called on controller reset
- *----------------------------------------------------------------------------*/
-void Reset_Handler(void) {
-  uint32_t *pSrc, *pDest;
-  uint32_t *pTable __attribute__((unused));
-
-/*  Firstly it copies data from read only memory to RAM. There are two schemes
- *  to copy. One can copy more than one sections. Another can only copy
- *  one section.  The former scheme needs more instructions and read-only
- *  data to implement than the latter.
- *  Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes.  */
-
-#ifdef __STARTUP_COPY_MULTIPLE
-/*  Multiple sections scheme.
- *
- *  Between symbol address __copy_table_start__ and __copy_table_end__,
- *  there are array of triplets, each of which specify:
- *    offset 0: LMA of start of a section to copy from
- *    offset 4: VMA of start of a section to copy to
- *    offset 8: size of the section to copy. Must be multiply of 4
- *
- *  All addresses must be aligned to 4 bytes boundary.
- */
-  pTable = &__copy_table_start__;
-
-  for (; pTable < &__copy_table_end__; pTable = pTable + 3) {
-		pSrc  = (uint32_t*)*(pTable + 0);
-		pDest = (uint32_t*)*(pTable + 1);
-		for (; pDest < (uint32_t*)(*(pTable + 1) + *(pTable + 2)) ; ) {
-      *pDest++ = *pSrc++;
-		}
-	}
-#else
-/*  Single section scheme.
- *
- *  The ranges of copy from/to are specified by following symbols
- *    __etext: LMA of start of the section to copy from. Usually end of text
- *    __data_start__: VMA of start of the section to copy to
- *    __data_end__: VMA of end of the section to copy to
- *
- *  All addresses must be aligned to 4 bytes boundary.
- */
-  pSrc  = &__etext;
-  pDest = &__data_start__;
-
-  for ( ; pDest < &__data_end__ ; ) {
-    *pDest++ = *pSrc++;
-  }
-#endif /*__STARTUP_COPY_MULTIPLE */
-
-/*  This part of work usually is done in C library startup code. Otherwise,
- *  define this macro to enable it in this startup.
- *
- *  There are two schemes too. One can clear multiple BSS sections. Another
- *  can only clear one section. The former is more size expensive than the
- *  latter.
- *
- *  Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
- *  Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
- */
-#ifdef __STARTUP_CLEAR_BSS_MULTIPLE
-/*  Multiple sections scheme.
- *
- *  Between symbol address __copy_table_start__ and __copy_table_end__,
- *  there are array of tuples specifying:
- *    offset 0: Start of a BSS section
- *    offset 4: Size of this BSS section. Must be multiply of 4
- */
-  pTable = &__zero_table_start__;
-
-  for (; pTable < &__zero_table_end__; pTable = pTable + 2) {
-		pDest = (uint32_t*)*(pTable + 0);
-		for (; pDest < (uint32_t*)(*(pTable + 0) + *(pTable + 1)) ; ) {
-      *pDest++ = 0;
-		}
-	}
-#elif defined (__STARTUP_CLEAR_BSS)
-/*  Single BSS section scheme.
- *
- *  The BSS section is specified by following symbols
- *    __bss_start__: start of the BSS section.
- *    __bss_end__: end of the BSS section.
- *
- *  Both addresses must be aligned to 4 bytes boundary.
- */
-  pDest = &__bss_start__;
-
-  for ( ; pDest < &__bss_end__ ; ) {
-    *pDest++ = 0UL;
-  }
-#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
-
-#ifndef __NO_SYSTEM_INIT
-	SystemInit();
-#endif
-
-#ifndef __START
-#define __START _start
-#endif
-	__START();
-
-}
-
-
-/*----------------------------------------------------------------------------
-  Default Handler for Exceptions / Interrupts
- *----------------------------------------------------------------------------*/
-void Default_Handler(void) {
-
-	while(1);
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
deleted file mode 100644
index b69f038..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
+++ /dev/null
@@ -1,262 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM7.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM7 Device Series
-; * @version  V5.00
-; * @date     02. March 2016
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;/*
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-;*/
-
-
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000C00
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     MemManage_Handler         ; MPU Fault Handler
-                DCD     BusFault_Handler          ; Bus Fault Handler
-                DCD     UsageFault_Handler        ; Usage Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     DebugMon_Handler          ; Debug Monitor Handler
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
-                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
-                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
-                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
-                DCD     MCIA_IRQHandler           ;  4:  MCIa
-                DCD     MCIB_IRQHandler           ;  5:  MCIb
-                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
-                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
-                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
-                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
-                DCD     AACI_IRQHandler           ; 10: AACI / AC97
-                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
-                DCD     ENET_IRQHandler           ; 12: Ethernet
-                DCD     USBDC_IRQHandler          ; 13: USB Device
-                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
-                DCD     CHLCD_IRQHandler          ; 15: Character LCD
-                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
-                DCD     CAN_IRQHandler            ; 17: CAN
-                DCD     LIN_IRQHandler            ; 18: LIN
-                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
-                DCD     0                         ; 20: Reserved
-                DCD     0                         ; 21: Reserved
-                DCD     0                         ; 22: Reserved
-                DCD     0                         ; 23: Reserved
-                DCD     0                         ; 24: Reserved
-                DCD     0                         ; 25: Reserved
-                DCD     0                         ; 26: Reserved
-                DCD     0                         ; 27: Reserved
-                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
-                DCD     0                         ; 29: Reserved - CPU FPGA
-                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
-                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
-__Vectors_End
-
-__Vectors_Size  EQU     __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  SystemInit
-                IMPORT  __main
-                LDR     R0, =SystemInit
-                BLX     R0
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler               [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler         [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler         [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler          [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler        [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler               [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler          [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler            [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler           [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WDT_IRQHandler            [WEAK]
-                EXPORT  RTC_IRQHandler            [WEAK]
-                EXPORT  TIM0_IRQHandler           [WEAK]
-                EXPORT  TIM2_IRQHandler           [WEAK]
-                EXPORT  MCIA_IRQHandler           [WEAK]
-                EXPORT  MCIB_IRQHandler           [WEAK]
-                EXPORT  UART0_IRQHandler          [WEAK]
-                EXPORT  UART1_IRQHandler          [WEAK]
-                EXPORT  UART2_IRQHandler          [WEAK]
-                EXPORT  UART3_IRQHandler          [WEAK]
-                EXPORT  UART4_IRQHandler          [WEAK]
-                EXPORT  AACI_IRQHandler           [WEAK]
-                EXPORT  CLCD_IRQHandler           [WEAK]
-                EXPORT  ENET_IRQHandler           [WEAK]
-                EXPORT  USBDC_IRQHandler          [WEAK]
-                EXPORT  USBHC_IRQHandler          [WEAK]
-                EXPORT  CHLCD_IRQHandler          [WEAK]
-                EXPORT  FLEXRAY_IRQHandler        [WEAK]
-                EXPORT  CAN_IRQHandler            [WEAK]
-                EXPORT  LIN_IRQHandler            [WEAK]
-                EXPORT  I2C_IRQHandler            [WEAK]
-                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
-                EXPORT  SPI_IRQHandler            [WEAK]
-
-WDT_IRQHandler
-RTC_IRQHandler
-TIM0_IRQHandler
-TIM2_IRQHandler
-MCIA_IRQHandler
-MCIB_IRQHandler
-UART0_IRQHandler
-UART1_IRQHandler
-UART2_IRQHandler
-UART3_IRQHandler
-UART4_IRQHandler
-AACI_IRQHandler
-CLCD_IRQHandler
-ENET_IRQHandler
-USBDC_IRQHandler
-USBHC_IRQHandler
-CHLCD_IRQHandler
-FLEXRAY_IRQHandler
-CAN_IRQHandler
-LIN_IRQHandler
-I2C_IRQHandler
-CPU_CLCD_IRQHandler
-SPI_IRQHandler
-                B       .
-
-                ENDP
-
-
-                ALIGN
-
-
-; User Initial Stack & Heap
-
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __initial_sp
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-
-                IMPORT  __use_two_region_memory
-                EXPORT  __user_initial_stackheap
-
-__user_initial_stackheap PROC
-                LDR     R0, =  Heap_Mem
-                LDR     R1, =(Stack_Mem + Stack_Size)
-                LDR     R2, = (Heap_Mem +  Heap_Size)
-                LDR     R3, = Stack_Mem
-                BX      LR
-                ENDP
-
-                ALIGN
-
-                ENDIF
-
-
-                END
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/system_ARMCM7.c
deleted file mode 100644
index 65bfaca..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/system_ARMCM7.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/**************************************************************************//**
- * @file     system_ARMCM7.c
- * @brief    CMSIS Device System Source File for
- *           ARMCM7 Device Series
- * @version  V5.00
- * @date     08. April 2016
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined (ARMCM7)
-  #include "ARMCM7.h"
-#elif defined (ARMCM7_SP)
-  #include "ARMCM7_SP.h"
-#elif defined (ARMCM7_DP)
-  #include "ARMCM7_DP.h"
-#else
-  #error device not specified!
-#endif
-
-/*----------------------------------------------------------------------------
-  Define clocks
- *----------------------------------------------------------------------------*/
-#define  XTAL            ( 5000000U)      /* Oscillator frequency */
-
-#define  SYSTEM_CLOCK    (5 * XTAL)
-
-
-/*----------------------------------------------------------------------------
-  Externals
- *----------------------------------------------------------------------------*/
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
-  extern uint32_t __Vectors;
-#endif
-
-/*----------------------------------------------------------------------------
-  System Core Clock Variable
- *----------------------------------------------------------------------------*/
-uint32_t SystemCoreClock = SYSTEM_CLOCK;
-
-
-/*----------------------------------------------------------------------------
-  System Core Clock update function
- *----------------------------------------------------------------------------*/
-void SystemCoreClockUpdate (void)
-{
-  SystemCoreClock = SYSTEM_CLOCK;
-}
-
-/*----------------------------------------------------------------------------
-  System initialization function
- *----------------------------------------------------------------------------*/
-void SystemInit (void)
-{
-
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
-  SCB->VTOR = (uint32_t) &__Vectors;
-#endif
-
-#if defined (__FPU_USED) && (__FPU_USED == 1)
-  SCB->CPACR |= ((3U << 10*2) |           /* set CP10 Full Access */
-                 (3U << 11*2)  );         /* set CP11 Full Access */
-#endif
-
-#ifdef UNALIGNED_SUPPORT_DISABLE
-  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
-#endif
-
-  SystemCoreClock = SYSTEM_CLOCK;
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM0/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM0/RTE_Components.h
deleted file mode 100644
index b3b3076..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM0/RTE_Components.h
+++ /dev/null
@@ -1,24 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_gru' 
- * Target:  'ARMCM0' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "ARMCM0.h"
-
-#define RTE_Compiler_EventRecorder
-          #define RTE_Compiler_EventRecorder_DAP
-#define RTE_Compiler_IO_STDOUT          /* Compiler I/O: STDOUT */
-          #define RTE_Compiler_IO_STDOUT_EVR      /* Compiler I/O: STDOUT EVR */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM3/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM3/RTE_Components.h
deleted file mode 100644
index 2df6879..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM3/RTE_Components.h
+++ /dev/null
@@ -1,22 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_gru' 
- * Target:  'ARMCM3' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "ARMCM3.h"
-
-#define RTE_Compiler_IO_STDOUT          /* Compiler I/O: STDOUT */
-          #define RTE_Compiler_IO_STDOUT_ITM      /* Compiler I/O: STDOUT ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM4_FP/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM4_FP/RTE_Components.h
deleted file mode 100644
index f29db07..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM4_FP/RTE_Components.h
+++ /dev/null
@@ -1,22 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_gru' 
- * Target:  'ARMCM4_FP' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "ARMCM4_FP.h"
-
-#define RTE_Compiler_IO_STDOUT          /* Compiler I/O: STDOUT */
-          #define RTE_Compiler_IO_STDOUT_ITM      /* Compiler I/O: STDOUT ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM7_SP/RTE_Components.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM7_SP/RTE_Components.h
deleted file mode 100644
index 6cd8e76..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM7_SP/RTE_Components.h
+++ /dev/null
@@ -1,22 +0,0 @@
-
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- *      *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_gru' 
- * Target:  'ARMCM7_SP' 
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File: 
- */
-#define CMSIS_device_header "ARMCM7_SP.h"
-
-#define RTE_Compiler_IO_STDOUT          /* Compiler I/O: STDOUT */
-          #define RTE_Compiler_IO_STDOUT_ITM      /* Compiler I/O: STDOUT ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.cpp b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.cpp
deleted file mode 100644
index 340dc33..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.cpp
+++ /dev/null
@@ -1,221 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
-*
-*
-* Project:       CMSIS NN Library
-* Title:         arm_nnexamples_gru.cpp
-*
-* Description:   Gated Recurrent Unit Example
-*
-* Target Processor: Cortex-M4/Cortex-M7
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of Arm LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-/**
- * @ingroup groupExamples
- */
-
-/**
- * @defgroup GRUExample Gated Recurrent Unit Example
- *
- * \par Description:
- * \par
- * Demonstrates a gated recurrent unit (GRU) example with the use of fully-connected,
- * Tanh/Sigmoid activation functions.
- *
- * \par Model definition:
- * \par
- * GRU is a type of recurrent neural network (RNN). It contains two sigmoid gates and one hidden
- * state. 
- * \par
- * The computation can be summarized as:
- * <pre>z[t] = sigmoid( W_z &sdot; {h[t-1],x[t]} )
- * r[t] = sigmoid( W_r &sdot; {h[t-1],x[t]} ) 
- * n[t] = tanh( W_n &sdot; [r[t] &times; {h[t-1], x[t]} ) 
- * h[t] = (1 - z[t]) &times; h[t-1] + z[t] &times; n[t] </pre>
- * \image html GRU.gif "Gate Recurrent Unit Diagram"
- *
- * \par Variables Description:
- * \par
- * \li \c update_gate_weights, \c reset_gate_weights, \c hidden_state_weights are weights corresponding to update gate (W_z), reset gate (W_r), and hidden state (W_n).
- * \li \c update_gate_bias, \c reset_gate_bias, \c hidden_state_bias are layer bias arrays
- * \li \c test_input1, \c test_input2, \c test_history are the inputs and initial history
- *
- * \par
- * The buffer is allocated as:
- * \par
- * | reset | input | history | update | hidden_state |
- * \par
- * In this way, the concatination is automatically done since (reset, input) and (input, history)
- * are physically concatinated in memory.
- * \par
- *  The ordering of the weight matrix should be adjusted accordingly.
- *
-  *
- * 
- * \par CMSIS DSP Software Library Functions Used:
- * \par
- * - arm_fully_connected_mat_q7_vec_q15_opt()
- * - arm_nn_activations_direct_q15()
- * - arm_mult_q15()
- * - arm_offset_q15()
- * - arm_sub_q15()
- * - arm_copy_q15()
- *
- * <b> Refer  </b>
- * \link arm_nnexamples_gru.cpp \endlink
- *
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <math.h>
-#include "arm_nnexamples_gru_test_data.h"
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-#ifdef _RTE_
-#include "RTE_Components.h"
-#ifdef RTE_Compiler_EventRecorder
-#include "EventRecorder.h"
-#endif
-#endif
-
-#define DIM_HISTORY 32
-#define DIM_INPUT 32
-#define DIM_VEC 64
-
-#define USE_X4
-
-#ifndef USE_X4
-static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X2;
-static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X2;
-static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X2;
-#else
-static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X4;
-static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X4;
-static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X4;
-#endif
-
-static q7_t update_gate_bias[DIM_HISTORY] = UPDATE_GATE_BIAS;
-static q7_t reset_gate_bias[DIM_HISTORY] = RESET_GATE_BIAS;
-static q7_t hidden_state_bias[DIM_HISTORY] = HIDDEN_STATE_BIAS;
-
-static q15_t test_input1[DIM_INPUT] = INPUT_DATA1;
-static q15_t test_input2[DIM_INPUT] = INPUT_DATA2;
-static q15_t test_history[DIM_HISTORY] = HISTORY_DATA;
-
-q15_t     scratch_buffer[DIM_HISTORY * 4 + DIM_INPUT];
-
-void gru_example(q15_t * scratch_input, uint16_t input_size, uint16_t history_size,
-                 q7_t * weights_update, q7_t * weights_reset, q7_t * weights_hidden_state,
-                 q7_t * bias_update, q7_t * bias_reset, q7_t * bias_hidden_state)
-{
-  q15_t    *reset = scratch_input;
-  q15_t    *input = scratch_input + history_size;
-  q15_t    *history = scratch_input + history_size + input_size;
-  q15_t    *update = scratch_input + 2 * history_size + input_size;
-  q15_t    *hidden_state = scratch_input + 3 * history_size + input_size;
-
-  // reset gate calculation
-  // the range of the output can be adjusted with bias_shift and output_shift
-#ifndef USE_X4
-  arm_fully_connected_mat_q7_vec_q15(input, weights_reset, input_size + history_size, history_size, 0, 15, bias_reset,
-                                     reset, NULL);
-#else
-  arm_fully_connected_mat_q7_vec_q15_opt(input, weights_reset, input_size + history_size, history_size, 0, 15,
-                                         bias_reset, reset, NULL);
-#endif
-  // sigmoid function, the size of the integer bit-width should be consistent with out_shift
-  arm_nn_activations_direct_q15(reset, history_size, 0, ARM_SIGMOID);
-  arm_mult_q15(history, reset, reset, history_size);
-
-  // update gate calculation
-  // the range of the output can be adjusted with bias_shift and output_shift
-#ifndef USE_X4
-  arm_fully_connected_mat_q7_vec_q15(input, weights_update, input_size + history_size, history_size, 0, 15,
-                                     bias_update, update, NULL);
-#else
-  arm_fully_connected_mat_q7_vec_q15_opt(input, weights_update, input_size + history_size, history_size, 0, 15,
-                                         bias_update, update, NULL);
-#endif
-
-  // sigmoid function, the size of the integer bit-width should be consistent with out_shift
-  arm_nn_activations_direct_q15(update, history_size, 0, ARM_SIGMOID);
-
-  // hidden state calculation
-#ifndef USE_X4
-  arm_fully_connected_mat_q7_vec_q15(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
-                                     bias_hidden_state, hidden_state, NULL);
-#else
-  arm_fully_connected_mat_q7_vec_q15_opt(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
-                                         bias_hidden_state, hidden_state, NULL);
-#endif
-
-  // tanh function, the size of the integer bit-width should be consistent with out_shift
-  arm_nn_activations_direct_q15(hidden_state, history_size, 0, ARM_TANH);
-  arm_mult_q15(update, hidden_state, hidden_state, history_size);
-
-  // we calculate z - 1 here
-  // so final addition becomes substraction
-  arm_offset_q15(update, 0x8000, update, history_size);
-  // multiply history
-  arm_mult_q15(history, update, update, history_size);
-  // calculate history_out
-  arm_sub_q15(hidden_state, update, history, history_size);
-
-  return;
-}
-
-int main()
-{
-  #ifdef RTE_Compiler_EventRecorder
-  EventRecorderInitialize (EventRecordAll, 1);  // initialize and start Event Recorder
-  #endif
-
-  printf("Start GRU execution\n");
-  int       input_size = DIM_INPUT;
-  int       history_size = DIM_HISTORY;
-
-  // copy over the input data 
-  arm_copy_q15(test_input1, scratch_buffer + history_size, input_size);
-  arm_copy_q15(test_history, scratch_buffer + history_size + input_size, history_size);
-
-  gru_example(scratch_buffer, input_size, history_size,
-              update_gate_weights, reset_gate_weights, hidden_state_weights,
-              update_gate_bias, reset_gate_bias, hidden_state_bias);
-  printf("Complete first iteration on GRU\n");
-
-  arm_copy_q15(test_input2, scratch_buffer + history_size, input_size);
-  gru_example(scratch_buffer, input_size, history_size,
-              update_gate_weights, reset_gate_weights, hidden_state_weights,
-              update_gate_bias, reset_gate_bias, hidden_state_bias);
-  printf("Complete second iteration on GRU\n");
-
-  return 0;
-}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.uvoptx b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.uvoptx
deleted file mode 100644
index 8aa1a94..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.uvoptx
+++ /dev/null
@@ -1,737 +0,0 @@
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diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.uvprojx b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.uvprojx
deleted file mode 100644
index 801893e..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.uvprojx
+++ /dev/null
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diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru_test_data.h b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru_test_data.h
deleted file mode 100644
index 4fd2bb0..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru_test_data.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#define UPDATE_GATE_WEIGHT_X2 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-
-#define UPDATE_GATE_WEIGHT_X4 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-
-#define RESET_GATE_WEIGHT_X2 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-
-#define RESET_GATE_WEIGHT_X4 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-
-#define HIDDEN_STATE_WEIGHT_X2 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-
-#define HIDDEN_STATE_WEIGHT_X4 {-3,69,-33,102,76,60,80,19,59,-2,21,-4,-59,-59,11,-52,117,-25,70,121,-18,44,-74,-14,0,-1,44,-28,15,77,-102,92,108,-48,108,-100,99,-69,-19,121,-47,0,-80,-128,117,-123,99,-27,-118,60,34,-73,65,119,-50,-84,88,42,-91,-32,-108,79,-121,87,-123,118,-108,-88,-9,24,-104,85,8,-113,51,-112,33,118,94,1,26,-113,82,70,-95,-51,110,-96,-80,-98,107,118,-48,60,-97,102,-100,95,-69,77,76,-6,36,15,97,-52,-90,123,1,96,-58,120,17,-99,19,72,86,-109,-115,6,63,26,111,-102,45,35,-88,11,-40,-32,-125,120,38,-119,51,-109,110,113,24,22,123,-18,-23,16,58,6,-69,-68,-20,-112,-43,91,26,84,-31,-33,-37,-126,15,71,-65,103,-37,66,91,-29,-85,121,-47,111,-41,60,-88,-21,6,-120,-109,-76,106,33,-96,37,58,57,-100,10,108,25,78,-117,13,-39,-99,-43,108,93,23,93,1,56,116,41,104,-79,-43,-73,62,-104,86,110,-50,13,-70,77,-108,-107,-45,67,10,107,44,-52,30,111,-53,-113,112,90,74,-61,90,-4,34,58,96,64,79,44,-80,-119,-10,-125,-39,79,-20,67,71,72,-32,-85,-25,-18,-21,-66,0,36,-127,-96,-113,120,49,76,-117,-33,-124,-113,123,87,-49,106,-126,-76,21,-46,98,68,17,-96,-98,20,84,64,86,102,37,-117,92,63,76,-86,23,-60,55,-33,-116,-5,78,13,7,-71,-70,11,-50,-121,-127,56,-4,-105,77,-51,120,63,1,90,-46,-9,47,-56,124,59,-107,-35,59,27,78,-16,114,-33,-21,103,53,120,67,114,-48,74,-65,39,-99,23,6,124,-42,73,-15,-39,-98,-1,-115,99,85,-50,53,-85,-31,-95,116,51,-114,-71,7,-6,64,119,-46,118,-50,106,7,-41,105,-2,-13,30,70,-92,51,-69,-75,102,-101,26,110,-40,50,102,-52,-119,-55,119,20,-121,48,-3,101,-11,-51,2,125,-45,-126,-125,-120,-111,-19,9,-9,0,5,40,34,-115,-15,-5,46,-2,3,-41,81,-117,30,-89,-27,88,-39,-44,70,-7,-123,-11,114,-85,41,83,112,123,-50,-60,-30,19,25,-21,30,23,-72,81,76,-96,79,99,-6,-107,-83,75,71,82,107,43,-11,100,47,-40,-45,124,-97,-99,92,-3,74,89,102,-36,-84,89,67,3,44,-117,108,-100,49,-113,107,103,-26,-2,108,-34,60,47,101,-94,-113,112,-43,101,-37,-69,27,-38,110,39,-91,-101,-91,-28,-61,-37,37,-106,-69,60,59,121,-126,-71,-97,47,32,4,-32,-89,96,16,-89,14,119,-27,68,-11,-53,-52,111,64,-124,70,87,72,20,-114,-99,47,78,-91,54,-32,-24,-60,-49,-70,-128,1,46,-9,-95,-57,76,-44,-18,94,65,-4,-112,10,-12,-46,-109,53,22,-81,60,-22,96,4,90,23,122,68,-22,74,-73,-124,-104,-92,-106,76,-124,-68,59,-95,-59,83,97,-127,-37,96,-92,-49,123,-81,-86,-84,95,69,55,40,54,-80,-110,-3,-8,-26,-120,48,-80,0,44,-106,58,-3,-48,39,-16,1,-12,-87,-120,-65,-95,-113,96,32,-45,105,-86,109,36,40,118,-21,-32,122,-86,-103,-119,-1,-58,-110,-94,31,-14,-108,93,102,45,1,15,-86,29,-5,-43,-74,-75,-51,-8,-39,-114,85,64,40,38,108,71,88,70,67,-2,-35,-72,-36,-93,-82,-69,0,-111,89,22,84,100,-25,-123,93,-89,123,-75,-48,-18,61,-47,-62,-120,-115,-42,-115,-12,5,127,-54,45,83,108,-61,104,-114,-102,-51,59,114,-105,-127,93,-9,-11,-114,40,-61,27,114,-73,20,121,49,32,100,-66,-82,87,-26,-79,38,121,-45,-22,60,-92,19,46,39,-71,87,-9,60,92,-103,-108,33,118,19,124,86,-107,-120,79,37,60,97,-96,-68,40,-51,-66,88,-10,-61,119,89,75,91,86,8,-44,50,19,-30,-32,-47,-128,108,42,-14,75,116,88,-80,-57,25,-86,44,18,-31,-27,-58,77,111,-107,16,89,96,3,-59,-27,-83,-82,24,-120,-51,43,-75,-39,92,76,7,40,39,-62,98,66,110,84,-87,-122,-69,5,54,-82,106,29,-61,33,-98,45,65,-104,-47,-47,61,17,-46,-78,-120,34,-5,-50,113,-13,85,57,90,96,-123,23,-95,-66,103,89,101,-90,-61,-46,67,85,99,66,-85,-10,-93,-29,-66,-110,-45,37,109,-110,88,42,-42,-68,-70,-30,0,82,8,8,96,99,104,-58,59,13,86,-93,5,-29,-111,94,56,12,126,101,69,16,-25,115,17,35,-26,52,99,-13,-118,117,58,0,-101,127,23,0,109,80,-25,61,35,86,11,-117,4,-7,0,107,-123,-92,-41,-70,-94,-104,-3,-21,-56,-32,73,-27,100,21,112,-70,-128,127,96,-123,6,-93,8,-94,17,1,90,34,-75,-51,-52,-61,88,-13,-25,92,79,39,31,-62,-3,114,-13,-11,-43,64,105,-82,-56,29,-6,-103,-12,-109,68,76,-1,-121,51,-54,12,84,-94,58,96,20,40,73,124,-47,-19,-100,10,16,-56,74,81,52,-22,46,-88,108,-8,16,59,-60,-101,-26,-117,-127,-36,78,55,-54,112,33,-5,-64,7,48,111,122,118,85,-48,18,-43,15,109,53,-60,-99,-114,126,101,-125,88,125,38,19,-71,-111,122,-69,-21,-26,2,94,51,-111,-32,10,-87,41,114,-5,80,-46,59,111,16,46,115,-48,-5,-75,-122,123,-109,-70,116,-10,20,-44,-118,-67,17,41,16,102,-47,-31,-22,-96,-39,-1,-19,-98,30,-67,53,-53,-105,-9,24,15,-68,-53,77,-106,90,29,7,46,-30,67,-24,-101,-65,-66,-3,-118,-64,23,43,62,-27,-53,-7,45,-34,30,113,9,30,119,-12,-127,44,-114,-117,-12,-30,94,34,53,-91,-57,106,-38,37,-58,-97,90,116,-78,55,95,59,124,112,5,-99,-10,54,-3,-70,-110,108,-98,-75,110,99,88,99,-80,17,-77,26,123,-73,-26,120,77,-14,29,-61,78,97,-125,-39,19,80,105,22,114,-88,53,-54,-121,-7,92,34,10,101,-57,51,9,47,-124,-93,26,-76,38,70,50,45,-119,106,-51,-121,73,-68,59,121,40,78,92,23,-124,-73,67,43,104,-97,79,-31,15,75,-12,39,13,-99,75,-8,-62,-63,103,-68,101,-72,109,-123,-113,-93,47,-7,-51,64,-67,96,1,-81,34,-49,-66,-82,35,99,52,-95,28,27,-36,27,-93,-15,52,-68,55,-81,-104,117,67,-3,53,102,32,-5,-64,121,-31,-10,19,-123,41,-72,-97,113,45,-10,-111,-71,95,31,-89,-13,36,-111,39,86,126,10,-26,27,-91,48,-77,-45,-25,-106,126,-51,104,101,71,81,2,81,-26,-96,7,-114,-44,-94,-54,-22,110,19,-76,77,3,-127,-86,-78,110,6,-62,-96,121,-100,74,71,-3,-34,43,86,37,109,-110,123,56,118,-7,-33,-96,15,-60,75,-49,-23,-6,-34,57,60,117,-72,-82,-97,-104,88,30,-86,-55,111,-103,-121,-126,-63,-94,-103,-112,0,70,80,118,-46,-44,101,-85,28,85,52,91,-127,29,-88,-63,95,82,59,124,90,-86,-37,7,-116,75,72,-13,82,55,-125,-61,80,90,-75,41,-28,-41,-6,32,-62,35,88,91,61,-112,-104,-115,23,72,-102,-25,77,103,0,73,13,-121,6,81,-52,-70,59,63,113,-84,-85,-112,-9,113,-82,-52,98,-29,45,-25,59,-73,-78,-59,-96,-4,-32,-82,79,16,80,29,94,64,-7,67,-77,-5,-125,119,12,127,-9,104,-95,56,16,58,86,-117,18,66,26,-115,-55,48,59,126,-15,-90,-16,-126,15,120,75,-115,13,106,-76,80,-9,-15,-70,-10,50,-78,56,-51,110,85,-29,-102,20,15,-56,-73,-64,-23,-66,-12,-80,-128,-6,-121,-103,-6,-122,-97,40,46,-36,30,-2,-34,-2,32,116,-93,-59,-109,34,-79,126,-95,-120,-15,-40,-86,-64,71,-48,126,124,-2,-39,75,-64,127,57,30,-107,1,-74,-32,-105,-112,104,-115,80,-27,50,-86,-86,75,-13,-8,81,-13,-66,-38,-14,125,118,103,33,48,-71,10,35,-118,88,65,119,-36,-116,-107,-20,-43,-110,107,33,-27,15,-48,-119,46,-35,96,-75,88,-12,-7,90,-41,-6,-87,89,-88,-117,98,-29,-64,-41,-18,99,-83,13,61,-8,126,46,82,127,-81,-75,20,57,10,-36,81,54,-123,67,18,124,45,-55,95,50,-41,-38,-127,66,61,24,9,51,-55,113,-66,-80,28,49,-113,-71,24,113,-107,105,-71,37,47,-117,73,45,30,-74,117,114,26,6,-42,-80,-74,108,-81,110,73,88,124,-24,-43,-3,49,84,-55,-30,-125,36,102,62,-126,-45,-33,-50,98,-8,6,109,62,113,-84,-12,32,-40,24,-101,-87,-57,-56,59,-123,106,32,12,-71,-18,97,49,113,-47,105,-113,49,99,-124,-124,-81,-118,117,-12,-76,46,-9,-48,-41,-3,-54,-86,97,88,119,-82,-113,-52,-126,-93,-23,-121,127,-97,-28,-24,31,-62,-119,52,-93,75,7,33,-101,-67,67,-45,39,74,-83,127,-115,-66,4,-6,-18,-29,29,-23,68,-123,-103,31,24,117,49,8,-70,41,1,20,71,99,-40,-21,-116,-30,93,66,95,27,63,117,-49,20,-113,-92,-7,127,115,-85,97,-39,34,-67,-10,-53,123,-87,119,2,-77,68,-74,-66,22,96,-13,-12,96,-26,86,35,47,-128,-4,83,52,114,-2,-84,-14,67,-94,-53,-45,-74,-71,-94,94,-101,-122,3,-48,-14,124,-43,56,-3,58,-22,-97,-106,1,-32,57,-16,-127,51,23,-67,-59,-27,-60,125,-46,-125,-117,28,-74,29,29,-76,94,25,58,-32,-31,-101,-105,42,49,101,-115,-60,114,-55,-72,101,94,35,-14,-6,-115,-101,20,-36,-8,103,77,-42,82,61,104,85,35,-71,100,111,67,107,-90,-24,19,6,117,-87,-16,-67,-26,26,24,105,-64,102,105,-36,-7,60,109,112,-19,119,59,-81,10,-91,-9,69,124,-54,124,52,80,13,-105,21,-116,-114,-33,5,0,10,126,-93,22,-26,-115,115,94,22,105,-111,30,-7,102,44,63,0,85,-38,91,-30,98,-21,43,4,-63,-34,-124,-67,38,33,-2,45,-32,-86,12,-92,-38,29,39,121,-119,-42,-23,-30,-106,3,-12,-54,-108,7}
-
-#define UPDATE_GATE_BIAS {-85,78,113,70,33,38,8,114,70,-35,-67,65,31,-24,-70,-124,-89,104,124,-122,111,61,-87,75,-61,-98,83,-69,-63,45,-11,103}
-
-#define RESET_GATE_BIAS {-77,67,-93,-3,98,59,-121,33,49,50,41,91,-115,-33,71,47,-70,45,89,-115,72,106,-22,100,97,-100,-95,108,-33,3,14,30}
-
-#define HIDDEN_STATE_BIAS {-85,78,113,70,33,38,8,114,70,-35,-67,65,31,-24,-70,-124,-89,104,124,-122,111,61,-87,75,-61,-98,83,-69,-63,45,-11,103}
-
-#define INPUT_DATA1 {-367,-338,0,-89,453,-413,-343,-16,42,418,201,274,-352,477,-290,-92,266,-49,342,453,-398,247,-153,328,217,342,85,69,-38,351,73,128}
-
-#define INPUT_DATA2 {280,41,-322,61,315,350,504,-227,-221,-483,352,252,455,-236,344,364,-378,229,-187,-498,295,357,-511,58,-349,-458,-420,-66,-400,-379,477,-60}
-
-#define HISTORY_DATA {-38,53,105,-79,-463,51,-343,-226,-435,-282,218,441,-299,-215,-109,335,340,-471,-109,273,33,-245,-469,170,-26,-59,192,-119,76,-6,236,-145}
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/para_gen.py b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/para_gen.py
deleted file mode 100644
index e2f053b..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/para_gen.py
+++ /dev/null
@@ -1,183 +0,0 @@
-#!/usr/bin/env python
-
-#
-# This is a simple script to generate and convert weights
-# from regular ordering to specific ordering used by
-# q7_x4 or q7_q15_x4
-#
-
-
-import numpy as np
-
-def convert_to_x4_weights(weights):
-    [r, h, w, c] = weights.shape
-    weights = np.reshape(weights, (r, h*w*c))
-    num_of_rows = r
-    num_of_cols = h*w*c
-    new_weights = np.copy(weights)
-    new_weights = np.reshape(new_weights, (r*h*w*c))
-    counter = 0
-    for i in range(int(num_of_rows)/4):
-      # we only need to do the re-ordering for every 4 rows
-      row_base = 4*i
-      for j in range (int(num_of_cols)/4):
-        # for each 4 entries
-        column_base = 4*j
-        new_weights[counter]   =  weights[row_base  ][column_base  ]
-        new_weights[counter+1] =  weights[row_base+1][column_base  ]
-        new_weights[counter+2] =  weights[row_base  ][column_base+2]
-        new_weights[counter+3] =  weights[row_base+1][column_base+2]
-        new_weights[counter+4] =  weights[row_base+2][column_base  ]
-        new_weights[counter+5] =  weights[row_base+3][column_base  ]
-        new_weights[counter+6] =  weights[row_base+2][column_base+2]
-        new_weights[counter+7] =  weights[row_base+3][column_base+2]
-
-        new_weights[counter+8] =  weights[row_base  ][column_base+1]
-        new_weights[counter+9] =  weights[row_base+1][column_base+1]
-        new_weights[counter+10] = weights[row_base  ][column_base+3]
-        new_weights[counter+11] = weights[row_base+1][column_base+3]
-        new_weights[counter+12] = weights[row_base+2][column_base+1]
-        new_weights[counter+13] = weights[row_base+3][column_base+1]
-        new_weights[counter+14] = weights[row_base+2][column_base+3]
-        new_weights[counter+15] = weights[row_base+3][column_base+3]
-        counter = counter + 16
-      # the remaining ones are in order
-      for j in range((int)(num_of_cols-num_of_cols%4), int(num_of_cols)):
-        new_weights[counter] = weights[row_base][j]
-        new_weights[counter+1] = weights[row_base+1][j]
-        new_weights[counter+2] = weights[row_base+2][j]
-        new_weights[counter+3] = weights[row_base+3][j]
-        counter = counter + 4
-    return new_weights
-
-def convert_q7_q15_weights(weights):
-    [r, h, w, c] = weights.shape
-    weights = np.reshape(weights, (r, h*w*c))
-    num_of_rows = r
-    num_of_cols = h*w*c
-    new_weights = np.copy(weights)
-    new_weights = np.reshape(new_weights, (r*h*w*c))
-    counter = 0
-    for i in range(int(num_of_rows)/4):
-      # we only need to do the re-ordering for every 4 rows
-      row_base = 4*i
-      for j in range (int(num_of_cols)/2):
-        # for each 2 entries
-        column_base = 2*j
-        new_weights[counter]   =  weights[row_base  ][column_base  ]
-        new_weights[counter+1] =  weights[row_base+1][column_base  ]
-        new_weights[counter+2] =  weights[row_base  ][column_base+1]
-        new_weights[counter+3] =  weights[row_base+1][column_base+1]
-        new_weights[counter+4] =  weights[row_base+2][column_base  ]
-        new_weights[counter+5] =  weights[row_base+3][column_base  ]
-        new_weights[counter+6] =  weights[row_base+2][column_base+1]
-        new_weights[counter+7] =  weights[row_base+3][column_base+1]
-
-        counter = counter + 8
-      # the remaining ones are in order
-      for j in range((int)(num_of_cols-num_of_cols%2), int(num_of_cols)):
-        new_weights[counter] = weights[row_base][j]
-        new_weights[counter+1] = weights[row_base+1][j]
-        new_weights[counter+2] = weights[row_base+2][j]
-        new_weights[counter+3] = weights[row_base+3][j]
-        counter = counter + 4
-    return new_weights
-
-
-vec_dim = 64
-row_dim = 32
-
-update_weight = np.zeros((row_dim,vec_dim), dtype=int)
-reset_weight = np.zeros((row_dim,vec_dim), dtype=int)
-hidden_weight = np.zeros((row_dim,vec_dim), dtype=int)
-
-update_bias = np.zeros((row_dim), dtype=int)
-reset_bias = np.zeros((row_dim), dtype=int)
-hidden_bias = np.zeros((row_dim), dtype=int)
-
-input_data1 = np.zeros((vec_dim-row_dim), dtype=int)
-input_data2 = np.zeros((vec_dim-row_dim), dtype=int)
-history_data = np.zeros((row_dim), dtype=int)
-
-outfile = open("arm_nnexamples_gru_test_data.h", "w")
-
-for i in range(row_dim):
-  for j in range(vec_dim):
-    update_weight[i][j] = np.random.randint(256)-128
-    reset_weight[i][j] = np.random.randint(256)-128
-    hidden_weight[i][j] = np.random.randint(256)-128
-
-for i in range(row_dim):
-  update_bias[i] =  np.random.randint(256)-128
-  reset_bias[i] =  np.random.randint(256)-128
-  hidden_bias[i] =  np.random.randint(256)-128
-  history_data[i] = np.random.randint(2**10)-2**9
-
-for i in range(vec_dim-row_dim):
-  input_data1[i] = np.random.randint(2**10)-2**9
-  input_data2[i] = np.random.randint(2**10)-2**9
-
-weight = np.reshape(update_weight, (row_dim, vec_dim, 1, 1))
-new_weight = convert_to_x4_weights(weight)
-
-outfile.write("#define UPDATE_GATE_WEIGHT_X2 {")
-weight.tofile(outfile,sep=",",format="%d")
-outfile.write("}\n\n")
-
-new_weight = convert_q7_q15_weights(weight)
-outfile.write("#define UPDATE_GATE_WEIGHT_X4 {")
-new_weight.tofile(outfile,sep=",",format="%d")
-outfile.write("}\n\n")
-
-weight = np.reshape(reset_weight, (row_dim, vec_dim, 1, 1))
-new_weight = convert_to_x4_weights(weight)
-
-outfile.write("#define RESET_GATE_WEIGHT_X2 {")
-weight.tofile(outfile,sep=",",format="%d")
-outfile.write("}\n\n")
-
-new_weight = convert_q7_q15_weights(weight)
-outfile.write("#define RESET_GATE_WEIGHT_X4 {")
-new_weight.tofile(outfile,sep=",",format="%d")
-outfile.write("}\n\n")
-
-weight = np.reshape(hidden_weight, (row_dim, vec_dim, 1, 1))
-new_weight = convert_to_x4_weights(weight)
-
-outfile.write("#define HIDDEN_STATE_WEIGHT_X2 {")
-weight.tofile(outfile,sep=",",format="%d")
-outfile.write("}\n\n")
-
-new_weight = convert_q7_q15_weights(weight)
-outfile.write("#define HIDDEN_STATE_WEIGHT_X4 {")
-new_weight.tofile(outfile,sep=",",format="%d")
-outfile.write("}\n\n")
-
-outfile.write("#define UPDATE_GATE_BIAS {")
-update_bias.tofile(outfile,sep=",",format="%d")
-outfile.write("}\n\n")
-
-outfile.write("#define RESET_GATE_BIAS {")
-reset_bias.tofile(outfile,sep=",",format="%d")
-outfile.write("}\n\n")
-
-outfile.write("#define HIDDEN_STATE_BIAS {")
-update_bias.tofile(outfile,sep=",",format="%d")
-outfile.write("}\n\n")
-
-outfile.write("#define INPUT_DATA1 {")
-input_data1.tofile(outfile,sep=",",format="%d")
-outfile.write("}\n\n")
-
-outfile.write("#define INPUT_DATA2 {")
-input_data2.tofile(outfile,sep=",",format="%d")
-outfile.write("}\n\n")
-
-
-outfile.write("#define HISTORY_DATA {")
-history_data.tofile(outfile,sep=",",format="%d")
-outfile.write("}\n\n")
-
-
-
-outfile.close()
diff --git a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/readme.txt b/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/readme.txt
deleted file mode 100644
index fdfe60f..0000000
--- a/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/readme.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-CMSIS NN Lib example arm_nnexample_gru0 for
-  Cortex-M4 and Cortex-M7.
-
-The example is configured for uVision Simulator.
diff --git a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/NN-example-cifar10.ewp b/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/NN-example-cifar10.ewp
deleted file mode 100644
index 2c886eb..0000000
--- a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/NN-example-cifar10.ewp
+++ /dev/null
Binary files differ
diff --git a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10.cpp b/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10.cpp
deleted file mode 100644
index 471899c..0000000
--- a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10.cpp
+++ /dev/null
@@ -1,196 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
-*
-*
-* Project:       CMSIS NN Library
-* Title:         arm_nnexamples_cifar10.cpp
-*
-* Description:   Convolutional Neural Network Example
-*
-* Target Processor: Cortex-M4/Cortex-M7
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of Arm LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-/**
- * @ingroup groupExamples
- */
-
-/**
- * @defgroup CNNExample Convolutional Neural Network Example
- *
- * \par Description:
- * \par
- * Demonstrates a convolutional neural network (CNN) example with the use of convolution,
- * ReLU activation, pooling and fully-connected functions.
- *
- * \par Model definition:
- * \par
- * The CNN used in this example is based on CIFAR-10 example from Caffe [1]. 
- * The neural network consists
- * of 3 convolution layers interspersed by ReLU activation and max pooling layers, followed by a 
- * fully-connected layer at the end. The input to the network is a 32x32 pixel color image, which will 
- * be classified into one of the 10 output classes. 
- * This example model implementation needs 32.3 KB to store weights, 40 KB for activations and 
- * 3.1 KB for storing the \c im2col data.
- *
- * \image html CIFAR10_CNN.gif "Neural Network model definition"
- *
- * \par Variables Description:
- * \par
- * \li \c conv1_wt, \c conv2_wt, \c conv3_wt are convolution layer weight matrices
- * \li \c conv1_bias, \c conv2_bias, \c conv3_bias are convolution layer bias arrays
- * \li \c ip1_wt, ip1_bias point to fully-connected layer weights and biases
- * \li \c input_data points to the input image data
- * \li \c output_data points to the classification output
- * \li \c col_buffer is a buffer to store the \c im2col output
- * \li \c scratch_buffer is used to store the activation data (intermediate layer outputs)
- *
- * \par CMSIS DSP Software Library Functions Used:
- * \par
- * - arm_convolve_HWC_q7_RGB()
- * - arm_convolve_HWC_q7_fast()
- * - arm_relu_q7()
- * - arm_maxpool_q7_HWC()
- * - arm_avepool_q7_HWC()
- * - arm_fully_connected_q7_opt()
- * - arm_fully_connected_q7()
- *
- * <b> Refer  </b>
- * \link arm_nnexamples_cifar10.cpp \endlink
- *
- * \par [1] https://github.com/BVLC/caffe
- */
-
-#include <stdint.h>
-#include <stdio.h>
-#include "arm_math.h"
-#include "arm_nnexamples_cifar10_parameter.h"
-#include "arm_nnexamples_cifar10_weights.h"
-
-#include "arm_nnfunctions.h"
-#include "arm_nnexamples_cifar10_inputs.h"
-
-#ifdef _RTE_
-#include "RTE_Components.h"
-#ifdef RTE_Compiler_EventRecorder
-#include "EventRecorder.h"
-#endif
-#endif
-
-// include the input and weights
-
-static q7_t conv1_wt[CONV1_IM_CH * CONV1_KER_DIM * CONV1_KER_DIM * CONV1_OUT_CH] = CONV1_WT;
-static q7_t conv1_bias[CONV1_OUT_CH] = CONV1_BIAS;
-
-static q7_t conv2_wt[CONV2_IM_CH * CONV2_KER_DIM * CONV2_KER_DIM * CONV2_OUT_CH] = CONV2_WT;
-static q7_t conv2_bias[CONV2_OUT_CH] = CONV2_BIAS;
-
-static q7_t conv3_wt[CONV3_IM_CH * CONV3_KER_DIM * CONV3_KER_DIM * CONV3_OUT_CH] = CONV3_WT;
-static q7_t conv3_bias[CONV3_OUT_CH] = CONV3_BIAS;
-
-static q7_t ip1_wt[IP1_DIM * IP1_OUT] = IP1_WT;
-static q7_t ip1_bias[IP1_OUT] = IP1_BIAS;
-
-/* Here the image_data should be the raw uint8 type RGB image in [RGB, RGB, RGB ... RGB] format */
-uint8_t   image_data[CONV1_IM_CH * CONV1_IM_DIM * CONV1_IM_DIM] = IMG_DATA;
-q7_t      output_data[IP1_OUT];
-
-//vector buffer: max(im2col buffer,average pool buffer, fully connected buffer)
-q7_t      col_buffer[2 * 5 * 5 * 32 * 2];
-
-q7_t      scratch_buffer[32 * 32 * 10 * 4];
-
-int main()
-{
-  #ifdef RTE_Compiler_EventRecorder
-  EventRecorderInitialize (EventRecordAll, 1);  // initialize and start Event Recorder
-  #endif
-
-  printf("start execution\n");
-  /* start the execution */
-
-  q7_t     *img_buffer1 = scratch_buffer;
-  q7_t     *img_buffer2 = img_buffer1 + 32 * 32 * 32;
-
-  /* input pre-processing */
-  int mean_data[3] = INPUT_MEAN_SHIFT;
-  unsigned int scale_data[3] = INPUT_RIGHT_SHIFT;
-  for (int i=0;i<32*32*3; i+=3) {
-    img_buffer2[i] =   (q7_t)__SSAT( ((((int)image_data[i]   - mean_data[0])<<7) + (0x1<<(scale_data[0]-1)))
-                             >> scale_data[0], 8);
-    img_buffer2[i+1] = (q7_t)__SSAT( ((((int)image_data[i+1] - mean_data[1])<<7) + (0x1<<(scale_data[1]-1)))
-                             >> scale_data[1], 8);
-    img_buffer2[i+2] = (q7_t)__SSAT( ((((int)image_data[i+2] - mean_data[2])<<7) + (0x1<<(scale_data[2]-1)))
-                             >> scale_data[2], 8);
-  }
-  
-  // conv1 img_buffer2 -> img_buffer1
-  arm_convolve_HWC_q7_RGB(img_buffer2, CONV1_IM_DIM, CONV1_IM_CH, conv1_wt, CONV1_OUT_CH, CONV1_KER_DIM, CONV1_PADDING,
-                          CONV1_STRIDE, conv1_bias, CONV1_BIAS_LSHIFT, CONV1_OUT_RSHIFT, img_buffer1, CONV1_OUT_DIM,
-                          (q15_t *) col_buffer, NULL);
-
-  arm_relu_q7(img_buffer1, CONV1_OUT_DIM * CONV1_OUT_DIM * CONV1_OUT_CH);
-
-  // pool1 img_buffer1 -> img_buffer2
-  arm_maxpool_q7_HWC(img_buffer1, CONV1_OUT_DIM, CONV1_OUT_CH, POOL1_KER_DIM,
-                     POOL1_PADDING, POOL1_STRIDE, POOL1_OUT_DIM, NULL, img_buffer2);
-
-  // conv2 img_buffer2 -> img_buffer1
-  arm_convolve_HWC_q7_fast(img_buffer2, CONV2_IM_DIM, CONV2_IM_CH, conv2_wt, CONV2_OUT_CH, CONV2_KER_DIM,
-                           CONV2_PADDING, CONV2_STRIDE, conv2_bias, CONV2_BIAS_LSHIFT, CONV2_OUT_RSHIFT, img_buffer1,
-                           CONV2_OUT_DIM, (q15_t *) col_buffer, NULL);
-
-  arm_relu_q7(img_buffer1, CONV2_OUT_DIM * CONV2_OUT_DIM * CONV2_OUT_CH);
-
-  // pool2 img_buffer1 -> img_buffer2
-  arm_maxpool_q7_HWC(img_buffer1, CONV2_OUT_DIM, CONV2_OUT_CH, POOL2_KER_DIM,
-                     POOL2_PADDING, POOL2_STRIDE, POOL2_OUT_DIM, col_buffer, img_buffer2);
-
-// conv3 img_buffer2 -> img_buffer1
-  arm_convolve_HWC_q7_fast(img_buffer2, CONV3_IM_DIM, CONV3_IM_CH, conv3_wt, CONV3_OUT_CH, CONV3_KER_DIM,
-                           CONV3_PADDING, CONV3_STRIDE, conv3_bias, CONV3_BIAS_LSHIFT, CONV3_OUT_RSHIFT, img_buffer1,
-                           CONV3_OUT_DIM, (q15_t *) col_buffer, NULL);
-
-  arm_relu_q7(img_buffer1, CONV3_OUT_DIM * CONV3_OUT_DIM * CONV3_OUT_CH);
-
-  // pool3 img_buffer-> img_buffer2
-  arm_maxpool_q7_HWC(img_buffer1, CONV3_OUT_DIM, CONV3_OUT_CH, POOL3_KER_DIM,
-                     POOL3_PADDING, POOL3_STRIDE, POOL3_OUT_DIM, col_buffer, img_buffer2);
-
-  arm_fully_connected_q7_opt(img_buffer2, ip1_wt, IP1_DIM, IP1_OUT, IP1_BIAS_LSHIFT, IP1_OUT_RSHIFT, ip1_bias,
-                             output_data, (q15_t *) img_buffer1);
-
-  arm_softmax_q7(output_data, 10, output_data);
-
-  for (int i = 0; i < 10; i++)
-  {
-      printf("%d: %d\n", i, output_data[i]);
-  }
-
-  return 0;
-}
diff --git a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_inputs.h b/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_inputs.h
deleted file mode 100644
index c600c5a..0000000
--- a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_inputs.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* Here are two different test images */
-
-//#define IMG_DATA {158,112,49,159,111,47,165,116,51,166,118,53,160,112,46,156,109,41,162,115,47,159,113,45,158,111,44,159,113,41,161,116,41,160,111,52,161,111,49,166,117,41,169,117,45,170,119,44,167,117,40,162,113,38,160,111,39,160,112,43,156,109,44,149,107,45,150,107,45,148,106,43,149,107,44,143,101,39,140,98,43,141,97,41,143,97,38,137,95,36,126,91,36,116,85,33,152,112,51,151,110,40,159,114,45,166,116,56,162,112,49,160,113,43,164,117,47,162,114,45,163,116,46,156,110,38,155,111,41,159,110,54,163,113,52,170,119,41,171,117,40,171,115,33,169,115,30,160,111,33,154,112,41,151,115,50,145,110,53,139,104,55,140,102,52,141,100,48,149,105,50,147,102,46,145,102,45,142,97,38,143,98,34,136,95,31,125,91,32,119,88,34,151,110,47,151,109,33,158,111,36,167,111,48,160,106,42,163,115,44,165,117,45,165,117,45,163,115,43,162,115,43,158,114,48,157,109,57,161,111,51,166,115,38,167,114,37,169,113,35,170,116,39,159,114,47,145,111,54,121,96,49,110,90,52,98,78,50,101,77,47,114,85,50,120,86,48,134,96,55,143,103,51,140,99,39,142,99,35,139,98,34,130,95,34,120,89,33,155,107,40,155,110,32,160,109,31,174,112,44,167,110,43,167,117,46,169,120,48,169,119,48,165,115,44,165,117,45,167,123,57,191,146,95,177,130,75,157,111,41,162,115,47,164,114,54,158,112,58,149,111,67,104,80,47,103,87,65,98,90,76,92,90,84,80,75,66,74,63,50,86,70,52,83,62,39,113,85,45,132,98,46,140,102,43,140,101,39,136,99,39,127,94,36,155,107,41,156,114,48,161,115,49,170,114,47,169,114,43,163,113,40,169,120,47,166,116,44,164,113,41,164,116,42,173,128,59,246,214,164,195,156,107,151,114,56,146,111,60,142,108,71,111,80,50,78,53,31,85,69,56,113,103,98,112,110,111,106,114,118,97,102,105,93,94,93,74,72,67,84,78,70,85,73,47,105,83,45,128,96,48,138,101,46,133,94,36,129,93,36,148,109,54,133,104,64,130,100,57,147,112,53,161,115,44,165,113,39,167,116,41,167,115,41,163,111,37,165,116,39,163,118,42,180,138,85,157,122,78,128,102,58,97,75,43,66,50,31,69,58,43,66,56,45,89,83,76,118,113,110,122,121,120,119,122,122,114,116,116,94,96,96,99,100,97,91,91,86,58,58,47,67,58,37,108,84,49,140,105,58,138,98,44,134,95,40,127,100,57,109,95,80,47,37,17,88,74,28,153,117,48,170,118,43,168,115,40,170,118,43,169,117,42,166,116,37,164,120,39,147,107,52,129,98,59,127,108,75,100,87,70,68,67,57,78,83,72,72,75,64,83,84,74,132,130,121,146,142,132,124,118,108,105,99,90,107,102,94,115,111,103,85,83,77,63,71,69,46,47,39,79,61,36,132,98,58,141,99,48,134,93,39,131,115,90,99,96,92,42,43,38,70,64,41,143,111,56,167,117,42,165,114,36,168,116,39,171,119,49,161,113,51,140,109,51,120,94,49,130,110,77,144,131,107,116,106,93,88,87,79,91,95,88,85,88,82,77,77,69,124,118,107,163,153,140,136,124,112,102,93,81,106,98,88,100,93,84,85,81,74,54,60,58,49,53,49,57,47,32,107,83,50,138,103,51,136,97,39,170,161,144,103,105,105,54,58,59,124,121,113,153,124,82,161,113,43,163,117,41,166,122,50,165,121,66,174,135,95,113,89,59,125,105,78,157,141,121,156,143,128,121,111,101,86,80,74,82,81,77,84,85,82,80,78,73,81,71,61,138,125,112,146,135,123,113,103,93,87,79,70,83,77,69,86,82,76,71,73,67,56,57,53,40,35,27,74,59,35,133,106,59,137,103,45,180,176,163,134,139,143,94,100,105,154,154,149,174,149,112,158,116,51,156,116,47,153,118,60,207,180,146,237,214,198,207,180,166,156,131,119,174,153,145,148,131,125,125,110,107,93,85,79,86,84,79,74,74,71,59,57,53,76,68,58,137,125,112,143,133,122,133,124,114,106,98,89,86,81,74,87,85,78,84,85,78,75,76,71,50,49,43,40,30,15,95,75,44,132,103,57,183,183,175,108,116,122,142,151,158,165,169,168,177,156,122,155,112,50,159,118,51,122,89,47,213,197,179,237,224,226,220,191,188,164,135,131,183,159,155,156,137,132,125,108,104,120,111,104,78,76,69,80,80,77,45,44,40,91,85,77,175,165,154,157,147,137,155,147,138,107,100,92,87,83,77,103,102,96,88,88,79,78,79,73,59,59,59,41,36,33,59,46,31,104,81,46,188,191,189,100,108,116,135,144,153,170,175,178,187,167,136,166,120,59,173,123,55,134,93,44,117,95,80,194,182,188,199,171,164,170,142,133,185,161,151,189,171,159,134,119,106,117,107,95,102,98,89,84,84,79,38,38,34,125,121,113,210,201,192,160,152,142,146,139,130,93,89,82,83,80,75,94,93,88,104,104,94,85,87,81,73,75,78,55,53,55,62,55,48,76,56,26,189,194,194,90,96,105,127,134,144,175,180,185,174,156,133,166,123,68,178,123,53,159,109,47,97,68,44,168,154,152,168,144,126,137,114,94,186,166,148,216,202,183,160,149,129,123,113,98,120,114,105,115,114,109,50,50,47,150,147,140,194,187,178,155,149,140,123,118,111,91,88,83,84,83,79,84,84,80,95,95,85,86,87,81,84,87,89,73,73,73,79,74,64,73,55,24,189,192,193,93,95,103,152,154,163,185,188,192,119,110,98,136,106,66,173,124,58,167,116,50,103,72,39,147,132,120,145,125,103,167,149,127,189,174,155,226,216,200,180,172,157,141,131,117,126,117,107,117,114,109,71,71,68,154,152,147,186,181,174,149,144,136,114,110,104,87,85,80,80,80,76,72,73,70,80,80,72,99,100,94,100,101,99,90,88,81,97,89,69,94,73,34,194,196,196,108,107,112,168,167,172,186,186,188,105,109,109,99,89,67,156,119,62,167,122,55,100,74,34,115,106,88,138,123,103,198,185,169,190,180,169,172,165,159,145,140,140,154,143,134,146,136,125,103,100,95,71,71,70,152,152,149,179,175,170,137,13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-
-
-#define IMG_DATA {235,235,235,231,231,231,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,232,233,233,231,233,232,231,233,231,233,233,230,233,232,232,232,234,232,231,234,232,232,232,233,233,230,232,233,231,233,233,233,232,232,232,232,232,232,232,232,232,233,233,233,233,233,233,232,232,232,238,238,238,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,237,234,233,236,234,233,236,236,234,234,236,234,234,235,237,234,234,238,235,236,237,236,236,235,236,236,234,236,236,236,235,235,235,235,235,235,235,235,235,236,236,236,236,236,236,235,235,235,237,237,237,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,234,234,236,233,231,236,234,231,235,235,234,234,235,236,227,230,233,231,235,238,231,233,235,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,235,235,234,234,234,238,238,238,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,235,234,233,233,230,232,232,231,228,230,232,223,226,231,186,192,197,209,216,219,207,210,213,228,228,230,236,235,235,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,235,235,235,235,235,237,237,237,234,234,234,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,234,234,234,234,234,234,235,235,235,235,235,235,234,234,234,234,234,234,235,235,235,235,235,235,236,238,236,233,237,237,219,225,230,203,210,219,163,172,179,195,205,208,214,218,221,230,229,232,237,235,237,235,235,235,235,235,235,235,235,235,235,236,236,236,236,236,236,236,236,236,236,236,239,239,238,236,235,235,236,235,235,236,235,235,236,235,235,236,235,235,235,236,235,235,235,235,234,234,234,235,235,235,237,236,236,237,236,236,234,235,236,232,233,234,235,237,237,229,231,232,208,216,218,194,205,210,185,198,207,174,188,200,165,179,189,184,196,202,207,215,220,226,228,232,236,235,237,236,236,235,236,236,235,236,236,235,236,236,236,237,237,237,237,237,237,237,237,237,228,229,229,228,227,228,232,230,231,231,228,230,234,232,233,237,236,236,237,237,235,236,237,235,237,235,236,237,235,236,239,236,237,239,237,238,225,229,230,224,228,229,233,237,238,221,226,228,183,197,204,161,180,190,159,180,191,154,176,190,144,163,177,143,159,171,156,169,177,198,206,211,233,238,239,236,237,234,235,236,233,235,235,235,235,236,236,236,238,237,237,237,237,239,237,238,212,220,222,224,230,233,230,234,238,227,232,234,229,234,234,234,237,236,237,238,235,238,237,236,239,237,238,239,237,238,239,236,237,240,238,239,201,204,203,219,222,221,233,236,235,214,218,218,193,204,210,185,201,210,184,201,211,173,191,203,165,182,196,159,174,187,162,176,185,186,199,204,229,239,240,234,239,238,233,238,237,233,238,238,234,239,238,236,239,238,237,239,238,238,238,238,216,234,241,221,236,243,225,238,246,225,239,243,227,240,240,231,238,237,236,237,235,238,236,235,238,236,237,238,236,237,237,237,237,239,239,239,197,198,196,220,221,218,233,234,231,230,231,229,209,213,217,209,216,222,219,228,235,208,218,227,209,221,234,210,224,235,217,233,240,218,235,241,225,240,243,228,238,240,228,239,240,230,240,240,230,240,239,235,240,239,237,240,239,238,238,238,118,140,149,119,138,148,124,142,153,136,155,161,172,188,191,225,234,233,235,236,233,237,234,232,236,233,234,235,235,235,235,237,236,233,237,235,214,216,214,226,228,226,232,234,232,236,237,236,228,230,232,227,230,235,231,236,241,225,232,239,225,237,247,217,233,243,201,219,226,185,204,211,172,189,195,167,179,186,167,180,185,186,199,201,223,235,235,235,241,239,236,240,239,238,240,239,109,130,141,103,121,133,108,125,137,111,127,137,146,159,165,222,229,231,227,228,225,229,226,224,236,232,233,234,234,234,231,236,234,230,237,235,229,234,235,231,235,236,232,237,238,230,235,236,231,236,238,231,237,240,229,237,241,223,232,238,191,206,213,164,184,191,146,165,172,137,156,163,134,149,159,128,140,153,121,133,143,149,162,166,216,228,229,234,241,239,235,240,238,237,240,239,195,212,224,188,202,215,199,211,224,200,211,223,209,217,227,223,227,231,213,213,211,211,209,206,216,213,214,220,222,222,219,226,225,210,221,219,209,219,223,211,221,225,216,225,230,220,229,233,225,234,237,226,236,239,225,237,241,218,231,237,183,204,208,175,198,203,181,200,207,178,194,202,186,197,211,170,178,196,142,151,164,185,195,202,219,230,233,231,240,238,234,241,239,236,240,239,193,207,222,191,202,217,202,211,224,214,217,234,223,225,241,214,219,227,203,208,208,171,174,174,177,180,183,207,213,214,174,184,188,98,112,121,93,114,126,101,121,132,111,129,139,122,138,147,137,152,161,153,167,174,202,216,220,223,236,237,218,232,235,220,233,238,223,234,240,217,226,233,221,228,237,212,219,229,196,203,212,222,230,237,219,227,234,221,230,233,232,239,242,235,241,242,113,130,152,111,125,147,113,125,141,125,131,151,138,145,165,170,182,193,191,201,205,190,199,204,208,219,226,216,230,234,158,172,183,54,71,92,45,70,91,49,73,91,53,73,90,66,84,98,102,114,129,159,168,179,221,227,233,234,239,241,233,237,241,227,231,237,223,228,233,207,211,217,202,208,212,211,218,220,212,219,223,199,206,214,179,186,196,188,197,205,211,221,227,221,231,234,61,81,108,69,86,114,63,79,100,68,85,102,123,141,155,139,155,164,151,157,164,195,200,207,214,228,234,206,223,228,163,180,190,103,121,138,95,112,131,101,117,135,138,151,168,181,192,207,207,212,223,221,222,232,219,219,227,205,203,212,183,186,195,158,166,174,147,154,163,131,138,147,125,133,140,130,139,144,136,146,152,133,142,151,128,137,147,138,153,160,182,197,203,197,212,216,40,53,77,58,70,94,85,98,116,127,144,153,132,151,156,96,107,110,119,115,118,163,158,161,173,180,182,184,194,197,182,194,198,181,193,200,183,194,202,198,209,217,218,228,236,200,210,217,174,181,186,159,165,172,145,150,159,132,136,149,116,125,138,98,111,123,94,106,118,99,111,123,105,118,128,107,121,130,122,135,145,138,151,161,150,164,174,157,174,184,188,206,213,185,203,208,13,15,35,26,29,47,134,140,151,206,216,220,138,150,150,118,123,123,141,133,134,172,162,162,181,181,180,207,209,211,220,224,225,228,234,233,224,234,232,230,241,240,226,238,238,176,189,190,144,159,163,138,154,162,142,158,170,145,163,177,154,171,187,149,165,182,149,165,182,154,171,187,157,174,189,160,177,191,173,190,204,187,204,217,190,207,218,178,196,208,165,183,193,157,175,183,5,5,24,58,62,79,200,207,217,225,232,239,197,205,212,199,207,211,212,212,218,226,224,229,229,230,237,233,236,246,232,238,245,230,238,239,209,221,220,223,238,239,221,238,241,210,228,234,198,217,228,180,200,214,193,216,230,188,213,229,189,212,231,194,214,234,192,212,232,184,204,224,172,193,212,171,191,209,161,181,197,144,165,179,136,156,169,131,146,161,128,143,158,138,154,165,39,45,71,145,155,179,190,204,222,186,196,216,184,197,217,192,211,229,194,211,230,194,208,227,194,206,227,191,203,228,192,207,228,190,207,221,177,193,207,180,198,215,154,176,193,147,169,188,145,161,184,156,171,195,146,163,186,113,133,156,114,137,161,132,157,180,126,150,173,111,135,158,92,115,138,91,112,135,93,114,133,94,116,131,105,125,140,121,133,151,129,141,158,129,142,156,122,135,161,162,179,207,143,160,194,137,154,189,131,152,187,128,152,190,127,150,192,130,150,193,131,150,192,128,147,190,127,147,189,129,149,189,129,149,188,124,145,186,104,126,163,100,122,154,102,120,154,118,134,170,112,128,163,94,109,145,94,112,148,94,117,153,87,112,144,83,103,136,80,97,130,83,103,134,93,111,139,101,117,141,108,121,144,115,125,146,121,133,148,130,144,156,73,87,109,76,90,113,77,90,122,80,93,127,84,98,134,87,102,142,87,102,147,90,105,150,94,111,152,102,119,160,107,124,165,113,131,172,115,137,181,118,136,186,118,132,180,120,133,175,115,136,172,110,133,168,106,127,163,100,119,155,95,109,148,85,101,139,79,97,132,80,92,127,80,94,129,77,100,133,80,100,129,82,98,122,92,104,126,113,119,138,125,135,146,136,149,156,13,25,41,3,11,25,9,16,35,18,26,48,18,26,52,21,25,56,20,25,58,22,30,61,26,36,62,34,43,70,42,51,77,48,59,87,52,69,106,60,75,121,66,77,126,70,79,126,71,87,127,72,88,126,67,81,120,60,72,112,55,67,106,53,68,104,53,69,103,57,69,102,57,71,105,57,78,110,72,89,115,87,100,119,104,113,128,120,124,136,130,136,141,137,146,149,36,46,55,11,16,20,8,13,19,32,44,53,36,45,58,22,25,41,8,11,30,3,8,24,1,4,17,0,2,15,0,2,15,0,4,20,6,13,42,5,18,56,1,19,60,3,23,62,13,29,71,24,38,81,21,33,77,21,31,76,21,38,78,22,44,79,30,50,83,39,58,90,57,70,101,85,90,118,113,115,138,123,123,138,116,115,125,122,123,128,134,139,137,153,160,158,35,41,45,26,27,26,13,19,18,27,41,41,71,81,84,70,70,76,49,50,57,27,31,37,15,15,21,5,5,11,2,2,7,0,0,7,17,17,35,57,64,91,31,50,78,10,36,62,4,30,60,4,30,62,7,30,63,14,35,69,25,43,74,41,55,83,62,71,99,86,97,123,122,124,146,144,131,149,132,120,135,114,105,114,117,111,116,132,134,133,146,152,146,172,179,175,16,15,17,13,10,9,4,10,8,3,12,11,45,44,46,65,52,57,54,43,47,36,33,35,18,18,20,4,4,7,2,2,4,0,1,3,7,8,15,118,117,134,161,158,179,131,128,148,112,112,131,105,105,125,105,103,124,109,105,127,118,107,126,138,115,133,154,126,144,151,126,141,127,106,116,105,86,91,106,94,97,120,116,116,129,130,129,142,147,144,164,172,165,184,194,190,40,40,35,12,10,7,0,3,3,0,4,4,12,6,7,30,12,17,32,12,17,21,10,12,7,6,7,2,1,3,2,1,2,3,2,3,0,0,2,68,58,64,182,128,146,205,130,148,196,127,144,194,123,141,195,119,137,187,113,129,172,110,122,150,96,106,123,75,83,103,66,69,95,71,70,104,93,88,122,118,113,129,132,126,132,141,135,152,162,158,171,182,176,185,197,194,69,77,64,26,29,21,1,1,1,1,1,2,4,1,0,12,2,5,18,3,9,12,2,5,4,1,2,2,0,0,2,0,0,4,0,1,1,1,1,32,12,11,153,45,59,203,47,68,195,46,67,191,48,69,179,50,67,155,49,59,119,42,49,91,38,42,81,48,46,94,77,71,117,110,102,125,126,116,125,128,120,129,135,128,144,153,147,162,176,171,173,187,183,184,198,196,83,94,82,47,52,43,1,1,1,2,1,2,2,0,0,5,1,2,7,1,5,4,0,2,1,0,0,1,0,0,1,0,0,3,0,0,1,2,0,27,3,2,142,25,38,205,32,54,198,25,46,169,25,43,121,25,36,85,29,34,74,41,39,85,66,56,102,92,82,121,113,105,128,124,115,122,126,115,121,127,118,132,139,131,147,157,150,165,179,174,176,191,187,186,201,199,92,102,93,54,60,50,6,7,3,3,2,1,2,2,0,1,3,1,1,3,3,1,2,2,1,1,1,1,0,0,1,0,0,1,1,1,0,3,2,15,1,0,102,19,28,157,31,47,117,17,23,74,13,12,56,27,22,74,58,55,99,90,81,115,115,99,122,126,111,124,124,112,123,123,113,125,130,119,128,135,126,136,145,137,148,159,151,162,176,171,177,192,188,188,202,201,87,99,89,43,51,37,19,23,11,11,12,4,8,10,2,5,11,4,2,10,4,2,7,2,3,4,1,3,4,1,3,4,1,2,3,2,0,6,6,4,5,2,42,13,13,71,21,24,53,27,25,57,50,41,80,77,62,113,98,82,132,113,101,134,126,113,123,126,112,116,125,111,120,128,115,131,138,126,139,148,137,143,154,145,156,168,161,169,184,179,182,197,193,188,202,201,82,96,82,46,57,36,36,44,22,31,35,17,27,30,15,22,28,15,17,26,13,16,23,12,18,21,12,19,21,13,20,22,14,19,23,15,19,27,20,23,31,21,37,40,27,64,55,45,87,70,67,104,88,81,116,102,85,128,112,88,139,121,105,131,122,110,117,122,107,115,127,112,123,133,119,131,139,127,139,149,138,148,160,151,159,172,164,174,189,183,185,200,196,187,202,200,85,101,83,62,75,48,58,67,38,55,61,37,51,56,35,47,53,33,46,53,34,48,55,38,49,55,40,51,56,41,53,58,44,55,62,46,59,67,45,68,71,48,81,84,59,104,96,74,116,103,83,127,109,92,133,116,97,127,121,97,127,127,107,118,124,106,114,125,108,122,131,117,129,136,123,136,145,133,141,152,141,149,162,153,158,171,163,168,183,178,180,195,191,186,200,199}
diff --git a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_parameter.h b/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_parameter.h
deleted file mode 100644
index 09d0ca3..0000000
--- a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_parameter.h
+++ /dev/null
@@ -1,43 +0,0 @@
-#define CONV1_IM_DIM 32
-#define CONV1_IM_CH 3
-#define CONV1_KER_DIM 5
-#define CONV1_PADDING 2
-#define CONV1_STRIDE 1
-#define CONV1_OUT_CH 32
-#define CONV1_OUT_DIM 32
-
-#define POOL1_KER_DIM 3
-#define POOL1_STRIDE 2
-#define POOL1_PADDING 0
-#define POOL1_OUT_DIM 16
-
-#define CONV2_IM_DIM 16
-#define CONV2_IM_CH 32
-#define CONV2_KER_DIM 5
-#define CONV2_PADDING 2
-#define CONV2_STRIDE 1
-#define CONV2_OUT_CH 16
-#define CONV2_OUT_DIM 16
-
-#define POOL2_KER_DIM 3
-#define POOL2_STRIDE 2
-#define POOL2_PADDING 0
-#define POOL2_OUT_DIM 8
-
-#define CONV3_IM_DIM 8
-#define CONV3_IM_CH 16
-#define CONV3_KER_DIM 5
-#define CONV3_PADDING 2
-#define CONV3_STRIDE 1
-#define CONV3_OUT_CH 32
-#define CONV3_OUT_DIM 8
-
-#define POOL3_KER_DIM 3
-#define POOL3_STRIDE 2
-#define POOL3_PADDING 0
-#define POOL3_OUT_DIM 4
-
-#define IP1_DIM 4*4*32
-#define IP1_IM_DIM 4
-#define IP1_IM_CH 32
-#define IP1_OUT 10
diff --git a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_weights.h b/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_weights.h
deleted file mode 100644
index 8d92d21..0000000
--- a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_weights.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#define CONV1_WT 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-
-#define CONV1_BIAS {-49,-18,-7,-20,-12,-15,7,2,-10,-84,-72,-65,-53,-6,-87,-63,-64,-28,-28,-4,-3,-10,-52,-15,-5,-7,-31,-44,-102,-19,-5,-65}
-
-#define CONV2_WT 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-
-#define CONV2_BIAS {55,50,34,43,-37,35,-21,10,35,-53,-76,7,14,-1,92,20}
-
-#define CONV3_WT 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-
-#define CONV3_BIAS {18,36,-46,-45,64,8,13,-19,28,1,14,-57,23,20,-2,32,48,-11,85,73,-7,52,125,33,125,13,92,-72,89,-1,11,70}
-
-#define IP1_WT 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34,-1,-20}
-
-#define IP1_BIAS {30,-121,-51,77,40,20,46,-35,28,-33}
-
-#define CONV1_BIAS_LSHIFT 6
-#define CONV1_OUT_RSHIFT 9
-#define CONV2_BIAS_LSHIFT 4
-#define CONV2_OUT_RSHIFT 9
-#define CONV3_BIAS_LSHIFT 1
-#define CONV3_OUT_RSHIFT 7
-#define IP1_BIAS_LSHIFT 1
-#define IP1_OUT_RSHIFT 8
-#define INPUT_MEAN_SHIFT {125,123,114}
-#define INPUT_RIGHT_SHIFT {8,8,8}
diff --git a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/readme_iar.txt b/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/readme_iar.txt
deleted file mode 100644
index 8ca1d5c..0000000
--- a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/readme_iar.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-CMSIS NN Lib example arm_nnexample_cifar10 for
-  Cortex-M0, Cortex-M3, Cortex-M4 and Cortex-M7.
-
-The example is configured for IAR Embedded Workbench for ARM Simulator.
-
-When changing target, remember to change the ARM_MATH_CMx and __FPU_PRESENT
-Preprocessor defines for C/C++ Compiler
diff --git a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru/NN-example-gru.ewp b/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru/NN-example-gru.ewp
deleted file mode 100644
index 959d07b..0000000
--- a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru/NN-example-gru.ewp
+++ /dev/null
Binary files differ
diff --git a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru/arm_nnexamples_gru.cpp b/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru/arm_nnexamples_gru.cpp
deleted file mode 100644
index 340dc33..0000000
--- a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru/arm_nnexamples_gru.cpp
+++ /dev/null
@@ -1,221 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
-*
-*
-* Project:       CMSIS NN Library
-* Title:         arm_nnexamples_gru.cpp
-*
-* Description:   Gated Recurrent Unit Example
-*
-* Target Processor: Cortex-M4/Cortex-M7
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of Arm LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-/**
- * @ingroup groupExamples
- */
-
-/**
- * @defgroup GRUExample Gated Recurrent Unit Example
- *
- * \par Description:
- * \par
- * Demonstrates a gated recurrent unit (GRU) example with the use of fully-connected,
- * Tanh/Sigmoid activation functions.
- *
- * \par Model definition:
- * \par
- * GRU is a type of recurrent neural network (RNN). It contains two sigmoid gates and one hidden
- * state. 
- * \par
- * The computation can be summarized as:
- * <pre>z[t] = sigmoid( W_z &sdot; {h[t-1],x[t]} )
- * r[t] = sigmoid( W_r &sdot; {h[t-1],x[t]} ) 
- * n[t] = tanh( W_n &sdot; [r[t] &times; {h[t-1], x[t]} ) 
- * h[t] = (1 - z[t]) &times; h[t-1] + z[t] &times; n[t] </pre>
- * \image html GRU.gif "Gate Recurrent Unit Diagram"
- *
- * \par Variables Description:
- * \par
- * \li \c update_gate_weights, \c reset_gate_weights, \c hidden_state_weights are weights corresponding to update gate (W_z), reset gate (W_r), and hidden state (W_n).
- * \li \c update_gate_bias, \c reset_gate_bias, \c hidden_state_bias are layer bias arrays
- * \li \c test_input1, \c test_input2, \c test_history are the inputs and initial history
- *
- * \par
- * The buffer is allocated as:
- * \par
- * | reset | input | history | update | hidden_state |
- * \par
- * In this way, the concatination is automatically done since (reset, input) and (input, history)
- * are physically concatinated in memory.
- * \par
- *  The ordering of the weight matrix should be adjusted accordingly.
- *
-  *
- * 
- * \par CMSIS DSP Software Library Functions Used:
- * \par
- * - arm_fully_connected_mat_q7_vec_q15_opt()
- * - arm_nn_activations_direct_q15()
- * - arm_mult_q15()
- * - arm_offset_q15()
- * - arm_sub_q15()
- * - arm_copy_q15()
- *
- * <b> Refer  </b>
- * \link arm_nnexamples_gru.cpp \endlink
- *
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <math.h>
-#include "arm_nnexamples_gru_test_data.h"
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-#ifdef _RTE_
-#include "RTE_Components.h"
-#ifdef RTE_Compiler_EventRecorder
-#include "EventRecorder.h"
-#endif
-#endif
-
-#define DIM_HISTORY 32
-#define DIM_INPUT 32
-#define DIM_VEC 64
-
-#define USE_X4
-
-#ifndef USE_X4
-static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X2;
-static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X2;
-static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X2;
-#else
-static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X4;
-static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X4;
-static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X4;
-#endif
-
-static q7_t update_gate_bias[DIM_HISTORY] = UPDATE_GATE_BIAS;
-static q7_t reset_gate_bias[DIM_HISTORY] = RESET_GATE_BIAS;
-static q7_t hidden_state_bias[DIM_HISTORY] = HIDDEN_STATE_BIAS;
-
-static q15_t test_input1[DIM_INPUT] = INPUT_DATA1;
-static q15_t test_input2[DIM_INPUT] = INPUT_DATA2;
-static q15_t test_history[DIM_HISTORY] = HISTORY_DATA;
-
-q15_t     scratch_buffer[DIM_HISTORY * 4 + DIM_INPUT];
-
-void gru_example(q15_t * scratch_input, uint16_t input_size, uint16_t history_size,
-                 q7_t * weights_update, q7_t * weights_reset, q7_t * weights_hidden_state,
-                 q7_t * bias_update, q7_t * bias_reset, q7_t * bias_hidden_state)
-{
-  q15_t    *reset = scratch_input;
-  q15_t    *input = scratch_input + history_size;
-  q15_t    *history = scratch_input + history_size + input_size;
-  q15_t    *update = scratch_input + 2 * history_size + input_size;
-  q15_t    *hidden_state = scratch_input + 3 * history_size + input_size;
-
-  // reset gate calculation
-  // the range of the output can be adjusted with bias_shift and output_shift
-#ifndef USE_X4
-  arm_fully_connected_mat_q7_vec_q15(input, weights_reset, input_size + history_size, history_size, 0, 15, bias_reset,
-                                     reset, NULL);
-#else
-  arm_fully_connected_mat_q7_vec_q15_opt(input, weights_reset, input_size + history_size, history_size, 0, 15,
-                                         bias_reset, reset, NULL);
-#endif
-  // sigmoid function, the size of the integer bit-width should be consistent with out_shift
-  arm_nn_activations_direct_q15(reset, history_size, 0, ARM_SIGMOID);
-  arm_mult_q15(history, reset, reset, history_size);
-
-  // update gate calculation
-  // the range of the output can be adjusted with bias_shift and output_shift
-#ifndef USE_X4
-  arm_fully_connected_mat_q7_vec_q15(input, weights_update, input_size + history_size, history_size, 0, 15,
-                                     bias_update, update, NULL);
-#else
-  arm_fully_connected_mat_q7_vec_q15_opt(input, weights_update, input_size + history_size, history_size, 0, 15,
-                                         bias_update, update, NULL);
-#endif
-
-  // sigmoid function, the size of the integer bit-width should be consistent with out_shift
-  arm_nn_activations_direct_q15(update, history_size, 0, ARM_SIGMOID);
-
-  // hidden state calculation
-#ifndef USE_X4
-  arm_fully_connected_mat_q7_vec_q15(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
-                                     bias_hidden_state, hidden_state, NULL);
-#else
-  arm_fully_connected_mat_q7_vec_q15_opt(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
-                                         bias_hidden_state, hidden_state, NULL);
-#endif
-
-  // tanh function, the size of the integer bit-width should be consistent with out_shift
-  arm_nn_activations_direct_q15(hidden_state, history_size, 0, ARM_TANH);
-  arm_mult_q15(update, hidden_state, hidden_state, history_size);
-
-  // we calculate z - 1 here
-  // so final addition becomes substraction
-  arm_offset_q15(update, 0x8000, update, history_size);
-  // multiply history
-  arm_mult_q15(history, update, update, history_size);
-  // calculate history_out
-  arm_sub_q15(hidden_state, update, history, history_size);
-
-  return;
-}
-
-int main()
-{
-  #ifdef RTE_Compiler_EventRecorder
-  EventRecorderInitialize (EventRecordAll, 1);  // initialize and start Event Recorder
-  #endif
-
-  printf("Start GRU execution\n");
-  int       input_size = DIM_INPUT;
-  int       history_size = DIM_HISTORY;
-
-  // copy over the input data 
-  arm_copy_q15(test_input1, scratch_buffer + history_size, input_size);
-  arm_copy_q15(test_history, scratch_buffer + history_size + input_size, history_size);
-
-  gru_example(scratch_buffer, input_size, history_size,
-              update_gate_weights, reset_gate_weights, hidden_state_weights,
-              update_gate_bias, reset_gate_bias, hidden_state_bias);
-  printf("Complete first iteration on GRU\n");
-
-  arm_copy_q15(test_input2, scratch_buffer + history_size, input_size);
-  gru_example(scratch_buffer, input_size, history_size,
-              update_gate_weights, reset_gate_weights, hidden_state_weights,
-              update_gate_bias, reset_gate_bias, hidden_state_bias);
-  printf("Complete second iteration on GRU\n");
-
-  return 0;
-}
diff --git a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru/arm_nnexamples_gru_test_data.h b/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru/arm_nnexamples_gru_test_data.h
deleted file mode 100644
index 4fd2bb0..0000000
--- a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru/arm_nnexamples_gru_test_data.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#define UPDATE_GATE_WEIGHT_X2 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-
-#define UPDATE_GATE_WEIGHT_X4 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-
-#define RESET_GATE_WEIGHT_X2 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-
-#define RESET_GATE_WEIGHT_X4 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-
-#define HIDDEN_STATE_WEIGHT_X2 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-
-#define HIDDEN_STATE_WEIGHT_X4 {-3,69,-33,102,76,60,80,19,59,-2,21,-4,-59,-59,11,-52,117,-25,70,121,-18,44,-74,-14,0,-1,44,-28,15,77,-102,92,108,-48,108,-100,99,-69,-19,121,-47,0,-80,-128,117,-123,99,-27,-118,60,34,-73,65,119,-50,-84,88,42,-91,-32,-108,79,-121,87,-123,118,-108,-88,-9,24,-104,85,8,-113,51,-112,33,118,94,1,26,-113,82,70,-95,-51,110,-96,-80,-98,107,118,-48,60,-97,102,-100,95,-69,77,76,-6,36,15,97,-52,-90,123,1,96,-58,120,17,-99,19,72,86,-109,-115,6,63,26,111,-102,45,35,-88,11,-40,-32,-125,120,38,-119,51,-109,110,113,24,22,123,-18,-23,16,58,6,-69,-68,-20,-112,-43,91,26,84,-31,-33,-37,-126,15,71,-65,103,-37,66,91,-29,-85,121,-47,111,-41,60,-88,-21,6,-120,-109,-76,106,33,-96,37,58,57,-100,10,108,25,78,-117,13,-39,-99,-43,108,93,23,93,1,56,116,41,104,-79,-43,-73,62,-104,86,110,-50,13,-70,77,-108,-107,-45,67,10,107,44,-52,30,111,-53,-113,112,90,74,-61,90,-4,34,58,96,64,79,44,-80,-119,-10,-125,-39,79,-20,67,71,72,-32,-85,-25,-18,-21,-66,0,36,-127,-96,-113,120,49,76,-117,-33,-124,-113,123,87,-49,106,-126,-76,21,-46,98,68,17,-96,-98,20,84,64,86,102,37,-117,92,63,76,-86,23,-60,55,-33,-116,-5,78,13,7,-71,-70,11,-50,-121,-127,56,-4,-105,77,-51,120,63,1,90,-46,-9,47,-56,124,59,-107,-35,59,27,78,-16,114,-33,-21,103,53,120,67,114,-48,74,-65,39,-99,23,6,124,-42,73,-15,-39,-98,-1,-115,99,85,-50,53,-85,-31,-95,116,51,-114,-71,7,-6,64,119,-46,118,-50,106,7,-41,105,-2,-13,30,70,-92,51,-69,-75,102,-101,26,110,-40,50,102,-52,-119,-55,119,20,-121,48,-3,101,-11,-51,2,125,-45,-126,-125,-120,-111,-19,9,-9,0,5,40,34,-115,-15,-5,46,-2,3,-41,81,-117,30,-89,-27,88,-39,-44,70,-7,-123,-11,114,-85,41,83,112,123,-50,-60,-30,19,25,-21,30,23,-72,81,76,-96,79,99,-6,-107,-83,75,71,82,107,43,-11,100,47,-40,-45,124,-97,-99,92,-3,74,89,102,-36,-84,89,67,3,44,-117,108,-100,49,-113,107,103,-26,-2,108,-34,60,47,101,-94,-113,112,-43,101,-37,-69,27,-38,110,39,-91,-101,-91,-28,-61,-37,37,-106,-69,60,59,121,-126,-71,-97,47,32,4,-32,-89,96,16,-89,14,119,-27,68,-11,-53,-52,111,64,-124,70,87,72,20,-114,-99,47,78,-91,54,-32,-24,-60,-49,-70,-128,1,46,-9,-95,-57,76,-44,-18,94,65,-4,-112,10,-12,-46,-109,53,22,-81,60,-22,96,4,90,23,122,68,-22,74,-73,-124,-104,-92,-106,76,-124,-68,59,-95,-59,83,97,-127,-37,96,-92,-49,123,-81,-86,-84,95,69,55,40,54,-80,-110,-3,-8,-26,-120,48,-80,0,44,-106,58,-3,-48,39,-16,1,-12,-87,-120,-65,-95,-113,96,32,-45,105,-86,109,36,40,118,-21,-32,122,-86,-103,-119,-1,-58,-110,-94,31,-14,-108,93,102,45,1,15,-86,29,-5,-43,-74,-75,-51,-8,-39,-114,85,64,40,38,108,71,88,70,67,-2,-35,-72,-36,-93,-82,-69,0,-111,89,22,84,100,-25,-123,93,-89,123,-75,-48,-18,61,-47,-62,-120,-115,-42,-115,-12,5,127,-54,45,83,108,-61,104,-114,-102,-51,59,114,-105,-127,93,-9,-11,-114,40,-61,27,114,-73,20,121,49,32,100,-66,-82,87,-26,-79,38,121,-45,-22,60,-92,19,46,39,-71,87,-9,60,92,-103,-108,33,118,19,124,86,-107,-120,79,37,60,97,-96,-68,40,-51,-66,88,-10,-61,119,89,75,91,86,8,-44,50,19,-30,-32,-47,-128,108,42,-14,75,116,88,-80,-57,25,-86,44,18,-31,-27,-58,77,111,-107,16,89,96,3,-59,-27,-83,-82,24,-120,-51,43,-75,-39,92,76,7,40,39,-62,98,66,110,84,-87,-122,-69,5,54,-82,106,29,-61,33,-98,45,65,-104,-47,-47,61,17,-46,-78,-120,34,-5,-50,113,-13,85,57,90,96,-123,23,-95,-66,103,89,101,-90,-61,-46,67,85,99,66,-85,-10,-93,-29,-66,-110,-45,37,109,-110,88,42,-42,-68,-70,-30,0,82,8,8,96,99,104,-58,59,13,86,-93,5,-29,-111,94,56,12,126,101,69,16,-25,115,17,35,-26,52,99,-13,-118,117,58,0,-101,127,23,0,109,80,-25,61,35,86,11,-117,4,-7,0,107,-123,-92,-41,-70,-94,-104,-3,-21,-56,-32,73,-27,100,21,112,-70,-128,127,96,-123,6,-93,8,-94,17,1,90,34,-75,-51,-52,-61,88,-13,-25,92,79,39,31,-62,-3,114,-13,-11,-43,64,105,-82,-56,29,-6,-103,-12,-109,68,76,-1,-121,51,-54,12,84,-94,58,96,20,40,73,124,-47,-19,-100,10,16,-56,74,81,52,-22,46,-88,108,-8,16,59,-60,-101,-26,-117,-127,-36,78,55,-54,112,33,-5,-64,7,48,111,122,118,85,-48,18,-43,15,109,53,-60,-99,-114,126,101,-125,88,125,38,19,-71,-111,122,-69,-21,-26,2,94,51,-111,-32,10,-87,41,114,-5,80,-46,59,111,16,46,115,-48,-5,-75,-122,123,-109,-70,116,-10,20,-44,-118,-67,17,41,16,102,-47,-31,-22,-96,-39,-1,-19,-98,30,-67,53,-53,-105,-9,24,15,-68,-53,77,-106,90,29,7,46,-30,67,-24,-101,-65,-66,-3,-118,-64,23,43,62,-27,-53,-7,45,-34,30,113,9,30,119,-12,-127,44,-114,-117,-12,-30,94,34,53,-91,-57,106,-38,37,-58,-97,90,116,-78,55,95,59,124,112,5,-99,-10,54,-3,-70,-110,108,-98,-75,110,99,88,99,-80,17,-77,26,123,-73,-26,120,77,-14,29,-61,78,97,-125,-39,19,80,105,22,114,-88,53,-54,-121,-7,92,34,10,101,-57,51,9,47,-124,-93,26,-76,38,70,50,45,-119,106,-51,-121,73,-68,59,121,40,78,92,23,-124,-73,67,43,104,-97,79,-31,15,75,-12,39,13,-99,75,-8,-62,-63,103,-68,101,-72,109,-123,-113,-93,47,-7,-51,64,-67,96,1,-81,34,-49,-66,-82,35,99,52,-95,28,27,-36,27,-93,-15,52,-68,55,-81,-104,117,67,-3,53,102,32,-5,-64,121,-31,-10,19,-123,41,-72,-97,113,45,-10,-111,-71,95,31,-89,-13,36,-111,39,86,126,10,-26,27,-91,48,-77,-45,-25,-106,126,-51,104,101,71,81,2,81,-26,-96,7,-114,-44,-94,-54,-22,110,19,-76,77,3,-127,-86,-78,110,6,-62,-96,121,-100,74,71,-3,-34,43,86,37,109,-110,123,56,118,-7,-33,-96,15,-60,75,-49,-23,-6,-34,57,60,117,-72,-82,-97,-104,88,30,-86,-55,111,-103,-121,-126,-63,-94,-103,-112,0,70,80,118,-46,-44,101,-85,28,85,52,91,-127,29,-88,-63,95,82,59,124,90,-86,-37,7,-116,75,72,-13,82,55,-125,-61,80,90,-75,41,-28,-41,-6,32,-62,35,88,91,61,-112,-104,-115,23,72,-102,-25,77,103,0,73,13,-121,6,81,-52,-70,59,63,113,-84,-85,-112,-9,113,-82,-52,98,-29,45,-25,59,-73,-78,-59,-96,-4,-32,-82,79,16,80,29,94,64,-7,67,-77,-5,-125,119,12,127,-9,104,-95,56,16,58,86,-117,18,66,26,-115,-55,48,59,126,-15,-90,-16,-126,15,120,75,-115,13,106,-76,80,-9,-15,-70,-10,50,-78,56,-51,110,85,-29,-102,20,15,-56,-73,-64,-23,-66,-12,-80,-128,-6,-121,-103,-6,-122,-97,40,46,-36,30,-2,-34,-2,32,116,-93,-59,-109,34,-79,126,-95,-120,-15,-40,-86,-64,71,-48,126,124,-2,-39,75,-64,127,57,30,-107,1,-74,-32,-105,-112,104,-115,80,-27,50,-86,-86,75,-13,-8,81,-13,-66,-38,-14,125,118,103,33,48,-71,10,35,-118,88,65,119,-36,-116,-107,-20,-43,-110,107,33,-27,15,-48,-119,46,-35,96,-75,88,-12,-7,90,-41,-6,-87,89,-88,-117,98,-29,-64,-41,-18,99,-83,13,61,-8,126,46,82,127,-81,-75,20,57,10,-36,81,54,-123,67,18,124,45,-55,95,50,-41,-38,-127,66,61,24,9,51,-55,113,-66,-80,28,49,-113,-71,24,113,-107,105,-71,37,47,-117,73,45,30,-74,117,114,26,6,-42,-80,-74,108,-81,110,73,88,124,-24,-43,-3,49,84,-55,-30,-125,36,102,62,-126,-45,-33,-50,98,-8,6,109,62,113,-84,-12,32,-40,24,-101,-87,-57,-56,59,-123,106,32,12,-71,-18,97,49,113,-47,105,-113,49,99,-124,-124,-81,-118,117,-12,-76,46,-9,-48,-41,-3,-54,-86,97,88,119,-82,-113,-52,-126,-93,-23,-121,127,-97,-28,-24,31,-62,-119,52,-93,75,7,33,-101,-67,67,-45,39,74,-83,127,-115,-66,4,-6,-18,-29,29,-23,68,-123,-103,31,24,117,49,8,-70,41,1,20,71,99,-40,-21,-116,-30,93,66,95,27,63,117,-49,20,-113,-92,-7,127,115,-85,97,-39,34,-67,-10,-53,123,-87,119,2,-77,68,-74,-66,22,96,-13,-12,96,-26,86,35,47,-128,-4,83,52,114,-2,-84,-14,67,-94,-53,-45,-74,-71,-94,94,-101,-122,3,-48,-14,124,-43,56,-3,58,-22,-97,-106,1,-32,57,-16,-127,51,23,-67,-59,-27,-60,125,-46,-125,-117,28,-74,29,29,-76,94,25,58,-32,-31,-101,-105,42,49,101,-115,-60,114,-55,-72,101,94,35,-14,-6,-115,-101,20,-36,-8,103,77,-42,82,61,104,85,35,-71,100,111,67,107,-90,-24,19,6,117,-87,-16,-67,-26,26,24,105,-64,102,105,-36,-7,60,109,112,-19,119,59,-81,10,-91,-9,69,124,-54,124,52,80,13,-105,21,-116,-114,-33,5,0,10,126,-93,22,-26,-115,115,94,22,105,-111,30,-7,102,44,63,0,85,-38,91,-30,98,-21,43,4,-63,-34,-124,-67,38,33,-2,45,-32,-86,12,-92,-38,29,39,121,-119,-42,-23,-30,-106,3,-12,-54,-108,7}
-
-#define UPDATE_GATE_BIAS {-85,78,113,70,33,38,8,114,70,-35,-67,65,31,-24,-70,-124,-89,104,124,-122,111,61,-87,75,-61,-98,83,-69,-63,45,-11,103}
-
-#define RESET_GATE_BIAS {-77,67,-93,-3,98,59,-121,33,49,50,41,91,-115,-33,71,47,-70,45,89,-115,72,106,-22,100,97,-100,-95,108,-33,3,14,30}
-
-#define HIDDEN_STATE_BIAS {-85,78,113,70,33,38,8,114,70,-35,-67,65,31,-24,-70,-124,-89,104,124,-122,111,61,-87,75,-61,-98,83,-69,-63,45,-11,103}
-
-#define INPUT_DATA1 {-367,-338,0,-89,453,-413,-343,-16,42,418,201,274,-352,477,-290,-92,266,-49,342,453,-398,247,-153,328,217,342,85,69,-38,351,73,128}
-
-#define INPUT_DATA2 {280,41,-322,61,315,350,504,-227,-221,-483,352,252,455,-236,344,364,-378,229,-187,-498,295,357,-511,58,-349,-458,-420,-66,-400,-379,477,-60}
-
-#define HISTORY_DATA {-38,53,105,-79,-463,51,-343,-226,-435,-282,218,441,-299,-215,-109,335,340,-471,-109,273,33,-245,-469,170,-26,-59,192,-119,76,-6,236,-145}
diff --git a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru/readme_iar.txt b/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru/readme_iar.txt
deleted file mode 100644
index a73e193..0000000
--- a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru/readme_iar.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-CMSIS NN Lib example arm_nnexample_gru0 for
-  Cortex-M0, Cortex-M3, Cortex-M4 and Cortex-M7.
-
-The example is configured for IAR Embedded Workbench for ARM Simulator.
-
-When changing target, remember to change the ARM_MATH_CMx and __FPU_PRESENT
-Preprocessor defines for C/C++ Compiler
\ No newline at end of file
diff --git a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-examples.eww b/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-examples.eww
deleted file mode 100644
index 141b78b..0000000
--- a/CMSIS/NN/Examples/IAR/iar_nn_examples/NN-examples.eww
+++ /dev/null
@@ -1,10 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<workspace>
-    <project>
-        <path>$WS_DIR$\NN-example-cifar10\NN-example-cifar10.ewp</path>
-    </project>
-    <project>
-        <path>$WS_DIR$\NN-example-gru\NN-example-gru.ewp</path>
-    </project>
-    <batchBuild />
-</workspace>