diff --git a/CMSIS/DoxyGen/Core/core.dxy b/CMSIS/DoxyGen/Core/core.dxy
index 9737162..78005db 100644
--- a/CMSIS/DoxyGen/Core/core.dxy
+++ b/CMSIS/DoxyGen/Core/core.dxy
@@ -613,7 +613,8 @@
 # ... \endcond blocks.
 
 ENABLED_SECTIONS       = ARMv8M \
-                         ARMSC
+                         ARMSC  \
+                         STAR
 
 # The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the
 # initial value of a variable or macro / define can have for it to appear in the
diff --git a/CMSIS/DoxyGen/Core/src/Overview.txt b/CMSIS/DoxyGen/Core/src/Overview.txt
index e28bb8b..af76a68 100644
--- a/CMSIS/DoxyGen/Core/src/Overview.txt
+++ b/CMSIS/DoxyGen/Core/src/Overview.txt
@@ -58,7 +58,9 @@
 - <a href="https://developer.arm.com/products/processors/cortex-m/cortex-m1"       target="_blank"><b>Cortex-M1</b></a> is a processor designed specifically for implementation in FPGAs (Armv6-M architecture).
 - <a href="https://developer.arm.com/products/processors/cortex-m/sc000-processor" target="_blank"><b>SecurCore SC000</b></a> is designed specifically for smartcard and security applications (Armv6-M architecture).
 - <a href="https://developer.arm.com/products/processors/cortex-m/sc300-processor" target="_blank"><b>SecurCore SC300</b></a> is designed specifically for smartcard and security applications (Armv7-M architecture).
-- <a href="https://developer.arm.com/products/processors/cortex-m/cortex-m35p"     target="_blank"><b>Cortex-M35P</b></a> is a temper resistant Cortex-M processor with optional software isolation using TrustZone for Armv8-M.  
+- <a href="https://developer.arm.com/products/processors/cortex-m/cortex-m35p"     target="_blank"><b>Cortex-M35P</b></a> is a temper resistant Cortex-M processor with optional software isolation using TrustZone for Armv8-M.
+- <a href="https://www.armchina.com/mountain?infoId=160"                           target="_blank"><b>STAR-MC1</b></a> is a variant of Armv8-M with TrustZone designed by Arm China.
+
 
 \subsection ARMv8M Armv8-M and Armv8.1-M Architecture
 
diff --git a/CMSIS/DoxyGen/Core/src/Ref_VersionControl.txt b/CMSIS/DoxyGen/Core/src/Ref_VersionControl.txt
index e48536d..4b35b8a 100644
--- a/CMSIS/DoxyGen/Core/src/Ref_VersionControl.txt
+++ b/CMSIS/DoxyGen/Core/src/Ref_VersionControl.txt
@@ -102,7 +102,30 @@
 \endcond
 */
 
+/**
+\cond (STAR)
+*/
+/**
+\brief Contains the core version for a STAR-MC controller.
+\details This define can be used to differentiate between the various available STAR-MC controllers.
+Possible values are:
+ - 1 for a STAR-MC1
+ 
+This define is only available for STAR-MC controllers.
+<b>Code Example:</b>
+\code
+#if defined(__STAR_MC) && (__STAR_MC == 1U)
+#error Yes, we have a STAR-MC1 controller.
+#else
+#error We need a STAR-MC1 controller!
+#endif
+\endcode
+*/
+#define __STAR_MC
+/**
+\endcond
+*/
 
 /**
 @}
-*/
\ No newline at end of file
+*/
diff --git a/CMSIS/DoxyGen/Core/src/Template.txt b/CMSIS/DoxyGen/Core/src/Template.txt
index 3622e92..a72ff14 100644
--- a/CMSIS/DoxyGen/Core/src/Template.txt
+++ b/CMSIS/DoxyGen/Core/src/Template.txt
@@ -35,6 +35,9 @@
 core_cm55.h       | for the Cortex-M55 processor
 core_cm85.h       | for the Cortex-M85 processor
 \endif
+\if STAR
+core_starmc1.h    | for the STAR-MC1 processor
+\endif
 \if ARMSC
 core_sc000.h      | for the SecurCore SC000 processor
 core_sc300.h      | for the SecurCore SC300 processor