diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc
index 26ec04a..9f2427a 100644
--- a/ARM.CMSIS.pdsc
+++ b/ARM.CMSIS.pdsc
@@ -8,8 +8,13 @@
   <url>http://www.keil.com/pack/</url>
 
   <releases>
+    <release version="5.2.1-dev3">
+       Active development...
+    </release>
+    <release version="5.2.1-dev2">
+       Updated company brand.
+    </release>
     <release version="5.2.1-dev1">
-      Active development...
       CMSIS-RTOS2:
         - RTX 5.3.0 (see revision history for details)
         - OS Tick API 1.0.1
@@ -212,7 +217,7 @@
     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
       <description>
-The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
+The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 - simple, easy-to-use programmers model
 - highly efficient ultra-low power operation
 - excellent code density
@@ -234,7 +239,7 @@
     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
       <description>
-The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
+The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 - simple, easy-to-use programmers model
 - highly efficient ultra-low power operation
 - excellent code density
@@ -261,7 +266,7 @@
     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
       <description>
-The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
+The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 - simple, easy-to-use programmers model
 - highly efficient ultra-low power operation
 - excellent code density
@@ -283,7 +288,7 @@
     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
       <description>
-The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
+The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 - simple, easy-to-use programmers model
 - highly efficient ultra-low power operation
 - excellent code density
@@ -310,7 +315,7 @@
     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
       <description>
-The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
+The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 - simple, easy-to-use programmers model
 - highly efficient ultra-low power operation
 - excellent code density
@@ -342,8 +347,8 @@
     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
       <description>
-The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
-It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
+The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
+It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
       </description>
       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
@@ -368,8 +373,8 @@
     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
       <description>
-The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
-class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
+The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
+class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
       </description>
       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
@@ -414,7 +419,7 @@
     <!-- ******************************  ARMSC000  ****************************** -->
     <family Dfamily="ARM SC000" Dvendor="ARM:82">
       <description>
-The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
+The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 - simple, easy-to-use programmers model
 - highly efficient ultra-low power operation
 - excellent code density
@@ -455,7 +460,7 @@
     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
       <description>
-ARMv8-M Baseline based device with TrustZone
+Armv8-M Baseline based device with TrustZone
       </description>
       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
@@ -474,7 +479,7 @@
     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
       <description>
-ARMv8-M Mainline based device with TrustZone
+Armv8-M Mainline based device with TrustZone
       </description>
       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
@@ -536,9 +541,9 @@
     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
       <description>
-The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
-virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
-ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
+The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
+virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
+Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
       </description>
 
       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
@@ -554,7 +559,7 @@
     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
       <description>
-The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
+The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 an optional integrated GIC, and an optional L2 cache controller.
       </description>
@@ -572,8 +577,8 @@
     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
       <description>
-The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
-The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
+The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
+The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 and 8-bit Java bytecodes in Jazelle state.
       </description>
 
@@ -740,45 +745,45 @@
       <accept Tcompiler="IAR"/>
     </condition>
 
-    <!-- ARM architecture -->
+    <!-- Arm architecture -->
     <condition id="ARMv6-M Device">
-      <description>ARMv6-M architecture based device</description>
+      <description>Armv6-M architecture based device</description>
       <accept Dcore="Cortex-M0"/>
       <accept Dcore="Cortex-M0+"/>
       <accept Dcore="SC000"/>
     </condition>
     <condition id="ARMv7-M Device">
-      <description>ARMv7-M architecture based device</description>
+      <description>Armv7-M architecture based device</description>
       <accept Dcore="Cortex-M3"/>
       <accept Dcore="Cortex-M4"/>
       <accept Dcore="Cortex-M7"/>
       <accept Dcore="SC300"/>
     </condition>
     <condition id="ARMv8-M Device">
-      <description>ARMv8-M architecture based device</description>
+      <description>Armv8-M architecture based device</description>
       <accept Dcore="ARMV8MBL"/>
       <accept Dcore="ARMV8MML"/>
       <accept Dcore="Cortex-M23"/>
       <accept Dcore="Cortex-M33"/>
     </condition>
     <condition id="ARMv8-M TZ Device">
-      <description>ARMv8-M architecture based device with TrustZone</description>
+      <description>Armv8-M architecture based device with TrustZone</description>
       <require condition="ARMv8-M Device"/>
       <require Dtz="TZ"/>
     </condition>
     <condition id="ARMv6_7-M Device">
-      <description>ARMv6_7-M architecture based device</description>
+      <description>Armv6_7-M architecture based device</description>
       <accept condition="ARMv6-M Device"/>
       <accept condition="ARMv7-M Device"/>
     </condition>
     <condition id="ARMv6_7_8-M Device">
-      <description>ARMv6_7_8-M architecture based device</description>
+      <description>Armv6_7_8-M architecture based device</description>
       <accept condition="ARMv6-M Device"/>
       <accept condition="ARMv7-M Device"/>
       <accept condition="ARMv8-M Device"/>
     </condition>
     <condition id="ARMv7-A Device">
-      <description>ARMv7-A architecture based device</description>
+      <description>Armv7-A architecture based device</description>
       <accept Dcore="Cortex-A5"/>
       <accept Dcore="Cortex-A7"/>
       <accept Dcore="Cortex-A9"/>
@@ -836,15 +841,15 @@
       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
     </condition>
     <condition id="ARMv8MBL">
-      <description>ARMv8-M Baseline processor based device</description>
+      <description>Armv8-M Baseline processor based device</description>
       <require Dcore="ARMV8MBL"/>
     </condition>
     <condition id="ARMv8MML">
-      <description>ARMv8-M Mainline processor based device</description>
+      <description>Armv8-M Mainline processor based device</description>
       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
     </condition>
     <condition id="ARMv8MML_FP">
-      <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
+      <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
     </condition>
@@ -867,19 +872,19 @@
     </condition>
 
     <condition id="ARMv8MML_NODSP_NOFPU">
-      <description>ARMv8MML, no DSP, no FPU</description>
+      <description>Armv8-M Mainline, no DSP, no FPU</description>
       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
     </condition>
     <condition id="ARMv8MML_DSP_NOFPU">
-      <description>ARMv8MML, DSP, no FPU</description>
+      <description>Armv8-M Mainline, DSP, no FPU</description>
       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
     </condition>
     <condition id="ARMv8MML_NODSP_SP">
-      <description>ARMv8MML, no DSP, SP FPU</description>
+      <description>Armv8-M Mainline, no DSP, SP FPU</description>
       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
     </condition>
     <condition id="ARMv8MML_DSP_SP">
-      <description>ARMv8MML, DSP, SP FPU</description>
+      <description>Armv8-M Mainline, DSP, SP FPU</description>
       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
     </condition>
 
@@ -896,318 +901,318 @@
 
     <!-- ARMCC compiler -->
     <condition id="CA_ARMCC5">
-      <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
+      <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
       <require condition="ARMv7-A Device"/>
       <require condition="ARMCC5"/>
     </condition>
     <condition id="CA_ARMCC6">
-      <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
+      <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
       <require condition="ARMv7-A Device"/>
       <require condition="ARMCC6"/>
     </condition>
 
     <condition id="CM0_ARMCC">
-      <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
+      <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
       <require condition="CM0"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM0_LE_ARMCC">
-      <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
+      <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
       <require condition="CM0_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM0_BE_ARMCC">
-      <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
+      <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
       <require condition="CM0_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="CM3_ARMCC">
-      <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
+      <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
       <require condition="CM3"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM3_LE_ARMCC">
-      <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
+      <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
       <require condition="CM3_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM3_BE_ARMCC">
-      <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
+      <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
       <require condition="CM3_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="CM4_ARMCC">
-      <description>Cortex-M4 processor based device for the ARM Compiler</description>
+      <description>Cortex-M4 processor based device for the Arm Compiler</description>
       <require condition="CM4"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM4_LE_ARMCC">
-      <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
+      <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
       <require condition="CM4_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM4_BE_ARMCC">
-      <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
+      <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
       <require condition="CM4_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="CM4_FP_ARMCC">
-      <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
+      <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
       <require condition="CM4_FP"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM4_FP_LE_ARMCC">
-      <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
+      <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
       <require condition="CM4_FP_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM4_FP_BE_ARMCC">
-      <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
+      <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
       <require condition="CM4_FP_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="CM7_ARMCC">
-      <description>Cortex-M7 processor based device for the ARM Compiler</description>
+      <description>Cortex-M7 processor based device for the Arm Compiler</description>
       <require condition="CM7"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM7_LE_ARMCC">
-      <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
+      <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
       <require condition="CM7_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM7_BE_ARMCC">
-      <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
+      <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
       <require condition="CM7_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="CM7_FP_ARMCC">
-      <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
+      <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
       <require condition="CM7_FP"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM7_FP_LE_ARMCC">
-      <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
+      <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
       <require condition="CM7_FP_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM7_FP_BE_ARMCC">
-      <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
+      <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
       <require condition="CM7_FP_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="CM7_SP_ARMCC">
-      <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
+      <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
       <require condition="CM7_SP"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM7_SP_LE_ARMCC">
-      <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
+      <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
       <require condition="CM7_SP_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM7_SP_BE_ARMCC">
-      <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
+      <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
       <require condition="CM7_SP_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="CM7_DP_ARMCC">
-      <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
+      <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
       <require condition="CM7_DP"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM7_DP_LE_ARMCC">
-      <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
+      <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
       <require condition="CM7_DP_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM7_DP_BE_ARMCC">
-      <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
+      <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
       <require condition="CM7_DP_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="CM23_ARMCC">
-      <description>Cortex-M23 processor based device for the ARM Compiler</description>
+      <description>Cortex-M23 processor based device for the Arm Compiler</description>
       <require condition="CM23"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM23_LE_ARMCC">
-      <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
+      <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
       <require condition="CM23_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM23_BE_ARMCC">
-      <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
+      <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
       <require condition="CM23_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="CM33_ARMCC">
-      <description>Cortex-M33 processor based device for the ARM Compiler</description>
+      <description>Cortex-M33 processor based device for the Arm Compiler</description>
       <require condition="CM33"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM33_LE_ARMCC">
-      <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
+      <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
       <require condition="CM33_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM33_BE_ARMCC">
-      <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
+      <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
       <require condition="CM33_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="CM33_FP_ARMCC">
-      <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
+      <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
       <require condition="CM33_FP"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM33_FP_LE_ARMCC">
-      <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
+      <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
       <require condition="CM33_FP_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM33_FP_BE_ARMCC">
-      <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
+      <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
       <require condition="CM33_FP_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="CM33_NODSP_NOFPU_ARMCC">
-      <description>CM33, no DSP, no FPU, ARM Compiler</description>
+      <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
       <require condition="CM33_NODSP_NOFPU"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM33_DSP_NOFPU_ARMCC">
-      <description>CM33, DSP, no FPU, ARM Compiler</description>
+      <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
       <require condition="CM33_DSP_NOFPU"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM33_NODSP_SP_ARMCC">
-      <description>CM33, no DSP, SP FPU, ARM Compiler</description>
+      <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
       <require condition="CM33_NODSP_SP"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM33_DSP_SP_ARMCC">
-      <description>CM33, DSP, SP FPU, ARM Compiler</description>
+      <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
       <require condition="CM33_DSP_SP"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
-      <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
+      <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
-      <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
+      <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
       <require condition="CM33_DSP_NOFPU_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM33_NODSP_SP_LE_ARMCC">
-      <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
+      <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
       <require condition="CM33_NODSP_SP_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="CM33_DSP_SP_LE_ARMCC">
-      <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
+      <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
       <require condition="CM33_DSP_SP_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
 
     <condition id="ARMv8MBL_ARMCC">
-      <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
+      <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
       <require condition="ARMv8MBL"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="ARMv8MBL_LE_ARMCC">
-      <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
+      <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
       <require condition="ARMv8MBL_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MBL_BE_ARMCC">
-      <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
+      <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
       <require condition="ARMv8MBL_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="ARMv8MML_ARMCC">
-      <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
+      <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
       <require condition="ARMv8MML"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="ARMv8MML_LE_ARMCC">
-      <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
+      <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
       <require condition="ARMv8MML_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_BE_ARMCC">
-      <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
+      <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
       <require condition="ARMv8MML_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="ARMv8MML_FP_ARMCC">
-      <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
+      <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
       <require condition="ARMv8MML_FP"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="ARMv8MML_FP_LE_ARMCC">
-      <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
+      <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
       <require condition="ARMv8MML_FP_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_FP_BE_ARMCC">
-      <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
+      <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
       <require condition="ARMv8MML_FP_ARMCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
-      <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
+      <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
       <require condition="ARMv8MML_NODSP_NOFPU"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
-      <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
+      <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
       <require condition="ARMv8MML_DSP_NOFPU"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="ARMv8MML_NODSP_SP_ARMCC">
-      <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
+      <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
       <require condition="ARMv8MML_NODSP_SP"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="ARMv8MML_DSP_SP_ARMCC">
-      <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
+      <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
       <require condition="ARMv8MML_DSP_SP"/>
       <require Tcompiler="ARMCC"/>
     </condition>
     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
-      <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
+      <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
-      <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
+      <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
-      <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
+      <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
-      <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
+      <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
@@ -1437,90 +1442,90 @@
     </condition>
 
     <condition id="ARMv8MBL_GCC">
-      <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
+      <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
       <require condition="ARMv8MBL"/>
       <require Tcompiler="GCC"/>
     </condition>
     <condition id="ARMv8MBL_LE_GCC">
-      <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
+      <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
       <require condition="ARMv8MBL_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MBL_BE_GCC">
-      <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
+      <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
       <require condition="ARMv8MBL_GCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="ARMv8MML_GCC">
-      <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
+      <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
       <require condition="ARMv8MML"/>
       <require Tcompiler="GCC"/>
     </condition>
     <condition id="ARMv8MML_LE_GCC">
-      <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
+      <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
       <require condition="ARMv8MML_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_BE_GCC">
-      <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
+      <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
       <require condition="ARMv8MML_GCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="ARMv8MML_FP_GCC">
-      <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
+      <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
       <require condition="ARMv8MML_FP"/>
       <require Tcompiler="GCC"/>
     </condition>
     <condition id="ARMv8MML_FP_LE_GCC">
-      <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
+      <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
       <require condition="ARMv8MML_FP_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_FP_BE_GCC">
-      <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
+      <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
       <require condition="ARMv8MML_FP_GCC"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
-      <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
+      <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
       <require condition="ARMv8MML_NODSP_NOFPU"/>
       <require Tcompiler="GCC"/>
     </condition>
     <condition id="ARMv8MML_DSP_NOFPU_GCC">
-      <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
+      <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
       <require condition="ARMv8MML_DSP_NOFPU"/>
       <require Tcompiler="GCC"/>
     </condition>
     <condition id="ARMv8MML_NODSP_SP_GCC">
-      <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
+      <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
       <require condition="ARMv8MML_NODSP_SP"/>
       <require Tcompiler="GCC"/>
     </condition>
     <condition id="ARMv8MML_DSP_SP_GCC">
-      <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
+      <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
       <require condition="ARMv8MML_DSP_SP"/>
       <require Tcompiler="GCC"/>
     </condition>
     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
-      <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
+      <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
-      <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
+      <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
-      <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
+      <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
       <require condition="ARMv8MML_NODSP_SP_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_DSP_SP_LE_GCC">
-      <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
+      <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
       <require condition="ARMv8MML_DSP_SP_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
@@ -1750,90 +1755,90 @@
     </condition>
 
     <condition id="ARMv8MBL_IAR">
-      <description>ARMv8-M Baseline processor based device for the IAR Compiler</description>
+      <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
       <require condition="ARMv8MBL"/>
       <require Tcompiler="IAR"/>
     </condition>
     <condition id="ARMv8MBL_LE_IAR">
-      <description>ARMv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
+      <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
       <require condition="ARMv8MBL_IAR"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MBL_BE_IAR">
-      <description>ARMv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
+      <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
       <require condition="ARMv8MBL_IAR"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="ARMv8MML_IAR">
-      <description>ARMv8-M Mainline processor based device for the IAR Compiler</description>
+      <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
       <require condition="ARMv8MML"/>
       <require Tcompiler="IAR"/>
     </condition>
     <condition id="ARMv8MML_LE_IAR">
-      <description>ARMv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
+      <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
       <require condition="ARMv8MML_IAR"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_BE_IAR">
-      <description>ARMv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
+      <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
       <require condition="ARMv8MML_IAR"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="ARMv8MML_FP_IAR">
-      <description>ARMv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
+      <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
       <require condition="ARMv8MML_FP"/>
       <require Tcompiler="IAR"/>
     </condition>
     <condition id="ARMv8MML_FP_LE_IAR">
-      <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
+      <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
       <require condition="ARMv8MML_FP_IAR"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_FP_BE_IAR">
-      <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
+      <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
       <require condition="ARMv8MML_FP_IAR"/>
       <require Dendian="Big-endian"/>
     </condition>
 
     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
-      <description>ARMv8MML, no DSP, no FPU, IAR Compiler</description>
+      <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
       <require condition="ARMv8MML_NODSP_NOFPU"/>
       <require Tcompiler="IAR"/>
     </condition>
     <condition id="ARMv8MML_DSP_NOFPU_IAR">
-      <description>ARMv8MML, DSP, no FPU, IAR Compiler</description>
+      <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
       <require condition="ARMv8MML_DSP_NOFPU"/>
       <require Tcompiler="IAR"/>
     </condition>
     <condition id="ARMv8MML_NODSP_SP_IAR">
-      <description>ARMv8MML, no DSP, SP FPU, IAR Compiler</description>
+      <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
       <require condition="ARMv8MML_NODSP_SP"/>
       <require Tcompiler="IAR"/>
     </condition>
     <condition id="ARMv8MML_DSP_SP_IAR">
-      <description>ARMv8MML, DSP, SP FPU, IAR Compiler</description>
+      <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
       <require condition="ARMv8MML_DSP_SP"/>
       <require Tcompiler="IAR"/>
     </condition>
     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
-      <description>ARMv8MML, little endian, no DSP, no FPU, IAR Compiler</description>
+      <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
-      <description>ARMv8MML, little endian, DSP, no FPU, IAR Compiler</description>
+      <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
-      <description>ARMv8MML, little endian, no DSP, SP FPU, IAR Compiler</description>
+      <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
       <require condition="ARMv8MML_NODSP_SP_IAR"/>
       <require Dendian="Little-endian"/>
     </condition>
     <condition id="ARMv8MML_DSP_SP_LE_IAR">
-      <description>ARMv8MML, little endian, DSP, SP FPU, IAR Compiler</description>
+      <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
       <require condition="ARMv8MML_DSP_SP_IAR"/>
       <require Dendian="Little-endian"/>
     </condition>
@@ -1841,7 +1846,7 @@
     <!-- conditions selecting single devices and CMSIS Core -->
     <!-- used for component startup, GCC version is used for C-Startup -->
     <condition id="ARMCM0 CMSIS">
-      <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
+      <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM0"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
@@ -1852,129 +1857,129 @@
     </condition>
 
     <condition id="ARMCM0+ CMSIS">
-      <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
+      <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
     <condition id="ARMCM0+ CMSIS GCC">
-      <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
+      <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
       <require condition="ARMCM0+ CMSIS"/>
       <require condition="GCC"/>
     </condition>
 
     <condition id="ARMCM3 CMSIS">
-      <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
+      <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM3"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
     <condition id="ARMCM3 CMSIS GCC">
-      <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
+      <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
       <require condition="ARMCM3 CMSIS"/>
       <require condition="GCC"/>
     </condition>
 
     <condition id="ARMCM4 CMSIS">
-      <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
+      <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
     <condition id="ARMCM4 CMSIS GCC">
-      <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
+      <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
       <require condition="ARMCM4 CMSIS"/>
       <require condition="GCC"/>
     </condition>
 
     <condition id="ARMCM7 CMSIS">
-      <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
+      <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
     <condition id="ARMCM7 CMSIS GCC">
-      <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
+      <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
       <require condition="ARMCM7 CMSIS"/>
       <require condition="GCC"/>
     </condition>
 
     <condition id="ARMCM23 CMSIS">
-      <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
+      <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
     <condition id="ARMCM23 CMSIS GCC">
-      <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
+      <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
       <require condition="ARMCM23 CMSIS"/>
       <require condition="GCC"/>
     </condition>
 
     <condition id="ARMCM33 CMSIS">
-      <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
+      <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
     <condition id="ARMCM33 CMSIS GCC">
-      <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
+      <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
       <require condition="ARMCM33 CMSIS"/>
       <require condition="GCC"/>
     </condition>
 
     <condition id="ARMSC000 CMSIS">
-      <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
+      <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMSC000"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
     <condition id="ARMSC000 CMSIS GCC">
-      <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
+      <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
       <require condition="ARMSC000 CMSIS"/>
       <require condition="GCC"/>
     </condition>
 
     <condition id="ARMSC300 CMSIS">
-      <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
+      <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMSC300"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
     <condition id="ARMSC300 CMSIS GCC">
-      <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
+      <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
       <require condition="ARMSC300 CMSIS"/>
       <require condition="GCC"/>
     </condition>
 
     <condition id="ARMv8MBL CMSIS">
-      <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
+      <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
     <condition id="ARMv8MBL CMSIS GCC">
-      <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
+      <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
       <require condition="ARMv8MBL CMSIS"/>
       <require condition="GCC"/>
     </condition>
 
     <condition id="ARMv8MML CMSIS">
-      <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
+      <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
     <condition id="ARMv8MML CMSIS GCC">
-      <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
+      <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
       <require condition="ARMv8MML CMSIS"/>
       <require condition="GCC"/>
     </condition>
 
     <condition id="ARMCA5 CMSIS">
-      <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
+      <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCA5"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
 
     <condition id="ARMCA7 CMSIS">
-      <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
+      <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCA7"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
 
     <condition id="ARMCA9 CMSIS">
-      <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
+      <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCA9"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
@@ -2017,7 +2022,7 @@
       <require Cclass="Device" Cgroup="Startup"/>
     </condition>
     <condition id="RTOS2 RTX5 v7-A">
-      <description>Components required for RTOS2 RTX5 v7-A</description>
+      <description>Components required for RTOS2 RTX5 on Armv7-A</description>
       <require condition="ARMv7-A Device"/>
       <require condition="ARMCC GCC IAR"/>
       <require Cclass="CMSIS"  Cgroup="CORE"/>
@@ -2082,7 +2087,7 @@
     <!-- CMSIS-Startup components -->
     <!-- Cortex-M0 -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
-      <description>System and Startup for Generic ARM Cortex-M0 device</description>
+      <description>System and Startup for Generic Arm Cortex-M0 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
@@ -2095,7 +2100,7 @@
       </files>
     </component>
     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
-      <description>System and Startup for Generic ARM Cortex-M0 device</description>
+      <description>System and Startup for Generic Arm Cortex-M0 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
@@ -2108,7 +2113,7 @@
 
     <!-- Cortex-M0+ -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
-      <description>System and Startup for Generic ARM Cortex-M0+ device</description>
+      <description>System and Startup for Generic Arm Cortex-M0+ device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
@@ -2121,7 +2126,7 @@
       </files>
     </component>
     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
-      <description>System and Startup for Generic ARM Cortex-M0+ device</description>
+      <description>System and Startup for Generic Arm Cortex-M0+ device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
@@ -2134,7 +2139,7 @@
 
     <!-- Cortex-M3 -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
-      <description>System and Startup for Generic ARM Cortex-M3 device</description>
+      <description>System and Startup for Generic Arm Cortex-M3 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
@@ -2147,7 +2152,7 @@
       </files>
     </component>
     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
-      <description>System and Startup for Generic ARM Cortex-M3 device</description>
+      <description>System and Startup for Generic Arm Cortex-M3 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
@@ -2160,7 +2165,7 @@
 
     <!-- Cortex-M4 -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
-      <description>System and Startup for Generic ARM Cortex-M4 device</description>
+      <description>System and Startup for Generic Arm Cortex-M4 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
@@ -2173,7 +2178,7 @@
       </files>
     </component>
     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
-      <description>System and Startup for Generic ARM Cortex-M4 device</description>
+      <description>System and Startup for Generic Arm Cortex-M4 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
@@ -2186,7 +2191,7 @@
 
     <!-- Cortex-M7 -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
-      <description>System and Startup for Generic ARM Cortex-M7 device</description>
+      <description>System and Startup for Generic Arm Cortex-M7 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
@@ -2199,7 +2204,7 @@
       </files>
     </component>
     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
-      <description>System and Startup for Generic ARM Cortex-M7 device</description>
+      <description>System and Startup for Generic Arm Cortex-M7 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
@@ -2212,7 +2217,7 @@
 
     <!-- Cortex-M23 -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
-      <description>System and Startup for Generic ARM Cortex-M23 device</description>
+      <description>System and Startup for Generic Arm Cortex-M23 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
@@ -2227,7 +2232,7 @@
       </files>
     </component>
     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
-      <description>System and Startup for Generic ARM Cortex-M23 device</description>
+      <description>System and Startup for Generic Arm Cortex-M23 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
@@ -2242,7 +2247,7 @@
 
     <!-- Cortex-M33 -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
-      <description>System and Startup for Generic ARM Cortex-M33 device</description>
+      <description>System and Startup for Generic Arm Cortex-M33 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
@@ -2257,7 +2262,7 @@
       </files>
     </component>
     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
-      <description>System and Startup for Generic ARM Cortex-M33 device</description>
+      <description>System and Startup for Generic Arm Cortex-M33 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
@@ -2272,7 +2277,7 @@
 
     <!-- Cortex-SC000 -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
-      <description>System and Startup for Generic ARM SC000 device</description>
+      <description>System and Startup for Generic Arm SC000 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
@@ -2285,7 +2290,7 @@
       </files>
     </component>
     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
-      <description>System and Startup for Generic ARM SC000 device</description>
+      <description>System and Startup for Generic Arm SC000 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
@@ -2298,7 +2303,7 @@
 
     <!-- Cortex-SC300 -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
-      <description>System and Startup for Generic ARM SC300 device</description>
+      <description>System and Startup for Generic Arm SC300 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
@@ -2311,7 +2316,7 @@
       </files>
     </component>
     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
-      <description>System and Startup for Generic ARM SC300 device</description>
+      <description>System and Startup for Generic Arm SC300 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
@@ -2324,7 +2329,7 @@
 
     <!-- ARMv8MBL -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
-      <description>System and Startup for Generic ARM ARMv8MBL device</description>
+      <description>System and Startup for Generic Armv8-M Baseline device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
@@ -2338,7 +2343,7 @@
       </files>
     </component>
     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
-      <description>System and Startup for Generic ARM ARMv8MBL device</description>
+      <description>System and Startup for Generic Armv8-M Baseline device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
@@ -2353,7 +2358,7 @@
 
     <!-- ARMv8MML -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
-      <description>System and Startup for Generic ARM ARMv8MML device</description>
+      <description>System and Startup for Generic Armv8-M Mainline device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
@@ -2367,7 +2372,7 @@
       </files>
     </component>
     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
-      <description>System and Startup for Generic ARM ARMv8MML device</description>
+      <description>System and Startup for Generic Armv8-M Mainline device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
@@ -2382,7 +2387,7 @@
 
     <!-- Cortex-A5 -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
-      <description>System and Startup for Generic ARM Cortex-A5 device</description>
+      <description>System and Startup for Generic Arm Cortex-A5 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
@@ -2405,7 +2410,7 @@
 
     <!-- Cortex-A7 -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
-      <description>System and Startup for Generic ARM Cortex-A7 device</description>
+      <description>System and Startup for Generic Arm Cortex-A7 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
@@ -2427,7 +2432,7 @@
 
     <!-- Cortex-A9 -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
-      <description>System and Startup for Generic ARM Cortex-A9 device</description>
+      <description>System and Startup for Generic Arm Cortex-A9 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
@@ -2662,7 +2667,7 @@
 
     <!-- CMSIS-RTOS2 Keil RTX5 component -->
     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5 Lib">
-      <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
+      <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
       <RTE_Components_h>
         <!-- the following content goes into file 'RTE_Components.h' -->
         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
@@ -2731,12 +2736,12 @@
       </files>
     </component>
     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
-      <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
+      <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
       <RTE_Components_h>
         <!-- the following content goes into file 'RTE_Components.h' -->
         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
-        #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
+        #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
       </RTE_Components_h>
       <files>
         <!-- RTX documentation -->
@@ -2782,7 +2787,7 @@
       </files>
     </component>
     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5">
-      <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
+      <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
       <RTE_Components_h>
         <!-- the following content goes into file 'RTE_Components.h' -->
         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
@@ -2871,7 +2876,7 @@
       </files>
     </component>
     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5 v7-A">
-      <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
+      <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
       <RTE_Components_h>
         <!-- the following content goes into file 'RTE_Components.h' -->
         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
@@ -2928,13 +2933,13 @@
       </files>
     </component>
     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
-      <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
+      <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
       <RTE_Components_h>
         <!-- the following content goes into file 'RTE_Components.h' -->
         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
-        #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
+        #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
       </RTE_Components_h>
       <files>
         <!-- RTX documentation -->