diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc
index 913428a..2096821 100644
--- a/ARM.CMSIS.pdsc
+++ b/ARM.CMSIS.pdsc
@@ -8,10 +8,16 @@
   <url>http://www.keil.com/pack/</url>
 
   <releases>
+    <release version="5.7.1-dev1">
+      Active development ...
+      CMSIS-Core(M):
+       - Added ARMv8-M Stack Sealing (to linker, startup) for toolcahin ARM, GCC
+       - Changed C-Startup to default Startup.
+    </release>
     <release version="5.7.1-dev0">
       Active development ...
       CMSIS-Core(M):
-       - updated GCC LinkerDescription, GCC Assembler startup
+       - Updated GCC LinkerDescription, GCC Assembler startup
       CMSIS-DSP:
        - Purged pre-built libs from Git
       CMSIS-RTOS:
@@ -1077,7 +1083,12 @@
     <condition id="TZ Non-secure">
       <description>TrustZone (Non-secure)</description>
       <require Dtz="TZ"/>
-      <require Dsecure="Non-secure"/>
+      <accept Dsecure="Non-secure"/>
+      <accept Dsecure="TZ-disabled"/>
+    </condition>
+    <condition id="TZ Unavailable">
+      <description>TrustZone not available</description>
+      <deny Dtz="TZ"/>
     </condition>
 
     <!-- ARM core -->
@@ -1627,6 +1638,22 @@
       <require Dendian="Little-endian"/>
     </condition>
 
+    <condition id="TZ Secure ARMCC6">
+      <description>TrustZone (Secure), Arm Compiler</description>
+      <require condition="TZ Secure"/>
+      <require condition="ARMCC6"/>
+    </condition>
+    <condition id="TZ Non-secure ARMCC6">
+      <description>TrustZone (Non-secure), Arm Compiler</description>
+      <require condition="TZ Non-secure"/>
+      <require condition="ARMCC6"/>
+    </condition>
+    <condition id="TZ Unavailable ARMCC6">
+      <description>TrustZone not available, Arm Compiler</description>
+      <require condition="TZ Unavailable"/>
+      <require condition="ARMCC6"/>
+    </condition>
+
     <!-- GCC compiler -->
     <condition id="CA_GCC">
       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
@@ -2604,7 +2631,7 @@
 
     <!-- CMSIS-Startup components -->
     <!-- Cortex-M0 -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Arm Cortex-M0 device</description>
       <files>
         <!-- include folder / device header file -->
@@ -2632,7 +2659,7 @@
     </component>
 
     <!-- Cortex-M0+ -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
       <files>
         <!-- include folder / device header file -->
@@ -2660,7 +2687,7 @@
     </component>
 
     <!-- Cortex-M1 -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Arm Cortex-M1 device</description>
       <files>
         <!-- include folder / device header file -->
@@ -2688,7 +2715,7 @@
     </component>
 
     <!-- Cortex-M3 -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Arm Cortex-M3 device</description>
       <files>
         <!-- include folder / device header file -->
@@ -2716,7 +2743,7 @@
     </component>
 
     <!-- Cortex-M4 -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Arm Cortex-M4 device</description>
       <files>
         <!-- include folder / device header file -->
@@ -2744,7 +2771,7 @@
     </component>
 
     <!-- Cortex-M7 -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Arm Cortex-M7 device</description>
       <files>
         <!-- include folder / device header file -->
@@ -2772,29 +2799,34 @@
     </component>
 
     <!-- Cortex-M23 -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM23 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Arm Cortex-M23 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.3" attr="config"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM23 CMSIS">
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.1.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.1.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
@@ -2803,29 +2835,34 @@
     </component>
 
     <!-- Cortex-M33 -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM33 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Arm Cortex-M33 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.3" attr="config"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.1.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM33 CMSIS">
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.1.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.1.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.2.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
@@ -2834,29 +2871,34 @@
     </component>
 
     <!-- Cortex-M35P -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM35P CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Arm Cortex-M35P device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.3" attr="config"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.1.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM35P CMSIS">
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.1.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.1.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.2.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
@@ -2865,15 +2907,17 @@
     </component>
 
     <!-- Cortex-M55 -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM55 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Cortex-M55 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.0.0" attr="config"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.1.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.0" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
@@ -2881,7 +2925,7 @@
     </component>
 
     <!-- Cortex-SC000 -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Arm SC000 device</description>
       <files>
         <!-- include folder / device header file -->
@@ -2909,7 +2953,7 @@
     </component>
 
     <!-- Cortex-SC300 -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Arm SC300 device</description>
       <files>
         <!-- include folder / device header file -->
@@ -2937,29 +2981,34 @@
     </component>
 
     <!-- ARMv8MBL -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMv8MBL CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Armv8-M Baseline device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.3" attr="config"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.1.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMv8MBL CMSIS">
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.1.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
@@ -2967,29 +3016,34 @@
     </component>
 
     <!-- ARMv8MML -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMv8MML CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Armv8-M Mainline device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.3" attr="config"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.1.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMv8MML CMSIS">
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.1.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.1.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.2.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
@@ -2997,15 +3051,17 @@
     </component>
 
     <!-- ARMv81MML -->
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.1" condition="ARMv81MML CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.3" attr="config"/>
-        <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.1.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
diff --git a/CMSIS/Core/Include/cmsis_armclang.h b/CMSIS/Core/Include/cmsis_armclang.h
index 90de9db..d32be89 100644
--- a/CMSIS/Core/Include/cmsis_armclang.h
+++ b/CMSIS/Core/Include/cmsis_armclang.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     cmsis_armclang.h
  * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
- * @version  V5.3.1
- * @date     26. March 2020
+ * @version  V5.3.2
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -136,6 +136,18 @@
 #define __VECTOR_TABLE_ATTRIBUTE  __attribute__((used, section("RESET")))
 #endif
 
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#ifndef __STACK_SEAL
+#define __STACK_SEAL              Image$$STACKSEAL$$ZI$$Base
+#endif
+
+__STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) {
+  *(stackTop    ) = 0xFEF5EDA5U;
+  *(stackTop + 1) = 0xFEF5EDA5U;
+}
+#endif
+
+
 /* ###########################  Core Function Access  ########################### */
 /** \ingroup  CMSIS_Core_FunctionInterface
     \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
diff --git a/CMSIS/Core/Include/cmsis_gcc.h b/CMSIS/Core/Include/cmsis_gcc.h
index 199336b..742d529 100644
--- a/CMSIS/Core/Include/cmsis_gcc.h
+++ b/CMSIS/Core/Include/cmsis_gcc.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     cmsis_gcc.h
  * @brief    CMSIS compiler GCC header file
- * @version  V5.3.0
- * @date     26. March 2020
+ * @version  V5.3.1
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -182,6 +182,18 @@
 #define __VECTOR_TABLE_ATTRIBUTE  __attribute__((used, section(".vectors")))
 #endif
 
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#ifndef __STACK_SEAL
+#define __STACK_SEAL              __StackSeal
+#endif
+
+__STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) {
+  *(stackTop    ) = 0xFEF5EDA5U;
+  *(stackTop + 1) = 0xFEF5EDA5U;
+}
+#endif
+
+
 /* ###########################  Core Function Access  ########################### */
 /** \ingroup  CMSIS_Core_FunctionInterface
     \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
diff --git a/Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct b/Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct
index 206a798..603af9d 100644
--- a/Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct
+++ b/Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct
@@ -1,6 +1,10 @@
 #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m23 -xc
 ; command above MUST be in first line (no comment above!)
 
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m23 -xc -mcmse
+
+
 /*
 ;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
 */
@@ -32,33 +36,58 @@
 #define __STACK_SIZE    0x00000200
 #define __HEAP_SIZE     0x00000C00
 
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
 /*
 ;------------- <<< end of configuration section >>> ---------------------------
 */
 
 
 /*----------------------------------------------------------------------------
-  User Stack & Heap boundary definition
+  User Stack & Heap boundery definition
  *----------------------------------------------------------------------------*/
-#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE)    /* starts at end of RAM */
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
 #define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
 
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
+
 
 /*----------------------------------------------------------------------------
-  Scatter File Definitions definition
+  Region base & size definition
  *----------------------------------------------------------------------------*/
-#define __RO_BASE       __ROM_BASE
-#define __RO_SIZE       __ROM_SIZE
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
 
-#define __RW_BASE       __RAM_BASE
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
 #define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
 
 
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
 LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
   ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
-;   *(Veneer$$CMSE)                                  ; uncomment for secure applications
    .ANY (+RO)
    .ANY (+XO)
   }
@@ -74,4 +103,17 @@
 
   ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
   }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
 }
+#endif
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct b/Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct
new file mode 100644
index 0000000..6bbbc24
--- /dev/null
+++ b/Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct
@@ -0,0 +1,119 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m23 -xc -mcmse
+; command above MUST be in first line (no comment above!)
+
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m23 -xc -mcmse
+
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE      0x00000000
+#define __ROM_SIZE      0x00080000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE      0x20000000
+#define __RAM_SIZE      0x00040000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE    0x00000200
+#define __HEAP_SIZE     0x00000C00
+
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
+/*
+;------------- <<< end of configuration section >>> ---------------------------
+*/
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Region base & size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
+
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
+#define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S b/Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S
new file mode 100644
index 0000000..1a8d0fb
--- /dev/null
+++ b/Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S
@@ -0,0 +1,155 @@
+/******************************************************************************
+ * @file     startup_ARMCM23.S
+ * @brief    CMSIS-Core Device Startup File for Cortex-M23 Device
+ * @version  V1.1.0
+ * @date     16. December 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+                .syntax  unified
+                .arch    armv8-m.base
+
+                #define __INITIAL_SP     Image$$ARM_LIB_STACK$$ZI$$Limit
+                #define __STACK_LIMIT    Image$$ARM_LIB_STACK$$ZI$$Base
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                #define __STACK_SEAL     Image$$STACKSEAL$$ZI$$Base
+                #endif
+
+                .section RESET
+                .align   2
+                .globl   __Vectors
+                .globl   __Vectors_End
+                .globl   __Vectors_Size
+__Vectors:
+                .long    __INITIAL_SP                       /*     Initial Stack Pointer */
+                .long    Reset_Handler                      /*     Reset Handler */
+                .long    NMI_Handler                        /* -14 NMI Handler */
+                .long    HardFault_Handler                  /* -13 Hard Fault Handler */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    SVC_Handler                        /*  -5 SVCall Handler */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    PendSV_Handler                     /*  -2 PendSV Handler */
+                .long    SysTick_Handler                    /*  -1 SysTick Handler */
+
+                /* Interrupts */
+                .long    Interrupt0_Handler                 /*   0 Interrupt 0 */
+                .long    Interrupt1_Handler                 /*   1 Interrupt 1 */
+                .long    Interrupt2_Handler                 /*   2 Interrupt 2 */
+                .long    Interrupt3_Handler                 /*   3 Interrupt 3 */
+                .long    Interrupt4_Handler                 /*   4 Interrupt 4 */
+                .long    Interrupt5_Handler                 /*   5 Interrupt 5 */
+                .long    Interrupt6_Handler                 /*   6 Interrupt 6 */
+                .long    Interrupt7_Handler                 /*   7 Interrupt 7 */
+                .long    Interrupt8_Handler                 /*   8 Interrupt 8 */
+                .long    Interrupt9_Handler                 /*   9 Interrupt 9 */
+
+                .space   (214 * 4)                          /* Interrupts 10 .. 224 are left out */
+__Vectors_End:
+                .equ     __Vectors_Size, __Vectors_End - __Vectors
+                .size    __Vectors, . - __Vectors
+
+
+                .thumb
+                .section .text
+                .align   2
+
+                .thumb_func
+                .type    Reset_Handler, %function
+                .globl   Reset_Handler
+                .fnstart
+Reset_Handler:
+                ldr      r0, =__INITIAL_SP
+                msr      psp, r0
+
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                ldr      r0, =__STACK_LIMIT
+                msr      msplim, r0
+                msr      psplim, r0
+
+                ldr      r0, =__STACK_SEAL
+                ldr      r1, =0xFEF5EDA5U
+                str      r1,[r0,#0]
+                str      r1,[r0,#4]
+                #endif
+
+                bl       SystemInit
+
+                bl       __main
+
+                .fnend
+                .size    Reset_Handler, . - Reset_Handler
+
+
+/* The default macro is not used for HardFault_Handler
+ * because this results in a poor debug illusion.
+ */
+                .thumb_func
+                .type    HardFault_Handler, %function
+                .weak    HardFault_Handler
+                .fnstart
+HardFault_Handler:
+                b        .
+                .fnend
+                .size    HardFault_Handler, . - HardFault_Handler
+
+                .thumb_func
+                .type    Default_Handler, %function
+                .weak    Default_Handler
+                .fnstart
+Default_Handler:
+                b        .
+                .fnend
+                .size    Default_Handler, . - Default_Handler
+
+/* Macro to define default exception/interrupt handlers.
+ * Default handler are weak symbols with an endless loop.
+ * They can be overwritten by real handlers.
+ */
+                .macro   Set_Default_Handler  Handler_Name
+                .weak    \Handler_Name
+                .set     \Handler_Name, Default_Handler
+                .endm
+
+
+/* Default exception/interrupt handler */
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                .end
diff --git a/Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s b/Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s
deleted file mode 100644
index 96ed8a2..0000000
--- a/Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s
+++ /dev/null
@@ -1,171 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM23.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM23 Device
-; * @version  V1.0.1
-; * @date     23. July 2019
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =__stack_limit
-                MSR      MSPLIM, R0                          ; Non-secure version of MSPLIM is RAZ/WI
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-; The default macro is not used for HardFault_Handler
-; because this results in a poor debug illusion.
-HardFault_Handler PROC
-                EXPORT   HardFault_Handler         [WEAK]
-                B        .
-                ENDP
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                IF       :LNOT::DEF:__MICROLIB
-                IMPORT   __use_two_region_memory
-                ENDIF
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END
diff --git a/Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld b/Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld
index 7498908..c8f0efe 100644
--- a/Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld
+++ b/Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld
@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.1.0
- * @date     04. August 2020
+ * @version  V2.2.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -57,6 +57,12 @@
  *-------------------- <<< end of configuration section >>> -------------------
  */
 
+/* ARMv8-M stack sealing:
+   to use ARMv8-M stack sealing set __STACKSEAL_SIZE to 8 otherwise keep 0
+ */
+__STACKSEAL_SIZE = 0;
+
+
 MEMORY
 {
   FLASH (rx)  : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
@@ -92,6 +98,7 @@
  *   __StackLimit
  *   __StackTop
  *   __stack
+ *   __StackSeal      (only if ARMv8-M stack sealing is used)
  */
 ENTRY(Reset_Handler)
 
@@ -181,7 +188,7 @@
   /**
    * Location counter can end up 2byte aligned with narrow Thumb code but
    * __etext is assumed by startup code to be the LMA of a section in RAM
-   * which must be 4byte aligned 
+   * which must be 4byte aligned
    */
   __etext = ALIGN (4);
 
@@ -281,7 +288,7 @@
     __HeapLimit = .;
   } > RAM
 
-  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
+  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __STACKSEAL_SIZE) (COPY) :
   {
     . = ALIGN(8);
     __StackLimit = .;
@@ -290,6 +297,19 @@
     __StackTop = .;
   } > RAM
   PROVIDE(__stack = __StackTop);
+  
+  /* ARMv8-M stack sealing:
+     to use ARMv8-M stack sealing uncomment '.stackseal' section
+   */
+/*
+  .stackseal (ORIGIN(RAM) + LENGTH(RAM) - __STACKSEAL_SIZE) (COPY) :
+  {
+    . = ALIGN(8);
+    __StackSeal = .;
+    . = . + 8;
+    . = ALIGN(8);
+  } > RAM
+*/
 
   /* Check if data + heap + stack exceeds RAM limit */
   ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
diff --git a/Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S b/Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S
index 6f8df29..1c4d696 100644
--- a/Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S
+++ b/Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S
@@ -1,8 +1,8 @@
-/**************************************************************************//**
+/******************************************************************************
  * @file     startup_ARMCM23.S
- * @brief    CMSIS-Core(M) Device Startup File for Cortex-M23 Device
- * @version  V2.1.0
- * @date     04. August 2020
+ * @brief    CMSIS-Core Device Startup File for Cortex-M23 Device
+ * @version  V2.2.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -25,13 +25,19 @@
                 .syntax  unified
                 .arch    armv8-m.base
 
+                #define __INITIAL_SP     __StackTop
+                #define __STACK_LIMIT    __StackLimit
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                #define __STACK_SEAL     __StackSeal
+                #endif
+
                 .section .vectors
                 .align   2
                 .globl   __Vectors
                 .globl   __Vectors_End
                 .globl   __Vectors_Size
 __Vectors:
-                .long    __StackTop                         /*     Top of Stack */
+                .long    __INITIAL_SP                       /*     Initial Stack Pointer */
                 .long    Reset_Handler                      /*     Reset Handler */
                 .long    NMI_Handler                        /* -14 NMI Handler */
                 .long    HardFault_Handler                  /* -13 Hard Fault Handler */
@@ -75,8 +81,19 @@
                 .globl   Reset_Handler
                 .fnstart
 Reset_Handler:
-                ldr      r0, =__StackLimit
+                ldr      r0, =__INITIAL_SP
+                msr      psp, r0
+
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                ldr      r0, =__STACK_LIMIT
                 msr      msplim, r0
+                msr      psplim, r0
+
+                ldr      r0, =__STACK_SEAL
+                ldr      r1, =0xFEF5EDA5U
+                str      r1,[r0,#0]
+                str      r1,[r0,#4]
+                #endif
 
                 bl       SystemInit
 
@@ -89,7 +106,7 @@
                 ldr      r1, [r4]                /* source address */   
                 ldr      r2, [r4, #4]            /* destination address */
                 ldr      r3, [r4, #8]            /* word count */
-                lsl      r3, r3, #2              /* byte count */
+                lsls     r3, r3, #2              /* byte count */
 
 .L_loop0_0:
                 subs     r3, #4                  /* decrement byte count */
@@ -101,7 +118,6 @@
 .L_loop0_0_done:
                 adds     r4, #12
                 b        .L_loop0
-
 .L_loop0_done:
 
                 ldr      r3, =__zero_table_start__
@@ -112,7 +128,7 @@
                 bge      .L_loop2_done
                 ldr      r1, [r3]                /* destination address */
                 ldr      r2, [r3, #4]            /* word count */
-                lsl      r2, r2, #2              /* byte count */
+                lsls     r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
@@ -131,6 +147,7 @@
                 .fnend
                 .size    Reset_Handler, . - Reset_Handler
 
+
 /* The default macro is not used for HardFault_Handler
  * because this results in a poor debug illusion.
  */
@@ -180,5 +197,4 @@
                 Set_Default_Handler  Interrupt8_Handler
                 Set_Default_Handler  Interrupt9_Handler
 
-
                 .end
diff --git a/Device/ARM/ARMCM23/Source/startup_ARMCM23.c b/Device/ARM/ARMCM23/Source/startup_ARMCM23.c
index 18633eb..080c7a8 100644
--- a/Device/ARM/ARMCM23/Source/startup_ARMCM23.c
+++ b/Device/ARM/ARMCM23/Source/startup_ARMCM23.c
@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     startup_ARMCM23.c
- * @brief    CMSIS-Core(M) Device Startup File for a Cortex-M23 Device
- * @version  V2.0.3
- * @date     31. March 2020
+ * @brief    CMSIS-Core Device Startup File for a Cortex-M23 Device
+ * @version  V2.1.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -35,6 +35,9 @@
  *----------------------------------------------------------------------------*/
 extern uint32_t __INITIAL_SP;
 extern uint32_t __STACK_LIMIT;
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+extern uint32_t __STACK_SEAL;
+#endif
 
 extern __NO_RETURN void __PROGRAM_START(void);
 
@@ -117,7 +120,14 @@
  *----------------------------------------------------------------------------*/
 __NO_RETURN void Reset_Handler(void)
 {
+  __set_PSP((uint32_t)(&__INITIAL_SP));
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
   __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+  __set_PSPLIM((uint32_t)(&__STACK_LIMIT));
+
+  __TZ_set_STACKSEAL_S((uint32_t *)(&__STACK_SEAL));
+#endif
 
   SystemInit();                             /* CMSIS System Initialization */
   __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
diff --git a/Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct b/Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct
index 3a91c6c..1093f3d 100644
--- a/Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct
+++ b/Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct
@@ -1,6 +1,10 @@
 #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc
 ; command above MUST be in first line (no comment above!)
 
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc -mcmse
+
+
 /*
 ;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
 */
@@ -32,33 +36,58 @@
 #define __STACK_SIZE    0x00000200
 #define __HEAP_SIZE     0x00000C00
 
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
 /*
 ;------------- <<< end of configuration section >>> ---------------------------
 */
 
 
 /*----------------------------------------------------------------------------
-  User Stack & Heap boundary definition
+  User Stack & Heap boundery definition
  *----------------------------------------------------------------------------*/
-#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE)    /* starts at end of RAM */
-#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
 
 
 /*----------------------------------------------------------------------------
-  Scatter File Definitions definition
+  Region base & size definition
  *----------------------------------------------------------------------------*/
-#define __RO_BASE       __ROM_BASE
-#define __RO_SIZE       __ROM_SIZE
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
 
-#define __RW_BASE       __RAM_BASE
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
 #define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
 
 
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
 LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
   ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
-;   *(Veneer$$CMSE)                                  ; uncomment for secure applications
    .ANY (+RO)
    .ANY (+XO)
   }
@@ -74,4 +103,17 @@
 
   ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
   }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
 }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct b/Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct
new file mode 100644
index 0000000..92a03ce
--- /dev/null
+++ b/Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct
@@ -0,0 +1,119 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc -mcmse
+; command above MUST be in first line (no comment above!)
+
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc -mcmse
+
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE      0x00000000
+#define __ROM_SIZE      0x00080000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE      0x20000000
+#define __RAM_SIZE      0x00040000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE    0x00000200
+#define __HEAP_SIZE     0x00000C00
+
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
+/*
+;------------- <<< end of configuration section >>> ---------------------------
+*/
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Region base & size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
+
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
+#define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S b/Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S
new file mode 100644
index 0000000..ceb765a
--- /dev/null
+++ b/Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S
@@ -0,0 +1,159 @@
+/******************************************************************************
+ * @file     startup_ARMCM33.S
+ * @brief    CMSIS-Core Device Startup File for Cortex-M33 Device
+ * @version  V1.1.0
+ * @date     16. December 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+                .syntax  unified
+                .arch    armv8-m.main
+
+                #define __INITIAL_SP     Image$$ARM_LIB_STACK$$ZI$$Limit
+                #define __STACK_LIMIT    Image$$ARM_LIB_STACK$$ZI$$Base
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                #define __STACK_SEAL     Image$$STACKSEAL$$ZI$$Base
+                #endif
+
+                .section RESET
+                .align   2
+                .globl   __Vectors
+                .globl   __Vectors_End
+                .globl   __Vectors_Size
+__Vectors:
+                .long    __INITIAL_SP                       /*     Initial Stack Pointer */
+                .long    Reset_Handler                      /*     Reset Handler */
+                .long    NMI_Handler                        /* -14 NMI Handler */
+                .long    HardFault_Handler                  /* -13 Hard Fault Handler */
+                .long    MemManage_Handler                  /* -12 MPU Fault Handler */
+                .long    BusFault_Handler                   /* -11 Bus Fault Handler */
+                .long    UsageFault_Handler                 /* -10 Usage Fault Handler */
+                .long    SecureFault_Handler                /*  -9 Secure Fault Handler */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    SVC_Handler                        /*  -5 SVCall Handler */
+                .long    DebugMon_Handler                   /*  -4 Debug Monitor Handler */
+                .long    0                                  /*     Reserved */
+                .long    PendSV_Handler                     /*  -2 PendSV Handler */
+                .long    SysTick_Handler                    /*  -1 SysTick Handler */
+
+                /* Interrupts */
+                .long    Interrupt0_Handler                 /*   0 Interrupt 0 */
+                .long    Interrupt1_Handler                 /*   1 Interrupt 1 */
+                .long    Interrupt2_Handler                 /*   2 Interrupt 2 */
+                .long    Interrupt3_Handler                 /*   3 Interrupt 3 */
+                .long    Interrupt4_Handler                 /*   4 Interrupt 4 */
+                .long    Interrupt5_Handler                 /*   5 Interrupt 5 */
+                .long    Interrupt6_Handler                 /*   6 Interrupt 6 */
+                .long    Interrupt7_Handler                 /*   7 Interrupt 7 */
+                .long    Interrupt8_Handler                 /*   8 Interrupt 8 */
+                .long    Interrupt9_Handler                 /*   9 Interrupt 9 */
+
+                .space   (470 * 4)                          /* Interrupts 10 .. 480 are left out */
+__Vectors_End:
+                .equ     __Vectors_Size, __Vectors_End - __Vectors
+                .size    __Vectors, . - __Vectors
+
+
+                .thumb
+                .section .text
+                .align   2
+
+                .thumb_func
+                .type    Reset_Handler, %function
+                .globl   Reset_Handler
+                .fnstart
+Reset_Handler:
+                ldr      r0, =__INITIAL_SP
+                msr      psp, r0
+              
+                ldr      r0, =__STACK_LIMIT
+                msr      msplim, r0
+                msr      psplim, r0
+
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                ldr      r0, =__STACK_SEAL
+                ldr      r1, =0xFEF5EDA5U
+                strd     r1,r1,[r0,#0]
+                #endif
+
+                bl       SystemInit
+
+                bl       __main
+
+                .fnend
+                .size    Reset_Handler, . - Reset_Handler
+
+
+/* The default macro is not used for HardFault_Handler
+ * because this results in a poor debug illusion.
+ */
+                .thumb_func
+                .type    HardFault_Handler, %function
+                .weak    HardFault_Handler
+                .fnstart
+HardFault_Handler:
+                b        .
+                .fnend
+                .size    HardFault_Handler, . - HardFault_Handler
+
+                .thumb_func
+                .type    Default_Handler, %function
+                .weak    Default_Handler
+                .fnstart
+Default_Handler:
+                b        .
+                .fnend
+                .size    Default_Handler, . - Default_Handler
+
+/* Macro to define default exception/interrupt handlers.
+ * Default handler are weak symbols with an endless loop.
+ * They can be overwritten by real handlers.
+ */
+                .macro   Set_Default_Handler  Handler_Name
+                .weak    \Handler_Name
+                .set     \Handler_Name, Default_Handler
+                .endm
+
+
+/* Default exception/interrupt handler */
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SecureFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                .end
diff --git a/Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s b/Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s
deleted file mode 100644
index b1951d7..0000000
--- a/Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s
+++ /dev/null
@@ -1,176 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM33.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM33 Device
-; * @version  V1.0.1
-; * @date     23. July 2019
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
-                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
-                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
-                DCD      SecureFault_Handler                 ;  -9 Secure Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (470 * 4)                           ; Interrupts 10 .. 480 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =__stack_limit
-                MSR      MSPLIM, R0                          ; Non-secure version of MSPLIM is RAZ/WI
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-; The default macro is not used for HardFault_Handler
-; because this results in a poor debug illusion.
-HardFault_Handler PROC
-                EXPORT   HardFault_Handler         [WEAK]
-                B        .
-                ENDP
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  MemManage_Handler
-                Set_Default_Handler  BusFault_Handler
-                Set_Default_Handler  UsageFault_Handler
-                Set_Default_Handler  SecureFault_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  DebugMon_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                IF       :LNOT::DEF:__MICROLIB
-                IMPORT   __use_two_region_memory
-                ENDIF
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END
diff --git a/Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld b/Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld
index 7498908..c8f0efe 100644
--- a/Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld
+++ b/Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld
@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.1.0
- * @date     04. August 2020
+ * @version  V2.2.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -57,6 +57,12 @@
  *-------------------- <<< end of configuration section >>> -------------------
  */
 
+/* ARMv8-M stack sealing:
+   to use ARMv8-M stack sealing set __STACKSEAL_SIZE to 8 otherwise keep 0
+ */
+__STACKSEAL_SIZE = 0;
+
+
 MEMORY
 {
   FLASH (rx)  : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
@@ -92,6 +98,7 @@
  *   __StackLimit
  *   __StackTop
  *   __stack
+ *   __StackSeal      (only if ARMv8-M stack sealing is used)
  */
 ENTRY(Reset_Handler)
 
@@ -181,7 +188,7 @@
   /**
    * Location counter can end up 2byte aligned with narrow Thumb code but
    * __etext is assumed by startup code to be the LMA of a section in RAM
-   * which must be 4byte aligned 
+   * which must be 4byte aligned
    */
   __etext = ALIGN (4);
 
@@ -281,7 +288,7 @@
     __HeapLimit = .;
   } > RAM
 
-  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
+  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __STACKSEAL_SIZE) (COPY) :
   {
     . = ALIGN(8);
     __StackLimit = .;
@@ -290,6 +297,19 @@
     __StackTop = .;
   } > RAM
   PROVIDE(__stack = __StackTop);
+  
+  /* ARMv8-M stack sealing:
+     to use ARMv8-M stack sealing uncomment '.stackseal' section
+   */
+/*
+  .stackseal (ORIGIN(RAM) + LENGTH(RAM) - __STACKSEAL_SIZE) (COPY) :
+  {
+    . = ALIGN(8);
+    __StackSeal = .;
+    . = . + 8;
+    . = ALIGN(8);
+  } > RAM
+*/
 
   /* Check if data + heap + stack exceeds RAM limit */
   ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
diff --git a/Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S b/Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S
index 28c1256..1f395b8 100644
--- a/Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S
+++ b/Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S
@@ -1,8 +1,8 @@
-/**************************************************************************//**
+/******************************************************************************
  * @file     startup_ARMCM33.S
- * @brief    CMSIS-Core(M) Device Startup File for Cortex-M33 Device
- * @version  V2.1.0
- * @date     04. August 2020
+ * @brief    CMSIS-Core Device Startup File for Cortex-M33 Device
+ * @version  V2.2.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -25,13 +25,19 @@
                 .syntax  unified
                 .arch    armv8-m.main
 
+                #define __INITIAL_SP     __StackTop
+                #define __STACK_LIMIT    __StackLimit
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                #define __STACK_SEAL     __StackSeal
+                #endif
+
                 .section .vectors
                 .align   2
                 .globl   __Vectors
                 .globl   __Vectors_End
                 .globl   __Vectors_Size
 __Vectors:
-                .long    __StackTop                         /*     Top of Stack */
+                .long    __INITIAL_SP                       /*     Initial Stack Pointer */
                 .long    Reset_Handler                      /*     Reset Handler */
                 .long    NMI_Handler                        /* -14 NMI Handler */
                 .long    HardFault_Handler                  /* -13 Hard Fault Handler */
@@ -75,10 +81,19 @@
                 .globl   Reset_Handler
                 .fnstart
 Reset_Handler:
-                ldr      r0, =__StackLimit
+                ldr      r0, =__INITIAL_SP
+                msr      psp, r0
+              
+                ldr      r0, =__STACK_LIMIT
                 msr      msplim, r0
+                msr      psplim, r0
 
-/* CMSIS System Initialization */
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                ldr      r0, =__STACK_SEAL
+                ldr      r1, =0xFEF5EDA5U
+                strd     r1,r1,[r0,#0]
+                #endif
+
                 bl       SystemInit
 
                 ldr      r4, =__copy_table_start__
@@ -129,6 +144,7 @@
                 .fnend
                 .size    Reset_Handler, . - Reset_Handler
 
+
 /* The default macro is not used for HardFault_Handler
  * because this results in a poor debug illusion.
  */
@@ -183,5 +199,4 @@
                 Set_Default_Handler  Interrupt8_Handler
                 Set_Default_Handler  Interrupt9_Handler
 
-
                 .end
diff --git a/Device/ARM/ARMCM33/Source/startup_ARMCM33.c b/Device/ARM/ARMCM33/Source/startup_ARMCM33.c
index 4bed4dd..044feb7 100644
--- a/Device/ARM/ARMCM33/Source/startup_ARMCM33.c
+++ b/Device/ARM/ARMCM33/Source/startup_ARMCM33.c
@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     startup_ARMCM33.c
- * @brief    CMSIS Core Device Startup File for Cortex-M33 Device
- * @version  V2.0.3
- * @date     31. March 2020
+ * @brief    CMSIS-Core Device Startup File for Cortex-M33 Device
+ * @version  V2.1.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -39,6 +39,9 @@
  *----------------------------------------------------------------------------*/
 extern uint32_t __INITIAL_SP;
 extern uint32_t __STACK_LIMIT;
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+extern uint32_t __STACK_SEAL;
+#endif
 
 extern __NO_RETURN void __PROGRAM_START(void);
 
@@ -126,7 +129,14 @@
  *----------------------------------------------------------------------------*/
 __NO_RETURN void Reset_Handler(void)
 {
+  __set_PSP((uint32_t)(&__INITIAL_SP));
+
   __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+  __set_PSPLIM((uint32_t)(&__STACK_LIMIT));
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  __TZ_set_STACKSEAL_S((uint32_t *)(&__STACK_SEAL));
+#endif
 
   SystemInit();                             /* CMSIS System Initialization */
   __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
diff --git a/Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct b/Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct
index 4525609..a0267bc 100644
--- a/Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct
+++ b/Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct
@@ -1,6 +1,10 @@
 #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m35p -xc
 ; command above MUST be in first line (no comment above!)
 
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m35p -xc -mcmse
+
+
 /*
 ;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
 */
@@ -32,33 +36,58 @@
 #define __STACK_SIZE    0x00000200
 #define __HEAP_SIZE     0x00000C00
 
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
 /*
 ;------------- <<< end of configuration section >>> ---------------------------
 */
 
 
 /*----------------------------------------------------------------------------
-  User Stack & Heap boundary definition
+  User Stack & Heap boundery definition
  *----------------------------------------------------------------------------*/
-#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE)    /* starts at end of RAM */
-#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
 
 
 /*----------------------------------------------------------------------------
-  Scatter File Definitions definition
+  Region base & size definition
  *----------------------------------------------------------------------------*/
-#define __RO_BASE       __ROM_BASE
-#define __RO_SIZE       __ROM_SIZE
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
 
-#define __RW_BASE       __RAM_BASE
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
 #define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
 
 
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
 LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
   ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
-;   *(Veneer$$CMSE)                                  ; uncomment for secure applications
    .ANY (+RO)
    .ANY (+XO)
   }
@@ -74,4 +103,17 @@
 
   ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
   }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
 }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct b/Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct
new file mode 100644
index 0000000..07fa4a5
--- /dev/null
+++ b/Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct
@@ -0,0 +1,119 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m35p -xc -mcmse
+; command above MUST be in first line (no comment above!)
+
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m35p -xc -mcmse
+
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE      0x00000000
+#define __ROM_SIZE      0x00080000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE      0x20000000
+#define __RAM_SIZE      0x00040000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE    0x00000200
+#define __HEAP_SIZE     0x00000C00
+
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
+/*
+;------------- <<< end of configuration section >>> ---------------------------
+*/
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Region base & size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
+
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
+#define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S b/Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S
new file mode 100644
index 0000000..2f9efc3
--- /dev/null
+++ b/Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S
@@ -0,0 +1,159 @@
+/******************************************************************************
+ * @file     startup_ARMCM33.S
+ * @brief    CMSIS Core Device Startup File for Cortex-M33 Device
+ * @version  V1.1.0
+ * @date     16. December 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+                .syntax  unified
+                .arch    armv8-m.main
+
+                #define __INITIAL_SP     Image$$ARM_LIB_STACK$$ZI$$Limit
+                #define __STACK_LIMIT    Image$$ARM_LIB_STACK$$ZI$$Base
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                #define __STACK_SEAL     Image$$STACKSEAL$$ZI$$Base
+                #endif
+
+                .section RESET
+                .align   2
+                .globl   __Vectors
+                .globl   __Vectors_End
+                .globl   __Vectors_Size
+__Vectors:
+                .long    __INITIAL_SP                       /*     Initial Stack Pointer */
+                .long    Reset_Handler                      /*     Reset Handler */
+                .long    NMI_Handler                        /* -14 NMI Handler */
+                .long    HardFault_Handler                  /* -13 Hard Fault Handler */
+                .long    MemManage_Handler                  /* -12 MPU Fault Handler */
+                .long    BusFault_Handler                   /* -11 Bus Fault Handler */
+                .long    UsageFault_Handler                 /* -10 Usage Fault Handler */
+                .long    SecureFault_Handler                /*  -9 Secure Fault Handler */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    SVC_Handler                        /*  -5 SVCall Handler */
+                .long    DebugMon_Handler                   /*  -4 Debug Monitor Handler */
+                .long    0                                  /*     Reserved */
+                .long    PendSV_Handler                     /*  -2 PendSV Handler */
+                .long    SysTick_Handler                    /*  -1 SysTick Handler */
+
+                /* Interrupts */
+                .long    Interrupt0_Handler                 /*   0 Interrupt 0 */
+                .long    Interrupt1_Handler                 /*   1 Interrupt 1 */
+                .long    Interrupt2_Handler                 /*   2 Interrupt 2 */
+                .long    Interrupt3_Handler                 /*   3 Interrupt 3 */
+                .long    Interrupt4_Handler                 /*   4 Interrupt 4 */
+                .long    Interrupt5_Handler                 /*   5 Interrupt 5 */
+                .long    Interrupt6_Handler                 /*   6 Interrupt 6 */
+                .long    Interrupt7_Handler                 /*   7 Interrupt 7 */
+                .long    Interrupt8_Handler                 /*   8 Interrupt 8 */
+                .long    Interrupt9_Handler                 /*   9 Interrupt 9 */
+
+                .space   (470 * 4)                          /* Interrupts 10 .. 480 are left out */
+__Vectors_End:
+                .equ     __Vectors_Size, __Vectors_End - __Vectors
+                .size    __Vectors, . - __Vectors
+
+
+                .thumb
+                .section .text
+                .align   2
+
+                .thumb_func
+                .type    Reset_Handler, %function
+                .globl   Reset_Handler
+                .fnstart
+Reset_Handler:
+                ldr      r0, =__INITIAL_SP
+                msr      psp, r0
+              
+                ldr      r0, =__STACK_LIMIT
+                msr      msplim, r0
+                msr      psplim, r0
+
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                ldr      r0, =__STACK_SEAL
+                ldr      r1, =0xFEF5EDA5U
+                strd     r1,r1,[r0,#0]
+                #endif
+
+                bl       SystemInit
+
+                bl       __main
+
+                .fnend
+                .size    Reset_Handler, . - Reset_Handler
+
+
+/* The default macro is not used for HardFault_Handler
+ * because this results in a poor debug illusion.
+ */
+                .thumb_func
+                .type    HardFault_Handler, %function
+                .weak    HardFault_Handler
+                .fnstart
+HardFault_Handler:
+                b        .
+                .fnend
+                .size    HardFault_Handler, . - HardFault_Handler
+
+                .thumb_func
+                .type    Default_Handler, %function
+                .weak    Default_Handler
+                .fnstart
+Default_Handler:
+                b        .
+                .fnend
+                .size    Default_Handler, . - Default_Handler
+
+/* Macro to define default exception/interrupt handlers.
+ * Default handler are weak symbols with an endless loop.
+ * They can be overwritten by real handlers.
+ */
+                .macro   Set_Default_Handler  Handler_Name
+                .weak    \Handler_Name
+                .set     \Handler_Name, Default_Handler
+                .endm
+
+
+/* Default exception/interrupt handler */
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SecureFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                .end
diff --git a/Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s b/Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s
deleted file mode 100644
index d5b7bae..0000000
--- a/Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s
+++ /dev/null
@@ -1,176 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMCM35P.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMCM35P Device
-; * @version  V1.0.1
-; * @date     23. July 2019
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
-                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
-                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
-                DCD      SecureFault_Handler                 ;  -9 Secure Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (470 * 4)                           ; Interrupts 10 .. 480 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =__stack_limit
-                MSR      MSPLIM, R0                          ; Non-secure version of MSPLIM is RAZ/WI
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-; The default macro is not used for HardFault_Handler
-; because this results in a poor debug illusion.
-HardFault_Handler PROC
-                EXPORT   HardFault_Handler         [WEAK]
-                B        .
-                ENDP
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  MemManage_Handler
-                Set_Default_Handler  BusFault_Handler
-                Set_Default_Handler  UsageFault_Handler
-                Set_Default_Handler  SecureFault_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  DebugMon_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                IF       :LNOT::DEF:__MICROLIB
-                IMPORT   __use_two_region_memory
-                ENDIF
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END
diff --git a/Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld b/Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld
index 7498908..c8f0efe 100644
--- a/Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld
+++ b/Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld
@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.1.0
- * @date     04. August 2020
+ * @version  V2.2.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -57,6 +57,12 @@
  *-------------------- <<< end of configuration section >>> -------------------
  */
 
+/* ARMv8-M stack sealing:
+   to use ARMv8-M stack sealing set __STACKSEAL_SIZE to 8 otherwise keep 0
+ */
+__STACKSEAL_SIZE = 0;
+
+
 MEMORY
 {
   FLASH (rx)  : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
@@ -92,6 +98,7 @@
  *   __StackLimit
  *   __StackTop
  *   __stack
+ *   __StackSeal      (only if ARMv8-M stack sealing is used)
  */
 ENTRY(Reset_Handler)
 
@@ -181,7 +188,7 @@
   /**
    * Location counter can end up 2byte aligned with narrow Thumb code but
    * __etext is assumed by startup code to be the LMA of a section in RAM
-   * which must be 4byte aligned 
+   * which must be 4byte aligned
    */
   __etext = ALIGN (4);
 
@@ -281,7 +288,7 @@
     __HeapLimit = .;
   } > RAM
 
-  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
+  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __STACKSEAL_SIZE) (COPY) :
   {
     . = ALIGN(8);
     __StackLimit = .;
@@ -290,6 +297,19 @@
     __StackTop = .;
   } > RAM
   PROVIDE(__stack = __StackTop);
+  
+  /* ARMv8-M stack sealing:
+     to use ARMv8-M stack sealing uncomment '.stackseal' section
+   */
+/*
+  .stackseal (ORIGIN(RAM) + LENGTH(RAM) - __STACKSEAL_SIZE) (COPY) :
+  {
+    . = ALIGN(8);
+    __StackSeal = .;
+    . = . + 8;
+    . = ALIGN(8);
+  } > RAM
+*/
 
   /* Check if data + heap + stack exceeds RAM limit */
   ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
diff --git a/Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S b/Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S
index a4de34c..eb69c7e 100644
--- a/Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S
+++ b/Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S
@@ -1,8 +1,8 @@
-/**************************************************************************//**
+/******************************************************************************
  * @file     startup_ARMCM35P.S
- * @brief    CMSIS-Core(M) Device Startup File for Cortex-M35P Device
- * @version  V1.1.0
- * @date     04. August 2020
+ * @brief    CMSIS-Core Device Startup File for Cortex-M35P Device
+ * @version  V1.2.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -25,13 +25,19 @@
                 .syntax  unified
                 .arch    armv8-m.main
 
+                #define __INITIAL_SP     __StackTop
+                #define __STACK_LIMIT    __StackLimit
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                #define __STACK_SEAL     __StackSeal
+                #endif
+
                 .section .vectors
                 .align   2
                 .globl   __Vectors
                 .globl   __Vectors_End
                 .globl   __Vectors_Size
 __Vectors:
-                .long    __StackTop                         /*     Top of Stack */
+                .long    __INITIAL_SP                       /*     Initial Stack Pointer */
                 .long    Reset_Handler                      /*     Reset Handler */
                 .long    NMI_Handler                        /* -14 NMI Handler */
                 .long    HardFault_Handler                  /* -13 Hard Fault Handler */
@@ -75,8 +81,18 @@
                 .globl   Reset_Handler
                 .fnstart
 Reset_Handler:
-                ldr      r0, =__StackLimit
+                ldr      r0, =__INITIAL_SP
+                msr      psp, r0
+              
+                ldr      r0, =__STACK_LIMIT
                 msr      msplim, r0
+                msr      psplim, r0
+
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                ldr      r0, =__STACK_SEAL
+                ldr      r1, =0xFEF5EDA5U
+                strd     r1,r1,[r0,#0]
+                #endif
 
                 bl       SystemInit
 
@@ -128,6 +144,7 @@
                 .fnend
                 .size    Reset_Handler, . - Reset_Handler
 
+
 /* The default macro is not used for HardFault_Handler
  * because this results in a poor debug illusion.
  */
@@ -182,5 +199,4 @@
                 Set_Default_Handler  Interrupt8_Handler
                 Set_Default_Handler  Interrupt9_Handler
 
-
                 .end
diff --git a/Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c b/Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c
index be07124..52918db 100644
--- a/Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c
+++ b/Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c
@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     startup_ARMCM35P.c
- * @brief    CMSIS Core Device Startup File for Cortex-M35P Device
- * @version  V2.0.3
- * @date     31. March 2020
+ * @brief    CMSIS-Core Device Startup File for Cortex-M35P Device
+ * @version  V2.1.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -39,6 +39,9 @@
  *----------------------------------------------------------------------------*/
 extern uint32_t __INITIAL_SP;
 extern uint32_t __STACK_LIMIT;
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+extern uint32_t __STACK_SEAL;
+#endif
 
 extern __NO_RETURN void __PROGRAM_START(void);
 
@@ -126,7 +129,14 @@
  *----------------------------------------------------------------------------*/
 __NO_RETURN void Reset_Handler(void)
 {
+  __set_PSP((uint32_t)(&__INITIAL_SP));
+
   __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+  __set_PSPLIM((uint32_t)(&__STACK_LIMIT));
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  __TZ_set_STACKSEAL_S((uint32_t *)(&__STACK_SEAL));
+#endif
 
   SystemInit();                             /* CMSIS System Initialization */
   __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
diff --git a/Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct b/Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct
index 92fe4dc..8c05a02 100644
--- a/Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct
+++ b/Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct
@@ -1,18 +1,14 @@
 #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m55 -xc
 ; command above MUST be in first line (no comment above!)
 
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m55 -xc -mcmse
+
+
 /*
 ;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
 */
 
-/* memory regions are:
-       secure ROM: 0x10000000
-   non-secure ROM: 0x00000000
-   
-       secure RAM: 0x30000000
-   non-secure RAM: 0x20000000
- */
-
 /*--------------------- Flash Configuration ----------------------------------
 ; <h> Flash Configuration
 ;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
@@ -40,33 +36,58 @@
 #define __STACK_SIZE    0x00000200
 #define __HEAP_SIZE     0x00000C00
 
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
 /*
 ;------------- <<< end of configuration section >>> ---------------------------
 */
 
 
 /*----------------------------------------------------------------------------
-  User Stack & Heap boundary definition
+  User Stack & Heap boundery definition
  *----------------------------------------------------------------------------*/
-#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE)    /* starts at end of RAM */
-#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
 
 
 /*----------------------------------------------------------------------------
-  Scatter File Definitions definition
+  Region base & size definition
  *----------------------------------------------------------------------------*/
-#define __RO_BASE       __ROM_BASE
-#define __RO_SIZE       __ROM_SIZE
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
 
-#define __RW_BASE       __RAM_BASE
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
 #define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
 
 
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
 LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
   ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
-;   *(Veneer$$CMSE)                                  ; uncomment for secure applications
    .ANY (+RO)
    .ANY (+XO)
   }
@@ -82,4 +103,17 @@
 
   ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
   }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
 }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct b/Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct
new file mode 100644
index 0000000..561a258
--- /dev/null
+++ b/Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct
@@ -0,0 +1,119 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m55 -xc -mcmse
+; command above MUST be in first line (no comment above!)
+
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m55 -xc -mcmse
+
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE      0x00000000
+#define __ROM_SIZE      0x00080000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE      0x20000000
+#define __RAM_SIZE      0x00040000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE    0x00000200
+#define __HEAP_SIZE     0x00000C00
+
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
+/*
+;------------- <<< end of configuration section >>> ---------------------------
+*/
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Region base & size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
+
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
+#define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld b/Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld
index 1572f5b..c8f0efe 100644
--- a/Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld
+++ b/Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld
@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V1.1.0
- * @date     04. August 2020
+ * @version  V2.2.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -26,14 +26,6 @@
  *-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
  */
 
-/* memory regions are:
-       secure ROM: 0x10000000
-   non-secure ROM: 0x00000000
-
-       secure RAM: 0x30000000
-   non-secure RAM: 0x20000000
- */
-
 /*---------------------- Flash Configuration ----------------------------------
   <h> Flash Configuration
     <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
@@ -65,6 +57,12 @@
  *-------------------- <<< end of configuration section >>> -------------------
  */
 
+/* ARMv8-M stack sealing:
+   to use ARMv8-M stack sealing set __STACKSEAL_SIZE to 8 otherwise keep 0
+ */
+__STACKSEAL_SIZE = 0;
+
+
 MEMORY
 {
   FLASH (rx)  : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
@@ -100,6 +98,7 @@
  *   __StackLimit
  *   __StackTop
  *   __stack
+ *   __StackSeal      (only if ARMv8-M stack sealing is used)
  */
 ENTRY(Reset_Handler)
 
@@ -289,7 +288,7 @@
     __HeapLimit = .;
   } > RAM
 
-  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
+  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __STACKSEAL_SIZE) (COPY) :
   {
     . = ALIGN(8);
     __StackLimit = .;
@@ -298,6 +297,19 @@
     __StackTop = .;
   } > RAM
   PROVIDE(__stack = __StackTop);
+  
+  /* ARMv8-M stack sealing:
+     to use ARMv8-M stack sealing uncomment '.stackseal' section
+   */
+/*
+  .stackseal (ORIGIN(RAM) + LENGTH(RAM) - __STACKSEAL_SIZE) (COPY) :
+  {
+    . = ALIGN(8);
+    __StackSeal = .;
+    . = . + 8;
+    . = ALIGN(8);
+  } > RAM
+*/
 
   /* Check if data + heap + stack exceeds RAM limit */
   ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
diff --git a/Device/ARM/ARMCM55/Source/startup_ARMCM55.c b/Device/ARM/ARMCM55/Source/startup_ARMCM55.c
index 0ab7e3e..62882f1 100644
--- a/Device/ARM/ARMCM55/Source/startup_ARMCM55.c
+++ b/Device/ARM/ARMCM55/Source/startup_ARMCM55.c
@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     startup_ARMCM55.c
- * @brief    CMSIS Core Device Startup File for ARMCM55 Device
- * @version  V1.0.0
- * @date     31. March 2020
+ * @brief    CMSIS-Core Device Startup File for Cortex-M55 Device
+ * @version  V1.1.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2020 Arm Limited. All rights reserved.
@@ -33,6 +33,9 @@
  *----------------------------------------------------------------------------*/
 extern uint32_t __INITIAL_SP;
 extern uint32_t __STACK_LIMIT;
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+extern uint32_t __STACK_SEAL;
+#endif
 
 extern __NO_RETURN void __PROGRAM_START(void);
 
@@ -120,7 +123,14 @@
  *----------------------------------------------------------------------------*/
 __NO_RETURN void Reset_Handler(void)
 {
+  __set_PSP((uint32_t)(&__INITIAL_SP));
+
   __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+  __set_PSPLIM((uint32_t)(&__STACK_LIMIT));
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  __TZ_set_STACKSEAL_S((uint32_t *)(&__STACK_SEAL));
+#endif
 
   SystemInit();                             /* CMSIS System Initialization */
   __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
diff --git a/Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct b/Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct
index 265a1a3..9ab171a 100644
--- a/Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct
+++ b/Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct
@@ -1,18 +1,14 @@
 #! armclang -E --target=arm-arm-none-eabi -march=armv8.1-m.main -xc
 ; command above MUST be in first line (no comment above!)
 
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -march=armv8.1-m.main -xc -mcmse
+
+
 /*
 ;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
 */
 
-/* memory regions are:
-       secure ROM: 0x10000000
-   non-secure ROM: 0x00000000
-   
-       secure RAM: 0x30000000
-   non-secure RAM: 0x20000000
- */
-
 /*--------------------- Flash Configuration ----------------------------------
 ; <h> Flash Configuration
 ;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
@@ -40,33 +36,58 @@
 #define __STACK_SIZE    0x00000200
 #define __HEAP_SIZE     0x00000C00
 
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
 /*
 ;------------- <<< end of configuration section >>> ---------------------------
 */
 
 
 /*----------------------------------------------------------------------------
-  User Stack & Heap boundary definition
+  User Stack & Heap boundery definition
  *----------------------------------------------------------------------------*/
-#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE)    /* starts at end of RAM */
-#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
 
 
 /*----------------------------------------------------------------------------
-  Scatter File Definitions definition
+  Region base & size definition
  *----------------------------------------------------------------------------*/
-#define __RO_BASE       __ROM_BASE
-#define __RO_SIZE       __ROM_SIZE
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
 
-#define __RW_BASE       __RAM_BASE
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
 #define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
 
 
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
 LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
   ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
-;   *(Veneer$$CMSE)                                  ; uncomment for secure applications
    .ANY (+RO)
    .ANY (+XO)
   }
@@ -82,4 +103,17 @@
 
   ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
   }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
 }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct b/Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct
new file mode 100644
index 0000000..15d6002
--- /dev/null
+++ b/Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct
@@ -0,0 +1,119 @@
+#! armclang -E --target=arm-arm-none-eabi -march=armv8.1-m.main -xc -mcmse
+; command above MUST be in first line (no comment above!)
+
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -march=armv8.1-m.main -xc -mcmse
+
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE      0x00000000
+#define __ROM_SIZE      0x00080000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE      0x20000000
+#define __RAM_SIZE      0x00040000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE    0x00000200
+#define __HEAP_SIZE     0x00000C00
+
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
+/*
+;------------- <<< end of configuration section >>> ---------------------------
+*/
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Region base & size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
+
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
+#define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld b/Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld
index ec2d55c..c8f0efe 100644
--- a/Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld
+++ b/Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld
@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.1.0
- * @date     04. August 2020
+ * @version  V2.2.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -26,14 +26,6 @@
  *-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
  */
 
-/* memory regions are:
-       secure ROM: 0x10000000
-   non-secure ROM: 0x00000000
-
-       secure RAM: 0x30000000
-   non-secure RAM: 0x20000000
- */
-
 /*---------------------- Flash Configuration ----------------------------------
   <h> Flash Configuration
     <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
@@ -65,6 +57,12 @@
  *-------------------- <<< end of configuration section >>> -------------------
  */
 
+/* ARMv8-M stack sealing:
+   to use ARMv8-M stack sealing set __STACKSEAL_SIZE to 8 otherwise keep 0
+ */
+__STACKSEAL_SIZE = 0;
+
+
 MEMORY
 {
   FLASH (rx)  : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
@@ -100,6 +98,7 @@
  *   __StackLimit
  *   __StackTop
  *   __stack
+ *   __StackSeal      (only if ARMv8-M stack sealing is used)
  */
 ENTRY(Reset_Handler)
 
@@ -289,7 +288,7 @@
     __HeapLimit = .;
   } > RAM
 
-  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
+  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __STACKSEAL_SIZE) (COPY) :
   {
     . = ALIGN(8);
     __StackLimit = .;
@@ -298,6 +297,19 @@
     __StackTop = .;
   } > RAM
   PROVIDE(__stack = __StackTop);
+  
+  /* ARMv8-M stack sealing:
+     to use ARMv8-M stack sealing uncomment '.stackseal' section
+   */
+/*
+  .stackseal (ORIGIN(RAM) + LENGTH(RAM) - __STACKSEAL_SIZE) (COPY) :
+  {
+    . = ALIGN(8);
+    __StackSeal = .;
+    . = . + 8;
+    . = ALIGN(8);
+  } > RAM
+*/
 
   /* Check if data + heap + stack exceeds RAM limit */
   ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
diff --git a/Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c b/Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c
index b97e2a5..d6a01eb 100644
--- a/Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c
+++ b/Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c
@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     startup_ARMv81MML.c
- * @brief    CMSIS Core Device Startup File for ARMv81MML Device
- * @version  V2.0.3
- * @date     31. March 2020
+ * @brief    CMSIS-Core Device Startup File for ARMv81MML Device
+ * @version  V2.1.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -33,6 +33,9 @@
  *----------------------------------------------------------------------------*/
 extern uint32_t __INITIAL_SP;
 extern uint32_t __STACK_LIMIT;
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+extern uint32_t __STACK_SEAL;
+#endif
 
 extern __NO_RETURN void __PROGRAM_START(void);
 
@@ -120,7 +123,14 @@
  *----------------------------------------------------------------------------*/
 __NO_RETURN void Reset_Handler(void)
 {
+  __set_PSP((uint32_t)(&__INITIAL_SP));
+
   __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+  __set_PSPLIM((uint32_t)(&__STACK_LIMIT));
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  __TZ_set_STACKSEAL_S((uint32_t *)(&__STACK_SEAL));
+#endif
 
   SystemInit();                             /* CMSIS System Initialization */
   __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
diff --git a/Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct b/Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct
index 62d77f9..38713e1 100644
--- a/Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct
+++ b/Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct
@@ -1,6 +1,10 @@
 #! armclang -E --target=arm-arm-none-eabi -march=armv8-m.base -xc
 ; command above MUST be in first line (no comment above!)
 
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -march=armv8-m.base -xc -mcmse
+
+
 /*
 ;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
 */
@@ -32,33 +36,58 @@
 #define __STACK_SIZE    0x00000200
 #define __HEAP_SIZE     0x00000C00
 
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
 /*
 ;------------- <<< end of configuration section >>> ---------------------------
 */
 
 
 /*----------------------------------------------------------------------------
-  User Stack & Heap boundary definition
+  User Stack & Heap boundery definition
  *----------------------------------------------------------------------------*/
-#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE)    /* starts at end of RAM */
-#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
 
 
 /*----------------------------------------------------------------------------
-  Scatter File Definitions definition
+  Region base & size definition
  *----------------------------------------------------------------------------*/
-#define __RO_BASE       __ROM_BASE
-#define __RO_SIZE       __ROM_SIZE
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
 
-#define __RW_BASE       __RAM_BASE
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
 #define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
 
 
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
 LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
   ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
-;   *(Veneer$$CMSE)                                  ; uncomment for secure applications
    .ANY (+RO)
    .ANY (+XO)
   }
@@ -74,4 +103,17 @@
 
   ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
   }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
 }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct b/Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct
new file mode 100644
index 0000000..f654ce6
--- /dev/null
+++ b/Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct
@@ -0,0 +1,119 @@
+#! armclang -E --target=arm-arm-none-eabi -march=armv8-m.base -xc -mcmse
+; command above MUST be in first line (no comment above!)
+
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -march=armv8-m.base -xc -mcmse
+
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE      0x00000000
+#define __ROM_SIZE      0x00080000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE      0x20000000
+#define __RAM_SIZE      0x00040000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE    0x00000200
+#define __HEAP_SIZE     0x00000C00
+
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
+/*
+;------------- <<< end of configuration section >>> ---------------------------
+*/
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Region base & size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
+
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
+#define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S b/Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S
new file mode 100644
index 0000000..b73142a
--- /dev/null
+++ b/Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S
@@ -0,0 +1,155 @@
+/******************************************************************************
+ * @file     startup_ARMv8MBL.S
+ * @brief    CMSIS-Core Device Startup File for ARMv8MBL Device
+ * @version  V1.1.0
+ * @date     16. December 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+                .syntax  unified
+                .arch    armv8-m.base
+
+                #define __INITIAL_SP     Image$$ARM_LIB_STACK$$ZI$$Limit
+                #define __STACK_LIMIT    Image$$ARM_LIB_STACK$$ZI$$Base
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                #define __STACK_SEAL     Image$$STACKSEAL$$ZI$$Base
+                #endif
+
+                .section RESET
+                .align   2
+                .globl   __Vectors
+                .globl   __Vectors_End
+                .globl   __Vectors_Size
+__Vectors:
+                .long    __INITIAL_SP                       /*     Initial Stack Pointer */
+                .long    Reset_Handler                      /*     Reset Handler */
+                .long    NMI_Handler                        /* -14 NMI Handler */
+                .long    HardFault_Handler                  /* -13 Hard Fault Handler */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    SVC_Handler                        /*  -5 SVCall Handler */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    PendSV_Handler                     /*  -2 PendSV Handler */
+                .long    SysTick_Handler                    /*  -1 SysTick Handler */
+
+                /* Interrupts */
+                .long    Interrupt0_Handler                 /*   0 Interrupt 0 */
+                .long    Interrupt1_Handler                 /*   1 Interrupt 1 */
+                .long    Interrupt2_Handler                 /*   2 Interrupt 2 */
+                .long    Interrupt3_Handler                 /*   3 Interrupt 3 */
+                .long    Interrupt4_Handler                 /*   4 Interrupt 4 */
+                .long    Interrupt5_Handler                 /*   5 Interrupt 5 */
+                .long    Interrupt6_Handler                 /*   6 Interrupt 6 */
+                .long    Interrupt7_Handler                 /*   7 Interrupt 7 */
+                .long    Interrupt8_Handler                 /*   8 Interrupt 8 */
+                .long    Interrupt9_Handler                 /*   9 Interrupt 9 */
+
+                .space   (214 * 4)                          /* Interrupts 10 .. 224 are left out */
+__Vectors_End:
+                .equ     __Vectors_Size, __Vectors_End - __Vectors
+                .size    __Vectors, . - __Vectors
+
+
+                .thumb
+                .section .text
+                .align   2
+
+                .thumb_func
+                .type    Reset_Handler, %function
+                .globl   Reset_Handler
+                .fnstart
+Reset_Handler:
+                ldr      r0, =__INITIAL_SP
+                msr      psp, r0
+
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                ldr      r0, =__STACK_LIMIT
+                msr      msplim, r0
+                msr      psplim, r0
+
+                ldr      r0, =__STACK_SEAL
+                ldr      r1, =0xFEF5EDA5U
+                str      r1,[r0,#0]
+                str      r1,[r0,#4]
+                #endif
+
+                bl       SystemInit
+
+                bl       __main
+
+                .fnend
+                .size    Reset_Handler, . - Reset_Handler
+
+
+/* The default macro is not used for HardFault_Handler
+ * because this results in a poor debug illusion.
+ */
+                .thumb_func
+                .type    HardFault_Handler, %function
+                .weak    HardFault_Handler
+                .fnstart
+HardFault_Handler:
+                b        .
+                .fnend
+                .size    HardFault_Handler, . - HardFault_Handler
+
+                .thumb_func
+                .type    Default_Handler, %function
+                .weak    Default_Handler
+                .fnstart
+Default_Handler:
+                b        .
+                .fnend
+                .size    Default_Handler, . - Default_Handler
+
+/* Macro to define default exception/interrupt handlers.
+ * Default handler are weak symbols with an endless loop.
+ * They can be overwritten by real handlers.
+ */
+                .macro   Set_Default_Handler  Handler_Name
+                .weak    \Handler_Name
+                .set     \Handler_Name, Default_Handler
+                .endm
+
+
+/* Default exception/interrupt handler */
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                .end
diff --git a/Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s b/Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s
deleted file mode 100644
index 9983ca6..0000000
--- a/Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s
+++ /dev/null
@@ -1,171 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMv8MBL.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMv8MBL Device
-; * @version  V1.0.1
-; * @date     23. July 2019
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (470 * 4)                           ; Interrupts 10 .. 480 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =__stack_limit
-                MSR      MSPLIM, R0                          ; Non-secure version of MSPLIM is RAZ/WI
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-; The default macro is not used for HardFault_Handler
-; because this results in a poor debug illusion.
-HardFault_Handler PROC
-                EXPORT   HardFault_Handler         [WEAK]
-                B        .
-                ENDP
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                IF       :LNOT::DEF:__MICROLIB
-                IMPORT   __use_two_region_memory
-                ENDIF
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END
diff --git a/Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld b/Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld
index 7498908..c8f0efe 100644
--- a/Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld
+++ b/Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld
@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.1.0
- * @date     04. August 2020
+ * @version  V2.2.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -57,6 +57,12 @@
  *-------------------- <<< end of configuration section >>> -------------------
  */
 
+/* ARMv8-M stack sealing:
+   to use ARMv8-M stack sealing set __STACKSEAL_SIZE to 8 otherwise keep 0
+ */
+__STACKSEAL_SIZE = 0;
+
+
 MEMORY
 {
   FLASH (rx)  : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
@@ -92,6 +98,7 @@
  *   __StackLimit
  *   __StackTop
  *   __stack
+ *   __StackSeal      (only if ARMv8-M stack sealing is used)
  */
 ENTRY(Reset_Handler)
 
@@ -181,7 +188,7 @@
   /**
    * Location counter can end up 2byte aligned with narrow Thumb code but
    * __etext is assumed by startup code to be the LMA of a section in RAM
-   * which must be 4byte aligned 
+   * which must be 4byte aligned
    */
   __etext = ALIGN (4);
 
@@ -281,7 +288,7 @@
     __HeapLimit = .;
   } > RAM
 
-  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
+  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __STACKSEAL_SIZE) (COPY) :
   {
     . = ALIGN(8);
     __StackLimit = .;
@@ -290,6 +297,19 @@
     __StackTop = .;
   } > RAM
   PROVIDE(__stack = __StackTop);
+  
+  /* ARMv8-M stack sealing:
+     to use ARMv8-M stack sealing uncomment '.stackseal' section
+   */
+/*
+  .stackseal (ORIGIN(RAM) + LENGTH(RAM) - __STACKSEAL_SIZE) (COPY) :
+  {
+    . = ALIGN(8);
+    __StackSeal = .;
+    . = . + 8;
+    . = ALIGN(8);
+  } > RAM
+*/
 
   /* Check if data + heap + stack exceeds RAM limit */
   ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
diff --git a/Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S b/Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S
index 7e57797..ff7f28c 100644
--- a/Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S
+++ b/Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S
@@ -1,8 +1,8 @@
-/**************************************************************************//**
+/******************************************************************************
  * @file     startup_ARMv8MBL.S
- * @brief    CMSIS-Core(M) Device Startup File for ARMv8MBL Device
- * @version  V2.1.0
- * @date     04. August 2020
+ * @brief    CMSIS-Core Device Startup File for ARMv8MBL Device
+ * @version  V2.2.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -25,13 +25,19 @@
                 .syntax  unified
                 .arch    armv8-m.base
 
+                #define __INITIAL_SP     __StackTop
+                #define __STACK_LIMIT    __StackLimit
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                #define __STACK_SEAL     __StackSeal
+                #endif
+
                 .section .vectors
                 .align   2
                 .globl   __Vectors
                 .globl   __Vectors_End
                 .globl   __Vectors_Size
 __Vectors:
-                .long    __StackTop                         /*     Top of Stack */
+                .long    __INITIAL_SP                       /*     Initial Stack Pointer */
                 .long    Reset_Handler                      /*     Reset Handler */
                 .long    NMI_Handler                        /* -14 NMI Handler */
                 .long    HardFault_Handler                  /* -13 Hard Fault Handler */
@@ -60,7 +66,7 @@
                 .long    Interrupt8_Handler                 /*   8 Interrupt 8 */
                 .long    Interrupt9_Handler                 /*   9 Interrupt 9 */
 
-                .space   (470 * 4)                          /* Interrupts 10 .. 480 are left out */
+                .space   (214 * 4)                          /* Interrupts 10 .. 224 are left out */
 __Vectors_End:
                 .equ     __Vectors_Size, __Vectors_End - __Vectors
                 .size    __Vectors, . - __Vectors
@@ -75,8 +81,19 @@
                 .globl   Reset_Handler
                 .fnstart
 Reset_Handler:
-                ldr      r0, =__StackLimit
+                ldr      r0, =__INITIAL_SP
+                msr      psp, r0
+
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                ldr      r0, =__STACK_LIMIT
                 msr      msplim, r0
+                msr      psplim, r0
+
+                ldr      r0, =__STACK_SEAL
+                ldr      r1, =0xFEF5EDA5U
+                str      r1,[r0,#0]
+                str      r1,[r0,#4]
+                #endif
 
                 bl       SystemInit
 
@@ -89,7 +106,7 @@
                 ldr      r1, [r4]                /* source address */   
                 ldr      r2, [r4, #4]            /* destination address */
                 ldr      r3, [r4, #8]            /* word count */
-                lsl      r3, r3, #2              /* byte count */
+                lsls     r3, r3, #2              /* byte count */
 
 .L_loop0_0:
                 subs     r3, #4                  /* decrement byte count */
@@ -101,7 +118,6 @@
 .L_loop0_0_done:
                 adds     r4, #12
                 b        .L_loop0
-
 .L_loop0_done:
 
                 ldr      r3, =__zero_table_start__
@@ -112,7 +128,7 @@
                 bge      .L_loop2_done
                 ldr      r1, [r3]                /* destination address */
                 ldr      r2, [r3, #4]            /* word count */
-                lsl      r2, r2, #2              /* byte count */
+                lsls     r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
@@ -131,6 +147,7 @@
                 .fnend
                 .size    Reset_Handler, . - Reset_Handler
 
+
 /* The default macro is not used for HardFault_Handler
  * because this results in a poor debug illusion.
  */
@@ -180,5 +197,4 @@
                 Set_Default_Handler  Interrupt8_Handler
                 Set_Default_Handler  Interrupt9_Handler
 
-
                 .end
diff --git a/Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c b/Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c
index 41725e7..95c7eb1 100644
--- a/Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c
+++ b/Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c
@@ -1,8 +1,8 @@
 /******************************************************************************
- * @file     startup_ARMCM4.c
- * @brief    CMSIS-Core(M) Device Startup File for a Cortex-M23 Device
- * @version  V2.0.3
- * @date     31. March 2020
+ * @file     startup_ARMv8MBL.c
+ * @brief    CMSIS-Core Device Startup File for a ARMv8MBL Device
+ * @version  V2.1.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -33,6 +33,9 @@
  *----------------------------------------------------------------------------*/
 extern uint32_t __INITIAL_SP;
 extern uint32_t __STACK_LIMIT;
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+extern uint32_t __STACK_SEAL;
+#endif
 
 extern __NO_RETURN void __PROGRAM_START(void);
 
@@ -115,7 +118,14 @@
  *----------------------------------------------------------------------------*/
 __NO_RETURN void Reset_Handler(void)
 {
+  __set_PSP((uint32_t)(&__INITIAL_SP));
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
   __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+  __set_PSPLIM((uint32_t)(&__STACK_LIMIT));
+
+  __TZ_set_STACKSEAL_S((uint32_t *)(&__STACK_SEAL));
+#endif
 
   SystemInit();                             /* CMSIS System Initialization */
   __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
diff --git a/Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct b/Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct
index b49fb8d..d6b91fc 100644
--- a/Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct
+++ b/Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct
@@ -1,6 +1,10 @@
 #! armclang -E --target=arm-arm-none-eabi -march=armv8-m.main -xc
 ; command above MUST be in first line (no comment above!)
 
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -march=armv8-m.main -xc -mcmse
+
+
 /*
 ;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
 */
@@ -32,33 +36,58 @@
 #define __STACK_SIZE    0x00000200
 #define __HEAP_SIZE     0x00000C00
 
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
 /*
 ;------------- <<< end of configuration section >>> ---------------------------
 */
 
 
 /*----------------------------------------------------------------------------
-  User Stack & Heap boundary definition
+  User Stack & Heap boundery definition
  *----------------------------------------------------------------------------*/
-#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE)    /* starts at end of RAM */
-#define __HEAP_BASE    (AlignExpr(+0, 8))           /* starts after RW_RAM section, 8 byte aligned */
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
 
 
 /*----------------------------------------------------------------------------
-  Scatter File Definitions definition
+  Region base & size definition
  *----------------------------------------------------------------------------*/
-#define __RO_BASE       __ROM_BASE
-#define __RO_SIZE       __ROM_SIZE
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
 
-#define __RW_BASE       __RAM_BASE
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
 #define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
 
 
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
 LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
   ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
-;   *(Veneer$$CMSE)                                  ; uncomment for secure applications
    .ANY (+RO)
    .ANY (+XO)
   }
@@ -74,4 +103,17 @@
 
   ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
   }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
 }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct b/Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct
new file mode 100644
index 0000000..55e2324
--- /dev/null
+++ b/Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct
@@ -0,0 +1,119 @@
+#! armclang -E --target=arm-arm-none-eabi -march=armv8-m.main -xc -mcmse
+; command above MUST be in first line (no comment above!)
+
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -march=armv8-m.main -xc -mcmse
+
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE      0x00000000
+#define __ROM_SIZE      0x00080000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE      0x20000000
+#define __RAM_SIZE      0x00040000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE    0x00000200
+#define __HEAP_SIZE     0x00000C00
+
+/*--------------------- CMSE Venner Configuration ---------------------------
+; <h> CMSE Venner Configuration
+;   <o0>  CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_SIZE    0x200
+
+/*
+;------------- <<< end of configuration section >>> ---------------------------
+*/
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Region base & size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
+
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
+#define __RW_SIZE      (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Venners
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif
diff --git a/Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S b/Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S
new file mode 100644
index 0000000..e85330d
--- /dev/null
+++ b/Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S
@@ -0,0 +1,159 @@
+/******************************************************************************
+ * @file     startup_ARMv8MML.S
+ * @brief    CMSIS-Core Device Startup File for Cortex-ARMv8MML Device
+ * @version  V1.1.0
+ * @date     16. December 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+                .syntax  unified
+                .arch    armv8-m.main
+
+                #define __INITIAL_SP     Image$$ARM_LIB_STACK$$ZI$$Limit
+                #define __STACK_LIMIT    Image$$ARM_LIB_STACK$$ZI$$Base
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                #define __STACK_SEAL     Image$$STACKSEAL$$ZI$$Base
+                #endif
+
+                .section RESET
+                .align   2
+                .globl   __Vectors
+                .globl   __Vectors_End
+                .globl   __Vectors_Size
+__Vectors:
+                .long    __INITIAL_SP                       /*     Initial Stack Pointer */
+                .long    Reset_Handler                      /*     Reset Handler */
+                .long    NMI_Handler                        /* -14 NMI Handler */
+                .long    HardFault_Handler                  /* -13 Hard Fault Handler */
+                .long    MemManage_Handler                  /* -12 MPU Fault Handler */
+                .long    BusFault_Handler                   /* -11 Bus Fault Handler */
+                .long    UsageFault_Handler                 /* -10 Usage Fault Handler */
+                .long    SecureFault_Handler                /*  -9 Secure Fault Handler */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    0                                  /*     Reserved */
+                .long    SVC_Handler                        /*  -5 SVCall Handler */
+                .long    DebugMon_Handler                   /*  -4 Debug Monitor Handler */
+                .long    0                                  /*     Reserved */
+                .long    PendSV_Handler                     /*  -2 PendSV Handler */
+                .long    SysTick_Handler                    /*  -1 SysTick Handler */
+
+                /* Interrupts */
+                .long    Interrupt0_Handler                 /*   0 Interrupt 0 */
+                .long    Interrupt1_Handler                 /*   1 Interrupt 1 */
+                .long    Interrupt2_Handler                 /*   2 Interrupt 2 */
+                .long    Interrupt3_Handler                 /*   3 Interrupt 3 */
+                .long    Interrupt4_Handler                 /*   4 Interrupt 4 */
+                .long    Interrupt5_Handler                 /*   5 Interrupt 5 */
+                .long    Interrupt6_Handler                 /*   6 Interrupt 6 */
+                .long    Interrupt7_Handler                 /*   7 Interrupt 7 */
+                .long    Interrupt8_Handler                 /*   8 Interrupt 8 */
+                .long    Interrupt9_Handler                 /*   9 Interrupt 9 */
+
+                .space   (470 * 4)                          /* Interrupts 10 .. 480 are left out */
+__Vectors_End:
+                .equ     __Vectors_Size, __Vectors_End - __Vectors
+                .size    __Vectors, . - __Vectors
+
+
+                .thumb
+                .section .text
+                .align   2
+
+                .thumb_func
+                .type    Reset_Handler, %function
+                .globl   Reset_Handler
+                .fnstart
+Reset_Handler:
+                ldr      r0, =__INITIAL_SP
+                msr      psp, r0
+              
+                ldr      r0, =__STACK_LIMIT
+                msr      msplim, r0
+                msr      psplim, r0
+
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                ldr      r0, =__STACK_SEAL
+                ldr      r1, =0xFEF5EDA5U
+                strd     r1,r1,[r0,#0]
+                #endif
+
+                bl       SystemInit
+
+                bl       __main
+
+                .fnend
+                .size    Reset_Handler, . - Reset_Handler
+
+
+/* The default macro is not used for HardFault_Handler
+ * because this results in a poor debug illusion.
+ */
+                .thumb_func
+                .type    HardFault_Handler, %function
+                .weak    HardFault_Handler
+                .fnstart
+HardFault_Handler:
+                b        .
+                .fnend
+                .size    HardFault_Handler, . - HardFault_Handler
+
+                .thumb_func
+                .type    Default_Handler, %function
+                .weak    Default_Handler
+                .fnstart
+Default_Handler:
+                b        .
+                .fnend
+                .size    Default_Handler, . - Default_Handler
+
+/* Macro to define default exception/interrupt handlers.
+ * Default handler are weak symbols with an endless loop.
+ * They can be overwritten by real handlers.
+ */
+                .macro   Set_Default_Handler  Handler_Name
+                .weak    \Handler_Name
+                .set     \Handler_Name, Default_Handler
+                .endm
+
+
+/* Default exception/interrupt handler */
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SecureFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                .end
diff --git a/Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s b/Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s
deleted file mode 100644
index adb7fe9..0000000
--- a/Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s
+++ /dev/null
@@ -1,176 +0,0 @@
-;/**************************************************************************//**
-; * @file     startup_ARMv8MML.s
-; * @brief    CMSIS Core Device Startup File for
-; *           ARMv8MML Device
-; * @version  V1.0.1
-; * @date     23. July 2019
-; ******************************************************************************/
-;/*
-; * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-
-
-;<h> Stack Configuration
-;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Stack_Size      EQU      0x00000400
-
-                AREA     STACK, NOINIT, READWRITE, ALIGN=3
-__stack_limit
-Stack_Mem       SPACE    Stack_Size
-__initial_sp
-
-
-;<h> Heap Configuration
-;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;</h>
-
-Heap_Size       EQU      0x00000C00
-
-                IF       Heap_Size != 0                      ; Heap is provided
-                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE    Heap_Size
-__heap_limit
-                ENDIF
-
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA     RESET, DATA, READONLY
-                EXPORT   __Vectors
-                EXPORT   __Vectors_End
-                EXPORT   __Vectors_Size
-
-__Vectors       DCD      __initial_sp                        ;     Top of Stack
-                DCD      Reset_Handler                       ;     Reset Handler
-                DCD      NMI_Handler                         ; -14 NMI Handler
-                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
-                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
-                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
-                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
-                DCD      SecureFault_Handler                 ;  -9 Secure Fault Handler
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      0                                   ;     Reserved
-                DCD      SVC_Handler                         ;  -5 SVCall Handler
-                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
-                DCD      0                                   ;     Reserved
-                DCD      PendSV_Handler                      ;  -2 PendSV Handler
-                DCD      SysTick_Handler                     ;  -1 SysTick Handler
-
-                ; Interrupts
-                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
-                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
-                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
-                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
-                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
-                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
-                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
-                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
-                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
-                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
-
-                SPACE    (470 * 4)                           ; Interrupts 10 .. 480 are left out
-__Vectors_End
-__Vectors_Size  EQU      __Vectors_End - __Vectors
-
-
-                AREA     |.text|, CODE, READONLY
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT   Reset_Handler             [WEAK]
-                IMPORT   SystemInit
-                IMPORT   __main
-
-                LDR      R0, =__stack_limit
-                MSR      MSPLIM, R0                          ; Non-secure version of MSPLIM is RAZ/WI
-
-                LDR      R0, =SystemInit
-                BLX      R0
-                LDR      R0, =__main
-                BX       R0
-                ENDP
-
-; The default macro is not used for HardFault_Handler
-; because this results in a poor debug illusion.
-HardFault_Handler PROC
-                EXPORT   HardFault_Handler         [WEAK]
-                B        .
-                ENDP
-
-; Macro to define default exception/interrupt handlers.
-; Default handler are weak symbols with an endless loop.
-; They can be overwritten by real handlers.
-                MACRO
-                Set_Default_Handler  $Handler_Name
-$Handler_Name   PROC
-                EXPORT   $Handler_Name             [WEAK]
-                B        .
-                ENDP
-                MEND
-
-
-; Default exception/interrupt handler
-
-                Set_Default_Handler  NMI_Handler
-                Set_Default_Handler  MemManage_Handler
-                Set_Default_Handler  BusFault_Handler
-                Set_Default_Handler  UsageFault_Handler
-                Set_Default_Handler  SecureFault_Handler
-                Set_Default_Handler  SVC_Handler
-                Set_Default_Handler  DebugMon_Handler
-                Set_Default_Handler  PendSV_Handler
-                Set_Default_Handler  SysTick_Handler
-
-                Set_Default_Handler  Interrupt0_Handler
-                Set_Default_Handler  Interrupt1_Handler
-                Set_Default_Handler  Interrupt2_Handler
-                Set_Default_Handler  Interrupt3_Handler
-                Set_Default_Handler  Interrupt4_Handler
-                Set_Default_Handler  Interrupt5_Handler
-                Set_Default_Handler  Interrupt6_Handler
-                Set_Default_Handler  Interrupt7_Handler
-                Set_Default_Handler  Interrupt8_Handler
-                Set_Default_Handler  Interrupt9_Handler
-
-                ALIGN
-
-
-; User setup Stack & Heap
-
-                IF       :LNOT::DEF:__MICROLIB
-                IMPORT   __use_two_region_memory
-                ENDIF
-
-                EXPORT   __stack_limit
-                EXPORT   __initial_sp
-                IF       Heap_Size != 0                      ; Heap is provided
-                EXPORT   __heap_base
-                EXPORT   __heap_limit
-                ENDIF
-
-                END
diff --git a/Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld b/Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld
index 7498908..c8f0efe 100644
--- a/Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld
+++ b/Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld
@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.1.0
- * @date     04. August 2020
+ * @version  V2.2.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -57,6 +57,12 @@
  *-------------------- <<< end of configuration section >>> -------------------
  */
 
+/* ARMv8-M stack sealing:
+   to use ARMv8-M stack sealing set __STACKSEAL_SIZE to 8 otherwise keep 0
+ */
+__STACKSEAL_SIZE = 0;
+
+
 MEMORY
 {
   FLASH (rx)  : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
@@ -92,6 +98,7 @@
  *   __StackLimit
  *   __StackTop
  *   __stack
+ *   __StackSeal      (only if ARMv8-M stack sealing is used)
  */
 ENTRY(Reset_Handler)
 
@@ -181,7 +188,7 @@
   /**
    * Location counter can end up 2byte aligned with narrow Thumb code but
    * __etext is assumed by startup code to be the LMA of a section in RAM
-   * which must be 4byte aligned 
+   * which must be 4byte aligned
    */
   __etext = ALIGN (4);
 
@@ -281,7 +288,7 @@
     __HeapLimit = .;
   } > RAM
 
-  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
+  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __STACKSEAL_SIZE) (COPY) :
   {
     . = ALIGN(8);
     __StackLimit = .;
@@ -290,6 +297,19 @@
     __StackTop = .;
   } > RAM
   PROVIDE(__stack = __StackTop);
+  
+  /* ARMv8-M stack sealing:
+     to use ARMv8-M stack sealing uncomment '.stackseal' section
+   */
+/*
+  .stackseal (ORIGIN(RAM) + LENGTH(RAM) - __STACKSEAL_SIZE) (COPY) :
+  {
+    . = ALIGN(8);
+    __StackSeal = .;
+    . = . + 8;
+    . = ALIGN(8);
+  } > RAM
+*/
 
   /* Check if data + heap + stack exceeds RAM limit */
   ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
diff --git a/Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S b/Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S
index e40b1da..034105b 100644
--- a/Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S
+++ b/Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S
@@ -1,8 +1,8 @@
-/**************************************************************************//**
+/******************************************************************************
  * @file     startup_ARMv8MML.S
- * @brief    CMSIS-Core(M) Device Startup File for ARMv8MML evice
- * @version  V2.1.0
- * @date     04. August 2020
+ * @brief    CMSIS-Core Device Startup File for ARMv8MML evice
+ * @version  V2.2.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -25,13 +25,19 @@
                 .syntax  unified
                 .arch    armv8-m.main
 
+                #define __INITIAL_SP     __StackTop
+                #define __STACK_LIMIT    __StackLimit
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                #define __STACK_SEAL     __StackSeal
+                #endif
+
                 .section .vectors
                 .align   2
                 .globl   __Vectors
                 .globl   __Vectors_End
                 .globl   __Vectors_Size
 __Vectors:
-                .long    __StackTop                         /*     Top of Stack */
+                .long    __INITIAL_SP                       /*     Initial Stack Pointer */
                 .long    Reset_Handler                      /*     Reset Handler */
                 .long    NMI_Handler                        /* -14 NMI Handler */
                 .long    HardFault_Handler                  /* -13 Hard Fault Handler */
@@ -75,10 +81,19 @@
                 .globl   Reset_Handler
                 .fnstart
 Reset_Handler:
-                ldr      r0, =__StackLimit
+                ldr      r0, =__INITIAL_SP
+                msr      psp, r0
+              
+                ldr      r0, =__STACK_LIMIT
                 msr      msplim, r0
+                msr      psplim, r0
 
-/* CMSIS System Initialization */
+                #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+                ldr      r0, =__STACK_SEAL
+                ldr      r1, =0xFEF5EDA5U
+                strd     r1,r1,[r0,#0]
+                #endif
+
                 bl       SystemInit
 
                 ldr      r4, =__copy_table_start__
@@ -129,6 +144,7 @@
                 .fnend
                 .size    Reset_Handler, . - Reset_Handler
 
+
 /* The default macro is not used for HardFault_Handler
  * because this results in a poor debug illusion.
  */
@@ -183,5 +199,4 @@
                 Set_Default_Handler  Interrupt8_Handler
                 Set_Default_Handler  Interrupt9_Handler
 
-
                 .end
diff --git a/Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c b/Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c
index 579cf04..aa98825 100644
--- a/Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c
+++ b/Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c
@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     startup_ARMv8MML.c
- * @brief    CMSIS Core Device Startup File for ARMv8MML Device
- * @version  V2.0.3
- * @date     31. March 2020
+ * @brief    CMSIS-Core Device Startup File for ARMv8MML Device
+ * @version  V2.1.0
+ * @date     16. December 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -43,6 +43,9 @@
  *----------------------------------------------------------------------------*/
 extern uint32_t __INITIAL_SP;
 extern uint32_t __STACK_LIMIT;
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+extern uint32_t __STACK_SEAL;
+#endif
 
 extern __NO_RETURN void __PROGRAM_START(void);
 
@@ -130,7 +133,14 @@
  *----------------------------------------------------------------------------*/
 __NO_RETURN void Reset_Handler(void)
 {
+  __set_PSP((uint32_t)(&__INITIAL_SP));
+
   __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
+  __set_PSPLIM((uint32_t)(&__STACK_LIMIT));
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  __TZ_set_STACKSEAL_S((uint32_t *)(&__STACK_SEAL));
+#endif
 
   SystemInit();                             /* CMSIS System Initialization */
   __PROGRAM_START();                        /* Enter PreMain (C library entry point) */