| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef __ASM_SH_BITOPS_H |
| 3 | #define __ASM_SH_BITOPS_H |
| 4 | |
| 5 | #ifdef __KERNEL__ |
| 6 | |
| 7 | #ifndef _LINUX_BITOPS_H |
| 8 | #error only <linux/bitops.h> can be included directly |
| 9 | #endif |
| 10 | |
| 11 | /* For __swab32 */ |
| 12 | #include <asm/byteorder.h> |
| 13 | #include <asm/barrier.h> |
| 14 | |
| 15 | #ifdef CONFIG_GUSA_RB |
| 16 | #include <asm/bitops-grb.h> |
| 17 | #elif defined(CONFIG_CPU_SH2A) |
| 18 | #include <asm-generic/bitops/atomic.h> |
| 19 | #include <asm/bitops-op32.h> |
| 20 | #elif defined(CONFIG_CPU_SH4A) |
| 21 | #include <asm/bitops-llsc.h> |
| 22 | #elif defined(CONFIG_CPU_J2) && defined(CONFIG_SMP) |
| 23 | #include <asm/bitops-cas.h> |
| 24 | #else |
| 25 | #include <asm-generic/bitops/atomic.h> |
| 26 | #include <asm-generic/bitops/non-atomic.h> |
| 27 | #endif |
| 28 | |
| 29 | #ifdef CONFIG_SUPERH32 |
| 30 | static inline unsigned long ffz(unsigned long word) |
| 31 | { |
| 32 | unsigned long result; |
| 33 | |
| 34 | __asm__("1:\n\t" |
| 35 | "shlr %1\n\t" |
| 36 | "bt/s 1b\n\t" |
| 37 | " add #1, %0" |
| 38 | : "=r" (result), "=r" (word) |
| 39 | : "0" (~0L), "1" (word) |
| 40 | : "t"); |
| 41 | return result; |
| 42 | } |
| 43 | |
| 44 | /** |
| 45 | * __ffs - find first bit in word. |
| 46 | * @word: The word to search |
| 47 | * |
| 48 | * Undefined if no bit exists, so code should check against 0 first. |
| 49 | */ |
| 50 | static inline unsigned long __ffs(unsigned long word) |
| 51 | { |
| 52 | unsigned long result; |
| 53 | |
| 54 | __asm__("1:\n\t" |
| 55 | "shlr %1\n\t" |
| 56 | "bf/s 1b\n\t" |
| 57 | " add #1, %0" |
| 58 | : "=r" (result), "=r" (word) |
| 59 | : "0" (~0L), "1" (word) |
| 60 | : "t"); |
| 61 | return result; |
| 62 | } |
| 63 | #else |
| 64 | static inline unsigned long ffz(unsigned long word) |
| 65 | { |
| 66 | unsigned long result, __d2, __d3; |
| 67 | |
| 68 | __asm__("gettr tr0, %2\n\t" |
| 69 | "pta $+32, tr0\n\t" |
| 70 | "andi %1, 1, %3\n\t" |
| 71 | "beq %3, r63, tr0\n\t" |
| 72 | "pta $+4, tr0\n" |
| 73 | "0:\n\t" |
| 74 | "shlri.l %1, 1, %1\n\t" |
| 75 | "addi %0, 1, %0\n\t" |
| 76 | "andi %1, 1, %3\n\t" |
| 77 | "beqi %3, 1, tr0\n" |
| 78 | "1:\n\t" |
| 79 | "ptabs %2, tr0\n\t" |
| 80 | : "=r" (result), "=r" (word), "=r" (__d2), "=r" (__d3) |
| 81 | : "0" (0L), "1" (word)); |
| 82 | |
| 83 | return result; |
| 84 | } |
| 85 | |
| 86 | #include <asm-generic/bitops/__ffs.h> |
| 87 | #endif |
| 88 | |
| 89 | #include <asm-generic/bitops/find.h> |
| 90 | #include <asm-generic/bitops/ffs.h> |
| 91 | #include <asm-generic/bitops/hweight.h> |
| 92 | #include <asm-generic/bitops/lock.h> |
| 93 | #include <asm-generic/bitops/sched.h> |
| 94 | #include <asm-generic/bitops/le.h> |
| 95 | #include <asm-generic/bitops/ext2-atomic.h> |
| 96 | #include <asm-generic/bitops/fls.h> |
| 97 | #include <asm-generic/bitops/__fls.h> |
| 98 | #include <asm-generic/bitops/fls64.h> |
| 99 | |
| 100 | #endif /* __KERNEL__ */ |
| 101 | |
| 102 | #endif /* __ASM_SH_BITOPS_H */ |