David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 3 | * Cadence USB3 and USBSSP DRD header file. |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 4 | * |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 5 | * Copyright (C) 2018-2020 Cadence. |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 6 | * |
| 7 | * Author: Pawel Laszczak <pawell@cadence.com> |
| 8 | */ |
| 9 | #ifndef __LINUX_CDNS3_DRD |
| 10 | #define __LINUX_CDNS3_DRD |
| 11 | |
| 12 | #include <linux/usb/otg.h> |
| 13 | #include <linux/phy/phy.h> |
| 14 | #include "core.h" |
| 15 | |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 16 | /* DRD register interface for version v1 of cdns3 driver. */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 17 | struct cdns3_otg_regs { |
| 18 | __le32 did; |
| 19 | __le32 rid; |
| 20 | __le32 capabilities; |
| 21 | __le32 reserved1; |
| 22 | __le32 cmd; |
| 23 | __le32 sts; |
| 24 | __le32 state; |
| 25 | __le32 reserved2; |
| 26 | __le32 ien; |
| 27 | __le32 ivect; |
| 28 | __le32 refclk; |
| 29 | __le32 tmr; |
| 30 | __le32 reserved3[4]; |
| 31 | __le32 simulate; |
| 32 | __le32 override; |
| 33 | __le32 susp_ctrl; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 34 | __le32 phyrst_cfg; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 35 | __le32 anasts; |
| 36 | __le32 adp_ramp_time; |
| 37 | __le32 ctrl1; |
| 38 | __le32 ctrl2; |
| 39 | }; |
| 40 | |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 41 | /* DRD register interface for version v0 of cdns3 driver. */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 42 | struct cdns3_otg_legacy_regs { |
| 43 | __le32 cmd; |
| 44 | __le32 sts; |
| 45 | __le32 state; |
| 46 | __le32 refclk; |
| 47 | __le32 ien; |
| 48 | __le32 ivect; |
| 49 | __le32 reserved1[3]; |
| 50 | __le32 tmr; |
| 51 | __le32 reserved2[2]; |
| 52 | __le32 version; |
| 53 | __le32 capabilities; |
| 54 | __le32 reserved3[2]; |
| 55 | __le32 simulate; |
| 56 | __le32 reserved4[5]; |
| 57 | __le32 ctrl1; |
| 58 | }; |
| 59 | |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 60 | /* DRD register interface for cdnsp driver */ |
| 61 | struct cdnsp_otg_regs { |
| 62 | __le32 did; |
| 63 | __le32 rid; |
| 64 | __le32 cfgs1; |
| 65 | __le32 cfgs2; |
| 66 | __le32 cmd; |
| 67 | __le32 sts; |
| 68 | __le32 state; |
| 69 | __le32 ien; |
| 70 | __le32 ivect; |
| 71 | __le32 tmr; |
| 72 | __le32 simulate; |
| 73 | __le32 adpbc_sts; |
| 74 | __le32 adp_ramp_time; |
| 75 | __le32 adpbc_ctrl1; |
| 76 | __le32 adpbc_ctrl2; |
| 77 | __le32 override; |
| 78 | __le32 vbusvalid_dbnc_cfg; |
| 79 | __le32 sessvalid_dbnc_cfg; |
| 80 | __le32 susp_timing_ctrl; |
| 81 | }; |
| 82 | |
| 83 | #define OTG_CDNSP_DID 0x0004034E |
| 84 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 85 | /* |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 86 | * Common registers interface for both CDNS3 and CDNSP version of DRD. |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 87 | */ |
| 88 | struct cdns3_otg_common_regs { |
| 89 | __le32 cmd; |
| 90 | __le32 sts; |
| 91 | __le32 state; |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 92 | }; |
| 93 | |
| 94 | /* |
| 95 | * Interrupt related registers. This registers are mapped in different |
| 96 | * location for CDNSP controller. |
| 97 | */ |
| 98 | struct cdns3_otg_irq_regs { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 99 | __le32 ien; |
| 100 | __le32 ivect; |
| 101 | }; |
| 102 | |
| 103 | /* CDNS_RID - bitmasks */ |
| 104 | #define CDNS_RID(p) ((p) & GENMASK(15, 0)) |
| 105 | |
| 106 | /* CDNS_VID - bitmasks */ |
| 107 | #define CDNS_DID(p) ((p) & GENMASK(31, 0)) |
| 108 | |
| 109 | /* OTGCMD - bitmasks */ |
| 110 | /* "Request the bus for Device mode. */ |
| 111 | #define OTGCMD_DEV_BUS_REQ BIT(0) |
| 112 | /* Request the bus for Host mode */ |
| 113 | #define OTGCMD_HOST_BUS_REQ BIT(1) |
| 114 | /* Enable OTG mode. */ |
| 115 | #define OTGCMD_OTG_EN BIT(2) |
| 116 | /* Disable OTG mode */ |
| 117 | #define OTGCMD_OTG_DIS BIT(3) |
| 118 | /*"Configure OTG as A-Device. */ |
| 119 | #define OTGCMD_A_DEV_EN BIT(4) |
| 120 | /*"Configure OTG as A-Device. */ |
| 121 | #define OTGCMD_A_DEV_DIS BIT(5) |
| 122 | /* Drop the bus for Device mod e. */ |
| 123 | #define OTGCMD_DEV_BUS_DROP BIT(8) |
| 124 | /* Drop the bus for Host mode*/ |
| 125 | #define OTGCMD_HOST_BUS_DROP BIT(9) |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 126 | /* Power Down USBSS-DEV - only for CDNS3.*/ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 127 | #define OTGCMD_DEV_POWER_OFF BIT(11) |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 128 | /* Power Down CDNSXHCI - only for CDNS3. */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 129 | #define OTGCMD_HOST_POWER_OFF BIT(12) |
| 130 | |
| 131 | /* OTGIEN - bitmasks */ |
| 132 | /* ID change interrupt enable */ |
| 133 | #define OTGIEN_ID_CHANGE_INT BIT(0) |
| 134 | /* Vbusvalid fall detected interrupt enable.*/ |
| 135 | #define OTGIEN_VBUSVALID_RISE_INT BIT(4) |
| 136 | /* Vbusvalid fall detected interrupt enable */ |
| 137 | #define OTGIEN_VBUSVALID_FALL_INT BIT(5) |
| 138 | |
| 139 | /* OTGSTS - bitmasks */ |
| 140 | /* |
| 141 | * Current value of the ID pin. It is only valid when idpullup in |
| 142 | * OTGCTRL1_TYPE register is set to '1'. |
| 143 | */ |
| 144 | #define OTGSTS_ID_VALUE BIT(0) |
| 145 | /* Current value of the vbus_valid */ |
| 146 | #define OTGSTS_VBUS_VALID BIT(1) |
| 147 | /* Current value of the b_sess_vld */ |
| 148 | #define OTGSTS_SESSION_VALID BIT(2) |
| 149 | /*Device mode is active*/ |
| 150 | #define OTGSTS_DEV_ACTIVE BIT(3) |
| 151 | /* Host mode is active. */ |
| 152 | #define OTGSTS_HOST_ACTIVE BIT(4) |
| 153 | /* OTG Controller not ready. */ |
| 154 | #define OTGSTS_OTG_NRDY_MASK BIT(11) |
| 155 | #define OTGSTS_OTG_NRDY(p) ((p) & OTGSTS_OTG_NRDY_MASK) |
| 156 | /* |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 157 | * Value of the strap pins for: |
| 158 | * CDNS3: |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 159 | * 000 - no default configuration |
| 160 | * 010 - Controller initiall configured as Host |
| 161 | * 100 - Controller initially configured as Device |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 162 | * CDNSP: |
| 163 | * 000 - No default configuration. |
| 164 | * 010 - Controller initiall configured as Host. |
| 165 | * 100 - Controller initially configured as Device. |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 166 | */ |
| 167 | #define OTGSTS_STRAP(p) (((p) & GENMASK(14, 12)) >> 12) |
| 168 | #define OTGSTS_STRAP_NO_DEFAULT_CFG 0x00 |
| 169 | #define OTGSTS_STRAP_HOST_OTG 0x01 |
| 170 | #define OTGSTS_STRAP_HOST 0x02 |
| 171 | #define OTGSTS_STRAP_GADGET 0x04 |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 172 | #define OTGSTS_CDNSP_STRAP_HOST 0x01 |
| 173 | #define OTGSTS_CDNSP_STRAP_GADGET 0x02 |
| 174 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 175 | /* Host mode is turned on. */ |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 176 | #define OTGSTS_CDNS3_XHCI_READY BIT(26) |
| 177 | #define OTGSTS_CDNSP_XHCI_READY BIT(27) |
| 178 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 179 | /* "Device mode is turned on .*/ |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 180 | #define OTGSTS_CDNS3_DEV_READY BIT(27) |
| 181 | #define OTGSTS_CDNSP_DEV_READY BIT(26) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 182 | |
| 183 | /* OTGSTATE- bitmasks */ |
| 184 | #define OTGSTATE_DEV_STATE_MASK GENMASK(2, 0) |
| 185 | #define OTGSTATE_HOST_STATE_MASK GENMASK(5, 3) |
| 186 | #define OTGSTATE_HOST_STATE_IDLE 0x0 |
| 187 | #define OTGSTATE_HOST_STATE_VBUS_FALL 0x7 |
| 188 | #define OTGSTATE_HOST_STATE(p) (((p) & OTGSTATE_HOST_STATE_MASK) >> 3) |
| 189 | |
| 190 | /* OTGREFCLK - bitmasks */ |
| 191 | #define OTGREFCLK_STB_CLK_SWITCH_EN BIT(31) |
| 192 | |
| 193 | /* OVERRIDE - bitmasks */ |
| 194 | #define OVERRIDE_IDPULLUP BIT(0) |
| 195 | /* Only for CDNS3_CONTROLLER_V0 version */ |
| 196 | #define OVERRIDE_IDPULLUP_V0 BIT(24) |
Olivier Deprez | 92d4c21 | 2022-12-06 15:05:30 +0100 | [diff] [blame^] | 197 | /* Vbusvalid/Sesvalid override select. */ |
| 198 | #define OVERRIDE_SESS_VLD_SEL BIT(10) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 199 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 200 | /* PHYRST_CFG - bitmasks */ |
| 201 | #define PHYRST_CFG_PHYRST_A_ENABLE BIT(0) |
| 202 | |
| 203 | #define CDNS3_ID_PERIPHERAL 1 |
| 204 | #define CDNS3_ID_HOST 0 |
| 205 | |
| 206 | bool cdns3_is_host(struct cdns3 *cdns); |
| 207 | bool cdns3_is_device(struct cdns3 *cdns); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 208 | int cdns3_get_id(struct cdns3 *cdns); |
| 209 | int cdns3_get_vbus(struct cdns3 *cdns); |
| 210 | int cdns3_drd_init(struct cdns3 *cdns); |
| 211 | int cdns3_drd_exit(struct cdns3 *cdns); |
| 212 | int cdns3_drd_update_mode(struct cdns3 *cdns); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame] | 213 | int cdns3_drd_gadget_on(struct cdns3 *cdns); |
| 214 | void cdns3_drd_gadget_off(struct cdns3 *cdns); |
| 215 | int cdns3_drd_host_on(struct cdns3 *cdns); |
| 216 | void cdns3_drd_host_off(struct cdns3 *cdns); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 217 | |
| 218 | #endif /* __LINUX_CDNS3_DRD */ |