blob: ce81e4087a8fce2e8d2239e6d706de7f33b24c7d [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001// SPDX-License-Identifier: GPL-2.0
2//
3// Spreadtrum clock infrastructure
4//
5// Copyright (C) 2017 Spreadtrum, Inc.
6// Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
7
8#include <linux/mfd/syscon.h>
9#include <linux/module.h>
10#include <linux/of_address.h>
11#include <linux/of_platform.h>
12#include <linux/regmap.h>
13
14#include "common.h"
15
16static const struct regmap_config sprdclk_regmap_config = {
17 .reg_bits = 32,
18 .reg_stride = 4,
19 .val_bits = 32,
20 .max_register = 0xffff,
21 .fast_io = true,
22};
23
24static void sprd_clk_set_regmap(const struct sprd_clk_desc *desc,
25 struct regmap *regmap)
26{
27 int i;
28 struct sprd_clk_common *cclk;
29
30 for (i = 0; i < desc->num_clk_clks; i++) {
31 cclk = desc->clk_clks[i];
32 if (!cclk)
33 continue;
34
35 cclk->regmap = regmap;
36 }
37}
38
39int sprd_clk_regmap_init(struct platform_device *pdev,
40 const struct sprd_clk_desc *desc)
41{
42 void __iomem *base;
Olivier Deprez157378f2022-04-04 15:47:50 +020043 struct device *dev = &pdev->dev;
Olivier Deprez92d4c212022-12-06 15:05:30 +010044 struct device_node *node = dev->of_node, *np;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000045 struct regmap *regmap;
46
47 if (of_find_property(node, "sprd,syscon", NULL)) {
48 regmap = syscon_regmap_lookup_by_phandle(node, "sprd,syscon");
Olivier Deprez0e641232021-09-23 10:07:05 +020049 if (IS_ERR(regmap)) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000050 pr_err("%s: failed to get syscon regmap\n", __func__);
51 return PTR_ERR(regmap);
52 }
Olivier Deprez92d4c212022-12-06 15:05:30 +010053 } else if (of_device_is_compatible(np = of_get_parent(node), "syscon") ||
54 (of_node_put(np), 0)) {
55 regmap = device_node_to_regmap(np);
56 of_node_put(np);
Olivier Deprez157378f2022-04-04 15:47:50 +020057 if (IS_ERR(regmap)) {
58 dev_err(dev, "failed to get regmap from its parent.\n");
59 return PTR_ERR(regmap);
60 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000061 } else {
Olivier Deprez157378f2022-04-04 15:47:50 +020062 base = devm_platform_ioremap_resource(pdev, 0);
David Brazdil0f672f62019-12-10 10:32:29 +000063 if (IS_ERR(base))
64 return PTR_ERR(base);
65
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000066 regmap = devm_regmap_init_mmio(&pdev->dev, base,
67 &sprdclk_regmap_config);
David Brazdil0f672f62019-12-10 10:32:29 +000068 if (IS_ERR(regmap)) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000069 pr_err("failed to init regmap\n");
70 return PTR_ERR(regmap);
71 }
72 }
73
74 sprd_clk_set_regmap(desc, regmap);
75
76 return 0;
77}
78EXPORT_SYMBOL_GPL(sprd_clk_regmap_init);
79
80int sprd_clk_probe(struct device *dev, struct clk_hw_onecell_data *clkhw)
81{
82 int i, ret;
83 struct clk_hw *hw;
84
85 for (i = 0; i < clkhw->num; i++) {
David Brazdil0f672f62019-12-10 10:32:29 +000086 const char *name;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000087
88 hw = clkhw->hws[i];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000089 if (!hw)
90 continue;
91
David Brazdil0f672f62019-12-10 10:32:29 +000092 name = hw->init->name;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000093 ret = devm_clk_hw_register(dev, hw);
94 if (ret) {
95 dev_err(dev, "Couldn't register clock %d - %s\n",
David Brazdil0f672f62019-12-10 10:32:29 +000096 i, name);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000097 return ret;
98 }
99 }
100
101 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, clkhw);
102 if (ret)
103 dev_err(dev, "Failed to add clock provider\n");
104
105 return ret;
106}
107EXPORT_SYMBOL_GPL(sprd_clk_probe);
108
109MODULE_LICENSE("GPL v2");