| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * 8237A DMA controller suspend functions. |
| 3 | * |
| 4 | * Written by Pierre Ossman, 2005. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or (at |
| 9 | * your option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/dmi.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/syscore_ops.h> |
| 15 | |
| 16 | #include <asm/dma.h> |
| 17 | #include <asm/x86_init.h> |
| 18 | |
| 19 | /* |
| 20 | * This module just handles suspend/resume issues with the |
| 21 | * 8237A DMA controller (used for ISA and LPC). |
| 22 | * Allocation is handled in kernel/dma.c and normal usage is |
| 23 | * in asm/dma.h. |
| 24 | */ |
| 25 | |
| 26 | static void i8237A_resume(void) |
| 27 | { |
| 28 | unsigned long flags; |
| 29 | int i; |
| 30 | |
| 31 | flags = claim_dma_lock(); |
| 32 | |
| 33 | dma_outb(0, DMA1_RESET_REG); |
| 34 | dma_outb(0, DMA2_RESET_REG); |
| 35 | |
| 36 | for (i = 0; i < 8; i++) { |
| 37 | set_dma_addr(i, 0x000000); |
| 38 | /* DMA count is a bit weird so this is not 0 */ |
| 39 | set_dma_count(i, 1); |
| 40 | } |
| 41 | |
| 42 | /* Enable cascade DMA or channel 0-3 won't work */ |
| 43 | enable_dma(4); |
| 44 | |
| 45 | release_dma_lock(flags); |
| 46 | } |
| 47 | |
| 48 | static struct syscore_ops i8237_syscore_ops = { |
| 49 | .resume = i8237A_resume, |
| 50 | }; |
| 51 | |
| 52 | static int __init i8237A_init_ops(void) |
| 53 | { |
| 54 | /* |
| 55 | * From SKL PCH onwards, the legacy DMA device is removed in which the |
| 56 | * I/O ports (81h-83h, 87h, 89h-8Bh, 8Fh) related to it are removed |
| 57 | * as well. All removed ports must return 0xff for a inb() request. |
| 58 | * |
| 59 | * Note: DMA_PAGE_2 (port 0x81) should not be checked for detecting |
| 60 | * the presence of DMA device since it may be used by BIOS to decode |
| 61 | * LPC traffic for POST codes. Original LPC only decodes one byte of |
| 62 | * port 0x80 but some BIOS may choose to enhance PCH LPC port 0x8x |
| 63 | * decoding. |
| 64 | */ |
| 65 | if (dma_inb(DMA_PAGE_0) == 0xFF) |
| 66 | return -ENODEV; |
| 67 | |
| 68 | /* |
| 69 | * It is not required to load this driver as newer SoC may not |
| 70 | * support 8237 DMA or bus mastering from LPC. Platform firmware |
| 71 | * must announce the support for such legacy devices via |
| 72 | * ACPI_FADT_LEGACY_DEVICES field in FADT table. |
| 73 | */ |
| 74 | if (x86_pnpbios_disabled() && dmi_get_bios_year() >= 2017) |
| 75 | return -ENODEV; |
| 76 | |
| 77 | register_syscore_ops(&i8237_syscore_ops); |
| 78 | return 0; |
| 79 | } |
| 80 | device_initcall(i8237A_init_ops); |