David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */ |
| 3 | |
| 4 | #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H |
| 5 | #define _DT_BINDINGS_POWER_QCOM_RPMPD_H |
| 6 | |
| 7 | /* SDM845 Power Domain Indexes */ |
| 8 | #define SDM845_EBI 0 |
| 9 | #define SDM845_MX 1 |
| 10 | #define SDM845_MX_AO 2 |
| 11 | #define SDM845_CX 3 |
| 12 | #define SDM845_CX_AO 4 |
| 13 | #define SDM845_LMX 5 |
| 14 | #define SDM845_LCX 6 |
| 15 | #define SDM845_GFX 7 |
| 16 | #define SDM845_MSS 8 |
| 17 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 18 | /* SM8150 Power Domain Indexes */ |
| 19 | #define SM8150_MSS 0 |
| 20 | #define SM8150_EBI 1 |
| 21 | #define SM8150_LMX 2 |
| 22 | #define SM8150_LCX 3 |
| 23 | #define SM8150_GFX 4 |
| 24 | #define SM8150_MX 5 |
| 25 | #define SM8150_MX_AO 6 |
| 26 | #define SM8150_CX 7 |
| 27 | #define SM8150_CX_AO 8 |
| 28 | #define SM8150_MMCX 9 |
| 29 | #define SM8150_MMCX_AO 10 |
| 30 | |
| 31 | /* SM8250 Power Domain Indexes */ |
| 32 | #define SM8250_CX 0 |
| 33 | #define SM8250_CX_AO 1 |
| 34 | #define SM8250_EBI 2 |
| 35 | #define SM8250_GFX 3 |
| 36 | #define SM8250_LCX 4 |
| 37 | #define SM8250_LMX 5 |
| 38 | #define SM8250_MMCX 6 |
| 39 | #define SM8250_MMCX_AO 7 |
| 40 | #define SM8250_MX 8 |
| 41 | #define SM8250_MX_AO 9 |
| 42 | |
| 43 | /* SC7180 Power Domain Indexes */ |
| 44 | #define SC7180_CX 0 |
| 45 | #define SC7180_CX_AO 1 |
| 46 | #define SC7180_GFX 2 |
| 47 | #define SC7180_MX 3 |
| 48 | #define SC7180_MX_AO 4 |
| 49 | #define SC7180_LMX 5 |
| 50 | #define SC7180_LCX 6 |
| 51 | #define SC7180_MSS 7 |
| 52 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 53 | /* SDM845 Power Domain performance levels */ |
| 54 | #define RPMH_REGULATOR_LEVEL_RETENTION 16 |
| 55 | #define RPMH_REGULATOR_LEVEL_MIN_SVS 48 |
| 56 | #define RPMH_REGULATOR_LEVEL_LOW_SVS 64 |
| 57 | #define RPMH_REGULATOR_LEVEL_SVS 128 |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 58 | #define RPMH_REGULATOR_LEVEL_SVS_L0 144 |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 59 | #define RPMH_REGULATOR_LEVEL_SVS_L1 192 |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 60 | #define RPMH_REGULATOR_LEVEL_SVS_L2 224 |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 61 | #define RPMH_REGULATOR_LEVEL_NOM 256 |
| 62 | #define RPMH_REGULATOR_LEVEL_NOM_L1 320 |
| 63 | #define RPMH_REGULATOR_LEVEL_NOM_L2 336 |
| 64 | #define RPMH_REGULATOR_LEVEL_TURBO 384 |
| 65 | #define RPMH_REGULATOR_LEVEL_TURBO_L1 416 |
| 66 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 67 | /* MSM8976 Power Domain Indexes */ |
| 68 | #define MSM8976_VDDCX 0 |
| 69 | #define MSM8976_VDDCX_AO 1 |
| 70 | #define MSM8976_VDDCX_VFL 2 |
| 71 | #define MSM8976_VDDMX 3 |
| 72 | #define MSM8976_VDDMX_AO 4 |
| 73 | #define MSM8976_VDDMX_VFL 5 |
| 74 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 75 | /* MSM8996 Power Domain Indexes */ |
| 76 | #define MSM8996_VDDCX 0 |
| 77 | #define MSM8996_VDDCX_AO 1 |
| 78 | #define MSM8996_VDDCX_VFC 2 |
| 79 | #define MSM8996_VDDMX 3 |
| 80 | #define MSM8996_VDDMX_AO 4 |
| 81 | #define MSM8996_VDDSSCX 5 |
| 82 | #define MSM8996_VDDSSCX_VFC 6 |
| 83 | |
| 84 | /* MSM8998 Power Domain Indexes */ |
| 85 | #define MSM8998_VDDCX 0 |
| 86 | #define MSM8998_VDDCX_AO 1 |
| 87 | #define MSM8998_VDDCX_VFL 2 |
| 88 | #define MSM8998_VDDMX 3 |
| 89 | #define MSM8998_VDDMX_AO 4 |
| 90 | #define MSM8998_VDDMX_VFL 5 |
| 91 | #define MSM8998_SSCCX 6 |
| 92 | #define MSM8998_SSCCX_VFL 7 |
| 93 | #define MSM8998_SSCMX 8 |
| 94 | #define MSM8998_SSCMX_VFL 9 |
| 95 | |
| 96 | /* QCS404 Power Domains */ |
| 97 | #define QCS404_VDDMX 0 |
| 98 | #define QCS404_VDDMX_AO 1 |
| 99 | #define QCS404_VDDMX_VFL 2 |
| 100 | #define QCS404_LPICX 3 |
| 101 | #define QCS404_LPICX_VFL 4 |
| 102 | #define QCS404_LPIMX 5 |
| 103 | #define QCS404_LPIMX_VFL 6 |
| 104 | |
| 105 | /* RPM SMD Power Domain performance levels */ |
| 106 | #define RPM_SMD_LEVEL_RETENTION 16 |
| 107 | #define RPM_SMD_LEVEL_RETENTION_PLUS 32 |
| 108 | #define RPM_SMD_LEVEL_MIN_SVS 48 |
| 109 | #define RPM_SMD_LEVEL_LOW_SVS 64 |
| 110 | #define RPM_SMD_LEVEL_SVS 128 |
| 111 | #define RPM_SMD_LEVEL_SVS_PLUS 192 |
| 112 | #define RPM_SMD_LEVEL_NOM 256 |
| 113 | #define RPM_SMD_LEVEL_NOM_PLUS 320 |
| 114 | #define RPM_SMD_LEVEL_TURBO 384 |
| 115 | #define RPM_SMD_LEVEL_TURBO_NO_CPR 416 |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 116 | #define RPM_SMD_LEVEL_TURBO_HIGH 448 |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 117 | #define RPM_SMD_LEVEL_BINNING 512 |
| 118 | |
| 119 | #endif |