David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Driver for ITE Tech Inc. IT8712F/IT8512 CIR |
| 4 | * |
| 5 | * Copyright (C) 2010 Juan Jesús García de Soria <skandalfo@gmail.com> |
| 6 | * |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 7 | * Inspired by the original lirc_it87 and lirc_ite8709 drivers, on top of the |
| 8 | * skeleton provided by the nuvoton-cir driver. |
| 9 | * |
| 10 | * The lirc_it87 driver was originally written by Hans-Gunter Lutke Uphues |
| 11 | * <hg_lu@web.de> in 2001, with enhancements by Christoph Bartelmus |
| 12 | * <lirc@bartelmus.de>, Andrew Calkin <r_tay@hotmail.com> and James Edwards |
| 13 | * <jimbo-lirc@edwardsclan.net>. |
| 14 | * |
| 15 | * The lirc_ite8709 driver was written by Grégory Lardière |
| 16 | * <spmf2004-lirc@yahoo.fr> in 2008. |
| 17 | */ |
| 18 | |
| 19 | #include <linux/kernel.h> |
| 20 | #include <linux/module.h> |
| 21 | #include <linux/pnp.h> |
| 22 | #include <linux/io.h> |
| 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/sched.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/slab.h> |
| 27 | #include <linux/input.h> |
| 28 | #include <linux/bitops.h> |
| 29 | #include <media/rc-core.h> |
| 30 | #include <linux/pci_ids.h> |
| 31 | |
| 32 | #include "ite-cir.h" |
| 33 | |
| 34 | /* module parameters */ |
| 35 | |
| 36 | /* debug level */ |
| 37 | static int debug; |
| 38 | module_param(debug, int, S_IRUGO | S_IWUSR); |
| 39 | MODULE_PARM_DESC(debug, "Enable debugging output"); |
| 40 | |
| 41 | /* low limit for RX carrier freq, Hz, 0 for no RX demodulation */ |
| 42 | static int rx_low_carrier_freq; |
| 43 | module_param(rx_low_carrier_freq, int, S_IRUGO | S_IWUSR); |
| 44 | MODULE_PARM_DESC(rx_low_carrier_freq, "Override low RX carrier frequency, Hz, 0 for no RX demodulation"); |
| 45 | |
| 46 | /* high limit for RX carrier freq, Hz, 0 for no RX demodulation */ |
| 47 | static int rx_high_carrier_freq; |
| 48 | module_param(rx_high_carrier_freq, int, S_IRUGO | S_IWUSR); |
| 49 | MODULE_PARM_DESC(rx_high_carrier_freq, "Override high RX carrier frequency, Hz, 0 for no RX demodulation"); |
| 50 | |
| 51 | /* override tx carrier frequency */ |
| 52 | static int tx_carrier_freq; |
| 53 | module_param(tx_carrier_freq, int, S_IRUGO | S_IWUSR); |
| 54 | MODULE_PARM_DESC(tx_carrier_freq, "Override TX carrier frequency, Hz"); |
| 55 | |
| 56 | /* override tx duty cycle */ |
| 57 | static int tx_duty_cycle; |
| 58 | module_param(tx_duty_cycle, int, S_IRUGO | S_IWUSR); |
| 59 | MODULE_PARM_DESC(tx_duty_cycle, "Override TX duty cycle, 1-100"); |
| 60 | |
| 61 | /* override default sample period */ |
| 62 | static long sample_period; |
| 63 | module_param(sample_period, long, S_IRUGO | S_IWUSR); |
| 64 | MODULE_PARM_DESC(sample_period, "Override carrier sample period, us"); |
| 65 | |
| 66 | /* override detected model id */ |
| 67 | static int model_number = -1; |
| 68 | module_param(model_number, int, S_IRUGO | S_IWUSR); |
| 69 | MODULE_PARM_DESC(model_number, "Use this model number, don't autodetect"); |
| 70 | |
| 71 | |
| 72 | /* HW-independent code functions */ |
| 73 | |
| 74 | /* check whether carrier frequency is high frequency */ |
| 75 | static inline bool ite_is_high_carrier_freq(unsigned int freq) |
| 76 | { |
| 77 | return freq >= ITE_HCF_MIN_CARRIER_FREQ; |
| 78 | } |
| 79 | |
| 80 | /* get the bits required to program the carrier frequency in CFQ bits, |
| 81 | * unshifted */ |
| 82 | static u8 ite_get_carrier_freq_bits(unsigned int freq) |
| 83 | { |
| 84 | if (ite_is_high_carrier_freq(freq)) { |
| 85 | if (freq < 425000) |
| 86 | return ITE_CFQ_400; |
| 87 | |
| 88 | else if (freq < 465000) |
| 89 | return ITE_CFQ_450; |
| 90 | |
| 91 | else if (freq < 490000) |
| 92 | return ITE_CFQ_480; |
| 93 | |
| 94 | else |
| 95 | return ITE_CFQ_500; |
| 96 | } else { |
| 97 | /* trim to limits */ |
| 98 | if (freq < ITE_LCF_MIN_CARRIER_FREQ) |
| 99 | freq = ITE_LCF_MIN_CARRIER_FREQ; |
| 100 | if (freq > ITE_LCF_MAX_CARRIER_FREQ) |
| 101 | freq = ITE_LCF_MAX_CARRIER_FREQ; |
| 102 | |
| 103 | /* convert to kHz and subtract the base freq */ |
| 104 | freq = |
| 105 | DIV_ROUND_CLOSEST(freq - ITE_LCF_MIN_CARRIER_FREQ, |
| 106 | 1000); |
| 107 | |
| 108 | return (u8) freq; |
| 109 | } |
| 110 | } |
| 111 | |
| 112 | /* get the bits required to program the pulse with in TXMPW */ |
| 113 | static u8 ite_get_pulse_width_bits(unsigned int freq, int duty_cycle) |
| 114 | { |
| 115 | unsigned long period_ns, on_ns; |
| 116 | |
| 117 | /* sanitize freq into range */ |
| 118 | if (freq < ITE_LCF_MIN_CARRIER_FREQ) |
| 119 | freq = ITE_LCF_MIN_CARRIER_FREQ; |
| 120 | if (freq > ITE_HCF_MAX_CARRIER_FREQ) |
| 121 | freq = ITE_HCF_MAX_CARRIER_FREQ; |
| 122 | |
| 123 | period_ns = 1000000000UL / freq; |
| 124 | on_ns = period_ns * duty_cycle / 100; |
| 125 | |
| 126 | if (ite_is_high_carrier_freq(freq)) { |
| 127 | if (on_ns < 750) |
| 128 | return ITE_TXMPW_A; |
| 129 | |
| 130 | else if (on_ns < 850) |
| 131 | return ITE_TXMPW_B; |
| 132 | |
| 133 | else if (on_ns < 950) |
| 134 | return ITE_TXMPW_C; |
| 135 | |
| 136 | else if (on_ns < 1080) |
| 137 | return ITE_TXMPW_D; |
| 138 | |
| 139 | else |
| 140 | return ITE_TXMPW_E; |
| 141 | } else { |
| 142 | if (on_ns < 6500) |
| 143 | return ITE_TXMPW_A; |
| 144 | |
| 145 | else if (on_ns < 7850) |
| 146 | return ITE_TXMPW_B; |
| 147 | |
| 148 | else if (on_ns < 9650) |
| 149 | return ITE_TXMPW_C; |
| 150 | |
| 151 | else if (on_ns < 11950) |
| 152 | return ITE_TXMPW_D; |
| 153 | |
| 154 | else |
| 155 | return ITE_TXMPW_E; |
| 156 | } |
| 157 | } |
| 158 | |
| 159 | /* decode raw bytes as received by the hardware, and push them to the ir-core |
| 160 | * layer */ |
| 161 | static void ite_decode_bytes(struct ite_dev *dev, const u8 * data, int |
| 162 | length) |
| 163 | { |
| 164 | u32 sample_period; |
| 165 | unsigned long *ldata; |
| 166 | unsigned int next_one, next_zero, size; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 167 | struct ir_raw_event ev = {}; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 168 | |
| 169 | if (length == 0) |
| 170 | return; |
| 171 | |
| 172 | sample_period = dev->params.sample_period; |
| 173 | ldata = (unsigned long *)data; |
| 174 | size = length << 3; |
| 175 | next_one = find_next_bit_le(ldata, size, 0); |
| 176 | if (next_one > 0) { |
| 177 | ev.pulse = true; |
| 178 | ev.duration = |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 179 | ITE_BITS_TO_US(next_one, sample_period); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 180 | ir_raw_event_store_with_filter(dev->rdev, &ev); |
| 181 | } |
| 182 | |
| 183 | while (next_one < size) { |
| 184 | next_zero = find_next_zero_bit_le(ldata, size, next_one + 1); |
| 185 | ev.pulse = false; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 186 | ev.duration = ITE_BITS_TO_US(next_zero - next_one, sample_period); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 187 | ir_raw_event_store_with_filter(dev->rdev, &ev); |
| 188 | |
| 189 | if (next_zero < size) { |
| 190 | next_one = |
| 191 | find_next_bit_le(ldata, |
| 192 | size, |
| 193 | next_zero + 1); |
| 194 | ev.pulse = true; |
| 195 | ev.duration = |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 196 | ITE_BITS_TO_US(next_one - next_zero, |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 197 | sample_period); |
| 198 | ir_raw_event_store_with_filter |
| 199 | (dev->rdev, &ev); |
| 200 | } else |
| 201 | next_one = size; |
| 202 | } |
| 203 | |
| 204 | ir_raw_event_handle(dev->rdev); |
| 205 | |
| 206 | ite_dbg_verbose("decoded %d bytes.", length); |
| 207 | } |
| 208 | |
| 209 | /* set all the rx/tx carrier parameters; this must be called with the device |
| 210 | * spinlock held */ |
| 211 | static void ite_set_carrier_params(struct ite_dev *dev) |
| 212 | { |
| 213 | unsigned int freq, low_freq, high_freq; |
| 214 | int allowance; |
| 215 | bool use_demodulator; |
| 216 | bool for_tx = dev->transmitting; |
| 217 | |
| 218 | ite_dbg("%s called", __func__); |
| 219 | |
| 220 | if (for_tx) { |
| 221 | /* we don't need no stinking calculations */ |
| 222 | freq = dev->params.tx_carrier_freq; |
| 223 | allowance = ITE_RXDCR_DEFAULT; |
| 224 | use_demodulator = false; |
| 225 | } else { |
| 226 | low_freq = dev->params.rx_low_carrier_freq; |
| 227 | high_freq = dev->params.rx_high_carrier_freq; |
| 228 | |
| 229 | if (low_freq == 0) { |
| 230 | /* don't demodulate */ |
| 231 | freq = |
| 232 | ITE_DEFAULT_CARRIER_FREQ; |
| 233 | allowance = ITE_RXDCR_DEFAULT; |
| 234 | use_demodulator = false; |
| 235 | } else { |
| 236 | /* calculate the middle freq */ |
| 237 | freq = (low_freq + high_freq) / 2; |
| 238 | |
| 239 | /* calculate the allowance */ |
| 240 | allowance = |
| 241 | DIV_ROUND_CLOSEST(10000 * (high_freq - low_freq), |
| 242 | ITE_RXDCR_PER_10000_STEP |
| 243 | * (high_freq + low_freq)); |
| 244 | |
| 245 | if (allowance < 1) |
| 246 | allowance = 1; |
| 247 | |
| 248 | if (allowance > ITE_RXDCR_MAX) |
| 249 | allowance = ITE_RXDCR_MAX; |
| 250 | |
| 251 | use_demodulator = true; |
| 252 | } |
| 253 | } |
| 254 | |
| 255 | /* set the carrier parameters in a device-dependent way */ |
| 256 | dev->params.set_carrier_params(dev, ite_is_high_carrier_freq(freq), |
| 257 | use_demodulator, ite_get_carrier_freq_bits(freq), allowance, |
| 258 | ite_get_pulse_width_bits(freq, dev->params.tx_duty_cycle)); |
| 259 | } |
| 260 | |
| 261 | /* interrupt service routine for incoming and outgoing CIR data */ |
| 262 | static irqreturn_t ite_cir_isr(int irq, void *data) |
| 263 | { |
| 264 | struct ite_dev *dev = data; |
| 265 | unsigned long flags; |
| 266 | irqreturn_t ret = IRQ_RETVAL(IRQ_NONE); |
| 267 | u8 rx_buf[ITE_RX_FIFO_LEN]; |
| 268 | int rx_bytes; |
| 269 | int iflags; |
| 270 | |
| 271 | ite_dbg_verbose("%s firing", __func__); |
| 272 | |
| 273 | /* grab the spinlock */ |
| 274 | spin_lock_irqsave(&dev->lock, flags); |
| 275 | |
| 276 | /* read the interrupt flags */ |
| 277 | iflags = dev->params.get_irq_causes(dev); |
| 278 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 279 | /* Check for RX overflow */ |
| 280 | if (iflags & ITE_IRQ_RX_FIFO_OVERRUN) { |
| 281 | dev_warn(&dev->rdev->dev, "receive overflow\n"); |
| 282 | ir_raw_event_reset(dev->rdev); |
| 283 | } |
| 284 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 285 | /* check for the receive interrupt */ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 286 | if (iflags & (ITE_IRQ_RX_FIFO | ITE_IRQ_RX_FIFO_OVERRUN)) { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 287 | /* read the FIFO bytes */ |
| 288 | rx_bytes = |
| 289 | dev->params.get_rx_bytes(dev, rx_buf, |
| 290 | ITE_RX_FIFO_LEN); |
| 291 | |
| 292 | if (rx_bytes > 0) { |
| 293 | /* drop the spinlock, since the ir-core layer |
| 294 | * may call us back again through |
| 295 | * ite_s_idle() */ |
| 296 | spin_unlock_irqrestore(&dev-> |
| 297 | lock, |
| 298 | flags); |
| 299 | |
| 300 | /* decode the data we've just received */ |
| 301 | ite_decode_bytes(dev, rx_buf, |
| 302 | rx_bytes); |
| 303 | |
| 304 | /* reacquire the spinlock */ |
| 305 | spin_lock_irqsave(&dev->lock, |
| 306 | flags); |
| 307 | |
| 308 | /* mark the interrupt as serviced */ |
| 309 | ret = IRQ_RETVAL(IRQ_HANDLED); |
| 310 | } |
| 311 | } else if (iflags & ITE_IRQ_TX_FIFO) { |
| 312 | /* FIFO space available interrupt */ |
| 313 | ite_dbg_verbose("got interrupt for TX FIFO"); |
| 314 | |
| 315 | /* wake any sleeping transmitter */ |
| 316 | wake_up_interruptible(&dev->tx_queue); |
| 317 | |
| 318 | /* mark the interrupt as serviced */ |
| 319 | ret = IRQ_RETVAL(IRQ_HANDLED); |
| 320 | } |
| 321 | |
| 322 | /* drop the spinlock */ |
| 323 | spin_unlock_irqrestore(&dev->lock, flags); |
| 324 | |
| 325 | ite_dbg_verbose("%s done returning %d", __func__, (int)ret); |
| 326 | |
| 327 | return ret; |
| 328 | } |
| 329 | |
| 330 | /* set the rx carrier freq range, guess it's in Hz... */ |
| 331 | static int ite_set_rx_carrier_range(struct rc_dev *rcdev, u32 carrier_low, u32 |
| 332 | carrier_high) |
| 333 | { |
| 334 | unsigned long flags; |
| 335 | struct ite_dev *dev = rcdev->priv; |
| 336 | |
| 337 | spin_lock_irqsave(&dev->lock, flags); |
| 338 | dev->params.rx_low_carrier_freq = carrier_low; |
| 339 | dev->params.rx_high_carrier_freq = carrier_high; |
| 340 | ite_set_carrier_params(dev); |
| 341 | spin_unlock_irqrestore(&dev->lock, flags); |
| 342 | |
| 343 | return 0; |
| 344 | } |
| 345 | |
| 346 | /* set the tx carrier freq, guess it's in Hz... */ |
| 347 | static int ite_set_tx_carrier(struct rc_dev *rcdev, u32 carrier) |
| 348 | { |
| 349 | unsigned long flags; |
| 350 | struct ite_dev *dev = rcdev->priv; |
| 351 | |
| 352 | spin_lock_irqsave(&dev->lock, flags); |
| 353 | dev->params.tx_carrier_freq = carrier; |
| 354 | ite_set_carrier_params(dev); |
| 355 | spin_unlock_irqrestore(&dev->lock, flags); |
| 356 | |
| 357 | return 0; |
| 358 | } |
| 359 | |
| 360 | /* set the tx duty cycle by controlling the pulse width */ |
| 361 | static int ite_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle) |
| 362 | { |
| 363 | unsigned long flags; |
| 364 | struct ite_dev *dev = rcdev->priv; |
| 365 | |
| 366 | spin_lock_irqsave(&dev->lock, flags); |
| 367 | dev->params.tx_duty_cycle = duty_cycle; |
| 368 | ite_set_carrier_params(dev); |
| 369 | spin_unlock_irqrestore(&dev->lock, flags); |
| 370 | |
| 371 | return 0; |
| 372 | } |
| 373 | |
| 374 | /* transmit out IR pulses; what you get here is a batch of alternating |
| 375 | * pulse/space/pulse/space lengths that we should write out completely through |
| 376 | * the FIFO, blocking on a full FIFO */ |
| 377 | static int ite_tx_ir(struct rc_dev *rcdev, unsigned *txbuf, unsigned n) |
| 378 | { |
| 379 | unsigned long flags; |
| 380 | struct ite_dev *dev = rcdev->priv; |
| 381 | bool is_pulse = false; |
| 382 | int remaining_us, fifo_avail, fifo_remaining, last_idx = 0; |
| 383 | int max_rle_us, next_rle_us; |
| 384 | int ret = n; |
| 385 | u8 last_sent[ITE_TX_FIFO_LEN]; |
| 386 | u8 val; |
| 387 | |
| 388 | ite_dbg("%s called", __func__); |
| 389 | |
| 390 | /* clear the array just in case */ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 391 | memset(last_sent, 0, sizeof(last_sent)); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 392 | |
| 393 | spin_lock_irqsave(&dev->lock, flags); |
| 394 | |
| 395 | /* let everybody know we're now transmitting */ |
| 396 | dev->transmitting = true; |
| 397 | |
| 398 | /* and set the carrier values for transmission */ |
| 399 | ite_set_carrier_params(dev); |
| 400 | |
| 401 | /* calculate how much time we can send in one byte */ |
| 402 | max_rle_us = |
| 403 | (ITE_BAUDRATE_DIVISOR * dev->params.sample_period * |
| 404 | ITE_TX_MAX_RLE) / 1000; |
| 405 | |
| 406 | /* disable the receiver */ |
| 407 | dev->params.disable_rx(dev); |
| 408 | |
| 409 | /* this is where we'll begin filling in the FIFO, until it's full. |
| 410 | * then we'll just activate the interrupt, wait for it to wake us up |
| 411 | * again, disable it, continue filling the FIFO... until everything |
| 412 | * has been pushed out */ |
| 413 | fifo_avail = |
| 414 | ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev); |
| 415 | |
| 416 | while (n > 0 && dev->in_use) { |
| 417 | /* transmit the next sample */ |
| 418 | is_pulse = !is_pulse; |
| 419 | remaining_us = *(txbuf++); |
| 420 | n--; |
| 421 | |
| 422 | ite_dbg("%s: %ld", |
| 423 | ((is_pulse) ? "pulse" : "space"), |
| 424 | (long int) |
| 425 | remaining_us); |
| 426 | |
| 427 | /* repeat while the pulse is non-zero length */ |
| 428 | while (remaining_us > 0 && dev->in_use) { |
| 429 | if (remaining_us > max_rle_us) |
| 430 | next_rle_us = max_rle_us; |
| 431 | |
| 432 | else |
| 433 | next_rle_us = remaining_us; |
| 434 | |
| 435 | remaining_us -= next_rle_us; |
| 436 | |
| 437 | /* check what's the length we have to pump out */ |
| 438 | val = (ITE_TX_MAX_RLE * next_rle_us) / max_rle_us; |
| 439 | |
| 440 | /* put it into the sent buffer */ |
| 441 | last_sent[last_idx++] = val; |
| 442 | last_idx &= (ITE_TX_FIFO_LEN); |
| 443 | |
| 444 | /* encode it for 7 bits */ |
| 445 | val = (val - 1) & ITE_TX_RLE_MASK; |
| 446 | |
| 447 | /* take into account pulse/space prefix */ |
| 448 | if (is_pulse) |
| 449 | val |= ITE_TX_PULSE; |
| 450 | |
| 451 | else |
| 452 | val |= ITE_TX_SPACE; |
| 453 | |
| 454 | /* |
| 455 | * if we get to 0 available, read again, just in case |
| 456 | * some other slot got freed |
| 457 | */ |
| 458 | if (fifo_avail <= 0) |
| 459 | fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev); |
| 460 | |
| 461 | /* if it's still full */ |
| 462 | if (fifo_avail <= 0) { |
| 463 | /* enable the tx interrupt */ |
| 464 | dev->params. |
| 465 | enable_tx_interrupt(dev); |
| 466 | |
| 467 | /* drop the spinlock */ |
| 468 | spin_unlock_irqrestore(&dev->lock, flags); |
| 469 | |
| 470 | /* wait for the FIFO to empty enough */ |
| 471 | wait_event_interruptible(dev->tx_queue, (fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev)) >= 8); |
| 472 | |
| 473 | /* get the spinlock again */ |
| 474 | spin_lock_irqsave(&dev->lock, flags); |
| 475 | |
| 476 | /* disable the tx interrupt again. */ |
| 477 | dev->params. |
| 478 | disable_tx_interrupt(dev); |
| 479 | } |
| 480 | |
| 481 | /* now send the byte through the FIFO */ |
| 482 | dev->params.put_tx_byte(dev, val); |
| 483 | fifo_avail--; |
| 484 | } |
| 485 | } |
| 486 | |
| 487 | /* wait and don't return until the whole FIFO has been sent out; |
| 488 | * otherwise we could configure the RX carrier params instead of the |
| 489 | * TX ones while the transmission is still being performed! */ |
| 490 | fifo_remaining = dev->params.get_tx_used_slots(dev); |
| 491 | remaining_us = 0; |
| 492 | while (fifo_remaining > 0) { |
| 493 | fifo_remaining--; |
| 494 | last_idx--; |
| 495 | last_idx &= (ITE_TX_FIFO_LEN - 1); |
| 496 | remaining_us += last_sent[last_idx]; |
| 497 | } |
| 498 | remaining_us = (remaining_us * max_rle_us) / (ITE_TX_MAX_RLE); |
| 499 | |
| 500 | /* drop the spinlock while we sleep */ |
| 501 | spin_unlock_irqrestore(&dev->lock, flags); |
| 502 | |
| 503 | /* sleep remaining_us microseconds */ |
| 504 | mdelay(DIV_ROUND_UP(remaining_us, 1000)); |
| 505 | |
| 506 | /* reacquire the spinlock */ |
| 507 | spin_lock_irqsave(&dev->lock, flags); |
| 508 | |
| 509 | /* now we're not transmitting anymore */ |
| 510 | dev->transmitting = false; |
| 511 | |
| 512 | /* and set the carrier values for reception */ |
| 513 | ite_set_carrier_params(dev); |
| 514 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 515 | /* re-enable the receiver */ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 516 | if (dev->in_use) |
| 517 | dev->params.enable_rx(dev); |
| 518 | |
| 519 | /* notify transmission end */ |
| 520 | wake_up_interruptible(&dev->tx_ended); |
| 521 | |
| 522 | spin_unlock_irqrestore(&dev->lock, flags); |
| 523 | |
| 524 | return ret; |
| 525 | } |
| 526 | |
| 527 | /* idle the receiver if needed */ |
| 528 | static void ite_s_idle(struct rc_dev *rcdev, bool enable) |
| 529 | { |
| 530 | unsigned long flags; |
| 531 | struct ite_dev *dev = rcdev->priv; |
| 532 | |
| 533 | ite_dbg("%s called", __func__); |
| 534 | |
| 535 | if (enable) { |
| 536 | spin_lock_irqsave(&dev->lock, flags); |
| 537 | dev->params.idle_rx(dev); |
| 538 | spin_unlock_irqrestore(&dev->lock, flags); |
| 539 | } |
| 540 | } |
| 541 | |
| 542 | |
| 543 | /* IT8712F HW-specific functions */ |
| 544 | |
| 545 | /* retrieve a bitmask of the current causes for a pending interrupt; this may |
| 546 | * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN |
| 547 | * */ |
| 548 | static int it87_get_irq_causes(struct ite_dev *dev) |
| 549 | { |
| 550 | u8 iflags; |
| 551 | int ret = 0; |
| 552 | |
| 553 | ite_dbg("%s called", __func__); |
| 554 | |
| 555 | /* read the interrupt flags */ |
| 556 | iflags = inb(dev->cir_addr + IT87_IIR) & IT87_II; |
| 557 | |
| 558 | switch (iflags) { |
| 559 | case IT87_II_RXDS: |
| 560 | ret = ITE_IRQ_RX_FIFO; |
| 561 | break; |
| 562 | case IT87_II_RXFO: |
| 563 | ret = ITE_IRQ_RX_FIFO_OVERRUN; |
| 564 | break; |
| 565 | case IT87_II_TXLDL: |
| 566 | ret = ITE_IRQ_TX_FIFO; |
| 567 | break; |
| 568 | } |
| 569 | |
| 570 | return ret; |
| 571 | } |
| 572 | |
| 573 | /* set the carrier parameters; to be called with the spinlock held */ |
| 574 | static void it87_set_carrier_params(struct ite_dev *dev, bool high_freq, |
| 575 | bool use_demodulator, |
| 576 | u8 carrier_freq_bits, u8 allowance_bits, |
| 577 | u8 pulse_width_bits) |
| 578 | { |
| 579 | u8 val; |
| 580 | |
| 581 | ite_dbg("%s called", __func__); |
| 582 | |
| 583 | /* program the RCR register */ |
| 584 | val = inb(dev->cir_addr + IT87_RCR) |
| 585 | & ~(IT87_HCFS | IT87_RXEND | IT87_RXDCR); |
| 586 | |
| 587 | if (high_freq) |
| 588 | val |= IT87_HCFS; |
| 589 | |
| 590 | if (use_demodulator) |
| 591 | val |= IT87_RXEND; |
| 592 | |
| 593 | val |= allowance_bits; |
| 594 | |
| 595 | outb(val, dev->cir_addr + IT87_RCR); |
| 596 | |
| 597 | /* program the TCR2 register */ |
| 598 | outb((carrier_freq_bits << IT87_CFQ_SHIFT) | pulse_width_bits, |
| 599 | dev->cir_addr + IT87_TCR2); |
| 600 | } |
| 601 | |
| 602 | /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock |
| 603 | * held */ |
| 604 | static int it87_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size) |
| 605 | { |
| 606 | int fifo, read = 0; |
| 607 | |
| 608 | ite_dbg("%s called", __func__); |
| 609 | |
| 610 | /* read how many bytes are still in the FIFO */ |
| 611 | fifo = inb(dev->cir_addr + IT87_RSR) & IT87_RXFBC; |
| 612 | |
| 613 | while (fifo > 0 && buf_size > 0) { |
| 614 | *(buf++) = inb(dev->cir_addr + IT87_DR); |
| 615 | fifo--; |
| 616 | read++; |
| 617 | buf_size--; |
| 618 | } |
| 619 | |
| 620 | return read; |
| 621 | } |
| 622 | |
| 623 | /* return how many bytes are still in the FIFO; this will be called |
| 624 | * with the device spinlock NOT HELD while waiting for the TX FIFO to get |
| 625 | * empty; let's expect this won't be a problem */ |
| 626 | static int it87_get_tx_used_slots(struct ite_dev *dev) |
| 627 | { |
| 628 | ite_dbg("%s called", __func__); |
| 629 | |
| 630 | return inb(dev->cir_addr + IT87_TSR) & IT87_TXFBC; |
| 631 | } |
| 632 | |
| 633 | /* put a byte to the TX fifo; this should be called with the spinlock held */ |
| 634 | static void it87_put_tx_byte(struct ite_dev *dev, u8 value) |
| 635 | { |
| 636 | outb(value, dev->cir_addr + IT87_DR); |
| 637 | } |
| 638 | |
| 639 | /* idle the receiver so that we won't receive samples until another |
| 640 | pulse is detected; this must be called with the device spinlock held */ |
| 641 | static void it87_idle_rx(struct ite_dev *dev) |
| 642 | { |
| 643 | ite_dbg("%s called", __func__); |
| 644 | |
| 645 | /* disable streaming by clearing RXACT writing it as 1 */ |
| 646 | outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXACT, |
| 647 | dev->cir_addr + IT87_RCR); |
| 648 | |
| 649 | /* clear the FIFO */ |
| 650 | outb(inb(dev->cir_addr + IT87_TCR1) | IT87_FIFOCLR, |
| 651 | dev->cir_addr + IT87_TCR1); |
| 652 | } |
| 653 | |
| 654 | /* disable the receiver; this must be called with the device spinlock held */ |
| 655 | static void it87_disable_rx(struct ite_dev *dev) |
| 656 | { |
| 657 | ite_dbg("%s called", __func__); |
| 658 | |
| 659 | /* disable the receiver interrupts */ |
| 660 | outb(inb(dev->cir_addr + IT87_IER) & ~(IT87_RDAIE | IT87_RFOIE), |
| 661 | dev->cir_addr + IT87_IER); |
| 662 | |
| 663 | /* disable the receiver */ |
| 664 | outb(inb(dev->cir_addr + IT87_RCR) & ~IT87_RXEN, |
| 665 | dev->cir_addr + IT87_RCR); |
| 666 | |
| 667 | /* clear the FIFO and RXACT (actually RXACT should have been cleared |
| 668 | * in the previous outb() call) */ |
| 669 | it87_idle_rx(dev); |
| 670 | } |
| 671 | |
| 672 | /* enable the receiver; this must be called with the device spinlock held */ |
| 673 | static void it87_enable_rx(struct ite_dev *dev) |
| 674 | { |
| 675 | ite_dbg("%s called", __func__); |
| 676 | |
| 677 | /* enable the receiver by setting RXEN */ |
| 678 | outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXEN, |
| 679 | dev->cir_addr + IT87_RCR); |
| 680 | |
| 681 | /* just prepare it to idle for the next reception */ |
| 682 | it87_idle_rx(dev); |
| 683 | |
| 684 | /* enable the receiver interrupts and master enable flag */ |
| 685 | outb(inb(dev->cir_addr + IT87_IER) | IT87_RDAIE | IT87_RFOIE | IT87_IEC, |
| 686 | dev->cir_addr + IT87_IER); |
| 687 | } |
| 688 | |
| 689 | /* disable the transmitter interrupt; this must be called with the device |
| 690 | * spinlock held */ |
| 691 | static void it87_disable_tx_interrupt(struct ite_dev *dev) |
| 692 | { |
| 693 | ite_dbg("%s called", __func__); |
| 694 | |
| 695 | /* disable the transmitter interrupts */ |
| 696 | outb(inb(dev->cir_addr + IT87_IER) & ~IT87_TLDLIE, |
| 697 | dev->cir_addr + IT87_IER); |
| 698 | } |
| 699 | |
| 700 | /* enable the transmitter interrupt; this must be called with the device |
| 701 | * spinlock held */ |
| 702 | static void it87_enable_tx_interrupt(struct ite_dev *dev) |
| 703 | { |
| 704 | ite_dbg("%s called", __func__); |
| 705 | |
| 706 | /* enable the transmitter interrupts and master enable flag */ |
| 707 | outb(inb(dev->cir_addr + IT87_IER) | IT87_TLDLIE | IT87_IEC, |
| 708 | dev->cir_addr + IT87_IER); |
| 709 | } |
| 710 | |
| 711 | /* disable the device; this must be called with the device spinlock held */ |
| 712 | static void it87_disable(struct ite_dev *dev) |
| 713 | { |
| 714 | ite_dbg("%s called", __func__); |
| 715 | |
| 716 | /* clear out all interrupt enable flags */ |
| 717 | outb(inb(dev->cir_addr + IT87_IER) & |
| 718 | ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE), |
| 719 | dev->cir_addr + IT87_IER); |
| 720 | |
| 721 | /* disable the receiver */ |
| 722 | it87_disable_rx(dev); |
| 723 | |
| 724 | /* erase the FIFO */ |
| 725 | outb(IT87_FIFOCLR | inb(dev->cir_addr + IT87_TCR1), |
| 726 | dev->cir_addr + IT87_TCR1); |
| 727 | } |
| 728 | |
| 729 | /* initialize the hardware */ |
| 730 | static void it87_init_hardware(struct ite_dev *dev) |
| 731 | { |
| 732 | ite_dbg("%s called", __func__); |
| 733 | |
| 734 | /* enable just the baud rate divisor register, |
| 735 | disabling all the interrupts at the same time */ |
| 736 | outb((inb(dev->cir_addr + IT87_IER) & |
| 737 | ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE)) | IT87_BR, |
| 738 | dev->cir_addr + IT87_IER); |
| 739 | |
| 740 | /* write out the baud rate divisor */ |
| 741 | outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT87_BDLR); |
| 742 | outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, dev->cir_addr + IT87_BDHR); |
| 743 | |
| 744 | /* disable the baud rate divisor register again */ |
| 745 | outb(inb(dev->cir_addr + IT87_IER) & ~IT87_BR, |
| 746 | dev->cir_addr + IT87_IER); |
| 747 | |
| 748 | /* program the RCR register defaults */ |
| 749 | outb(ITE_RXDCR_DEFAULT, dev->cir_addr + IT87_RCR); |
| 750 | |
| 751 | /* program the TCR1 register */ |
| 752 | outb(IT87_TXMPM_DEFAULT | IT87_TXENDF | IT87_TXRLE |
| 753 | | IT87_FIFOTL_DEFAULT | IT87_FIFOCLR, |
| 754 | dev->cir_addr + IT87_TCR1); |
| 755 | |
| 756 | /* program the carrier parameters */ |
| 757 | ite_set_carrier_params(dev); |
| 758 | } |
| 759 | |
| 760 | /* IT8512F on ITE8708 HW-specific functions */ |
| 761 | |
| 762 | /* retrieve a bitmask of the current causes for a pending interrupt; this may |
| 763 | * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN |
| 764 | * */ |
| 765 | static int it8708_get_irq_causes(struct ite_dev *dev) |
| 766 | { |
| 767 | u8 iflags; |
| 768 | int ret = 0; |
| 769 | |
| 770 | ite_dbg("%s called", __func__); |
| 771 | |
| 772 | /* read the interrupt flags */ |
| 773 | iflags = inb(dev->cir_addr + IT8708_C0IIR); |
| 774 | |
| 775 | if (iflags & IT85_TLDLI) |
| 776 | ret |= ITE_IRQ_TX_FIFO; |
| 777 | if (iflags & IT85_RDAI) |
| 778 | ret |= ITE_IRQ_RX_FIFO; |
| 779 | if (iflags & IT85_RFOI) |
| 780 | ret |= ITE_IRQ_RX_FIFO_OVERRUN; |
| 781 | |
| 782 | return ret; |
| 783 | } |
| 784 | |
| 785 | /* set the carrier parameters; to be called with the spinlock held */ |
| 786 | static void it8708_set_carrier_params(struct ite_dev *dev, bool high_freq, |
| 787 | bool use_demodulator, |
| 788 | u8 carrier_freq_bits, u8 allowance_bits, |
| 789 | u8 pulse_width_bits) |
| 790 | { |
| 791 | u8 val; |
| 792 | |
| 793 | ite_dbg("%s called", __func__); |
| 794 | |
| 795 | /* program the C0CFR register, with HRAE=1 */ |
| 796 | outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE, |
| 797 | dev->cir_addr + IT8708_BANKSEL); |
| 798 | |
| 799 | val = (inb(dev->cir_addr + IT8708_C0CFR) |
| 800 | & ~(IT85_HCFS | IT85_CFQ)) | carrier_freq_bits; |
| 801 | |
| 802 | if (high_freq) |
| 803 | val |= IT85_HCFS; |
| 804 | |
| 805 | outb(val, dev->cir_addr + IT8708_C0CFR); |
| 806 | |
| 807 | outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE, |
| 808 | dev->cir_addr + IT8708_BANKSEL); |
| 809 | |
| 810 | /* program the C0RCR register */ |
| 811 | val = inb(dev->cir_addr + IT8708_C0RCR) |
| 812 | & ~(IT85_RXEND | IT85_RXDCR); |
| 813 | |
| 814 | if (use_demodulator) |
| 815 | val |= IT85_RXEND; |
| 816 | |
| 817 | val |= allowance_bits; |
| 818 | |
| 819 | outb(val, dev->cir_addr + IT8708_C0RCR); |
| 820 | |
| 821 | /* program the C0TCR register */ |
| 822 | val = inb(dev->cir_addr + IT8708_C0TCR) & ~IT85_TXMPW; |
| 823 | val |= pulse_width_bits; |
| 824 | outb(val, dev->cir_addr + IT8708_C0TCR); |
| 825 | } |
| 826 | |
| 827 | /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock |
| 828 | * held */ |
| 829 | static int it8708_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size) |
| 830 | { |
| 831 | int fifo, read = 0; |
| 832 | |
| 833 | ite_dbg("%s called", __func__); |
| 834 | |
| 835 | /* read how many bytes are still in the FIFO */ |
| 836 | fifo = inb(dev->cir_addr + IT8708_C0RFSR) & IT85_RXFBC; |
| 837 | |
| 838 | while (fifo > 0 && buf_size > 0) { |
| 839 | *(buf++) = inb(dev->cir_addr + IT8708_C0DR); |
| 840 | fifo--; |
| 841 | read++; |
| 842 | buf_size--; |
| 843 | } |
| 844 | |
| 845 | return read; |
| 846 | } |
| 847 | |
| 848 | /* return how many bytes are still in the FIFO; this will be called |
| 849 | * with the device spinlock NOT HELD while waiting for the TX FIFO to get |
| 850 | * empty; let's expect this won't be a problem */ |
| 851 | static int it8708_get_tx_used_slots(struct ite_dev *dev) |
| 852 | { |
| 853 | ite_dbg("%s called", __func__); |
| 854 | |
| 855 | return inb(dev->cir_addr + IT8708_C0TFSR) & IT85_TXFBC; |
| 856 | } |
| 857 | |
| 858 | /* put a byte to the TX fifo; this should be called with the spinlock held */ |
| 859 | static void it8708_put_tx_byte(struct ite_dev *dev, u8 value) |
| 860 | { |
| 861 | outb(value, dev->cir_addr + IT8708_C0DR); |
| 862 | } |
| 863 | |
| 864 | /* idle the receiver so that we won't receive samples until another |
| 865 | pulse is detected; this must be called with the device spinlock held */ |
| 866 | static void it8708_idle_rx(struct ite_dev *dev) |
| 867 | { |
| 868 | ite_dbg("%s called", __func__); |
| 869 | |
| 870 | /* disable streaming by clearing RXACT writing it as 1 */ |
| 871 | outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXACT, |
| 872 | dev->cir_addr + IT8708_C0RCR); |
| 873 | |
| 874 | /* clear the FIFO */ |
| 875 | outb(inb(dev->cir_addr + IT8708_C0MSTCR) | IT85_FIFOCLR, |
| 876 | dev->cir_addr + IT8708_C0MSTCR); |
| 877 | } |
| 878 | |
| 879 | /* disable the receiver; this must be called with the device spinlock held */ |
| 880 | static void it8708_disable_rx(struct ite_dev *dev) |
| 881 | { |
| 882 | ite_dbg("%s called", __func__); |
| 883 | |
| 884 | /* disable the receiver interrupts */ |
| 885 | outb(inb(dev->cir_addr + IT8708_C0IER) & |
| 886 | ~(IT85_RDAIE | IT85_RFOIE), |
| 887 | dev->cir_addr + IT8708_C0IER); |
| 888 | |
| 889 | /* disable the receiver */ |
| 890 | outb(inb(dev->cir_addr + IT8708_C0RCR) & ~IT85_RXEN, |
| 891 | dev->cir_addr + IT8708_C0RCR); |
| 892 | |
| 893 | /* clear the FIFO and RXACT (actually RXACT should have been cleared |
| 894 | * in the previous outb() call) */ |
| 895 | it8708_idle_rx(dev); |
| 896 | } |
| 897 | |
| 898 | /* enable the receiver; this must be called with the device spinlock held */ |
| 899 | static void it8708_enable_rx(struct ite_dev *dev) |
| 900 | { |
| 901 | ite_dbg("%s called", __func__); |
| 902 | |
| 903 | /* enable the receiver by setting RXEN */ |
| 904 | outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXEN, |
| 905 | dev->cir_addr + IT8708_C0RCR); |
| 906 | |
| 907 | /* just prepare it to idle for the next reception */ |
| 908 | it8708_idle_rx(dev); |
| 909 | |
| 910 | /* enable the receiver interrupts and master enable flag */ |
| 911 | outb(inb(dev->cir_addr + IT8708_C0IER) |
| 912 | |IT85_RDAIE | IT85_RFOIE | IT85_IEC, |
| 913 | dev->cir_addr + IT8708_C0IER); |
| 914 | } |
| 915 | |
| 916 | /* disable the transmitter interrupt; this must be called with the device |
| 917 | * spinlock held */ |
| 918 | static void it8708_disable_tx_interrupt(struct ite_dev *dev) |
| 919 | { |
| 920 | ite_dbg("%s called", __func__); |
| 921 | |
| 922 | /* disable the transmitter interrupts */ |
| 923 | outb(inb(dev->cir_addr + IT8708_C0IER) & ~IT85_TLDLIE, |
| 924 | dev->cir_addr + IT8708_C0IER); |
| 925 | } |
| 926 | |
| 927 | /* enable the transmitter interrupt; this must be called with the device |
| 928 | * spinlock held */ |
| 929 | static void it8708_enable_tx_interrupt(struct ite_dev *dev) |
| 930 | { |
| 931 | ite_dbg("%s called", __func__); |
| 932 | |
| 933 | /* enable the transmitter interrupts and master enable flag */ |
| 934 | outb(inb(dev->cir_addr + IT8708_C0IER) |
| 935 | |IT85_TLDLIE | IT85_IEC, |
| 936 | dev->cir_addr + IT8708_C0IER); |
| 937 | } |
| 938 | |
| 939 | /* disable the device; this must be called with the device spinlock held */ |
| 940 | static void it8708_disable(struct ite_dev *dev) |
| 941 | { |
| 942 | ite_dbg("%s called", __func__); |
| 943 | |
| 944 | /* clear out all interrupt enable flags */ |
| 945 | outb(inb(dev->cir_addr + IT8708_C0IER) & |
| 946 | ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE), |
| 947 | dev->cir_addr + IT8708_C0IER); |
| 948 | |
| 949 | /* disable the receiver */ |
| 950 | it8708_disable_rx(dev); |
| 951 | |
| 952 | /* erase the FIFO */ |
| 953 | outb(IT85_FIFOCLR | inb(dev->cir_addr + IT8708_C0MSTCR), |
| 954 | dev->cir_addr + IT8708_C0MSTCR); |
| 955 | } |
| 956 | |
| 957 | /* initialize the hardware */ |
| 958 | static void it8708_init_hardware(struct ite_dev *dev) |
| 959 | { |
| 960 | ite_dbg("%s called", __func__); |
| 961 | |
| 962 | /* disable all the interrupts */ |
| 963 | outb(inb(dev->cir_addr + IT8708_C0IER) & |
| 964 | ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE), |
| 965 | dev->cir_addr + IT8708_C0IER); |
| 966 | |
| 967 | /* program the baud rate divisor */ |
| 968 | outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE, |
| 969 | dev->cir_addr + IT8708_BANKSEL); |
| 970 | |
| 971 | outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT8708_C0BDLR); |
| 972 | outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, |
| 973 | dev->cir_addr + IT8708_C0BDHR); |
| 974 | |
| 975 | outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE, |
| 976 | dev->cir_addr + IT8708_BANKSEL); |
| 977 | |
| 978 | /* program the C0MSTCR register defaults */ |
| 979 | outb((inb(dev->cir_addr + IT8708_C0MSTCR) & |
| 980 | ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL | |
| 981 | IT85_FIFOCLR | IT85_RESET)) | |
| 982 | IT85_FIFOTL_DEFAULT, |
| 983 | dev->cir_addr + IT8708_C0MSTCR); |
| 984 | |
| 985 | /* program the C0RCR register defaults */ |
| 986 | outb((inb(dev->cir_addr + IT8708_C0RCR) & |
| 987 | ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | |
| 988 | IT85_RXACT | IT85_RXDCR)) | |
| 989 | ITE_RXDCR_DEFAULT, |
| 990 | dev->cir_addr + IT8708_C0RCR); |
| 991 | |
| 992 | /* program the C0TCR register defaults */ |
| 993 | outb((inb(dev->cir_addr + IT8708_C0TCR) & |
| 994 | ~(IT85_TXMPM | IT85_TXMPW)) |
| 995 | |IT85_TXRLE | IT85_TXENDF | |
| 996 | IT85_TXMPM_DEFAULT | IT85_TXMPW_DEFAULT, |
| 997 | dev->cir_addr + IT8708_C0TCR); |
| 998 | |
| 999 | /* program the carrier parameters */ |
| 1000 | ite_set_carrier_params(dev); |
| 1001 | } |
| 1002 | |
| 1003 | /* IT8512F on ITE8709 HW-specific functions */ |
| 1004 | |
| 1005 | /* read a byte from the SRAM module */ |
| 1006 | static inline u8 it8709_rm(struct ite_dev *dev, int index) |
| 1007 | { |
| 1008 | outb(index, dev->cir_addr + IT8709_RAM_IDX); |
| 1009 | return inb(dev->cir_addr + IT8709_RAM_VAL); |
| 1010 | } |
| 1011 | |
| 1012 | /* write a byte to the SRAM module */ |
| 1013 | static inline void it8709_wm(struct ite_dev *dev, u8 val, int index) |
| 1014 | { |
| 1015 | outb(index, dev->cir_addr + IT8709_RAM_IDX); |
| 1016 | outb(val, dev->cir_addr + IT8709_RAM_VAL); |
| 1017 | } |
| 1018 | |
| 1019 | static void it8709_wait(struct ite_dev *dev) |
| 1020 | { |
| 1021 | int i = 0; |
| 1022 | /* |
| 1023 | * loop until device tells it's ready to continue |
| 1024 | * iterations count is usually ~750 but can sometimes achieve 13000 |
| 1025 | */ |
| 1026 | for (i = 0; i < 15000; i++) { |
| 1027 | udelay(2); |
| 1028 | if (it8709_rm(dev, IT8709_MODE) == IT8709_IDLE) |
| 1029 | break; |
| 1030 | } |
| 1031 | } |
| 1032 | |
| 1033 | /* read the value of a CIR register */ |
| 1034 | static u8 it8709_rr(struct ite_dev *dev, int index) |
| 1035 | { |
| 1036 | /* just wait in case the previous access was a write */ |
| 1037 | it8709_wait(dev); |
| 1038 | it8709_wm(dev, index, IT8709_REG_IDX); |
| 1039 | it8709_wm(dev, IT8709_READ, IT8709_MODE); |
| 1040 | |
| 1041 | /* wait for the read data to be available */ |
| 1042 | it8709_wait(dev); |
| 1043 | |
| 1044 | /* return the read value */ |
| 1045 | return it8709_rm(dev, IT8709_REG_VAL); |
| 1046 | } |
| 1047 | |
| 1048 | /* write the value of a CIR register */ |
| 1049 | static void it8709_wr(struct ite_dev *dev, u8 val, int index) |
| 1050 | { |
| 1051 | /* we wait before writing, and not afterwards, since this allows us to |
| 1052 | * pipeline the host CPU with the microcontroller */ |
| 1053 | it8709_wait(dev); |
| 1054 | it8709_wm(dev, val, IT8709_REG_VAL); |
| 1055 | it8709_wm(dev, index, IT8709_REG_IDX); |
| 1056 | it8709_wm(dev, IT8709_WRITE, IT8709_MODE); |
| 1057 | } |
| 1058 | |
| 1059 | /* retrieve a bitmask of the current causes for a pending interrupt; this may |
| 1060 | * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN |
| 1061 | * */ |
| 1062 | static int it8709_get_irq_causes(struct ite_dev *dev) |
| 1063 | { |
| 1064 | u8 iflags; |
| 1065 | int ret = 0; |
| 1066 | |
| 1067 | ite_dbg("%s called", __func__); |
| 1068 | |
| 1069 | /* read the interrupt flags */ |
| 1070 | iflags = it8709_rm(dev, IT8709_IIR); |
| 1071 | |
| 1072 | if (iflags & IT85_TLDLI) |
| 1073 | ret |= ITE_IRQ_TX_FIFO; |
| 1074 | if (iflags & IT85_RDAI) |
| 1075 | ret |= ITE_IRQ_RX_FIFO; |
| 1076 | if (iflags & IT85_RFOI) |
| 1077 | ret |= ITE_IRQ_RX_FIFO_OVERRUN; |
| 1078 | |
| 1079 | return ret; |
| 1080 | } |
| 1081 | |
| 1082 | /* set the carrier parameters; to be called with the spinlock held */ |
| 1083 | static void it8709_set_carrier_params(struct ite_dev *dev, bool high_freq, |
| 1084 | bool use_demodulator, |
| 1085 | u8 carrier_freq_bits, u8 allowance_bits, |
| 1086 | u8 pulse_width_bits) |
| 1087 | { |
| 1088 | u8 val; |
| 1089 | |
| 1090 | ite_dbg("%s called", __func__); |
| 1091 | |
| 1092 | val = (it8709_rr(dev, IT85_C0CFR) |
| 1093 | &~(IT85_HCFS | IT85_CFQ)) | |
| 1094 | carrier_freq_bits; |
| 1095 | |
| 1096 | if (high_freq) |
| 1097 | val |= IT85_HCFS; |
| 1098 | |
| 1099 | it8709_wr(dev, val, IT85_C0CFR); |
| 1100 | |
| 1101 | /* program the C0RCR register */ |
| 1102 | val = it8709_rr(dev, IT85_C0RCR) |
| 1103 | & ~(IT85_RXEND | IT85_RXDCR); |
| 1104 | |
| 1105 | if (use_demodulator) |
| 1106 | val |= IT85_RXEND; |
| 1107 | |
| 1108 | val |= allowance_bits; |
| 1109 | |
| 1110 | it8709_wr(dev, val, IT85_C0RCR); |
| 1111 | |
| 1112 | /* program the C0TCR register */ |
| 1113 | val = it8709_rr(dev, IT85_C0TCR) & ~IT85_TXMPW; |
| 1114 | val |= pulse_width_bits; |
| 1115 | it8709_wr(dev, val, IT85_C0TCR); |
| 1116 | } |
| 1117 | |
| 1118 | /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock |
| 1119 | * held */ |
| 1120 | static int it8709_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size) |
| 1121 | { |
| 1122 | int fifo, read = 0; |
| 1123 | |
| 1124 | ite_dbg("%s called", __func__); |
| 1125 | |
| 1126 | /* read how many bytes are still in the FIFO */ |
| 1127 | fifo = it8709_rm(dev, IT8709_RFSR) & IT85_RXFBC; |
| 1128 | |
| 1129 | while (fifo > 0 && buf_size > 0) { |
| 1130 | *(buf++) = it8709_rm(dev, IT8709_FIFO + read); |
| 1131 | fifo--; |
| 1132 | read++; |
| 1133 | buf_size--; |
| 1134 | } |
| 1135 | |
| 1136 | /* 'clear' the FIFO by setting the writing index to 0; this is |
| 1137 | * completely bound to be racy, but we can't help it, since it's a |
| 1138 | * limitation of the protocol */ |
| 1139 | it8709_wm(dev, 0, IT8709_RFSR); |
| 1140 | |
| 1141 | return read; |
| 1142 | } |
| 1143 | |
| 1144 | /* return how many bytes are still in the FIFO; this will be called |
| 1145 | * with the device spinlock NOT HELD while waiting for the TX FIFO to get |
| 1146 | * empty; let's expect this won't be a problem */ |
| 1147 | static int it8709_get_tx_used_slots(struct ite_dev *dev) |
| 1148 | { |
| 1149 | ite_dbg("%s called", __func__); |
| 1150 | |
| 1151 | return it8709_rr(dev, IT85_C0TFSR) & IT85_TXFBC; |
| 1152 | } |
| 1153 | |
| 1154 | /* put a byte to the TX fifo; this should be called with the spinlock held */ |
| 1155 | static void it8709_put_tx_byte(struct ite_dev *dev, u8 value) |
| 1156 | { |
| 1157 | it8709_wr(dev, value, IT85_C0DR); |
| 1158 | } |
| 1159 | |
| 1160 | /* idle the receiver so that we won't receive samples until another |
| 1161 | pulse is detected; this must be called with the device spinlock held */ |
| 1162 | static void it8709_idle_rx(struct ite_dev *dev) |
| 1163 | { |
| 1164 | ite_dbg("%s called", __func__); |
| 1165 | |
| 1166 | /* disable streaming by clearing RXACT writing it as 1 */ |
| 1167 | it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXACT, |
| 1168 | IT85_C0RCR); |
| 1169 | |
| 1170 | /* clear the FIFO */ |
| 1171 | it8709_wr(dev, it8709_rr(dev, IT85_C0MSTCR) | IT85_FIFOCLR, |
| 1172 | IT85_C0MSTCR); |
| 1173 | } |
| 1174 | |
| 1175 | /* disable the receiver; this must be called with the device spinlock held */ |
| 1176 | static void it8709_disable_rx(struct ite_dev *dev) |
| 1177 | { |
| 1178 | ite_dbg("%s called", __func__); |
| 1179 | |
| 1180 | /* disable the receiver interrupts */ |
| 1181 | it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & |
| 1182 | ~(IT85_RDAIE | IT85_RFOIE), |
| 1183 | IT85_C0IER); |
| 1184 | |
| 1185 | /* disable the receiver */ |
| 1186 | it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) & ~IT85_RXEN, |
| 1187 | IT85_C0RCR); |
| 1188 | |
| 1189 | /* clear the FIFO and RXACT (actually RXACT should have been cleared |
| 1190 | * in the previous it8709_wr(dev, ) call) */ |
| 1191 | it8709_idle_rx(dev); |
| 1192 | } |
| 1193 | |
| 1194 | /* enable the receiver; this must be called with the device spinlock held */ |
| 1195 | static void it8709_enable_rx(struct ite_dev *dev) |
| 1196 | { |
| 1197 | ite_dbg("%s called", __func__); |
| 1198 | |
| 1199 | /* enable the receiver by setting RXEN */ |
| 1200 | it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXEN, |
| 1201 | IT85_C0RCR); |
| 1202 | |
| 1203 | /* just prepare it to idle for the next reception */ |
| 1204 | it8709_idle_rx(dev); |
| 1205 | |
| 1206 | /* enable the receiver interrupts and master enable flag */ |
| 1207 | it8709_wr(dev, it8709_rr(dev, IT85_C0IER) |
| 1208 | |IT85_RDAIE | IT85_RFOIE | IT85_IEC, |
| 1209 | IT85_C0IER); |
| 1210 | } |
| 1211 | |
| 1212 | /* disable the transmitter interrupt; this must be called with the device |
| 1213 | * spinlock held */ |
| 1214 | static void it8709_disable_tx_interrupt(struct ite_dev *dev) |
| 1215 | { |
| 1216 | ite_dbg("%s called", __func__); |
| 1217 | |
| 1218 | /* disable the transmitter interrupts */ |
| 1219 | it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & ~IT85_TLDLIE, |
| 1220 | IT85_C0IER); |
| 1221 | } |
| 1222 | |
| 1223 | /* enable the transmitter interrupt; this must be called with the device |
| 1224 | * spinlock held */ |
| 1225 | static void it8709_enable_tx_interrupt(struct ite_dev *dev) |
| 1226 | { |
| 1227 | ite_dbg("%s called", __func__); |
| 1228 | |
| 1229 | /* enable the transmitter interrupts and master enable flag */ |
| 1230 | it8709_wr(dev, it8709_rr(dev, IT85_C0IER) |
| 1231 | |IT85_TLDLIE | IT85_IEC, |
| 1232 | IT85_C0IER); |
| 1233 | } |
| 1234 | |
| 1235 | /* disable the device; this must be called with the device spinlock held */ |
| 1236 | static void it8709_disable(struct ite_dev *dev) |
| 1237 | { |
| 1238 | ite_dbg("%s called", __func__); |
| 1239 | |
| 1240 | /* clear out all interrupt enable flags */ |
| 1241 | it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & |
| 1242 | ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE), |
| 1243 | IT85_C0IER); |
| 1244 | |
| 1245 | /* disable the receiver */ |
| 1246 | it8709_disable_rx(dev); |
| 1247 | |
| 1248 | /* erase the FIFO */ |
| 1249 | it8709_wr(dev, IT85_FIFOCLR | it8709_rr(dev, IT85_C0MSTCR), |
| 1250 | IT85_C0MSTCR); |
| 1251 | } |
| 1252 | |
| 1253 | /* initialize the hardware */ |
| 1254 | static void it8709_init_hardware(struct ite_dev *dev) |
| 1255 | { |
| 1256 | ite_dbg("%s called", __func__); |
| 1257 | |
| 1258 | /* disable all the interrupts */ |
| 1259 | it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & |
| 1260 | ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE), |
| 1261 | IT85_C0IER); |
| 1262 | |
| 1263 | /* program the baud rate divisor */ |
| 1264 | it8709_wr(dev, ITE_BAUDRATE_DIVISOR & 0xff, IT85_C0BDLR); |
| 1265 | it8709_wr(dev, (ITE_BAUDRATE_DIVISOR >> 8) & 0xff, |
| 1266 | IT85_C0BDHR); |
| 1267 | |
| 1268 | /* program the C0MSTCR register defaults */ |
| 1269 | it8709_wr(dev, (it8709_rr(dev, IT85_C0MSTCR) & |
| 1270 | ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL |
| 1271 | | IT85_FIFOCLR | IT85_RESET)) | IT85_FIFOTL_DEFAULT, |
| 1272 | IT85_C0MSTCR); |
| 1273 | |
| 1274 | /* program the C0RCR register defaults */ |
| 1275 | it8709_wr(dev, (it8709_rr(dev, IT85_C0RCR) & |
| 1276 | ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | IT85_RXACT |
| 1277 | | IT85_RXDCR)) | ITE_RXDCR_DEFAULT, |
| 1278 | IT85_C0RCR); |
| 1279 | |
| 1280 | /* program the C0TCR register defaults */ |
| 1281 | it8709_wr(dev, (it8709_rr(dev, IT85_C0TCR) & ~(IT85_TXMPM | IT85_TXMPW)) |
| 1282 | | IT85_TXRLE | IT85_TXENDF | IT85_TXMPM_DEFAULT |
| 1283 | | IT85_TXMPW_DEFAULT, |
| 1284 | IT85_C0TCR); |
| 1285 | |
| 1286 | /* program the carrier parameters */ |
| 1287 | ite_set_carrier_params(dev); |
| 1288 | } |
| 1289 | |
| 1290 | |
| 1291 | /* generic hardware setup/teardown code */ |
| 1292 | |
| 1293 | /* activate the device for use */ |
| 1294 | static int ite_open(struct rc_dev *rcdev) |
| 1295 | { |
| 1296 | struct ite_dev *dev = rcdev->priv; |
| 1297 | unsigned long flags; |
| 1298 | |
| 1299 | ite_dbg("%s called", __func__); |
| 1300 | |
| 1301 | spin_lock_irqsave(&dev->lock, flags); |
| 1302 | dev->in_use = true; |
| 1303 | |
| 1304 | /* enable the receiver */ |
| 1305 | dev->params.enable_rx(dev); |
| 1306 | |
| 1307 | spin_unlock_irqrestore(&dev->lock, flags); |
| 1308 | |
| 1309 | return 0; |
| 1310 | } |
| 1311 | |
| 1312 | /* deactivate the device for use */ |
| 1313 | static void ite_close(struct rc_dev *rcdev) |
| 1314 | { |
| 1315 | struct ite_dev *dev = rcdev->priv; |
| 1316 | unsigned long flags; |
| 1317 | |
| 1318 | ite_dbg("%s called", __func__); |
| 1319 | |
| 1320 | spin_lock_irqsave(&dev->lock, flags); |
| 1321 | dev->in_use = false; |
| 1322 | |
| 1323 | /* wait for any transmission to end */ |
| 1324 | spin_unlock_irqrestore(&dev->lock, flags); |
| 1325 | wait_event_interruptible(dev->tx_ended, !dev->transmitting); |
| 1326 | spin_lock_irqsave(&dev->lock, flags); |
| 1327 | |
| 1328 | dev->params.disable(dev); |
| 1329 | |
| 1330 | spin_unlock_irqrestore(&dev->lock, flags); |
| 1331 | } |
| 1332 | |
| 1333 | /* supported models and their parameters */ |
| 1334 | static const struct ite_dev_params ite_dev_descs[] = { |
| 1335 | { /* 0: ITE8704 */ |
| 1336 | .model = "ITE8704 CIR transceiver", |
| 1337 | .io_region_size = IT87_IOREG_LENGTH, |
| 1338 | .io_rsrc_no = 0, |
| 1339 | .hw_tx_capable = true, |
| 1340 | .sample_period = (u32) (1000000000ULL / 115200), |
| 1341 | .tx_carrier_freq = 38000, |
| 1342 | .tx_duty_cycle = 33, |
| 1343 | .rx_low_carrier_freq = 0, |
| 1344 | .rx_high_carrier_freq = 0, |
| 1345 | |
| 1346 | /* operations */ |
| 1347 | .get_irq_causes = it87_get_irq_causes, |
| 1348 | .enable_rx = it87_enable_rx, |
| 1349 | .idle_rx = it87_idle_rx, |
| 1350 | .disable_rx = it87_idle_rx, |
| 1351 | .get_rx_bytes = it87_get_rx_bytes, |
| 1352 | .enable_tx_interrupt = it87_enable_tx_interrupt, |
| 1353 | .disable_tx_interrupt = it87_disable_tx_interrupt, |
| 1354 | .get_tx_used_slots = it87_get_tx_used_slots, |
| 1355 | .put_tx_byte = it87_put_tx_byte, |
| 1356 | .disable = it87_disable, |
| 1357 | .init_hardware = it87_init_hardware, |
| 1358 | .set_carrier_params = it87_set_carrier_params, |
| 1359 | }, |
| 1360 | { /* 1: ITE8713 */ |
| 1361 | .model = "ITE8713 CIR transceiver", |
| 1362 | .io_region_size = IT87_IOREG_LENGTH, |
| 1363 | .io_rsrc_no = 0, |
| 1364 | .hw_tx_capable = true, |
| 1365 | .sample_period = (u32) (1000000000ULL / 115200), |
| 1366 | .tx_carrier_freq = 38000, |
| 1367 | .tx_duty_cycle = 33, |
| 1368 | .rx_low_carrier_freq = 0, |
| 1369 | .rx_high_carrier_freq = 0, |
| 1370 | |
| 1371 | /* operations */ |
| 1372 | .get_irq_causes = it87_get_irq_causes, |
| 1373 | .enable_rx = it87_enable_rx, |
| 1374 | .idle_rx = it87_idle_rx, |
| 1375 | .disable_rx = it87_idle_rx, |
| 1376 | .get_rx_bytes = it87_get_rx_bytes, |
| 1377 | .enable_tx_interrupt = it87_enable_tx_interrupt, |
| 1378 | .disable_tx_interrupt = it87_disable_tx_interrupt, |
| 1379 | .get_tx_used_slots = it87_get_tx_used_slots, |
| 1380 | .put_tx_byte = it87_put_tx_byte, |
| 1381 | .disable = it87_disable, |
| 1382 | .init_hardware = it87_init_hardware, |
| 1383 | .set_carrier_params = it87_set_carrier_params, |
| 1384 | }, |
| 1385 | { /* 2: ITE8708 */ |
| 1386 | .model = "ITE8708 CIR transceiver", |
| 1387 | .io_region_size = IT8708_IOREG_LENGTH, |
| 1388 | .io_rsrc_no = 0, |
| 1389 | .hw_tx_capable = true, |
| 1390 | .sample_period = (u32) (1000000000ULL / 115200), |
| 1391 | .tx_carrier_freq = 38000, |
| 1392 | .tx_duty_cycle = 33, |
| 1393 | .rx_low_carrier_freq = 0, |
| 1394 | .rx_high_carrier_freq = 0, |
| 1395 | |
| 1396 | /* operations */ |
| 1397 | .get_irq_causes = it8708_get_irq_causes, |
| 1398 | .enable_rx = it8708_enable_rx, |
| 1399 | .idle_rx = it8708_idle_rx, |
| 1400 | .disable_rx = it8708_idle_rx, |
| 1401 | .get_rx_bytes = it8708_get_rx_bytes, |
| 1402 | .enable_tx_interrupt = it8708_enable_tx_interrupt, |
| 1403 | .disable_tx_interrupt = |
| 1404 | it8708_disable_tx_interrupt, |
| 1405 | .get_tx_used_slots = it8708_get_tx_used_slots, |
| 1406 | .put_tx_byte = it8708_put_tx_byte, |
| 1407 | .disable = it8708_disable, |
| 1408 | .init_hardware = it8708_init_hardware, |
| 1409 | .set_carrier_params = it8708_set_carrier_params, |
| 1410 | }, |
| 1411 | { /* 3: ITE8709 */ |
| 1412 | .model = "ITE8709 CIR transceiver", |
| 1413 | .io_region_size = IT8709_IOREG_LENGTH, |
| 1414 | .io_rsrc_no = 2, |
| 1415 | .hw_tx_capable = true, |
| 1416 | .sample_period = (u32) (1000000000ULL / 115200), |
| 1417 | .tx_carrier_freq = 38000, |
| 1418 | .tx_duty_cycle = 33, |
| 1419 | .rx_low_carrier_freq = 0, |
| 1420 | .rx_high_carrier_freq = 0, |
| 1421 | |
| 1422 | /* operations */ |
| 1423 | .get_irq_causes = it8709_get_irq_causes, |
| 1424 | .enable_rx = it8709_enable_rx, |
| 1425 | .idle_rx = it8709_idle_rx, |
| 1426 | .disable_rx = it8709_idle_rx, |
| 1427 | .get_rx_bytes = it8709_get_rx_bytes, |
| 1428 | .enable_tx_interrupt = it8709_enable_tx_interrupt, |
| 1429 | .disable_tx_interrupt = |
| 1430 | it8709_disable_tx_interrupt, |
| 1431 | .get_tx_used_slots = it8709_get_tx_used_slots, |
| 1432 | .put_tx_byte = it8709_put_tx_byte, |
| 1433 | .disable = it8709_disable, |
| 1434 | .init_hardware = it8709_init_hardware, |
| 1435 | .set_carrier_params = it8709_set_carrier_params, |
| 1436 | }, |
| 1437 | }; |
| 1438 | |
| 1439 | static const struct pnp_device_id ite_ids[] = { |
| 1440 | {"ITE8704", 0}, /* Default model */ |
| 1441 | {"ITE8713", 1}, /* CIR found in EEEBox 1501U */ |
| 1442 | {"ITE8708", 2}, /* Bridged IT8512 */ |
| 1443 | {"ITE8709", 3}, /* SRAM-Bridged IT8512 */ |
| 1444 | {"", 0}, |
| 1445 | }; |
| 1446 | |
| 1447 | /* allocate memory, probe hardware, and initialize everything */ |
| 1448 | static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id |
| 1449 | *dev_id) |
| 1450 | { |
| 1451 | const struct ite_dev_params *dev_desc = NULL; |
| 1452 | struct ite_dev *itdev = NULL; |
| 1453 | struct rc_dev *rdev = NULL; |
| 1454 | int ret = -ENOMEM; |
| 1455 | int model_no; |
| 1456 | int io_rsrc_no; |
| 1457 | |
| 1458 | ite_dbg("%s called", __func__); |
| 1459 | |
| 1460 | itdev = kzalloc(sizeof(struct ite_dev), GFP_KERNEL); |
| 1461 | if (!itdev) |
| 1462 | return ret; |
| 1463 | |
| 1464 | /* input device for IR remote (and tx) */ |
| 1465 | rdev = rc_allocate_device(RC_DRIVER_IR_RAW); |
| 1466 | if (!rdev) |
| 1467 | goto exit_free_dev_rdev; |
| 1468 | itdev->rdev = rdev; |
| 1469 | |
| 1470 | ret = -ENODEV; |
| 1471 | |
| 1472 | /* get the model number */ |
| 1473 | model_no = (int)dev_id->driver_data; |
| 1474 | ite_pr(KERN_NOTICE, "Auto-detected model: %s\n", |
| 1475 | ite_dev_descs[model_no].model); |
| 1476 | |
| 1477 | if (model_number >= 0 && model_number < ARRAY_SIZE(ite_dev_descs)) { |
| 1478 | model_no = model_number; |
| 1479 | ite_pr(KERN_NOTICE, "The model has been fixed by a module parameter."); |
| 1480 | } |
| 1481 | |
| 1482 | ite_pr(KERN_NOTICE, "Using model: %s\n", ite_dev_descs[model_no].model); |
| 1483 | |
| 1484 | /* get the description for the device */ |
| 1485 | dev_desc = &ite_dev_descs[model_no]; |
| 1486 | io_rsrc_no = dev_desc->io_rsrc_no; |
| 1487 | |
| 1488 | /* validate pnp resources */ |
| 1489 | if (!pnp_port_valid(pdev, io_rsrc_no) || |
| 1490 | pnp_port_len(pdev, io_rsrc_no) != dev_desc->io_region_size) { |
| 1491 | dev_err(&pdev->dev, "IR PNP Port not valid!\n"); |
| 1492 | goto exit_free_dev_rdev; |
| 1493 | } |
| 1494 | |
| 1495 | if (!pnp_irq_valid(pdev, 0)) { |
| 1496 | dev_err(&pdev->dev, "PNP IRQ not valid!\n"); |
| 1497 | goto exit_free_dev_rdev; |
| 1498 | } |
| 1499 | |
| 1500 | /* store resource values */ |
| 1501 | itdev->cir_addr = pnp_port_start(pdev, io_rsrc_no); |
| 1502 | itdev->cir_irq = pnp_irq(pdev, 0); |
| 1503 | |
| 1504 | /* initialize spinlocks */ |
| 1505 | spin_lock_init(&itdev->lock); |
| 1506 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1507 | /* set driver data into the pnp device */ |
| 1508 | pnp_set_drvdata(pdev, itdev); |
| 1509 | itdev->pdev = pdev; |
| 1510 | |
| 1511 | /* initialize waitqueues for transmission */ |
| 1512 | init_waitqueue_head(&itdev->tx_queue); |
| 1513 | init_waitqueue_head(&itdev->tx_ended); |
| 1514 | |
| 1515 | /* copy model-specific parameters */ |
| 1516 | itdev->params = *dev_desc; |
| 1517 | |
| 1518 | /* apply any overrides */ |
| 1519 | if (sample_period > 0) |
| 1520 | itdev->params.sample_period = sample_period; |
| 1521 | |
| 1522 | if (tx_carrier_freq > 0) |
| 1523 | itdev->params.tx_carrier_freq = tx_carrier_freq; |
| 1524 | |
| 1525 | if (tx_duty_cycle > 0 && tx_duty_cycle <= 100) |
| 1526 | itdev->params.tx_duty_cycle = tx_duty_cycle; |
| 1527 | |
| 1528 | if (rx_low_carrier_freq > 0) |
| 1529 | itdev->params.rx_low_carrier_freq = rx_low_carrier_freq; |
| 1530 | |
| 1531 | if (rx_high_carrier_freq > 0) |
| 1532 | itdev->params.rx_high_carrier_freq = rx_high_carrier_freq; |
| 1533 | |
| 1534 | /* print out parameters */ |
| 1535 | ite_pr(KERN_NOTICE, "TX-capable: %d\n", (int) |
| 1536 | itdev->params.hw_tx_capable); |
| 1537 | ite_pr(KERN_NOTICE, "Sample period (ns): %ld\n", (long) |
| 1538 | itdev->params.sample_period); |
| 1539 | ite_pr(KERN_NOTICE, "TX carrier frequency (Hz): %d\n", (int) |
| 1540 | itdev->params.tx_carrier_freq); |
| 1541 | ite_pr(KERN_NOTICE, "TX duty cycle (%%): %d\n", (int) |
| 1542 | itdev->params.tx_duty_cycle); |
| 1543 | ite_pr(KERN_NOTICE, "RX low carrier frequency (Hz): %d\n", (int) |
| 1544 | itdev->params.rx_low_carrier_freq); |
| 1545 | ite_pr(KERN_NOTICE, "RX high carrier frequency (Hz): %d\n", (int) |
| 1546 | itdev->params.rx_high_carrier_freq); |
| 1547 | |
| 1548 | /* set up hardware initial state */ |
| 1549 | itdev->params.init_hardware(itdev); |
| 1550 | |
| 1551 | /* set up ir-core props */ |
| 1552 | rdev->priv = itdev; |
| 1553 | rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; |
| 1554 | rdev->open = ite_open; |
| 1555 | rdev->close = ite_close; |
| 1556 | rdev->s_idle = ite_s_idle; |
| 1557 | rdev->s_rx_carrier_range = ite_set_rx_carrier_range; |
| 1558 | /* FIFO threshold is 17 bytes, so 17 * 8 samples minimum */ |
| 1559 | rdev->min_timeout = 17 * 8 * ITE_BAUDRATE_DIVISOR * |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 1560 | itdev->params.sample_period / 1000; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1561 | rdev->timeout = IR_DEFAULT_TIMEOUT; |
| 1562 | rdev->max_timeout = 10 * IR_DEFAULT_TIMEOUT; |
| 1563 | rdev->rx_resolution = ITE_BAUDRATE_DIVISOR * |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 1564 | itdev->params.sample_period / 1000; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1565 | rdev->tx_resolution = ITE_BAUDRATE_DIVISOR * |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 1566 | itdev->params.sample_period / 1000; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1567 | |
| 1568 | /* set up transmitter related values if needed */ |
| 1569 | if (itdev->params.hw_tx_capable) { |
| 1570 | rdev->tx_ir = ite_tx_ir; |
| 1571 | rdev->s_tx_carrier = ite_set_tx_carrier; |
| 1572 | rdev->s_tx_duty_cycle = ite_set_tx_duty_cycle; |
| 1573 | } |
| 1574 | |
| 1575 | rdev->device_name = dev_desc->model; |
| 1576 | rdev->input_id.bustype = BUS_HOST; |
| 1577 | rdev->input_id.vendor = PCI_VENDOR_ID_ITE; |
| 1578 | rdev->input_id.product = 0; |
| 1579 | rdev->input_id.version = 0; |
| 1580 | rdev->driver_name = ITE_DRIVER_NAME; |
| 1581 | rdev->map_name = RC_MAP_RC6_MCE; |
| 1582 | |
| 1583 | ret = rc_register_device(rdev); |
| 1584 | if (ret) |
| 1585 | goto exit_free_dev_rdev; |
| 1586 | |
| 1587 | ret = -EBUSY; |
| 1588 | /* now claim resources */ |
| 1589 | if (!request_region(itdev->cir_addr, |
| 1590 | dev_desc->io_region_size, ITE_DRIVER_NAME)) |
| 1591 | goto exit_unregister_device; |
| 1592 | |
| 1593 | if (request_irq(itdev->cir_irq, ite_cir_isr, IRQF_SHARED, |
| 1594 | ITE_DRIVER_NAME, (void *)itdev)) |
| 1595 | goto exit_release_cir_addr; |
| 1596 | |
| 1597 | ite_pr(KERN_NOTICE, "driver has been successfully loaded\n"); |
| 1598 | |
| 1599 | return 0; |
| 1600 | |
| 1601 | exit_release_cir_addr: |
| 1602 | release_region(itdev->cir_addr, itdev->params.io_region_size); |
| 1603 | exit_unregister_device: |
| 1604 | rc_unregister_device(rdev); |
| 1605 | rdev = NULL; |
| 1606 | exit_free_dev_rdev: |
| 1607 | rc_free_device(rdev); |
| 1608 | kfree(itdev); |
| 1609 | |
| 1610 | return ret; |
| 1611 | } |
| 1612 | |
| 1613 | static void ite_remove(struct pnp_dev *pdev) |
| 1614 | { |
| 1615 | struct ite_dev *dev = pnp_get_drvdata(pdev); |
| 1616 | unsigned long flags; |
| 1617 | |
| 1618 | ite_dbg("%s called", __func__); |
| 1619 | |
| 1620 | spin_lock_irqsave(&dev->lock, flags); |
| 1621 | |
| 1622 | /* disable hardware */ |
| 1623 | dev->params.disable(dev); |
| 1624 | |
| 1625 | spin_unlock_irqrestore(&dev->lock, flags); |
| 1626 | |
| 1627 | /* free resources */ |
| 1628 | free_irq(dev->cir_irq, dev); |
| 1629 | release_region(dev->cir_addr, dev->params.io_region_size); |
| 1630 | |
| 1631 | rc_unregister_device(dev->rdev); |
| 1632 | |
| 1633 | kfree(dev); |
| 1634 | } |
| 1635 | |
| 1636 | static int ite_suspend(struct pnp_dev *pdev, pm_message_t state) |
| 1637 | { |
| 1638 | struct ite_dev *dev = pnp_get_drvdata(pdev); |
| 1639 | unsigned long flags; |
| 1640 | |
| 1641 | ite_dbg("%s called", __func__); |
| 1642 | |
| 1643 | /* wait for any transmission to end */ |
| 1644 | wait_event_interruptible(dev->tx_ended, !dev->transmitting); |
| 1645 | |
| 1646 | spin_lock_irqsave(&dev->lock, flags); |
| 1647 | |
| 1648 | /* disable all interrupts */ |
| 1649 | dev->params.disable(dev); |
| 1650 | |
| 1651 | spin_unlock_irqrestore(&dev->lock, flags); |
| 1652 | |
| 1653 | return 0; |
| 1654 | } |
| 1655 | |
| 1656 | static int ite_resume(struct pnp_dev *pdev) |
| 1657 | { |
| 1658 | struct ite_dev *dev = pnp_get_drvdata(pdev); |
| 1659 | unsigned long flags; |
| 1660 | |
| 1661 | ite_dbg("%s called", __func__); |
| 1662 | |
| 1663 | spin_lock_irqsave(&dev->lock, flags); |
| 1664 | |
| 1665 | /* reinitialize hardware config registers */ |
| 1666 | dev->params.init_hardware(dev); |
| 1667 | /* enable the receiver */ |
| 1668 | dev->params.enable_rx(dev); |
| 1669 | |
| 1670 | spin_unlock_irqrestore(&dev->lock, flags); |
| 1671 | |
| 1672 | return 0; |
| 1673 | } |
| 1674 | |
| 1675 | static void ite_shutdown(struct pnp_dev *pdev) |
| 1676 | { |
| 1677 | struct ite_dev *dev = pnp_get_drvdata(pdev); |
| 1678 | unsigned long flags; |
| 1679 | |
| 1680 | ite_dbg("%s called", __func__); |
| 1681 | |
| 1682 | spin_lock_irqsave(&dev->lock, flags); |
| 1683 | |
| 1684 | /* disable all interrupts */ |
| 1685 | dev->params.disable(dev); |
| 1686 | |
| 1687 | spin_unlock_irqrestore(&dev->lock, flags); |
| 1688 | } |
| 1689 | |
| 1690 | static struct pnp_driver ite_driver = { |
| 1691 | .name = ITE_DRIVER_NAME, |
| 1692 | .id_table = ite_ids, |
| 1693 | .probe = ite_probe, |
| 1694 | .remove = ite_remove, |
| 1695 | .suspend = ite_suspend, |
| 1696 | .resume = ite_resume, |
| 1697 | .shutdown = ite_shutdown, |
| 1698 | }; |
| 1699 | |
| 1700 | MODULE_DEVICE_TABLE(pnp, ite_ids); |
| 1701 | MODULE_DESCRIPTION("ITE Tech Inc. IT8712F/ITE8512F CIR driver"); |
| 1702 | |
| 1703 | MODULE_AUTHOR("Juan J. Garcia de Soria <skandalfo@gmail.com>"); |
| 1704 | MODULE_LICENSE("GPL"); |
| 1705 | |
| 1706 | module_pnp_driver(ite_driver); |