David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | // |
| 3 | // Spreadtrum gate clock driver |
| 4 | // |
| 5 | // Copyright (C) 2017 Spreadtrum, Inc. |
| 6 | // Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com> |
| 7 | |
| 8 | #ifndef _SPRD_GATE_H_ |
| 9 | #define _SPRD_GATE_H_ |
| 10 | |
| 11 | #include "common.h" |
| 12 | |
| 13 | struct sprd_gate { |
| 14 | u32 enable_mask; |
| 15 | u16 flags; |
| 16 | u16 sc_offset; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 17 | u16 udelay; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 18 | |
| 19 | struct sprd_clk_common common; |
| 20 | }; |
| 21 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 22 | /* |
| 23 | * sprd_gate->flags is used for: |
| 24 | * CLK_GATE_SET_TO_DISABLE BIT(0) |
| 25 | * CLK_GATE_HIWORD_MASK BIT(1) |
| 26 | * CLK_GATE_BIG_ENDIAN BIT(2) |
| 27 | * so we define new flags from BIT(3) |
| 28 | */ |
| 29 | #define SPRD_GATE_NON_AON BIT(3) /* not alway powered on, check before read */ |
| 30 | |
| 31 | #define SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \ |
| 32 | _sc_offset, _enable_mask, _flags, \ |
| 33 | _gate_flags, _udelay, _ops, _fn) \ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 34 | struct sprd_gate _struct = { \ |
| 35 | .enable_mask = _enable_mask, \ |
| 36 | .sc_offset = _sc_offset, \ |
| 37 | .flags = _gate_flags, \ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 38 | .udelay = _udelay, \ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 39 | .common = { \ |
| 40 | .regmap = NULL, \ |
| 41 | .reg = _reg, \ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 42 | .hw.init = _fn(_name, _parent, \ |
| 43 | _ops, _flags), \ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 44 | } \ |
| 45 | } |
| 46 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 47 | #define SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \ |
| 48 | _sc_offset, _enable_mask, _flags, \ |
| 49 | _gate_flags, _udelay, _ops) \ |
| 50 | SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \ |
| 51 | _sc_offset, _enable_mask, _flags, \ |
| 52 | _gate_flags, _udelay, _ops, CLK_HW_INIT) |
| 53 | |
| 54 | #define SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset, \ |
| 55 | _enable_mask, _flags, _gate_flags, _ops) \ |
| 56 | SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \ |
| 57 | _sc_offset, _enable_mask, _flags, \ |
| 58 | _gate_flags, 0, _ops) |
| 59 | |
| 60 | #define SPRD_SC_GATE_CLK(_struct, _name, _parent, _reg, _sc_offset, \ |
| 61 | _enable_mask, _flags, _gate_flags) \ |
| 62 | SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset, \ |
| 63 | _enable_mask, _flags, _gate_flags, \ |
| 64 | &sprd_sc_gate_ops) |
| 65 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 66 | #define SPRD_GATE_CLK(_struct, _name, _parent, _reg, \ |
| 67 | _enable_mask, _flags, _gate_flags) \ |
| 68 | SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, 0, \ |
| 69 | _enable_mask, _flags, _gate_flags, \ |
| 70 | &sprd_gate_ops) |
| 71 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 72 | #define SPRD_PLL_SC_GATE_CLK(_struct, _name, _parent, _reg, _sc_offset, \ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 73 | _enable_mask, _flags, _gate_flags, \ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 74 | _udelay) \ |
| 75 | SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \ |
| 76 | _sc_offset, _enable_mask, _flags, \ |
| 77 | _gate_flags, _udelay, \ |
| 78 | &sprd_pll_sc_gate_ops) |
| 79 | |
| 80 | |
| 81 | #define SPRD_SC_GATE_CLK_HW_OPS_UDELAY(_struct, _name, _parent, _reg, \ |
| 82 | _sc_offset, _enable_mask, \ |
| 83 | _flags, _gate_flags, \ |
| 84 | _udelay, _ops) \ |
| 85 | SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \ |
| 86 | _sc_offset, _enable_mask, _flags, \ |
| 87 | _gate_flags, _udelay, _ops, \ |
| 88 | CLK_HW_INIT_HW) |
| 89 | |
| 90 | #define SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, \ |
| 91 | _sc_offset, _enable_mask, _flags, \ |
| 92 | _gate_flags, _ops) \ |
| 93 | SPRD_SC_GATE_CLK_HW_OPS_UDELAY(_struct, _name, _parent, _reg, \ |
| 94 | _sc_offset, _enable_mask, \ |
| 95 | _flags, _gate_flags, 0, _ops) |
| 96 | |
| 97 | #define SPRD_SC_GATE_CLK_HW(_struct, _name, _parent, _reg, \ |
| 98 | _sc_offset, _enable_mask, _flags, \ |
| 99 | _gate_flags) \ |
| 100 | SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, \ |
| 101 | _sc_offset, _enable_mask, _flags, \ |
| 102 | _gate_flags, &sprd_sc_gate_ops) |
| 103 | |
| 104 | #define SPRD_GATE_CLK_HW(_struct, _name, _parent, _reg, \ |
| 105 | _enable_mask, _flags, _gate_flags) \ |
| 106 | SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, 0, \ |
| 107 | _enable_mask, _flags, _gate_flags, \ |
| 108 | &sprd_gate_ops) |
| 109 | |
| 110 | #define SPRD_PLL_SC_GATE_CLK_HW(_struct, _name, _parent, _reg, \ |
| 111 | _sc_offset, _enable_mask, _flags, \ |
| 112 | _gate_flags, _udelay) \ |
| 113 | SPRD_SC_GATE_CLK_HW_OPS_UDELAY(_struct, _name, _parent, _reg, \ |
| 114 | _sc_offset, _enable_mask, \ |
| 115 | _flags, _gate_flags, _udelay, \ |
| 116 | &sprd_pll_sc_gate_ops) |
| 117 | |
| 118 | #define SPRD_SC_GATE_CLK_FW_NAME_OPS_UDELAY(_struct, _name, _parent, \ |
| 119 | _reg, _sc_offset, \ |
| 120 | _enable_mask, _flags, \ |
| 121 | _gate_flags, _udelay, _ops) \ |
| 122 | SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \ |
| 123 | _sc_offset, _enable_mask, _flags, \ |
| 124 | _gate_flags, _udelay, _ops, \ |
| 125 | CLK_HW_INIT_FW_NAME) |
| 126 | |
| 127 | #define SPRD_SC_GATE_CLK_FW_NAME_OPS(_struct, _name, _parent, _reg, \ |
| 128 | _sc_offset, _enable_mask, _flags, \ |
| 129 | _gate_flags, _ops) \ |
| 130 | SPRD_SC_GATE_CLK_FW_NAME_OPS_UDELAY(_struct, _name, _parent, \ |
| 131 | _reg, _sc_offset, \ |
| 132 | _enable_mask, _flags, \ |
| 133 | _gate_flags, 0, _ops) |
| 134 | |
| 135 | #define SPRD_SC_GATE_CLK_FW_NAME(_struct, _name, _parent, _reg, \ |
| 136 | _sc_offset, _enable_mask, _flags, \ |
| 137 | _gate_flags) \ |
| 138 | SPRD_SC_GATE_CLK_FW_NAME_OPS(_struct, _name, _parent, _reg, \ |
| 139 | _sc_offset, _enable_mask, _flags, \ |
| 140 | _gate_flags, &sprd_sc_gate_ops) |
| 141 | |
| 142 | #define SPRD_GATE_CLK_FW_NAME(_struct, _name, _parent, _reg, \ |
| 143 | _enable_mask, _flags, _gate_flags) \ |
| 144 | SPRD_SC_GATE_CLK_FW_NAME_OPS(_struct, _name, _parent, _reg, 0, \ |
| 145 | _enable_mask, _flags, _gate_flags, \ |
| 146 | &sprd_gate_ops) |
| 147 | |
| 148 | #define SPRD_PLL_SC_GATE_CLK_FW_NAME(_struct, _name, _parent, _reg, \ |
| 149 | _sc_offset, _enable_mask, _flags, \ |
| 150 | _gate_flags, _udelay) \ |
| 151 | SPRD_SC_GATE_CLK_FW_NAME_OPS_UDELAY(_struct, _name, _parent, \ |
| 152 | _reg, _sc_offset, \ |
| 153 | _enable_mask, _flags, \ |
| 154 | _gate_flags, _udelay, \ |
| 155 | &sprd_pll_sc_gate_ops) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 156 | |
| 157 | static inline struct sprd_gate *hw_to_sprd_gate(const struct clk_hw *hw) |
| 158 | { |
| 159 | struct sprd_clk_common *common = hw_to_sprd_clk_common(hw); |
| 160 | |
| 161 | return container_of(common, struct sprd_gate, common); |
| 162 | } |
| 163 | |
| 164 | extern const struct clk_ops sprd_gate_ops; |
| 165 | extern const struct clk_ops sprd_sc_gate_ops; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 166 | extern const struct clk_ops sprd_pll_sc_gate_ops; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 167 | |
| 168 | #endif /* _SPRD_GATE_H_ */ |