David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Port on Texas Instruments TMS320C6x architecture |
| 4 | * |
| 5 | * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated |
| 6 | * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 7 | */ |
| 8 | #ifndef _ASM_C6X_CACHEFLUSH_H |
| 9 | #define _ASM_C6X_CACHEFLUSH_H |
| 10 | |
| 11 | #include <linux/spinlock.h> |
| 12 | |
| 13 | #include <asm/setup.h> |
| 14 | #include <asm/cache.h> |
| 15 | #include <asm/mman.h> |
| 16 | #include <asm/page.h> |
| 17 | #include <asm/string.h> |
| 18 | |
| 19 | /* |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 20 | * physically-indexed cache management |
| 21 | */ |
| 22 | #define flush_icache_range(s, e) \ |
| 23 | do { \ |
| 24 | L1D_cache_block_writeback((s), (e)); \ |
| 25 | L1P_cache_block_invalidate((s), (e)); \ |
| 26 | } while (0) |
| 27 | |
| 28 | #define flush_icache_page(vma, page) \ |
| 29 | do { \ |
| 30 | if ((vma)->vm_flags & PROT_EXEC) \ |
| 31 | L1D_cache_block_writeback_invalidate(page_address(page), \ |
| 32 | (unsigned long) page_address(page) + PAGE_SIZE)); \ |
| 33 | L1P_cache_block_invalidate(page_address(page), \ |
| 34 | (unsigned long) page_address(page) + PAGE_SIZE)); \ |
| 35 | } while (0) |
| 36 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 37 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ |
| 38 | do { \ |
| 39 | memcpy(dst, src, len); \ |
| 40 | flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \ |
| 41 | } while (0) |
| 42 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 43 | #include <asm-generic/cacheflush.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 44 | |
| 45 | #endif /* _ASM_C6X_CACHEFLUSH_H */ |