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review.trustedfirmware.org / hafnium / third_party / linux / 0e64123141f3854e695eb4924d82b52856691466 / . / drivers / pci / controller / dwc / Kconfig
blob: 0ba988b5b5bc6901fa71c261be827a953d707e4a [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]1# SPDX-License-Identifier: GPL-2.0
2
3menu "DesignWare PCI Core Support"
4 depends on PCI
5
6config PCIE_DW
7 bool
8
9config PCIE_DW_HOST
10 bool
11 depends on PCI_MSI_IRQ_DOMAIN
12 select PCIE_DW
13
14config PCIE_DW_EP
15 bool
16 depends on PCI_ENDPOINT
17 select PCIE_DW
18
19config PCI_DRA7XX
20 bool
21
22config PCI_DRA7XX_HOST
23 bool "TI DRA7xx PCIe controller Host Mode"
24 depends on SOC_DRA7XX || COMPILE_TEST
25 depends on PCI_MSI_IRQ_DOMAIN
26 depends on OF && HAS_IOMEM && TI_PIPE3
27 select PCIE_DW_HOST
28 select PCI_DRA7XX
29 default y
30 help
31 Enables support for the PCIe controller in the DRA7xx SoC to work in
32 host mode. There are two instances of PCIe controller in DRA7xx.
33 This controller can work either as EP or RC. In order to enable
34 host-specific features PCI_DRA7XX_HOST must be selected and in order
35 to enable device-specific features PCI_DRA7XX_EP must be selected.
36 This uses the DesignWare core.
37
38config PCI_DRA7XX_EP
39 bool "TI DRA7xx PCIe controller Endpoint Mode"
40 depends on SOC_DRA7XX || COMPILE_TEST
41 depends on PCI_ENDPOINT
42 depends on OF && HAS_IOMEM && TI_PIPE3
43 select PCIE_DW_EP
44 select PCI_DRA7XX
45 help
46 Enables support for the PCIe controller in the DRA7xx SoC to work in
47 endpoint mode. There are two instances of PCIe controller in DRA7xx.
48 This controller can work either as EP or RC. In order to enable
49 host-specific features PCI_DRA7XX_HOST must be selected and in order
50 to enable device-specific features PCI_DRA7XX_EP must be selected.
51 This uses the DesignWare core.
52
53config PCIE_DW_PLAT
54 bool
55
56config PCIE_DW_PLAT_HOST
57 bool "Platform bus based DesignWare PCIe Controller - Host mode"
58 depends on PCI && PCI_MSI_IRQ_DOMAIN
59 select PCIE_DW_HOST
60 select PCIE_DW_PLAT
61 help
62 Enables support for the PCIe controller in the Designware IP to
63 work in host mode. There are two instances of PCIe controller in
64 Designware IP.
65 This controller can work either as EP or RC. In order to enable
66 host-specific features PCIE_DW_PLAT_HOST must be selected and in
67 order to enable device-specific features PCI_DW_PLAT_EP must be
68 selected.
69
70config PCIE_DW_PLAT_EP
71 bool "Platform bus based DesignWare PCIe Controller - Endpoint mode"
72 depends on PCI && PCI_MSI_IRQ_DOMAIN
73 depends on PCI_ENDPOINT
74 select PCIE_DW_EP
75 select PCIE_DW_PLAT
76 help
77 Enables support for the PCIe controller in the Designware IP to
78 work in endpoint mode. There are two instances of PCIe controller
79 in Designware IP.
80 This controller can work either as EP or RC. In order to enable
81 host-specific features PCIE_DW_PLAT_HOST must be selected and in
82 order to enable device-specific features PCI_DW_PLAT_EP must be
83 selected.
84
85config PCI_EXYNOS
86 bool "Samsung Exynos PCIe controller"
87 depends on SOC_EXYNOS5440 || COMPILE_TEST
88 depends on PCI_MSI_IRQ_DOMAIN
89 select PCIE_DW_HOST
90
91config PCI_IMX6
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame]92 bool "Freescale i.MX6/7/8 PCIe controller"
93 depends on ARCH_MXC || COMPILE_TEST
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]94 depends on PCI_MSI_IRQ_DOMAIN
95 select PCIE_DW_HOST
96
97config PCIE_SPEAR13XX
98 bool "STMicroelectronics SPEAr PCIe controller"
99 depends on ARCH_SPEAR13XX || COMPILE_TEST
100 depends on PCI_MSI_IRQ_DOMAIN
101 select PCIE_DW_HOST
102 help
103 Say Y here if you want PCIe support on SPEAr13XX SoCs.
104
105config PCI_KEYSTONE
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame]106 bool
107
108config PCI_KEYSTONE_HOST
109 bool "PCI Keystone Host Mode"
110 depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]111 depends on PCI_MSI_IRQ_DOMAIN
112 select PCIE_DW_HOST
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame]113 select PCI_KEYSTONE
114 default y
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]115 help
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame]116 Enables support for the PCIe controller in the Keystone SoC to
117 work in host mode. The PCI controller on Keystone is based on
118 DesignWare hardware and therefore the driver re-uses the
119 DesignWare core functions to implement the driver.
120
121config PCI_KEYSTONE_EP
122 bool "PCI Keystone Endpoint Mode"
123 depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
124 depends on PCI_ENDPOINT
125 select PCIE_DW_EP
126 select PCI_KEYSTONE
127 help
128 Enables support for the PCIe controller in the Keystone SoC to
129 work in endpoint mode. The PCI controller on Keystone is based
130 on DesignWare hardware and therefore the driver re-uses the
131 DesignWare core functions to implement the driver.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]132
133config PCI_LAYERSCAPE
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame]134 bool "Freescale Layerscape PCIe controller - Host mode"
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]135 depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
136 depends on PCI_MSI_IRQ_DOMAIN
137 select MFD_SYSCON
138 select PCIE_DW_HOST
139 help
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame]140 Say Y here if you want to enable PCIe controller support on Layerscape
141 SoCs to work in Host mode.
142 This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
143 determines which PCIe controller works in EP mode and which PCIe
144 controller works in RC mode.
145
146config PCI_LAYERSCAPE_EP
147 bool "Freescale Layerscape PCIe controller - Endpoint mode"
148 depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
149 depends on PCI_ENDPOINT
150 select PCIE_DW_EP
151 help
152 Say Y here if you want to enable PCIe controller support on Layerscape
153 SoCs to work in Endpoint mode.
154 This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
155 determines which PCIe controller works in EP mode and which PCIe
156 controller works in RC mode.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]157
158config PCI_HISI
159 depends on OF && (ARM64 || COMPILE_TEST)
160 bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers"
161 depends on PCI_MSI_IRQ_DOMAIN
162 select PCIE_DW_HOST
163 select PCI_HOST_COMMON
164 help
165 Say Y here if you want PCIe controller support on HiSilicon
166 Hip05 and Hip06 SoCs
167
168config PCIE_QCOM
169 bool "Qualcomm PCIe controller"
170 depends on OF && (ARCH_QCOM || COMPILE_TEST)
171 depends on PCI_MSI_IRQ_DOMAIN
172 select PCIE_DW_HOST
173 help
174 Say Y here to enable PCIe controller support on Qualcomm SoCs. The
175 PCIe controller uses the DesignWare core plus Qualcomm-specific
176 hardware wrappers.
177
178config PCIE_ARMADA_8K
179 bool "Marvell Armada-8K PCIe controller"
180 depends on ARCH_MVEBU || COMPILE_TEST
181 depends on PCI_MSI_IRQ_DOMAIN
182 select PCIE_DW_HOST
183 help
184 Say Y here if you want to enable PCIe controller support on
185 Armada-8K SoCs. The PCIe controller on Armada-8K is based on
186 DesignWare hardware and therefore the driver re-uses the
187 DesignWare core functions to implement the driver.
188
189config PCIE_ARTPEC6
190 bool
191
192config PCIE_ARTPEC6_HOST
193 bool "Axis ARTPEC-6 PCIe controller Host Mode"
194 depends on MACH_ARTPEC6 || COMPILE_TEST
195 depends on PCI_MSI_IRQ_DOMAIN
196 select PCIE_DW_HOST
197 select PCIE_ARTPEC6
198 help
199 Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
200 host mode. This uses the DesignWare core.
201
202config PCIE_ARTPEC6_EP
203 bool "Axis ARTPEC-6 PCIe controller Endpoint Mode"
204 depends on MACH_ARTPEC6 || COMPILE_TEST
205 depends on PCI_ENDPOINT
206 select PCIE_DW_EP
207 select PCIE_ARTPEC6
208 help
209 Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
210 endpoint mode. This uses the DesignWare core.
211
212config PCIE_KIRIN
213 depends on OF && (ARM64 || COMPILE_TEST)
214 bool "HiSilicon Kirin series SoCs PCIe controllers"
215 depends on PCI_MSI_IRQ_DOMAIN
216 select PCIE_DW_HOST
217 help
218 Say Y here if you want PCIe controller support
219 on HiSilicon Kirin series SoCs.
220
221config PCIE_HISI_STB
222 bool "HiSilicon STB SoCs PCIe controllers"
223 depends on ARCH_HISI || COMPILE_TEST
224 depends on PCI_MSI_IRQ_DOMAIN
225 select PCIE_DW_HOST
226 help
227 Say Y here if you want PCIe controller support on HiSilicon STB SoCs
228
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame]229config PCI_MESON
230 bool "MESON PCIe controller"
231 depends on PCI_MSI_IRQ_DOMAIN
232 select PCIE_DW_HOST
233 help
234 Say Y here if you want to enable PCI controller support on Amlogic
235 SoCs. The PCI controller on Amlogic is based on DesignWare hardware
236 and therefore the driver re-uses the DesignWare core functions to
237 implement the driver.
238
239config PCIE_TEGRA194
240 tristate "NVIDIA Tegra194 (and later) PCIe controller"
241 depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
242 depends on PCI_MSI_IRQ_DOMAIN
243 select PCIE_DW_HOST
244 select PHY_TEGRA194_P2U
245 help
246 Say Y here if you want support for DesignWare core based PCIe host
247 controller found in NVIDIA Tegra194 SoC.
248
249config PCIE_UNIPHIER
250 bool "Socionext UniPhier PCIe controllers"
251 depends on ARCH_UNIPHIER || COMPILE_TEST
252 depends on OF && HAS_IOMEM
253 depends on PCI_MSI_IRQ_DOMAIN
254 select PCIE_DW_HOST
255 help
256 Say Y here if you want PCIe controller support on UniPhier SoCs.
257 This driver supports LD20 and PXs3 SoCs.
258
259config PCIE_AL
260 bool "Amazon Annapurna Labs PCIe controller"
261 depends on OF && (ARM64 || COMPILE_TEST)
262 depends on PCI_MSI_IRQ_DOMAIN
263 select PCIE_DW_HOST
264 help
265 Say Y here to enable support of the Amazon's Annapurna Labs PCIe
266 controller IP on Amazon SoCs. The PCIe controller uses the DesignWare
267 core plus Annapurna Labs proprietary hardware wrappers. This is
268 required only for DT-based platforms. ACPI platforms with the
269 Annapurna Labs PCIe controller don't need to enable this.
270
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]271endmenu