David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | |
| 3 | /* |
| 4 | * Clocksource driver for the synthetic counter and timers |
| 5 | * provided by the Hyper-V hypervisor to guest VMs, as described |
| 6 | * in the Hyper-V Top Level Functional Spec (TLFS). This driver |
| 7 | * is instruction set architecture independent. |
| 8 | * |
| 9 | * Copyright (C) 2019, Microsoft, Inc. |
| 10 | * |
| 11 | * Author: Michael Kelley <mikelley@microsoft.com> |
| 12 | */ |
| 13 | |
| 14 | #include <linux/percpu.h> |
| 15 | #include <linux/cpumask.h> |
| 16 | #include <linux/clockchips.h> |
| 17 | #include <linux/clocksource.h> |
| 18 | #include <linux/sched_clock.h> |
| 19 | #include <linux/mm.h> |
| 20 | #include <clocksource/hyperv_timer.h> |
| 21 | #include <asm/hyperv-tlfs.h> |
| 22 | #include <asm/mshyperv.h> |
| 23 | |
| 24 | static struct clock_event_device __percpu *hv_clock_event; |
| 25 | static u64 hv_sched_clock_offset __ro_after_init; |
| 26 | |
| 27 | /* |
| 28 | * If false, we're using the old mechanism for stimer0 interrupts |
| 29 | * where it sends a VMbus message when it expires. The old |
| 30 | * mechanism is used when running on older versions of Hyper-V |
| 31 | * that don't support Direct Mode. While Hyper-V provides |
| 32 | * four stimer's per CPU, Linux uses only stimer0. |
| 33 | */ |
| 34 | static bool direct_mode_enabled; |
| 35 | |
| 36 | static int stimer0_irq; |
| 37 | static int stimer0_vector; |
| 38 | static int stimer0_message_sint; |
| 39 | |
| 40 | /* |
| 41 | * ISR for when stimer0 is operating in Direct Mode. Direct Mode |
| 42 | * does not use VMbus or any VMbus messages, so process here and not |
| 43 | * in the VMbus driver code. |
| 44 | */ |
| 45 | void hv_stimer0_isr(void) |
| 46 | { |
| 47 | struct clock_event_device *ce; |
| 48 | |
| 49 | ce = this_cpu_ptr(hv_clock_event); |
| 50 | ce->event_handler(ce); |
| 51 | } |
| 52 | EXPORT_SYMBOL_GPL(hv_stimer0_isr); |
| 53 | |
| 54 | static int hv_ce_set_next_event(unsigned long delta, |
| 55 | struct clock_event_device *evt) |
| 56 | { |
| 57 | u64 current_tick; |
| 58 | |
| 59 | current_tick = hyperv_cs->read(NULL); |
| 60 | current_tick += delta; |
| 61 | hv_init_timer(0, current_tick); |
| 62 | return 0; |
| 63 | } |
| 64 | |
| 65 | static int hv_ce_shutdown(struct clock_event_device *evt) |
| 66 | { |
| 67 | hv_init_timer(0, 0); |
| 68 | hv_init_timer_config(0, 0); |
| 69 | if (direct_mode_enabled) |
| 70 | hv_disable_stimer0_percpu_irq(stimer0_irq); |
| 71 | |
| 72 | return 0; |
| 73 | } |
| 74 | |
| 75 | static int hv_ce_set_oneshot(struct clock_event_device *evt) |
| 76 | { |
| 77 | union hv_stimer_config timer_cfg; |
| 78 | |
| 79 | timer_cfg.as_uint64 = 0; |
| 80 | timer_cfg.enable = 1; |
| 81 | timer_cfg.auto_enable = 1; |
| 82 | if (direct_mode_enabled) { |
| 83 | /* |
| 84 | * When it expires, the timer will directly interrupt |
| 85 | * on the specified hardware vector/IRQ. |
| 86 | */ |
| 87 | timer_cfg.direct_mode = 1; |
| 88 | timer_cfg.apic_vector = stimer0_vector; |
| 89 | hv_enable_stimer0_percpu_irq(stimer0_irq); |
| 90 | } else { |
| 91 | /* |
| 92 | * When it expires, the timer will generate a VMbus message, |
| 93 | * to be handled by the normal VMbus interrupt handler. |
| 94 | */ |
| 95 | timer_cfg.direct_mode = 0; |
| 96 | timer_cfg.sintx = stimer0_message_sint; |
| 97 | } |
| 98 | hv_init_timer_config(0, timer_cfg.as_uint64); |
| 99 | return 0; |
| 100 | } |
| 101 | |
| 102 | /* |
| 103 | * hv_stimer_init - Per-cpu initialization of the clockevent |
| 104 | */ |
| 105 | void hv_stimer_init(unsigned int cpu) |
| 106 | { |
| 107 | struct clock_event_device *ce; |
| 108 | |
| 109 | /* |
| 110 | * Synthetic timers are always available except on old versions of |
| 111 | * Hyper-V on x86. In that case, just return as Linux will use a |
| 112 | * clocksource based on emulated PIT or LAPIC timer hardware. |
| 113 | */ |
| 114 | if (!(ms_hyperv.features & HV_MSR_SYNTIMER_AVAILABLE)) |
| 115 | return; |
| 116 | |
| 117 | ce = per_cpu_ptr(hv_clock_event, cpu); |
| 118 | ce->name = "Hyper-V clockevent"; |
| 119 | ce->features = CLOCK_EVT_FEAT_ONESHOT; |
| 120 | ce->cpumask = cpumask_of(cpu); |
| 121 | ce->rating = 1000; |
| 122 | ce->set_state_shutdown = hv_ce_shutdown; |
| 123 | ce->set_state_oneshot = hv_ce_set_oneshot; |
| 124 | ce->set_next_event = hv_ce_set_next_event; |
| 125 | |
| 126 | clockevents_config_and_register(ce, |
| 127 | HV_CLOCK_HZ, |
| 128 | HV_MIN_DELTA_TICKS, |
| 129 | HV_MAX_MAX_DELTA_TICKS); |
| 130 | } |
| 131 | EXPORT_SYMBOL_GPL(hv_stimer_init); |
| 132 | |
| 133 | /* |
| 134 | * hv_stimer_cleanup - Per-cpu cleanup of the clockevent |
| 135 | */ |
| 136 | void hv_stimer_cleanup(unsigned int cpu) |
| 137 | { |
| 138 | struct clock_event_device *ce; |
| 139 | |
| 140 | /* Turn off clockevent device */ |
| 141 | if (ms_hyperv.features & HV_MSR_SYNTIMER_AVAILABLE) { |
| 142 | ce = per_cpu_ptr(hv_clock_event, cpu); |
| 143 | hv_ce_shutdown(ce); |
| 144 | } |
| 145 | } |
| 146 | EXPORT_SYMBOL_GPL(hv_stimer_cleanup); |
| 147 | |
| 148 | /* hv_stimer_alloc - Global initialization of the clockevent and stimer0 */ |
| 149 | int hv_stimer_alloc(int sint) |
| 150 | { |
| 151 | int ret; |
| 152 | |
| 153 | hv_clock_event = alloc_percpu(struct clock_event_device); |
| 154 | if (!hv_clock_event) |
| 155 | return -ENOMEM; |
| 156 | |
| 157 | direct_mode_enabled = ms_hyperv.misc_features & |
| 158 | HV_STIMER_DIRECT_MODE_AVAILABLE; |
| 159 | if (direct_mode_enabled) { |
| 160 | ret = hv_setup_stimer0_irq(&stimer0_irq, &stimer0_vector, |
| 161 | hv_stimer0_isr); |
| 162 | if (ret) { |
| 163 | free_percpu(hv_clock_event); |
| 164 | hv_clock_event = NULL; |
| 165 | return ret; |
| 166 | } |
| 167 | } |
| 168 | |
| 169 | stimer0_message_sint = sint; |
| 170 | return 0; |
| 171 | } |
| 172 | EXPORT_SYMBOL_GPL(hv_stimer_alloc); |
| 173 | |
| 174 | /* hv_stimer_free - Free global resources allocated by hv_stimer_alloc() */ |
| 175 | void hv_stimer_free(void) |
| 176 | { |
| 177 | if (direct_mode_enabled && (stimer0_irq != 0)) { |
| 178 | hv_remove_stimer0_irq(stimer0_irq); |
| 179 | stimer0_irq = 0; |
| 180 | } |
| 181 | free_percpu(hv_clock_event); |
| 182 | hv_clock_event = NULL; |
| 183 | } |
| 184 | EXPORT_SYMBOL_GPL(hv_stimer_free); |
| 185 | |
| 186 | /* |
| 187 | * Do a global cleanup of clockevents for the cases of kexec and |
| 188 | * vmbus exit |
| 189 | */ |
| 190 | void hv_stimer_global_cleanup(void) |
| 191 | { |
| 192 | int cpu; |
| 193 | struct clock_event_device *ce; |
| 194 | |
| 195 | if (ms_hyperv.features & HV_MSR_SYNTIMER_AVAILABLE) { |
| 196 | for_each_present_cpu(cpu) { |
| 197 | ce = per_cpu_ptr(hv_clock_event, cpu); |
| 198 | clockevents_unbind_device(ce, cpu); |
| 199 | } |
| 200 | } |
| 201 | hv_stimer_free(); |
| 202 | } |
| 203 | EXPORT_SYMBOL_GPL(hv_stimer_global_cleanup); |
| 204 | |
| 205 | /* |
| 206 | * Code and definitions for the Hyper-V clocksources. Two |
| 207 | * clocksources are defined: one that reads the Hyper-V defined MSR, and |
| 208 | * the other that uses the TSC reference page feature as defined in the |
| 209 | * TLFS. The MSR version is for compatibility with old versions of |
| 210 | * Hyper-V and 32-bit x86. The TSC reference page version is preferred. |
| 211 | */ |
| 212 | |
| 213 | struct clocksource *hyperv_cs; |
| 214 | EXPORT_SYMBOL_GPL(hyperv_cs); |
| 215 | |
| 216 | static struct ms_hyperv_tsc_page tsc_pg __aligned(PAGE_SIZE); |
| 217 | |
| 218 | struct ms_hyperv_tsc_page *hv_get_tsc_page(void) |
| 219 | { |
| 220 | return &tsc_pg; |
| 221 | } |
| 222 | EXPORT_SYMBOL_GPL(hv_get_tsc_page); |
| 223 | |
| 224 | static u64 notrace read_hv_clock_tsc(struct clocksource *arg) |
| 225 | { |
| 226 | u64 current_tick = hv_read_tsc_page(&tsc_pg); |
| 227 | |
| 228 | if (current_tick == U64_MAX) |
| 229 | hv_get_time_ref_count(current_tick); |
| 230 | |
| 231 | return current_tick; |
| 232 | } |
| 233 | |
| 234 | static u64 read_hv_sched_clock_tsc(void) |
| 235 | { |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame^] | 236 | return (read_hv_clock_tsc(NULL) - hv_sched_clock_offset) * |
| 237 | (NSEC_PER_SEC / HV_CLOCK_HZ); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 238 | } |
| 239 | |
| 240 | static struct clocksource hyperv_cs_tsc = { |
| 241 | .name = "hyperv_clocksource_tsc_page", |
| 242 | .rating = 400, |
| 243 | .read = read_hv_clock_tsc, |
| 244 | .mask = CLOCKSOURCE_MASK(64), |
| 245 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| 246 | }; |
| 247 | |
| 248 | static u64 notrace read_hv_clock_msr(struct clocksource *arg) |
| 249 | { |
| 250 | u64 current_tick; |
| 251 | /* |
| 252 | * Read the partition counter to get the current tick count. This count |
| 253 | * is set to 0 when the partition is created and is incremented in |
| 254 | * 100 nanosecond units. |
| 255 | */ |
| 256 | hv_get_time_ref_count(current_tick); |
| 257 | return current_tick; |
| 258 | } |
| 259 | |
| 260 | static u64 read_hv_sched_clock_msr(void) |
| 261 | { |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame^] | 262 | return (read_hv_clock_msr(NULL) - hv_sched_clock_offset) * |
| 263 | (NSEC_PER_SEC / HV_CLOCK_HZ); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 264 | } |
| 265 | |
| 266 | static struct clocksource hyperv_cs_msr = { |
| 267 | .name = "hyperv_clocksource_msr", |
| 268 | .rating = 400, |
| 269 | .read = read_hv_clock_msr, |
| 270 | .mask = CLOCKSOURCE_MASK(64), |
| 271 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| 272 | }; |
| 273 | |
| 274 | static bool __init hv_init_tsc_clocksource(void) |
| 275 | { |
| 276 | u64 tsc_msr; |
| 277 | phys_addr_t phys_addr; |
| 278 | |
| 279 | if (!(ms_hyperv.features & HV_MSR_REFERENCE_TSC_AVAILABLE)) |
| 280 | return false; |
| 281 | |
| 282 | hyperv_cs = &hyperv_cs_tsc; |
| 283 | phys_addr = virt_to_phys(&tsc_pg); |
| 284 | |
| 285 | /* |
| 286 | * The Hyper-V TLFS specifies to preserve the value of reserved |
| 287 | * bits in registers. So read the existing value, preserve the |
| 288 | * low order 12 bits, and add in the guest physical address |
| 289 | * (which already has at least the low 12 bits set to zero since |
| 290 | * it is page aligned). Also set the "enable" bit, which is bit 0. |
| 291 | */ |
| 292 | hv_get_reference_tsc(tsc_msr); |
| 293 | tsc_msr &= GENMASK_ULL(11, 0); |
| 294 | tsc_msr = tsc_msr | 0x1 | (u64)phys_addr; |
| 295 | hv_set_reference_tsc(tsc_msr); |
| 296 | |
| 297 | hv_set_clocksource_vdso(hyperv_cs_tsc); |
| 298 | clocksource_register_hz(&hyperv_cs_tsc, NSEC_PER_SEC/100); |
| 299 | |
| 300 | hv_sched_clock_offset = hyperv_cs->read(hyperv_cs); |
| 301 | hv_setup_sched_clock(read_hv_sched_clock_tsc); |
| 302 | |
| 303 | return true; |
| 304 | } |
| 305 | |
| 306 | void __init hv_init_clocksource(void) |
| 307 | { |
| 308 | /* |
| 309 | * Try to set up the TSC page clocksource. If it succeeds, we're |
| 310 | * done. Otherwise, set up the MSR clocksoruce. At least one of |
| 311 | * these will always be available except on very old versions of |
| 312 | * Hyper-V on x86. In that case we won't have a Hyper-V |
| 313 | * clocksource, but Linux will still run with a clocksource based |
| 314 | * on the emulated PIT or LAPIC timer. |
| 315 | */ |
| 316 | if (hv_init_tsc_clocksource()) |
| 317 | return; |
| 318 | |
| 319 | if (!(ms_hyperv.features & HV_MSR_TIME_REF_COUNT_AVAILABLE)) |
| 320 | return; |
| 321 | |
| 322 | hyperv_cs = &hyperv_cs_msr; |
| 323 | clocksource_register_hz(&hyperv_cs_msr, NSEC_PER_SEC/100); |
| 324 | |
| 325 | hv_sched_clock_offset = hyperv_cs->read(hyperv_cs); |
| 326 | hv_setup_sched_clock(read_hv_sched_clock_msr); |
| 327 | } |
| 328 | EXPORT_SYMBOL_GPL(hv_init_clocksource); |