blob: 53ae679c00f019de5794ed532bd215929f577f4c [file] [log] [blame]
David Brazdil0f672f62019-12-10 10:32:29 +00001// SPDX-License-Identifier: GPL-2.0-or-later
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002/*
3 * processor_idle - idle state submodule to the ACPI processor driver
4 *
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
8 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
9 * - Added processor hotplug support
10 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
11 * - Added support for C3 on SMP
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012 */
13#define pr_fmt(fmt) "ACPI: " fmt
14
15#include <linux/module.h>
16#include <linux/acpi.h>
17#include <linux/dmi.h>
18#include <linux/sched.h> /* need_resched() */
Olivier Deprez0e641232021-09-23 10:07:05 +020019#include <linux/sort.h>
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000020#include <linux/tick.h>
21#include <linux/cpuidle.h>
22#include <linux/cpu.h>
23#include <acpi/processor.h>
24
25/*
26 * Include the apic definitions for x86 to have the APIC timer related defines
27 * available also for UP (on SMP it gets magically included via linux/smp.h).
28 * asm/acpi.h is not an option, as it would require more include magic. Also
29 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
30 */
31#ifdef CONFIG_X86
32#include <asm/apic.h>
33#endif
34
35#define ACPI_PROCESSOR_CLASS "processor"
36#define _COMPONENT ACPI_PROCESSOR_COMPONENT
37ACPI_MODULE_NAME("processor_idle");
38
39#define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0)
40
41static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
42module_param(max_cstate, uint, 0000);
43static unsigned int nocst __read_mostly;
44module_param(nocst, uint, 0000);
45static int bm_check_disable __read_mostly;
46module_param(bm_check_disable, uint, 0000);
47
48static unsigned int latency_factor __read_mostly = 2;
49module_param(latency_factor, uint, 0644);
50
51static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
52
53struct cpuidle_driver acpi_idle_driver = {
54 .name = "acpi_idle",
55 .owner = THIS_MODULE,
56};
57
58#ifdef CONFIG_ACPI_PROCESSOR_CSTATE
59static
60DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
61
62static int disabled_by_idle_boot_param(void)
63{
64 return boot_option_idle_override == IDLE_POLL ||
65 boot_option_idle_override == IDLE_HALT;
66}
67
68/*
69 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
70 * For now disable this. Probably a bug somewhere else.
71 *
72 * To skip this limit, boot/load with a large max_cstate limit.
73 */
74static int set_max_cstate(const struct dmi_system_id *id)
75{
76 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
77 return 0;
78
79 pr_notice("%s detected - limiting to C%ld max_cstate."
80 " Override with \"processor.max_cstate=%d\"\n", id->ident,
81 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
82
83 max_cstate = (long)id->driver_data;
84
85 return 0;
86}
87
88static const struct dmi_system_id processor_power_dmi_table[] = {
89 { set_max_cstate, "Clevo 5600D", {
90 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
91 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
92 (void *)2},
93 { set_max_cstate, "Pavilion zv5000", {
94 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
95 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
96 (void *)1},
97 { set_max_cstate, "Asus L8400B", {
98 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
99 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
100 (void *)1},
101 {},
102};
103
104
105/*
106 * Callers should disable interrupts before the call and enable
107 * interrupts after return.
108 */
109static void __cpuidle acpi_safe_halt(void)
110{
111 if (!tif_need_resched()) {
112 safe_halt();
113 local_irq_disable();
114 }
115}
116
117#ifdef ARCH_APICTIMER_STOPS_ON_C3
118
119/*
120 * Some BIOS implementations switch to C3 in the published C2 state.
121 * This seems to be a common problem on AMD boxen, but other vendors
122 * are affected too. We pick the most conservative approach: we assume
123 * that the local APIC stops in both C2 and C3.
124 */
125static void lapic_timer_check_state(int state, struct acpi_processor *pr,
126 struct acpi_processor_cx *cx)
127{
128 struct acpi_processor_power *pwr = &pr->power;
129 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
130
131 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
132 return;
133
134 if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
135 type = ACPI_STATE_C1;
136
137 /*
138 * Check, if one of the previous states already marked the lapic
139 * unstable
140 */
141 if (pwr->timer_broadcast_on_state < state)
142 return;
143
144 if (cx->type >= type)
145 pr->power.timer_broadcast_on_state = state;
146}
147
148static void __lapic_timer_propagate_broadcast(void *arg)
149{
150 struct acpi_processor *pr = (struct acpi_processor *) arg;
151
152 if (pr->power.timer_broadcast_on_state < INT_MAX)
153 tick_broadcast_enable();
154 else
155 tick_broadcast_disable();
156}
157
158static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
159{
160 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
161 (void *)pr, 1);
162}
163
164/* Power(C) State timer broadcast control */
165static void lapic_timer_state_broadcast(struct acpi_processor *pr,
166 struct acpi_processor_cx *cx,
167 int broadcast)
168{
169 int state = cx - pr->power.states;
170
171 if (state >= pr->power.timer_broadcast_on_state) {
172 if (broadcast)
173 tick_broadcast_enter();
174 else
175 tick_broadcast_exit();
176 }
177}
178
179#else
180
181static void lapic_timer_check_state(int state, struct acpi_processor *pr,
182 struct acpi_processor_cx *cstate) { }
183static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
184static void lapic_timer_state_broadcast(struct acpi_processor *pr,
185 struct acpi_processor_cx *cx,
186 int broadcast)
187{
188}
189
190#endif
191
192#if defined(CONFIG_X86)
193static void tsc_check_state(int state)
194{
195 switch (boot_cpu_data.x86_vendor) {
David Brazdil0f672f62019-12-10 10:32:29 +0000196 case X86_VENDOR_HYGON:
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000197 case X86_VENDOR_AMD:
198 case X86_VENDOR_INTEL:
199 case X86_VENDOR_CENTAUR:
David Brazdil0f672f62019-12-10 10:32:29 +0000200 case X86_VENDOR_ZHAOXIN:
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000201 /*
202 * AMD Fam10h TSC will tick in all
203 * C/P/S0/S1 states when this bit is set.
204 */
205 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
206 return;
207
208 /*FALL THROUGH*/
209 default:
210 /* TSC could halt in idle, so notify users */
211 if (state > ACPI_STATE_C1)
212 mark_tsc_unstable("TSC halts in idle");
213 }
214}
215#else
216static void tsc_check_state(int state) { return; }
217#endif
218
219static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
220{
221
222 if (!pr->pblk)
223 return -ENODEV;
224
225 /* if info is obtained from pblk/fadt, type equals state */
226 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
227 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
228
229#ifndef CONFIG_HOTPLUG_CPU
230 /*
231 * Check for P_LVL2_UP flag before entering C2 and above on
232 * an SMP system.
233 */
234 if ((num_online_cpus() > 1) &&
235 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
236 return -ENODEV;
237#endif
238
239 /* determine C2 and C3 address from pblk */
240 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
241 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
242
243 /* determine latencies from FADT */
244 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
245 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
246
247 /*
248 * FADT specified C2 latency must be less than or equal to
249 * 100 microseconds.
250 */
251 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
252 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
253 "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
254 /* invalidate C2 */
255 pr->power.states[ACPI_STATE_C2].address = 0;
256 }
257
258 /*
259 * FADT supplied C3 latency must be less than or equal to
260 * 1000 microseconds.
261 */
262 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
263 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
264 "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
265 /* invalidate C3 */
266 pr->power.states[ACPI_STATE_C3].address = 0;
267 }
268
269 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
270 "lvl2[0x%08x] lvl3[0x%08x]\n",
271 pr->power.states[ACPI_STATE_C2].address,
272 pr->power.states[ACPI_STATE_C3].address));
273
David Brazdil0f672f62019-12-10 10:32:29 +0000274 snprintf(pr->power.states[ACPI_STATE_C2].desc,
275 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x",
276 pr->power.states[ACPI_STATE_C2].address);
277 snprintf(pr->power.states[ACPI_STATE_C3].desc,
278 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x",
279 pr->power.states[ACPI_STATE_C3].address);
280
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000281 return 0;
282}
283
284static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
285{
286 if (!pr->power.states[ACPI_STATE_C1].valid) {
287 /* set the first C-State to C1 */
288 /* all processors need to support C1 */
289 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
290 pr->power.states[ACPI_STATE_C1].valid = 1;
291 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
292
293 snprintf(pr->power.states[ACPI_STATE_C1].desc,
294 ACPI_CX_DESC_LEN, "ACPI HLT");
295 }
296 /* the C0 state only exists as a filler in our array */
297 pr->power.states[ACPI_STATE_C0].valid = 1;
298 return 0;
299}
300
301static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
302{
303 acpi_status status;
304 u64 count;
305 int current_count;
306 int i, ret = 0;
307 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
308 union acpi_object *cst;
309
310 if (nocst)
311 return -ENODEV;
312
313 current_count = 0;
314
315 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
316 if (ACPI_FAILURE(status)) {
317 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
318 return -ENODEV;
319 }
320
321 cst = buffer.pointer;
322
323 /* There must be at least 2 elements */
324 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
325 pr_err("not enough elements in _CST\n");
326 ret = -EFAULT;
327 goto end;
328 }
329
330 count = cst->package.elements[0].integer.value;
331
332 /* Validate number of power states. */
333 if (count < 1 || count != cst->package.count - 1) {
334 pr_err("count given by _CST is not valid\n");
335 ret = -EFAULT;
336 goto end;
337 }
338
339 /* Tell driver that at least _CST is supported. */
340 pr->flags.has_cst = 1;
341
342 for (i = 1; i <= count; i++) {
343 union acpi_object *element;
344 union acpi_object *obj;
345 struct acpi_power_register *reg;
346 struct acpi_processor_cx cx;
347
348 memset(&cx, 0, sizeof(cx));
349
350 element = &(cst->package.elements[i]);
351 if (element->type != ACPI_TYPE_PACKAGE)
352 continue;
353
354 if (element->package.count != 4)
355 continue;
356
357 obj = &(element->package.elements[0]);
358
359 if (obj->type != ACPI_TYPE_BUFFER)
360 continue;
361
362 reg = (struct acpi_power_register *)obj->buffer.pointer;
363
364 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
365 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
366 continue;
367
368 /* There should be an easy way to extract an integer... */
369 obj = &(element->package.elements[1]);
370 if (obj->type != ACPI_TYPE_INTEGER)
371 continue;
372
373 cx.type = obj->integer.value;
374 /*
375 * Some buggy BIOSes won't list C1 in _CST -
376 * Let acpi_processor_get_power_info_default() handle them later
377 */
378 if (i == 1 && cx.type != ACPI_STATE_C1)
379 current_count++;
380
381 cx.address = reg->address;
382 cx.index = current_count + 1;
383
384 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
385 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
386 if (acpi_processor_ffh_cstate_probe
387 (pr->id, &cx, reg) == 0) {
388 cx.entry_method = ACPI_CSTATE_FFH;
389 } else if (cx.type == ACPI_STATE_C1) {
390 /*
391 * C1 is a special case where FIXED_HARDWARE
392 * can be handled in non-MWAIT way as well.
393 * In that case, save this _CST entry info.
394 * Otherwise, ignore this info and continue.
395 */
396 cx.entry_method = ACPI_CSTATE_HALT;
397 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
398 } else {
399 continue;
400 }
401 if (cx.type == ACPI_STATE_C1 &&
402 (boot_option_idle_override == IDLE_NOMWAIT)) {
403 /*
404 * In most cases the C1 space_id obtained from
405 * _CST object is FIXED_HARDWARE access mode.
406 * But when the option of idle=halt is added,
407 * the entry_method type should be changed from
408 * CSTATE_FFH to CSTATE_HALT.
409 * When the option of idle=nomwait is added,
410 * the C1 entry_method type should be
411 * CSTATE_HALT.
412 */
413 cx.entry_method = ACPI_CSTATE_HALT;
414 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
415 }
416 } else {
417 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
418 cx.address);
419 }
420
421 if (cx.type == ACPI_STATE_C1) {
422 cx.valid = 1;
423 }
424
425 obj = &(element->package.elements[2]);
426 if (obj->type != ACPI_TYPE_INTEGER)
427 continue;
428
429 cx.latency = obj->integer.value;
430
431 obj = &(element->package.elements[3]);
432 if (obj->type != ACPI_TYPE_INTEGER)
433 continue;
434
435 current_count++;
436 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
437
438 /*
439 * We support total ACPI_PROCESSOR_MAX_POWER - 1
440 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
441 */
442 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
443 pr_warn("Limiting number of power states to max (%d)\n",
444 ACPI_PROCESSOR_MAX_POWER);
445 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
446 break;
447 }
448 }
449
450 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
451 current_count));
452
453 /* Validate number of power states discovered */
454 if (current_count < 2)
455 ret = -EFAULT;
456
457 end:
458 kfree(buffer.pointer);
459
460 return ret;
461}
462
463static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
464 struct acpi_processor_cx *cx)
465{
466 static int bm_check_flag = -1;
467 static int bm_control_flag = -1;
468
469
470 if (!cx->address)
471 return;
472
473 /*
474 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
475 * DMA transfers are used by any ISA device to avoid livelock.
476 * Note that we could disable Type-F DMA (as recommended by
477 * the erratum), but this is known to disrupt certain ISA
478 * devices thus we take the conservative approach.
479 */
480 else if (errata.piix4.fdma) {
481 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
482 "C3 not supported on PIIX4 with Type-F DMA\n"));
483 return;
484 }
485
486 /* All the logic here assumes flags.bm_check is same across all CPUs */
487 if (bm_check_flag == -1) {
488 /* Determine whether bm_check is needed based on CPU */
489 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
490 bm_check_flag = pr->flags.bm_check;
491 bm_control_flag = pr->flags.bm_control;
492 } else {
493 pr->flags.bm_check = bm_check_flag;
494 pr->flags.bm_control = bm_control_flag;
495 }
496
497 if (pr->flags.bm_check) {
498 if (!pr->flags.bm_control) {
499 if (pr->flags.has_cst != 1) {
500 /* bus mastering control is necessary */
501 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
502 "C3 support requires BM control\n"));
503 return;
504 } else {
505 /* Here we enter C3 without bus mastering */
506 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
507 "C3 support without BM control\n"));
508 }
509 }
510 } else {
511 /*
512 * WBINVD should be set in fadt, for C3 state to be
513 * supported on when bm_check is not required.
514 */
515 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
516 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
517 "Cache invalidation should work properly"
518 " for C3 to be enabled on SMP systems\n"));
519 return;
520 }
521 }
522
523 /*
524 * Otherwise we've met all of our C3 requirements.
525 * Normalize the C3 latency to expidite policy. Enable
526 * checking of bus mastering status (bm_check) so we can
527 * use this in our C3 policy
528 */
529 cx->valid = 1;
530
531 /*
532 * On older chipsets, BM_RLD needs to be set
533 * in order for Bus Master activity to wake the
534 * system from C3. Newer chipsets handle DMA
535 * during C3 automatically and BM_RLD is a NOP.
536 * In either case, the proper way to
537 * handle BM_RLD is to set it and leave it set.
538 */
539 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
540
541 return;
542}
543
Olivier Deprez0e641232021-09-23 10:07:05 +0200544static int acpi_cst_latency_cmp(const void *a, const void *b)
545{
546 const struct acpi_processor_cx *x = a, *y = b;
547
548 if (!(x->valid && y->valid))
549 return 0;
550 if (x->latency > y->latency)
551 return 1;
552 if (x->latency < y->latency)
553 return -1;
554 return 0;
555}
556static void acpi_cst_latency_swap(void *a, void *b, int n)
557{
558 struct acpi_processor_cx *x = a, *y = b;
559 u32 tmp;
560
561 if (!(x->valid && y->valid))
562 return;
563 tmp = x->latency;
564 x->latency = y->latency;
565 y->latency = tmp;
566}
567
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000568static int acpi_processor_power_verify(struct acpi_processor *pr)
569{
570 unsigned int i;
571 unsigned int working = 0;
Olivier Deprez0e641232021-09-23 10:07:05 +0200572 unsigned int last_latency = 0;
573 unsigned int last_type = 0;
574 bool buggy_latency = false;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000575
576 pr->power.timer_broadcast_on_state = INT_MAX;
577
578 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
579 struct acpi_processor_cx *cx = &pr->power.states[i];
580
581 switch (cx->type) {
582 case ACPI_STATE_C1:
583 cx->valid = 1;
584 break;
585
586 case ACPI_STATE_C2:
587 if (!cx->address)
588 break;
589 cx->valid = 1;
590 break;
591
592 case ACPI_STATE_C3:
593 acpi_processor_power_verify_c3(pr, cx);
594 break;
595 }
596 if (!cx->valid)
597 continue;
Olivier Deprez0e641232021-09-23 10:07:05 +0200598 if (cx->type >= last_type && cx->latency < last_latency)
599 buggy_latency = true;
600 last_latency = cx->latency;
601 last_type = cx->type;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000602
603 lapic_timer_check_state(i, pr, cx);
604 tsc_check_state(cx->type);
605 working++;
606 }
607
Olivier Deprez0e641232021-09-23 10:07:05 +0200608 if (buggy_latency) {
609 pr_notice("FW issue: working around C-state latencies out of order\n");
610 sort(&pr->power.states[1], max_cstate,
611 sizeof(struct acpi_processor_cx),
612 acpi_cst_latency_cmp,
613 acpi_cst_latency_swap);
614 }
615
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000616 lapic_timer_propagate_broadcast(pr);
617
618 return (working);
619}
620
621static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
622{
623 unsigned int i;
624 int result;
625
626
627 /* NOTE: the idle thread may not be running while calling
628 * this function */
629
630 /* Zero initialize all the C-states info. */
631 memset(pr->power.states, 0, sizeof(pr->power.states));
632
633 result = acpi_processor_get_power_info_cst(pr);
634 if (result == -ENODEV)
635 result = acpi_processor_get_power_info_fadt(pr);
636
637 if (result)
638 return result;
639
640 acpi_processor_get_power_info_default(pr);
641
642 pr->power.count = acpi_processor_power_verify(pr);
643
644 /*
645 * if one state of type C2 or C3 is available, mark this
646 * CPU as being "idle manageable"
647 */
648 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
649 if (pr->power.states[i].valid) {
650 pr->power.count = i;
651 if (pr->power.states[i].type >= ACPI_STATE_C2)
652 pr->flags.power = 1;
653 }
654 }
655
656 return 0;
657}
658
659/**
660 * acpi_idle_bm_check - checks if bus master activity was detected
661 */
662static int acpi_idle_bm_check(void)
663{
664 u32 bm_status = 0;
665
666 if (bm_check_disable)
667 return 0;
668
669 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
670 if (bm_status)
671 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
672 /*
673 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
674 * the true state of bus mastering activity; forcing us to
675 * manually check the BMIDEA bit of each IDE channel.
676 */
677 else if (errata.piix4.bmisx) {
678 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
679 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
680 bm_status = 1;
681 }
682 return bm_status;
683}
684
685/**
686 * acpi_idle_do_entry - enter idle state using the appropriate method
687 * @cx: cstate data
688 *
689 * Caller disables interrupt before call and enables interrupt after return.
690 */
691static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
692{
693 if (cx->entry_method == ACPI_CSTATE_FFH) {
694 /* Call into architectural FFH based C-state */
695 acpi_processor_ffh_cstate_enter(cx);
696 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
697 acpi_safe_halt();
698 } else {
699 /* IO port based C-state */
700 inb(cx->address);
701 /* Dummy wait op - must do something useless after P_LVL2 read
702 because chipsets cannot guarantee that STPCLK# signal
703 gets asserted in time to freeze execution properly. */
704 inl(acpi_gbl_FADT.xpm_timer_block.address);
705 }
706}
707
708/**
709 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
710 * @dev: the target CPU
711 * @index: the index of suggested state
712 */
713static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
714{
715 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
716
717 ACPI_FLUSH_CPU_CACHE();
718
719 while (1) {
720
721 if (cx->entry_method == ACPI_CSTATE_HALT)
722 safe_halt();
723 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
724 inb(cx->address);
725 /* See comment in acpi_idle_do_entry() */
726 inl(acpi_gbl_FADT.xpm_timer_block.address);
727 } else
728 return -ENODEV;
729 }
730
731 /* Never reached */
732 return 0;
733}
734
735static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
736{
737 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
738 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
739}
740
741static int c3_cpu_count;
742static DEFINE_RAW_SPINLOCK(c3_lock);
743
744/**
745 * acpi_idle_enter_bm - enters C3 with proper BM handling
746 * @pr: Target processor
747 * @cx: Target state context
748 * @timer_bc: Whether or not to change timer mode to broadcast
749 */
750static void acpi_idle_enter_bm(struct acpi_processor *pr,
751 struct acpi_processor_cx *cx, bool timer_bc)
752{
753 acpi_unlazy_tlb(smp_processor_id());
754
755 /*
756 * Must be done before busmaster disable as we might need to
757 * access HPET !
758 */
759 if (timer_bc)
760 lapic_timer_state_broadcast(pr, cx, 1);
761
762 /*
763 * disable bus master
764 * bm_check implies we need ARB_DIS
765 * bm_control implies whether we can do ARB_DIS
766 *
767 * That leaves a case where bm_check is set and bm_control is
768 * not set. In that case we cannot do much, we enter C3
769 * without doing anything.
770 */
771 if (pr->flags.bm_control) {
772 raw_spin_lock(&c3_lock);
773 c3_cpu_count++;
774 /* Disable bus master arbitration when all CPUs are in C3 */
775 if (c3_cpu_count == num_online_cpus())
776 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
777 raw_spin_unlock(&c3_lock);
778 }
779
780 acpi_idle_do_entry(cx);
781
782 /* Re-enable bus master arbitration */
783 if (pr->flags.bm_control) {
784 raw_spin_lock(&c3_lock);
785 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
786 c3_cpu_count--;
787 raw_spin_unlock(&c3_lock);
788 }
789
790 if (timer_bc)
791 lapic_timer_state_broadcast(pr, cx, 0);
792}
793
794static int acpi_idle_enter(struct cpuidle_device *dev,
795 struct cpuidle_driver *drv, int index)
796{
797 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
798 struct acpi_processor *pr;
799
800 pr = __this_cpu_read(processors);
801 if (unlikely(!pr))
802 return -EINVAL;
803
804 if (cx->type != ACPI_STATE_C1) {
805 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
806 index = ACPI_IDLE_STATE_START;
807 cx = per_cpu(acpi_cstate[index], dev->cpu);
808 } else if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) {
809 if (cx->bm_sts_skip || !acpi_idle_bm_check()) {
810 acpi_idle_enter_bm(pr, cx, true);
811 return index;
812 } else if (drv->safe_state_index >= 0) {
813 index = drv->safe_state_index;
814 cx = per_cpu(acpi_cstate[index], dev->cpu);
815 } else {
816 acpi_safe_halt();
817 return -EBUSY;
818 }
819 }
820 }
821
822 lapic_timer_state_broadcast(pr, cx, 1);
823
824 if (cx->type == ACPI_STATE_C3)
825 ACPI_FLUSH_CPU_CACHE();
826
827 acpi_idle_do_entry(cx);
828
829 lapic_timer_state_broadcast(pr, cx, 0);
830
831 return index;
832}
833
834static void acpi_idle_enter_s2idle(struct cpuidle_device *dev,
835 struct cpuidle_driver *drv, int index)
836{
837 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
838
839 if (cx->type == ACPI_STATE_C3) {
840 struct acpi_processor *pr = __this_cpu_read(processors);
841
842 if (unlikely(!pr))
843 return;
844
845 if (pr->flags.bm_check) {
846 acpi_idle_enter_bm(pr, cx, false);
847 return;
848 } else {
849 ACPI_FLUSH_CPU_CACHE();
850 }
851 }
852 acpi_idle_do_entry(cx);
853}
854
855static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
856 struct cpuidle_device *dev)
857{
858 int i, count = ACPI_IDLE_STATE_START;
859 struct acpi_processor_cx *cx;
860
861 if (max_cstate == 0)
862 max_cstate = 1;
863
864 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
865 cx = &pr->power.states[i];
866
867 if (!cx->valid)
868 continue;
869
870 per_cpu(acpi_cstate[count], dev->cpu) = cx;
871
872 count++;
873 if (count == CPUIDLE_STATE_MAX)
874 break;
875 }
876
877 if (!count)
878 return -EINVAL;
879
880 return 0;
881}
882
883static int acpi_processor_setup_cstates(struct acpi_processor *pr)
884{
885 int i, count;
886 struct acpi_processor_cx *cx;
887 struct cpuidle_state *state;
888 struct cpuidle_driver *drv = &acpi_idle_driver;
889
890 if (max_cstate == 0)
891 max_cstate = 1;
892
893 if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) {
894 cpuidle_poll_state_init(drv);
895 count = 1;
896 } else {
897 count = 0;
898 }
899
900 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
901 cx = &pr->power.states[i];
902
903 if (!cx->valid)
904 continue;
905
906 state = &drv->states[count];
907 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
908 strlcpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
909 state->exit_latency = cx->latency;
910 state->target_residency = cx->latency * latency_factor;
911 state->enter = acpi_idle_enter;
912
913 state->flags = 0;
914 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) {
915 state->enter_dead = acpi_idle_play_dead;
916 drv->safe_state_index = count;
917 }
918 /*
919 * Halt-induced C1 is not good for ->enter_s2idle, because it
920 * re-enables interrupts on exit. Moreover, C1 is generally not
921 * particularly interesting from the suspend-to-idle angle, so
922 * avoid C1 and the situations in which we may need to fall back
923 * to it altogether.
924 */
925 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
926 state->enter_s2idle = acpi_idle_enter_s2idle;
927
928 count++;
929 if (count == CPUIDLE_STATE_MAX)
930 break;
931 }
932
933 drv->state_count = count;
934
935 if (!count)
936 return -EINVAL;
937
938 return 0;
939}
940
941static inline void acpi_processor_cstate_first_run_checks(void)
942{
943 acpi_status status;
944 static int first_run;
945
946 if (first_run)
947 return;
948 dmi_check_system(processor_power_dmi_table);
949 max_cstate = acpi_processor_cstate_check(max_cstate);
950 if (max_cstate < ACPI_C_STATES_MAX)
951 pr_notice("ACPI: processor limited to max C-state %d\n",
952 max_cstate);
953 first_run++;
954
955 if (acpi_gbl_FADT.cst_control && !nocst) {
956 status = acpi_os_write_port(acpi_gbl_FADT.smi_command,
957 acpi_gbl_FADT.cst_control, 8);
958 if (ACPI_FAILURE(status))
959 ACPI_EXCEPTION((AE_INFO, status,
960 "Notifying BIOS of _CST ability failed"));
961 }
962}
963#else
964
965static inline int disabled_by_idle_boot_param(void) { return 0; }
966static inline void acpi_processor_cstate_first_run_checks(void) { }
967static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
968{
969 return -ENODEV;
970}
971
972static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
973 struct cpuidle_device *dev)
974{
975 return -EINVAL;
976}
977
978static int acpi_processor_setup_cstates(struct acpi_processor *pr)
979{
980 return -EINVAL;
981}
982
983#endif /* CONFIG_ACPI_PROCESSOR_CSTATE */
984
985struct acpi_lpi_states_array {
986 unsigned int size;
987 unsigned int composite_states_size;
988 struct acpi_lpi_state *entries;
989 struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER];
990};
991
992static int obj_get_integer(union acpi_object *obj, u32 *value)
993{
994 if (obj->type != ACPI_TYPE_INTEGER)
995 return -EINVAL;
996
997 *value = obj->integer.value;
998 return 0;
999}
1000
1001static int acpi_processor_evaluate_lpi(acpi_handle handle,
1002 struct acpi_lpi_states_array *info)
1003{
1004 acpi_status status;
1005 int ret = 0;
1006 int pkg_count, state_idx = 1, loop;
1007 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1008 union acpi_object *lpi_data;
1009 struct acpi_lpi_state *lpi_state;
1010
1011 status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer);
1012 if (ACPI_FAILURE(status)) {
1013 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _LPI, giving up\n"));
1014 return -ENODEV;
1015 }
1016
1017 lpi_data = buffer.pointer;
1018
1019 /* There must be at least 4 elements = 3 elements + 1 package */
1020 if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE ||
1021 lpi_data->package.count < 4) {
1022 pr_debug("not enough elements in _LPI\n");
1023 ret = -ENODATA;
1024 goto end;
1025 }
1026
1027 pkg_count = lpi_data->package.elements[2].integer.value;
1028
1029 /* Validate number of power states. */
1030 if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) {
1031 pr_debug("count given by _LPI is not valid\n");
1032 ret = -ENODATA;
1033 goto end;
1034 }
1035
1036 lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL);
1037 if (!lpi_state) {
1038 ret = -ENOMEM;
1039 goto end;
1040 }
1041
1042 info->size = pkg_count;
1043 info->entries = lpi_state;
1044
1045 /* LPI States start at index 3 */
1046 for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) {
1047 union acpi_object *element, *pkg_elem, *obj;
1048
1049 element = &lpi_data->package.elements[loop];
1050 if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7)
1051 continue;
1052
1053 pkg_elem = element->package.elements;
1054
1055 obj = pkg_elem + 6;
1056 if (obj->type == ACPI_TYPE_BUFFER) {
1057 struct acpi_power_register *reg;
1058
1059 reg = (struct acpi_power_register *)obj->buffer.pointer;
1060 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
1061 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)
1062 continue;
1063
1064 lpi_state->address = reg->address;
1065 lpi_state->entry_method =
1066 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ?
1067 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO;
1068 } else if (obj->type == ACPI_TYPE_INTEGER) {
1069 lpi_state->entry_method = ACPI_CSTATE_INTEGER;
1070 lpi_state->address = obj->integer.value;
1071 } else {
1072 continue;
1073 }
1074
1075 /* elements[7,8] skipped for now i.e. Residency/Usage counter*/
1076
1077 obj = pkg_elem + 9;
1078 if (obj->type == ACPI_TYPE_STRING)
1079 strlcpy(lpi_state->desc, obj->string.pointer,
1080 ACPI_CX_DESC_LEN);
1081
1082 lpi_state->index = state_idx;
1083 if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) {
1084 pr_debug("No min. residency found, assuming 10 us\n");
1085 lpi_state->min_residency = 10;
1086 }
1087
1088 if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) {
1089 pr_debug("No wakeup residency found, assuming 10 us\n");
1090 lpi_state->wake_latency = 10;
1091 }
1092
1093 if (obj_get_integer(pkg_elem + 2, &lpi_state->flags))
1094 lpi_state->flags = 0;
1095
1096 if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags))
1097 lpi_state->arch_flags = 0;
1098
1099 if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq))
1100 lpi_state->res_cnt_freq = 1;
1101
1102 if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state))
1103 lpi_state->enable_parent_state = 0;
1104 }
1105
1106 acpi_handle_debug(handle, "Found %d power states\n", state_idx);
1107end:
1108 kfree(buffer.pointer);
1109 return ret;
1110}
1111
1112/*
1113 * flat_state_cnt - the number of composite LPI states after the process of flattening
1114 */
1115static int flat_state_cnt;
1116
1117/**
1118 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
1119 *
1120 * @local: local LPI state
1121 * @parent: parent LPI state
1122 * @result: composite LPI state
1123 */
1124static bool combine_lpi_states(struct acpi_lpi_state *local,
1125 struct acpi_lpi_state *parent,
1126 struct acpi_lpi_state *result)
1127{
1128 if (parent->entry_method == ACPI_CSTATE_INTEGER) {
1129 if (!parent->address) /* 0 means autopromotable */
1130 return false;
1131 result->address = local->address + parent->address;
1132 } else {
1133 result->address = parent->address;
1134 }
1135
1136 result->min_residency = max(local->min_residency, parent->min_residency);
1137 result->wake_latency = local->wake_latency + parent->wake_latency;
1138 result->enable_parent_state = parent->enable_parent_state;
1139 result->entry_method = local->entry_method;
1140
1141 result->flags = parent->flags;
1142 result->arch_flags = parent->arch_flags;
1143 result->index = parent->index;
1144
1145 strlcpy(result->desc, local->desc, ACPI_CX_DESC_LEN);
1146 strlcat(result->desc, "+", ACPI_CX_DESC_LEN);
1147 strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN);
1148 return true;
1149}
1150
1151#define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0)
1152
1153static void stash_composite_state(struct acpi_lpi_states_array *curr_level,
1154 struct acpi_lpi_state *t)
1155{
1156 curr_level->composite_states[curr_level->composite_states_size++] = t;
1157}
1158
1159static int flatten_lpi_states(struct acpi_processor *pr,
1160 struct acpi_lpi_states_array *curr_level,
1161 struct acpi_lpi_states_array *prev_level)
1162{
1163 int i, j, state_count = curr_level->size;
1164 struct acpi_lpi_state *p, *t = curr_level->entries;
1165
1166 curr_level->composite_states_size = 0;
1167 for (j = 0; j < state_count; j++, t++) {
1168 struct acpi_lpi_state *flpi;
1169
1170 if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED))
1171 continue;
1172
1173 if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) {
1174 pr_warn("Limiting number of LPI states to max (%d)\n",
1175 ACPI_PROCESSOR_MAX_POWER);
1176 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1177 break;
1178 }
1179
1180 flpi = &pr->power.lpi_states[flat_state_cnt];
1181
1182 if (!prev_level) { /* leaf/processor node */
1183 memcpy(flpi, t, sizeof(*t));
1184 stash_composite_state(curr_level, flpi);
1185 flat_state_cnt++;
1186 continue;
1187 }
1188
1189 for (i = 0; i < prev_level->composite_states_size; i++) {
1190 p = prev_level->composite_states[i];
1191 if (t->index <= p->enable_parent_state &&
1192 combine_lpi_states(p, t, flpi)) {
1193 stash_composite_state(curr_level, flpi);
1194 flat_state_cnt++;
1195 flpi++;
1196 }
1197 }
1198 }
1199
1200 kfree(curr_level->entries);
1201 return 0;
1202}
1203
1204static int acpi_processor_get_lpi_info(struct acpi_processor *pr)
1205{
1206 int ret, i;
1207 acpi_status status;
1208 acpi_handle handle = pr->handle, pr_ahandle;
1209 struct acpi_device *d = NULL;
1210 struct acpi_lpi_states_array info[2], *tmp, *prev, *curr;
1211
1212 if (!osc_pc_lpi_support_confirmed)
1213 return -EOPNOTSUPP;
1214
1215 if (!acpi_has_method(handle, "_LPI"))
1216 return -EINVAL;
1217
1218 flat_state_cnt = 0;
1219 prev = &info[0];
1220 curr = &info[1];
1221 handle = pr->handle;
1222 ret = acpi_processor_evaluate_lpi(handle, prev);
1223 if (ret)
1224 return ret;
1225 flatten_lpi_states(pr, prev, NULL);
1226
1227 status = acpi_get_parent(handle, &pr_ahandle);
1228 while (ACPI_SUCCESS(status)) {
1229 acpi_bus_get_device(pr_ahandle, &d);
1230 handle = pr_ahandle;
1231
1232 if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID))
1233 break;
1234
1235 /* can be optional ? */
1236 if (!acpi_has_method(handle, "_LPI"))
1237 break;
1238
1239 ret = acpi_processor_evaluate_lpi(handle, curr);
1240 if (ret)
1241 break;
1242
1243 /* flatten all the LPI states in this level of hierarchy */
1244 flatten_lpi_states(pr, curr, prev);
1245
1246 tmp = prev, prev = curr, curr = tmp;
1247
1248 status = acpi_get_parent(handle, &pr_ahandle);
1249 }
1250
1251 pr->power.count = flat_state_cnt;
1252 /* reset the index after flattening */
1253 for (i = 0; i < pr->power.count; i++)
1254 pr->power.lpi_states[i].index = i;
1255
1256 /* Tell driver that _LPI is supported. */
1257 pr->flags.has_lpi = 1;
1258 pr->flags.power = 1;
1259
1260 return 0;
1261}
1262
1263int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu)
1264{
1265 return -ENODEV;
1266}
1267
1268int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
1269{
1270 return -ENODEV;
1271}
1272
1273/**
1274 * acpi_idle_lpi_enter - enters an ACPI any LPI state
1275 * @dev: the target CPU
1276 * @drv: cpuidle driver containing cpuidle state info
1277 * @index: index of target state
1278 *
1279 * Return: 0 for success or negative value for error
1280 */
1281static int acpi_idle_lpi_enter(struct cpuidle_device *dev,
1282 struct cpuidle_driver *drv, int index)
1283{
1284 struct acpi_processor *pr;
1285 struct acpi_lpi_state *lpi;
1286
1287 pr = __this_cpu_read(processors);
1288
1289 if (unlikely(!pr))
1290 return -EINVAL;
1291
1292 lpi = &pr->power.lpi_states[index];
1293 if (lpi->entry_method == ACPI_CSTATE_FFH)
1294 return acpi_processor_ffh_lpi_enter(lpi);
1295
1296 return -EINVAL;
1297}
1298
1299static int acpi_processor_setup_lpi_states(struct acpi_processor *pr)
1300{
1301 int i;
1302 struct acpi_lpi_state *lpi;
1303 struct cpuidle_state *state;
1304 struct cpuidle_driver *drv = &acpi_idle_driver;
1305
1306 if (!pr->flags.has_lpi)
1307 return -EOPNOTSUPP;
1308
1309 for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) {
1310 lpi = &pr->power.lpi_states[i];
1311
1312 state = &drv->states[i];
1313 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i);
1314 strlcpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN);
1315 state->exit_latency = lpi->wake_latency;
1316 state->target_residency = lpi->min_residency;
1317 if (lpi->arch_flags)
1318 state->flags |= CPUIDLE_FLAG_TIMER_STOP;
1319 state->enter = acpi_idle_lpi_enter;
1320 drv->safe_state_index = i;
1321 }
1322
1323 drv->state_count = i;
1324
1325 return 0;
1326}
1327
1328/**
1329 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle
1330 * global state data i.e. idle routines
1331 *
1332 * @pr: the ACPI processor
1333 */
1334static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1335{
1336 int i;
1337 struct cpuidle_driver *drv = &acpi_idle_driver;
1338
1339 if (!pr->flags.power_setup_done || !pr->flags.power)
1340 return -EINVAL;
1341
1342 drv->safe_state_index = -1;
1343 for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
1344 drv->states[i].name[0] = '\0';
1345 drv->states[i].desc[0] = '\0';
1346 }
1347
1348 if (pr->flags.has_lpi)
1349 return acpi_processor_setup_lpi_states(pr);
1350
1351 return acpi_processor_setup_cstates(pr);
1352}
1353
1354/**
1355 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE
1356 * device i.e. per-cpu data
1357 *
1358 * @pr: the ACPI processor
1359 * @dev : the cpuidle device
1360 */
1361static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr,
1362 struct cpuidle_device *dev)
1363{
1364 if (!pr->flags.power_setup_done || !pr->flags.power || !dev)
1365 return -EINVAL;
1366
1367 dev->cpu = pr->id;
1368 if (pr->flags.has_lpi)
1369 return acpi_processor_ffh_lpi_probe(pr->id);
1370
1371 return acpi_processor_setup_cpuidle_cx(pr, dev);
1372}
1373
1374static int acpi_processor_get_power_info(struct acpi_processor *pr)
1375{
1376 int ret;
1377
1378 ret = acpi_processor_get_lpi_info(pr);
1379 if (ret)
1380 ret = acpi_processor_get_cstate_info(pr);
1381
1382 return ret;
1383}
1384
1385int acpi_processor_hotplug(struct acpi_processor *pr)
1386{
1387 int ret = 0;
1388 struct cpuidle_device *dev;
1389
1390 if (disabled_by_idle_boot_param())
1391 return 0;
1392
1393 if (!pr->flags.power_setup_done)
1394 return -ENODEV;
1395
1396 dev = per_cpu(acpi_cpuidle_device, pr->id);
1397 cpuidle_pause_and_lock();
1398 cpuidle_disable_device(dev);
1399 ret = acpi_processor_get_power_info(pr);
1400 if (!ret && pr->flags.power) {
1401 acpi_processor_setup_cpuidle_dev(pr, dev);
1402 ret = cpuidle_enable_device(dev);
1403 }
1404 cpuidle_resume_and_unlock();
1405
1406 return ret;
1407}
1408
1409int acpi_processor_power_state_has_changed(struct acpi_processor *pr)
1410{
1411 int cpu;
1412 struct acpi_processor *_pr;
1413 struct cpuidle_device *dev;
1414
1415 if (disabled_by_idle_boot_param())
1416 return 0;
1417
1418 if (!pr->flags.power_setup_done)
1419 return -ENODEV;
1420
1421 /*
1422 * FIXME: Design the ACPI notification to make it once per
1423 * system instead of once per-cpu. This condition is a hack
1424 * to make the code that updates C-States be called once.
1425 */
1426
1427 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1428
1429 /* Protect against cpu-hotplug */
1430 get_online_cpus();
1431 cpuidle_pause_and_lock();
1432
1433 /* Disable all cpuidle devices */
1434 for_each_online_cpu(cpu) {
1435 _pr = per_cpu(processors, cpu);
1436 if (!_pr || !_pr->flags.power_setup_done)
1437 continue;
1438 dev = per_cpu(acpi_cpuidle_device, cpu);
1439 cpuidle_disable_device(dev);
1440 }
1441
1442 /* Populate Updated C-state information */
1443 acpi_processor_get_power_info(pr);
1444 acpi_processor_setup_cpuidle_states(pr);
1445
1446 /* Enable all cpuidle devices */
1447 for_each_online_cpu(cpu) {
1448 _pr = per_cpu(processors, cpu);
1449 if (!_pr || !_pr->flags.power_setup_done)
1450 continue;
1451 acpi_processor_get_power_info(_pr);
1452 if (_pr->flags.power) {
1453 dev = per_cpu(acpi_cpuidle_device, cpu);
1454 acpi_processor_setup_cpuidle_dev(_pr, dev);
1455 cpuidle_enable_device(dev);
1456 }
1457 }
1458 cpuidle_resume_and_unlock();
1459 put_online_cpus();
1460 }
1461
1462 return 0;
1463}
1464
1465static int acpi_processor_registered;
1466
1467int acpi_processor_power_init(struct acpi_processor *pr)
1468{
1469 int retval;
1470 struct cpuidle_device *dev;
1471
1472 if (disabled_by_idle_boot_param())
1473 return 0;
1474
1475 acpi_processor_cstate_first_run_checks();
1476
1477 if (!acpi_processor_get_power_info(pr))
1478 pr->flags.power_setup_done = 1;
1479
1480 /*
1481 * Install the idle handler if processor power management is supported.
1482 * Note that we use previously set idle handler will be used on
1483 * platforms that only support C1.
1484 */
1485 if (pr->flags.power) {
1486 /* Register acpi_idle_driver if not already registered */
1487 if (!acpi_processor_registered) {
1488 acpi_processor_setup_cpuidle_states(pr);
1489 retval = cpuidle_register_driver(&acpi_idle_driver);
1490 if (retval)
1491 return retval;
1492 pr_debug("%s registered with cpuidle\n",
1493 acpi_idle_driver.name);
1494 }
1495
1496 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1497 if (!dev)
1498 return -ENOMEM;
1499 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1500
1501 acpi_processor_setup_cpuidle_dev(pr, dev);
1502
1503 /* Register per-cpu cpuidle_device. Cpuidle driver
1504 * must already be registered before registering device
1505 */
1506 retval = cpuidle_register_device(dev);
1507 if (retval) {
1508 if (acpi_processor_registered == 0)
1509 cpuidle_unregister_driver(&acpi_idle_driver);
1510 return retval;
1511 }
1512 acpi_processor_registered++;
1513 }
1514 return 0;
1515}
1516
1517int acpi_processor_power_exit(struct acpi_processor *pr)
1518{
1519 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1520
1521 if (disabled_by_idle_boot_param())
1522 return 0;
1523
1524 if (pr->flags.power) {
1525 cpuidle_unregister_device(dev);
1526 acpi_processor_registered--;
1527 if (acpi_processor_registered == 0)
1528 cpuidle_unregister_driver(&acpi_idle_driver);
1529 }
1530
1531 pr->flags.power_setup_done = 0;
1532 return 0;
1533}