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David Brazdil0f672f62019-12-10 10:32:29 +00001/* SPDX-License-Identifier: GPL-2.0-or-later */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002#ifndef _ASM_X86_ACPI_H
3#define _ASM_X86_ACPI_H
4
5/*
6 * Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2001 Patrick Mochel <mochel@osdl.org>
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008 */
9#include <acpi/pdc_intel.h>
10
11#include <asm/numa.h>
12#include <asm/fixmap.h>
13#include <asm/processor.h>
14#include <asm/mmu.h>
15#include <asm/mpspec.h>
16#include <asm/realmode.h>
17#include <asm/x86_init.h>
18
19#ifdef CONFIG_ACPI_APEI
20# include <asm/pgtable_types.h>
21#endif
22
23#ifdef CONFIG_ACPI
24extern int acpi_lapic;
25extern int acpi_ioapic;
26extern int acpi_noirq;
27extern int acpi_strict;
28extern int acpi_disabled;
29extern int acpi_pci_disabled;
30extern int acpi_skip_timer_override;
31extern int acpi_use_timer_override;
32extern int acpi_fix_pin2_polarity;
33extern int acpi_disable_cmcff;
34
35extern u8 acpi_sci_flags;
36extern u32 acpi_sci_override_gsi;
37void acpi_pic_sci_set_trigger(unsigned int, u16);
38
39struct device;
40
41extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
42 int trigger, int polarity);
43extern void (*__acpi_unregister_gsi)(u32 gsi);
44
45static inline void disable_acpi(void)
46{
47 acpi_disabled = 1;
48 acpi_pci_disabled = 1;
49 acpi_noirq = 1;
50}
51
52extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
53
54static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
55static inline void acpi_disable_pci(void)
56{
57 acpi_pci_disabled = 1;
58 acpi_noirq_set();
59}
60
61/* Low-level suspend routine. */
62extern int (*acpi_suspend_lowlevel)(void);
63
64/* Physical address to resume after wakeup */
65#define acpi_wakeup_address ((unsigned long)(real_mode_header->wakeup_start))
66
67/*
68 * Check if the CPU can handle C2 and deeper
69 */
70static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
71{
72 /*
73 * Early models (<=5) of AMD Opterons are not supposed to go into
74 * C2 state.
75 *
76 * Steppings 0x0A and later are good
77 */
78 if (boot_cpu_data.x86 == 0x0F &&
79 boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
80 boot_cpu_data.x86_model <= 0x05 &&
81 boot_cpu_data.x86_stepping < 0x0A)
82 return 1;
83 else if (boot_cpu_has(X86_BUG_AMD_APIC_C1E))
84 return 1;
85 else
86 return max_cstate;
87}
88
89static inline bool arch_has_acpi_pdc(void)
90{
91 struct cpuinfo_x86 *c = &cpu_data(0);
92 return (c->x86_vendor == X86_VENDOR_INTEL ||
93 c->x86_vendor == X86_VENDOR_CENTAUR);
94}
95
96static inline void arch_acpi_set_pdc_bits(u32 *buf)
97{
98 struct cpuinfo_x86 *c = &cpu_data(0);
99
100 buf[2] |= ACPI_PDC_C_CAPABILITY_SMP;
101
102 if (cpu_has(c, X86_FEATURE_EST))
103 buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP;
104
105 if (cpu_has(c, X86_FEATURE_ACPI))
106 buf[2] |= ACPI_PDC_T_FFH;
107
108 /*
109 * If mwait/monitor is unsupported, C2/C3_FFH will be disabled
110 */
111 if (!cpu_has(c, X86_FEATURE_MWAIT))
112 buf[2] &= ~(ACPI_PDC_C_C2C3_FFH);
113}
114
115static inline bool acpi_has_cpu_in_madt(void)
116{
117 return !!acpi_lapic;
118}
119
David Brazdil0f672f62019-12-10 10:32:29 +0000120#define ACPI_HAVE_ARCH_SET_ROOT_POINTER
121static inline void acpi_arch_set_root_pointer(u64 addr)
122{
123 x86_init.acpi.set_root_pointer(addr);
124}
125
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000126#define ACPI_HAVE_ARCH_GET_ROOT_POINTER
127static inline u64 acpi_arch_get_root_pointer(void)
128{
129 return x86_init.acpi.get_root_pointer();
130}
131
132void acpi_generic_reduced_hw_init(void);
133
David Brazdil0f672f62019-12-10 10:32:29 +0000134void x86_default_set_root_pointer(u64 addr);
135u64 x86_default_get_root_pointer(void);
136
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000137#else /* !CONFIG_ACPI */
138
139#define acpi_lapic 0
140#define acpi_ioapic 0
141#define acpi_disable_cmcff 0
142static inline void acpi_noirq_set(void) { }
143static inline void acpi_disable_pci(void) { }
144static inline void disable_acpi(void) { }
145
146static inline void acpi_generic_reduced_hw_init(void) { }
147
David Brazdil0f672f62019-12-10 10:32:29 +0000148static inline void x86_default_set_root_pointer(u64 addr) { }
149
150static inline u64 x86_default_get_root_pointer(void)
151{
152 return 0;
153}
154
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000155#endif /* !CONFIG_ACPI */
156
157#define ARCH_HAS_POWER_INIT 1
158
159#ifdef CONFIG_ACPI_NUMA
160extern int x86_acpi_numa_init(void);
161#endif /* CONFIG_ACPI_NUMA */
162
163#define acpi_unlazy_tlb(x) leave_mm(x)
164
165#ifdef CONFIG_ACPI_APEI
166static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr)
167{
168 /*
169 * We currently have no way to look up the EFI memory map
170 * attributes for a region in a consistent way, because the
171 * memmap is discarded after efi_free_boot_services(). So if
172 * you call efi_mem_attributes() during boot and at runtime,
173 * you could theoretically see different attributes.
174 *
175 * We are yet to see any x86 platforms that require anything
176 * other than PAGE_KERNEL (some ARM64 platforms require the
177 * equivalent of PAGE_KERNEL_NOCACHE). Additionally, if SME
178 * is active, the ACPI information will not be encrypted,
179 * so return PAGE_KERNEL_NOENC until we know differently.
180 */
181 return PAGE_KERNEL_NOENC;
182}
183#endif
184
185#define ACPI_TABLE_UPGRADE_MAX_PHYS (max_low_pfn_mapped << PAGE_SHIFT)
186
187#endif /* _ASM_X86_ACPI_H */