| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | What: /sys/class/fpga_manager/<fpga>/name |
| 2 | Date: August 2015 |
| 3 | KernelVersion: 4.3 |
| 4 | Contact: Alan Tull <atull@opensource.altera.com> |
| 5 | Description: Name of low level fpga manager driver. |
| 6 | |
| 7 | What: /sys/class/fpga_manager/<fpga>/state |
| 8 | Date: August 2015 |
| 9 | KernelVersion: 4.3 |
| 10 | Contact: Alan Tull <atull@opensource.altera.com> |
| 11 | Description: Read fpga manager state as a string. |
| 12 | The intent is to provide enough detail that if something goes |
| 13 | wrong during FPGA programming (something that the driver can't |
| 14 | fix) then userspace can know, i.e. if the firmware request |
| 15 | fails, that could be due to not being able to find the firmware |
| 16 | file. |
| 17 | |
| 18 | This is a superset of FPGA states and fpga manager driver |
| 19 | states. The fpga manager driver is walking through these steps |
| 20 | to get the FPGA into a known operating state. It's a sequence, |
| 21 | though some steps may get skipped. Valid FPGA states will vary |
| 22 | by manufacturer; this is a superset. |
| 23 | |
| 24 | * unknown = can't determine state |
| 25 | * power off = FPGA power is off |
| 26 | * power up = FPGA reports power is up |
| 27 | * reset = FPGA held in reset state |
| 28 | * firmware request = firmware class request in progress |
| 29 | * firmware request error = firmware request failed |
| 30 | * write init = preparing FPGA for programming |
| 31 | * write init error = Error while preparing FPGA for |
| 32 | programming |
| 33 | * write = FPGA ready to receive image data |
| 34 | * write error = Error while programming |
| 35 | * write complete = Doing post programming steps |
| 36 | * write complete error = Error while doing post programming |
| 37 | * operating = FPGA is programmed and operating |
| 38 | |
| 39 | What: /sys/class/fpga_manager/<fpga>/status |
| 40 | Date: June 2018 |
| 41 | KernelVersion: 4.19 |
| 42 | Contact: Wu Hao <hao.wu@intel.com> |
| 43 | Description: Read fpga manager status as a string. |
| 44 | If FPGA programming operation fails, it could be caused by crc |
| 45 | error or incompatible bitstream image. The intent of this |
| 46 | interface is to provide more detailed information for FPGA |
| 47 | programming errors to userspace. This is a list of strings for |
| 48 | the supported status. |
| 49 | |
| 50 | * reconfig operation error - invalid operations detected by |
| 51 | reconfiguration hardware. |
| 52 | e.g. start reconfiguration |
| 53 | with errors not cleared |
| 54 | * reconfig CRC error - CRC error detected by |
| 55 | reconfiguration hardware. |
| 56 | * reconfig incompatible image - reconfiguration image is |
| 57 | incompatible with hardware |
| 58 | * reconfig IP protocol error - protocol errors detected by |
| 59 | reconfiguration hardware |
| 60 | * reconfig fifo overflow error - FIFO overflow detected by |
| 61 | reconfiguration hardware |