Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright 2012 Freescale Semiconductor, Inc. |
| 4 | */ |
| 5 | |
| 6 | #include <linux/module.h> |
| 7 | #include <linux/of_platform.h> |
| 8 | #include <linux/err.h> |
| 9 | #include <linux/io.h> |
| 10 | #include <linux/delay.h> |
| 11 | |
| 12 | #include "ci_hdrc_imx.h" |
| 13 | |
| 14 | #define MX25_USB_PHY_CTRL_OFFSET 0x08 |
| 15 | #define MX25_BM_EXTERNAL_VBUS_DIVIDER BIT(23) |
| 16 | |
| 17 | #define MX25_EHCI_INTERFACE_SINGLE_UNI (2 << 0) |
| 18 | #define MX25_EHCI_INTERFACE_DIFF_UNI (0 << 0) |
| 19 | #define MX25_EHCI_INTERFACE_MASK (0xf) |
| 20 | |
| 21 | #define MX25_OTG_SIC_SHIFT 29 |
| 22 | #define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT) |
| 23 | #define MX25_OTG_PM_BIT BIT(24) |
| 24 | #define MX25_OTG_PP_BIT BIT(11) |
| 25 | #define MX25_OTG_OCPOL_BIT BIT(3) |
| 26 | |
| 27 | #define MX25_H1_SIC_SHIFT 21 |
| 28 | #define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT) |
| 29 | #define MX25_H1_PP_BIT BIT(18) |
| 30 | #define MX25_H1_PM_BIT BIT(16) |
| 31 | #define MX25_H1_IPPUE_UP_BIT BIT(7) |
| 32 | #define MX25_H1_IPPUE_DOWN_BIT BIT(6) |
| 33 | #define MX25_H1_TLL_BIT BIT(5) |
| 34 | #define MX25_H1_USBTE_BIT BIT(4) |
| 35 | #define MX25_H1_OCPOL_BIT BIT(2) |
| 36 | |
| 37 | #define MX27_H1_PM_BIT BIT(8) |
| 38 | #define MX27_H2_PM_BIT BIT(16) |
| 39 | #define MX27_OTG_PM_BIT BIT(24) |
| 40 | |
| 41 | #define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08 |
| 42 | #define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c |
| 43 | #define MX53_USB_CTRL_1_OFFSET 0x10 |
| 44 | #define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK (0x11 << 2) |
| 45 | #define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI BIT(2) |
| 46 | #define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK (0x11 << 6) |
| 47 | #define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI BIT(6) |
| 48 | #define MX53_USB_UH2_CTRL_OFFSET 0x14 |
| 49 | #define MX53_USB_UH3_CTRL_OFFSET 0x18 |
| 50 | #define MX53_USB_CLKONOFF_CTRL_OFFSET 0x24 |
| 51 | #define MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF BIT(21) |
| 52 | #define MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF BIT(22) |
| 53 | #define MX53_BM_OVER_CUR_DIS_H1 BIT(5) |
| 54 | #define MX53_BM_OVER_CUR_DIS_OTG BIT(8) |
| 55 | #define MX53_BM_OVER_CUR_DIS_UHx BIT(30) |
| 56 | #define MX53_USB_CTRL_1_UH2_ULPI_EN BIT(26) |
| 57 | #define MX53_USB_CTRL_1_UH3_ULPI_EN BIT(27) |
| 58 | #define MX53_USB_UHx_CTRL_WAKE_UP_EN BIT(7) |
| 59 | #define MX53_USB_UHx_CTRL_ULPI_INT_EN BIT(8) |
| 60 | #define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3 |
| 61 | #define MX53_USB_PLL_DIV_24_MHZ 0x01 |
| 62 | |
| 63 | #define MX6_BM_NON_BURST_SETTING BIT(1) |
| 64 | #define MX6_BM_OVER_CUR_DIS BIT(7) |
| 65 | #define MX6_BM_OVER_CUR_POLARITY BIT(8) |
| 66 | #define MX6_BM_WAKEUP_ENABLE BIT(10) |
| 67 | #define MX6_BM_ID_WAKEUP BIT(16) |
| 68 | #define MX6_BM_VBUS_WAKEUP BIT(17) |
| 69 | #define MX6SX_BM_DPDM_WAKEUP_EN BIT(29) |
| 70 | #define MX6_BM_WAKEUP_INTR BIT(31) |
| 71 | #define MX6_USB_OTG1_PHY_CTRL 0x18 |
| 72 | /* For imx6dql, it is host-only controller, for later imx6, it is otg's */ |
| 73 | #define MX6_USB_OTG2_PHY_CTRL 0x1c |
| 74 | #define MX6SX_USB_VBUS_WAKEUP_SOURCE(v) (v << 8) |
| 75 | #define MX6SX_USB_VBUS_WAKEUP_SOURCE_VBUS MX6SX_USB_VBUS_WAKEUP_SOURCE(0) |
| 76 | #define MX6SX_USB_VBUS_WAKEUP_SOURCE_AVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(1) |
| 77 | #define MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(2) |
| 78 | #define MX6SX_USB_VBUS_WAKEUP_SOURCE_SESS_END MX6SX_USB_VBUS_WAKEUP_SOURCE(3) |
| 79 | |
| 80 | #define VF610_OVER_CUR_DIS BIT(7) |
| 81 | |
| 82 | #define MX7D_USBNC_USB_CTRL2 0x4 |
| 83 | #define MX7D_USB_VBUS_WAKEUP_SOURCE_MASK 0x3 |
| 84 | #define MX7D_USB_VBUS_WAKEUP_SOURCE(v) (v << 0) |
| 85 | #define MX7D_USB_VBUS_WAKEUP_SOURCE_VBUS MX7D_USB_VBUS_WAKEUP_SOURCE(0) |
| 86 | #define MX7D_USB_VBUS_WAKEUP_SOURCE_AVALID MX7D_USB_VBUS_WAKEUP_SOURCE(1) |
| 87 | #define MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID MX7D_USB_VBUS_WAKEUP_SOURCE(2) |
| 88 | #define MX7D_USB_VBUS_WAKEUP_SOURCE_SESS_END MX7D_USB_VBUS_WAKEUP_SOURCE(3) |
| 89 | |
| 90 | struct usbmisc_ops { |
| 91 | /* It's called once when probe a usb device */ |
| 92 | int (*init)(struct imx_usbmisc_data *data); |
| 93 | /* It's called once after adding a usb device */ |
| 94 | int (*post)(struct imx_usbmisc_data *data); |
| 95 | /* It's called when we need to enable/disable usb wakeup */ |
| 96 | int (*set_wakeup)(struct imx_usbmisc_data *data, bool enabled); |
| 97 | }; |
| 98 | |
| 99 | struct imx_usbmisc { |
| 100 | void __iomem *base; |
| 101 | spinlock_t lock; |
| 102 | const struct usbmisc_ops *ops; |
| 103 | }; |
| 104 | |
| 105 | static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data); |
| 106 | |
| 107 | static int usbmisc_imx25_init(struct imx_usbmisc_data *data) |
| 108 | { |
| 109 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
| 110 | unsigned long flags; |
| 111 | u32 val = 0; |
| 112 | |
| 113 | if (data->index > 1) |
| 114 | return -EINVAL; |
| 115 | |
| 116 | spin_lock_irqsave(&usbmisc->lock, flags); |
| 117 | switch (data->index) { |
| 118 | case 0: |
| 119 | val = readl(usbmisc->base); |
| 120 | val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT); |
| 121 | val |= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT; |
| 122 | val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT); |
| 123 | writel(val, usbmisc->base); |
| 124 | break; |
| 125 | case 1: |
| 126 | val = readl(usbmisc->base); |
| 127 | val &= ~(MX25_H1_SIC_MASK | MX25_H1_PP_BIT | MX25_H1_IPPUE_UP_BIT); |
| 128 | val |= (MX25_EHCI_INTERFACE_SINGLE_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT; |
| 129 | val |= (MX25_H1_PM_BIT | MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT | |
| 130 | MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT); |
| 131 | |
| 132 | writel(val, usbmisc->base); |
| 133 | |
| 134 | break; |
| 135 | } |
| 136 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
| 137 | |
| 138 | return 0; |
| 139 | } |
| 140 | |
| 141 | static int usbmisc_imx25_post(struct imx_usbmisc_data *data) |
| 142 | { |
| 143 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
| 144 | void __iomem *reg; |
| 145 | unsigned long flags; |
| 146 | u32 val; |
| 147 | |
| 148 | if (data->index > 2) |
| 149 | return -EINVAL; |
| 150 | |
| 151 | if (data->index) |
| 152 | return 0; |
| 153 | |
| 154 | spin_lock_irqsave(&usbmisc->lock, flags); |
| 155 | reg = usbmisc->base + MX25_USB_PHY_CTRL_OFFSET; |
| 156 | val = readl(reg); |
| 157 | |
| 158 | if (data->evdo) |
| 159 | val |= MX25_BM_EXTERNAL_VBUS_DIVIDER; |
| 160 | else |
| 161 | val &= ~MX25_BM_EXTERNAL_VBUS_DIVIDER; |
| 162 | |
| 163 | writel(val, reg); |
| 164 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
| 165 | usleep_range(5000, 10000); /* needed to stabilize voltage */ |
| 166 | |
| 167 | return 0; |
| 168 | } |
| 169 | |
| 170 | static int usbmisc_imx27_init(struct imx_usbmisc_data *data) |
| 171 | { |
| 172 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
| 173 | unsigned long flags; |
| 174 | u32 val; |
| 175 | |
| 176 | switch (data->index) { |
| 177 | case 0: |
| 178 | val = MX27_OTG_PM_BIT; |
| 179 | break; |
| 180 | case 1: |
| 181 | val = MX27_H1_PM_BIT; |
| 182 | break; |
| 183 | case 2: |
| 184 | val = MX27_H2_PM_BIT; |
| 185 | break; |
| 186 | default: |
| 187 | return -EINVAL; |
| 188 | } |
| 189 | |
| 190 | spin_lock_irqsave(&usbmisc->lock, flags); |
| 191 | if (data->disable_oc) |
| 192 | val = readl(usbmisc->base) | val; |
| 193 | else |
| 194 | val = readl(usbmisc->base) & ~val; |
| 195 | writel(val, usbmisc->base); |
| 196 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
| 197 | |
| 198 | return 0; |
| 199 | } |
| 200 | |
| 201 | static int usbmisc_imx53_init(struct imx_usbmisc_data *data) |
| 202 | { |
| 203 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
| 204 | void __iomem *reg = NULL; |
| 205 | unsigned long flags; |
| 206 | u32 val = 0; |
| 207 | |
| 208 | if (data->index > 3) |
| 209 | return -EINVAL; |
| 210 | |
| 211 | /* Select a 24 MHz reference clock for the PHY */ |
| 212 | val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET); |
| 213 | val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK; |
| 214 | val |= MX53_USB_PLL_DIV_24_MHZ; |
| 215 | writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET); |
| 216 | |
| 217 | spin_lock_irqsave(&usbmisc->lock, flags); |
| 218 | |
| 219 | switch (data->index) { |
| 220 | case 0: |
| 221 | if (data->disable_oc) { |
| 222 | reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET; |
| 223 | val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG; |
| 224 | writel(val, reg); |
| 225 | } |
| 226 | break; |
| 227 | case 1: |
| 228 | if (data->disable_oc) { |
| 229 | reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET; |
| 230 | val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1; |
| 231 | writel(val, reg); |
| 232 | } |
| 233 | break; |
| 234 | case 2: |
| 235 | if (data->ulpi) { |
| 236 | /* set USBH2 into ULPI-mode. */ |
| 237 | reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET; |
| 238 | val = readl(reg) | MX53_USB_CTRL_1_UH2_ULPI_EN; |
| 239 | /* select ULPI clock */ |
| 240 | val &= ~MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK; |
| 241 | val |= MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI; |
| 242 | writel(val, reg); |
| 243 | /* Set interrupt wake up enable */ |
| 244 | reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET; |
| 245 | val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN |
| 246 | | MX53_USB_UHx_CTRL_ULPI_INT_EN; |
| 247 | writel(val, reg); |
| 248 | if (is_imx53_usbmisc(data)) { |
| 249 | /* Disable internal 60Mhz clock */ |
| 250 | reg = usbmisc->base + |
| 251 | MX53_USB_CLKONOFF_CTRL_OFFSET; |
| 252 | val = readl(reg) | |
| 253 | MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF; |
| 254 | writel(val, reg); |
| 255 | } |
| 256 | |
| 257 | } |
| 258 | if (data->disable_oc) { |
| 259 | reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET; |
| 260 | val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx; |
| 261 | writel(val, reg); |
| 262 | } |
| 263 | break; |
| 264 | case 3: |
| 265 | if (data->ulpi) { |
| 266 | /* set USBH3 into ULPI-mode. */ |
| 267 | reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET; |
| 268 | val = readl(reg) | MX53_USB_CTRL_1_UH3_ULPI_EN; |
| 269 | /* select ULPI clock */ |
| 270 | val &= ~MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK; |
| 271 | val |= MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI; |
| 272 | writel(val, reg); |
| 273 | /* Set interrupt wake up enable */ |
| 274 | reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET; |
| 275 | val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN |
| 276 | | MX53_USB_UHx_CTRL_ULPI_INT_EN; |
| 277 | writel(val, reg); |
| 278 | |
| 279 | if (is_imx53_usbmisc(data)) { |
| 280 | /* Disable internal 60Mhz clock */ |
| 281 | reg = usbmisc->base + |
| 282 | MX53_USB_CLKONOFF_CTRL_OFFSET; |
| 283 | val = readl(reg) | |
| 284 | MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF; |
| 285 | writel(val, reg); |
| 286 | } |
| 287 | } |
| 288 | if (data->disable_oc) { |
| 289 | reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET; |
| 290 | val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx; |
| 291 | writel(val, reg); |
| 292 | } |
| 293 | break; |
| 294 | } |
| 295 | |
| 296 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
| 297 | |
| 298 | return 0; |
| 299 | } |
| 300 | |
| 301 | static int usbmisc_imx6q_set_wakeup |
| 302 | (struct imx_usbmisc_data *data, bool enabled) |
| 303 | { |
| 304 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
| 305 | unsigned long flags; |
| 306 | u32 val; |
| 307 | u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE | |
| 308 | MX6_BM_VBUS_WAKEUP | MX6_BM_ID_WAKEUP); |
| 309 | int ret = 0; |
| 310 | |
| 311 | if (data->index > 3) |
| 312 | return -EINVAL; |
| 313 | |
| 314 | spin_lock_irqsave(&usbmisc->lock, flags); |
| 315 | val = readl(usbmisc->base + data->index * 4); |
| 316 | if (enabled) { |
| 317 | val |= wakeup_setting; |
| 318 | } else { |
| 319 | if (val & MX6_BM_WAKEUP_INTR) |
| 320 | pr_debug("wakeup int at ci_hdrc.%d\n", data->index); |
| 321 | val &= ~wakeup_setting; |
| 322 | } |
| 323 | writel(val, usbmisc->base + data->index * 4); |
| 324 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
| 325 | |
| 326 | return ret; |
| 327 | } |
| 328 | |
| 329 | static int usbmisc_imx6q_init(struct imx_usbmisc_data *data) |
| 330 | { |
| 331 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
| 332 | unsigned long flags; |
| 333 | u32 reg; |
| 334 | |
| 335 | if (data->index > 3) |
| 336 | return -EINVAL; |
| 337 | |
| 338 | spin_lock_irqsave(&usbmisc->lock, flags); |
| 339 | |
| 340 | reg = readl(usbmisc->base + data->index * 4); |
| 341 | if (data->disable_oc) { |
| 342 | reg |= MX6_BM_OVER_CUR_DIS; |
| 343 | } else if (data->oc_polarity == 1) { |
| 344 | /* High active */ |
| 345 | reg &= ~(MX6_BM_OVER_CUR_DIS | MX6_BM_OVER_CUR_POLARITY); |
| 346 | } |
| 347 | writel(reg, usbmisc->base + data->index * 4); |
| 348 | |
| 349 | /* SoC non-burst setting */ |
| 350 | reg = readl(usbmisc->base + data->index * 4); |
| 351 | writel(reg | MX6_BM_NON_BURST_SETTING, |
| 352 | usbmisc->base + data->index * 4); |
| 353 | |
| 354 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
| 355 | |
| 356 | usbmisc_imx6q_set_wakeup(data, false); |
| 357 | |
| 358 | return 0; |
| 359 | } |
| 360 | |
| 361 | static int usbmisc_imx6sx_init(struct imx_usbmisc_data *data) |
| 362 | { |
| 363 | void __iomem *reg = NULL; |
| 364 | unsigned long flags; |
| 365 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
| 366 | u32 val; |
| 367 | |
| 368 | usbmisc_imx6q_init(data); |
| 369 | |
| 370 | if (data->index == 0 || data->index == 1) { |
| 371 | reg = usbmisc->base + MX6_USB_OTG1_PHY_CTRL + data->index * 4; |
| 372 | spin_lock_irqsave(&usbmisc->lock, flags); |
| 373 | /* Set vbus wakeup source as bvalid */ |
| 374 | val = readl(reg); |
| 375 | writel(val | MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID, reg); |
| 376 | /* |
| 377 | * Disable dp/dm wakeup in device mode when vbus is |
| 378 | * not there. |
| 379 | */ |
| 380 | val = readl(usbmisc->base + data->index * 4); |
| 381 | writel(val & ~MX6SX_BM_DPDM_WAKEUP_EN, |
| 382 | usbmisc->base + data->index * 4); |
| 383 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
| 384 | } |
| 385 | |
| 386 | return 0; |
| 387 | } |
| 388 | |
| 389 | static int usbmisc_vf610_init(struct imx_usbmisc_data *data) |
| 390 | { |
| 391 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
| 392 | u32 reg; |
| 393 | |
| 394 | /* |
| 395 | * Vybrid only has one misc register set, but in two different |
| 396 | * areas. These is reflected in two instances of this driver. |
| 397 | */ |
| 398 | if (data->index >= 1) |
| 399 | return -EINVAL; |
| 400 | |
| 401 | if (data->disable_oc) { |
| 402 | reg = readl(usbmisc->base); |
| 403 | writel(reg | VF610_OVER_CUR_DIS, usbmisc->base); |
| 404 | } |
| 405 | |
| 406 | return 0; |
| 407 | } |
| 408 | |
| 409 | static int usbmisc_imx7d_set_wakeup |
| 410 | (struct imx_usbmisc_data *data, bool enabled) |
| 411 | { |
| 412 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
| 413 | unsigned long flags; |
| 414 | u32 val; |
| 415 | u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE | |
| 416 | MX6_BM_VBUS_WAKEUP | MX6_BM_ID_WAKEUP); |
| 417 | |
| 418 | spin_lock_irqsave(&usbmisc->lock, flags); |
| 419 | val = readl(usbmisc->base); |
| 420 | if (enabled) { |
| 421 | writel(val | wakeup_setting, usbmisc->base); |
| 422 | } else { |
| 423 | if (val & MX6_BM_WAKEUP_INTR) |
| 424 | dev_dbg(data->dev, "wakeup int\n"); |
| 425 | writel(val & ~wakeup_setting, usbmisc->base); |
| 426 | } |
| 427 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
| 428 | |
| 429 | return 0; |
| 430 | } |
| 431 | |
| 432 | static int usbmisc_imx7d_init(struct imx_usbmisc_data *data) |
| 433 | { |
| 434 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
| 435 | unsigned long flags; |
| 436 | u32 reg; |
| 437 | |
| 438 | if (data->index >= 1) |
| 439 | return -EINVAL; |
| 440 | |
| 441 | spin_lock_irqsave(&usbmisc->lock, flags); |
| 442 | reg = readl(usbmisc->base); |
| 443 | if (data->disable_oc) { |
| 444 | reg |= MX6_BM_OVER_CUR_DIS; |
| 445 | } else if (data->oc_polarity == 1) { |
| 446 | /* High active */ |
| 447 | reg &= ~(MX6_BM_OVER_CUR_DIS | MX6_BM_OVER_CUR_POLARITY); |
| 448 | } |
| 449 | writel(reg, usbmisc->base); |
| 450 | |
| 451 | reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2); |
| 452 | reg &= ~MX7D_USB_VBUS_WAKEUP_SOURCE_MASK; |
| 453 | writel(reg | MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID, |
| 454 | usbmisc->base + MX7D_USBNC_USB_CTRL2); |
| 455 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
| 456 | |
| 457 | usbmisc_imx7d_set_wakeup(data, false); |
| 458 | |
| 459 | return 0; |
| 460 | } |
| 461 | |
| 462 | static const struct usbmisc_ops imx25_usbmisc_ops = { |
| 463 | .init = usbmisc_imx25_init, |
| 464 | .post = usbmisc_imx25_post, |
| 465 | }; |
| 466 | |
| 467 | static const struct usbmisc_ops imx27_usbmisc_ops = { |
| 468 | .init = usbmisc_imx27_init, |
| 469 | }; |
| 470 | |
| 471 | static const struct usbmisc_ops imx51_usbmisc_ops = { |
| 472 | .init = usbmisc_imx53_init, |
| 473 | }; |
| 474 | |
| 475 | static const struct usbmisc_ops imx53_usbmisc_ops = { |
| 476 | .init = usbmisc_imx53_init, |
| 477 | }; |
| 478 | |
| 479 | static const struct usbmisc_ops imx6q_usbmisc_ops = { |
| 480 | .set_wakeup = usbmisc_imx6q_set_wakeup, |
| 481 | .init = usbmisc_imx6q_init, |
| 482 | }; |
| 483 | |
| 484 | static const struct usbmisc_ops vf610_usbmisc_ops = { |
| 485 | .init = usbmisc_vf610_init, |
| 486 | }; |
| 487 | |
| 488 | static const struct usbmisc_ops imx6sx_usbmisc_ops = { |
| 489 | .set_wakeup = usbmisc_imx6q_set_wakeup, |
| 490 | .init = usbmisc_imx6sx_init, |
| 491 | }; |
| 492 | |
| 493 | static const struct usbmisc_ops imx7d_usbmisc_ops = { |
| 494 | .init = usbmisc_imx7d_init, |
| 495 | .set_wakeup = usbmisc_imx7d_set_wakeup, |
| 496 | }; |
| 497 | |
| 498 | static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data) |
| 499 | { |
| 500 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
| 501 | |
| 502 | return usbmisc->ops == &imx53_usbmisc_ops; |
| 503 | } |
| 504 | |
| 505 | int imx_usbmisc_init(struct imx_usbmisc_data *data) |
| 506 | { |
| 507 | struct imx_usbmisc *usbmisc; |
| 508 | |
| 509 | if (!data) |
| 510 | return 0; |
| 511 | |
| 512 | usbmisc = dev_get_drvdata(data->dev); |
| 513 | if (!usbmisc->ops->init) |
| 514 | return 0; |
| 515 | return usbmisc->ops->init(data); |
| 516 | } |
| 517 | EXPORT_SYMBOL_GPL(imx_usbmisc_init); |
| 518 | |
| 519 | int imx_usbmisc_init_post(struct imx_usbmisc_data *data) |
| 520 | { |
| 521 | struct imx_usbmisc *usbmisc; |
| 522 | |
| 523 | if (!data) |
| 524 | return 0; |
| 525 | |
| 526 | usbmisc = dev_get_drvdata(data->dev); |
| 527 | if (!usbmisc->ops->post) |
| 528 | return 0; |
| 529 | return usbmisc->ops->post(data); |
| 530 | } |
| 531 | EXPORT_SYMBOL_GPL(imx_usbmisc_init_post); |
| 532 | |
| 533 | int imx_usbmisc_set_wakeup(struct imx_usbmisc_data *data, bool enabled) |
| 534 | { |
| 535 | struct imx_usbmisc *usbmisc; |
| 536 | |
| 537 | if (!data) |
| 538 | return 0; |
| 539 | |
| 540 | usbmisc = dev_get_drvdata(data->dev); |
| 541 | if (!usbmisc->ops->set_wakeup) |
| 542 | return 0; |
| 543 | return usbmisc->ops->set_wakeup(data, enabled); |
| 544 | } |
| 545 | EXPORT_SYMBOL_GPL(imx_usbmisc_set_wakeup); |
| 546 | |
| 547 | static const struct of_device_id usbmisc_imx_dt_ids[] = { |
| 548 | { |
| 549 | .compatible = "fsl,imx25-usbmisc", |
| 550 | .data = &imx25_usbmisc_ops, |
| 551 | }, |
| 552 | { |
| 553 | .compatible = "fsl,imx35-usbmisc", |
| 554 | .data = &imx25_usbmisc_ops, |
| 555 | }, |
| 556 | { |
| 557 | .compatible = "fsl,imx27-usbmisc", |
| 558 | .data = &imx27_usbmisc_ops, |
| 559 | }, |
| 560 | { |
| 561 | .compatible = "fsl,imx51-usbmisc", |
| 562 | .data = &imx51_usbmisc_ops, |
| 563 | }, |
| 564 | { |
| 565 | .compatible = "fsl,imx53-usbmisc", |
| 566 | .data = &imx53_usbmisc_ops, |
| 567 | }, |
| 568 | { |
| 569 | .compatible = "fsl,imx6q-usbmisc", |
| 570 | .data = &imx6q_usbmisc_ops, |
| 571 | }, |
| 572 | { |
| 573 | .compatible = "fsl,vf610-usbmisc", |
| 574 | .data = &vf610_usbmisc_ops, |
| 575 | }, |
| 576 | { |
| 577 | .compatible = "fsl,imx6sx-usbmisc", |
| 578 | .data = &imx6sx_usbmisc_ops, |
| 579 | }, |
| 580 | { |
| 581 | .compatible = "fsl,imx6ul-usbmisc", |
| 582 | .data = &imx6sx_usbmisc_ops, |
| 583 | }, |
| 584 | { |
| 585 | .compatible = "fsl,imx7d-usbmisc", |
| 586 | .data = &imx7d_usbmisc_ops, |
| 587 | }, |
| 588 | { /* sentinel */ } |
| 589 | }; |
| 590 | MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids); |
| 591 | |
| 592 | static int usbmisc_imx_probe(struct platform_device *pdev) |
| 593 | { |
| 594 | struct resource *res; |
| 595 | struct imx_usbmisc *data; |
| 596 | const struct of_device_id *of_id; |
| 597 | |
| 598 | of_id = of_match_device(usbmisc_imx_dt_ids, &pdev->dev); |
| 599 | if (!of_id) |
| 600 | return -ENODEV; |
| 601 | |
| 602 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); |
| 603 | if (!data) |
| 604 | return -ENOMEM; |
| 605 | |
| 606 | spin_lock_init(&data->lock); |
| 607 | |
| 608 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 609 | data->base = devm_ioremap_resource(&pdev->dev, res); |
| 610 | if (IS_ERR(data->base)) |
| 611 | return PTR_ERR(data->base); |
| 612 | |
| 613 | data->ops = (const struct usbmisc_ops *)of_id->data; |
| 614 | platform_set_drvdata(pdev, data); |
| 615 | |
| 616 | return 0; |
| 617 | } |
| 618 | |
| 619 | static int usbmisc_imx_remove(struct platform_device *pdev) |
| 620 | { |
| 621 | return 0; |
| 622 | } |
| 623 | |
| 624 | static struct platform_driver usbmisc_imx_driver = { |
| 625 | .probe = usbmisc_imx_probe, |
| 626 | .remove = usbmisc_imx_remove, |
| 627 | .driver = { |
| 628 | .name = "usbmisc_imx", |
| 629 | .of_match_table = usbmisc_imx_dt_ids, |
| 630 | }, |
| 631 | }; |
| 632 | |
| 633 | module_platform_driver(usbmisc_imx_driver); |
| 634 | |
| 635 | MODULE_ALIAS("platform:usbmisc-imx"); |
| 636 | MODULE_LICENSE("GPL v2"); |
| 637 | MODULE_DESCRIPTION("driver for imx usb non-core registers"); |
| 638 | MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>"); |